JP2004507081A - 集積トランジスタ素子 - Google Patents

集積トランジスタ素子 Download PDF

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Publication number
JP2004507081A
JP2004507081A JP2002520272A JP2002520272A JP2004507081A JP 2004507081 A JP2004507081 A JP 2004507081A JP 2002520272 A JP2002520272 A JP 2002520272A JP 2002520272 A JP2002520272 A JP 2002520272A JP 2004507081 A JP2004507081 A JP 2004507081A
Authority
JP
Japan
Prior art keywords
compound semiconductor
oxide
effect transistor
field effect
enhancement mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002520272A
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English (en)
Japanese (ja)
Other versions
JP2004507081A5 (enExample
Inventor
ブラドック，　ウォルター，　デビッド，　Ｉｖ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/636,484 external-priority patent/US6936900B1/en
Application filed by Individual filed Critical Individual
Publication of JP2004507081A publication Critical patent/JP2004507081A/ja
Publication of JP2004507081A5 publication Critical patent/JP2004507081A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/801—FETs having heterojunction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
JP2002520272A 2000-08-10 2001-08-10 集積トランジスタ素子 Pending JP2004507081A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/636,484 US6936900B1 (en) 2000-05-04 2000-08-10 Integrated transistor devices
PCT/US2001/025150 WO2002015233A2 (en) 2000-08-10 2001-08-10 Integrated transistor devices

Publications (2)

Publication Number Publication Date
JP2004507081A true JP2004507081A (ja) 2004-03-04
JP2004507081A5 JP2004507081A5 (enExample) 2005-03-03

Family

ID=24552107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002520272A Pending JP2004507081A (ja) 2000-08-10 2001-08-10 集積トランジスタ素子

Country Status (5)

Country Link
EP (1) EP1312122A4 (enExample)
JP (1) JP2004507081A (enExample)
KR (1) KR20030027017A (enExample)
AU (1) AU2001288239A1 (enExample)
WO (1) WO2002015233A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006507657A (ja) * 2002-01-18 2006-03-02 フリースケール セミコンダクター インコーポレイテッド ＧａＡｓをベースとする半導体構造の上に酸化膜層を有する部品及びその形成方法
JP2019012827A (ja) * 2017-06-30 2019-01-24 国立研究開発法人物質・材料研究機構 窒化ガリウム系の半導体装置及びその製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6936900B1 (en) 2000-05-04 2005-08-30 Osemi, Inc. Integrated transistor devices
AU2003217189A1 (en) * 2002-01-22 2003-09-02 Massachusetts Institute Of Technology A method of fabrication for iii-v semiconductor surface passivation
US7187045B2 (en) 2002-07-16 2007-03-06 Osemi, Inc. Junction field effect metal oxide compound semiconductor integrated transistor devices
US7382001B2 (en) * 2004-01-23 2008-06-03 International Rectifier Corporation Enhancement mode III-nitride FET
US7250627B2 (en) * 2004-03-12 2007-07-31 Hewlett-Packard Development Company, L.P. Semiconductor device
CN116072707B (zh) * 2023-02-08 2024-07-26 杭州合盛微电子有限公司 一种含稀土栅介质层的平面型SiC MOSFET及其制造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5962883A (en) * 1994-03-23 1999-10-05 Lucent Technologies Inc. Article comprising an oxide layer on a GaAs-based semiconductor body
US5665658A (en) * 1996-03-21 1997-09-09 Motorola Method of forming a dielectric layer structure
US5945718A (en) * 1998-02-12 1999-08-31 Motorola Inc. Self-aligned metal-oxide-compound semiconductor device and method of fabrication

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006507657A (ja) * 2002-01-18 2006-03-02 フリースケール セミコンダクター インコーポレイテッド ＧａＡｓをベースとする半導体構造の上に酸化膜層を有する部品及びその形成方法
JP2019012827A (ja) * 2017-06-30 2019-01-24 国立研究開発法人物質・材料研究機構 窒化ガリウム系の半導体装置及びその製造方法
JP7067702B2 (ja) 2017-06-30 2022-05-16 国立研究開発法人物質・材料研究機構 窒化ガリウム系の半導体装置及びその製造方法

Also Published As

Publication number Publication date
WO2002015233A2 (en) 2002-02-21
KR20030027017A (ko) 2003-04-03
AU2001288239A1 (en) 2002-02-25
EP1312122A4 (en) 2006-08-02
WO2002015233A3 (en) 2002-06-27
EP1312122A2 (en) 2003-05-21

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