EP1312122A4 - INTEGRATED TRANSISTOR DEVICES - Google Patents

INTEGRATED TRANSISTOR DEVICES

Info

Publication number
EP1312122A4
EP1312122A4 EP01967960A EP01967960A EP1312122A4 EP 1312122 A4 EP1312122 A4 EP 1312122A4 EP 01967960 A EP01967960 A EP 01967960A EP 01967960 A EP01967960 A EP 01967960A EP 1312122 A4 EP1312122 A4 EP 1312122A4
Authority
EP
European Patent Office
Prior art keywords
transistor device
integrated transistor
integrated
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01967960A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1312122A2 (en
Inventor
Walter David Braddock Iv
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/636,484 external-priority patent/US6936900B1/en
Application filed by Individual filed Critical Individual
Publication of EP1312122A2 publication Critical patent/EP1312122A2/en
Publication of EP1312122A4 publication Critical patent/EP1312122A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/801—FETs having heterojunction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
EP01967960A 2000-08-10 2001-08-10 INTEGRATED TRANSISTOR DEVICES Withdrawn EP1312122A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/636,484 US6936900B1 (en) 2000-05-04 2000-08-10 Integrated transistor devices
US636484 2000-08-10
PCT/US2001/025150 WO2002015233A2 (en) 2000-08-10 2001-08-10 Integrated transistor devices

Publications (2)

Publication Number Publication Date
EP1312122A2 EP1312122A2 (en) 2003-05-21
EP1312122A4 true EP1312122A4 (en) 2006-08-02

Family

ID=24552107

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01967960A Withdrawn EP1312122A4 (en) 2000-08-10 2001-08-10 INTEGRATED TRANSISTOR DEVICES

Country Status (5)

Country Link
EP (1) EP1312122A4 (enExample)
JP (1) JP2004507081A (enExample)
KR (1) KR20030027017A (enExample)
AU (1) AU2001288239A1 (enExample)
WO (1) WO2002015233A2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6936900B1 (en) 2000-05-04 2005-08-30 Osemi, Inc. Integrated transistor devices
US6756320B2 (en) * 2002-01-18 2004-06-29 Freescale Semiconductor, Inc. Method of forming article comprising an oxide layer on a GaAs-based semiconductor structure
WO2003063227A2 (en) * 2002-01-22 2003-07-31 Massachusetts Institute Of Technology A method of fabrication for iii-v semiconductor surface passivation
US7187045B2 (en) 2002-07-16 2007-03-06 Osemi, Inc. Junction field effect metal oxide compound semiconductor integrated transistor devices
US7382001B2 (en) * 2004-01-23 2008-06-03 International Rectifier Corporation Enhancement mode III-nitride FET
US7250627B2 (en) 2004-03-12 2007-07-31 Hewlett-Packard Development Company, L.P. Semiconductor device
JP7067702B2 (ja) * 2017-06-30 2022-05-16 国立研究開発法人物質・材料研究機構 窒化ガリウム系の半導体装置及びその製造方法
CN116072707B (zh) * 2023-02-08 2024-07-26 杭州合盛微电子有限公司 一种含稀土栅介质层的平面型SiC MOSFET及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5665658A (en) * 1996-03-21 1997-09-09 Motorola Method of forming a dielectric layer structure
US5945718A (en) * 1998-02-12 1999-08-31 Motorola Inc. Self-aligned metal-oxide-compound semiconductor device and method of fabrication
US5962883A (en) * 1994-03-23 1999-10-05 Lucent Technologies Inc. Article comprising an oxide layer on a GaAs-based semiconductor body

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5962883A (en) * 1994-03-23 1999-10-05 Lucent Technologies Inc. Article comprising an oxide layer on a GaAs-based semiconductor body
US5665658A (en) * 1996-03-21 1997-09-09 Motorola Method of forming a dielectric layer structure
US5945718A (en) * 1998-02-12 1999-08-31 Motorola Inc. Self-aligned metal-oxide-compound semiconductor device and method of fabrication

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KWO J ET AL: "Passivation of GaAs using (Ga2O3)1-x(Gd2O3)x, 0>x>1.0 films", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 75, no. 8, 23 August 1999 (1999-08-23), pages 1116 - 1118, XP002260334, ISSN: 0003-6951 *
REN F ET AL: "Ga2O3(Gd2O3)/InGaAs Enhancement-Mode n-Channel MOSFET's", IEEE ELECTRON DEVICE LETTERS, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 19, no. 8, August 1998 (1998-08-01), XP011018449, ISSN: 0741-3106 *

Also Published As

Publication number Publication date
KR20030027017A (ko) 2003-04-03
WO2002015233A2 (en) 2002-02-21
AU2001288239A1 (en) 2002-02-25
EP1312122A2 (en) 2003-05-21
JP2004507081A (ja) 2004-03-04
WO2002015233A3 (en) 2002-06-27

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20030312

AK Designated contracting states

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Extension state: AL LT LV MK RO SI

R17P Request for examination filed (corrected)

Effective date: 20030310

A4 Supplementary search report drawn up and despatched

Effective date: 20060704

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 29/778 20060101ALI20060628BHEP

Ipc: H01L 29/51 20060101AFI20060628BHEP

17Q First examination report despatched

Effective date: 20071023

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20090210