JP2004296980A - Film carrier and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a film carrier whose connection electrode can be formed at low cost by simple technique and to provide its manufacturing method. <P>SOLUTION: In the film carrier 100, a pad electrode 52 is formed on one side of an insulating substrate 11 and a connection electrode 41b is formed on the other side with a conductor which is driven into an opening 31. A plated layer 53 composed of a gold/nickel layer is formed on a part of the pad electrode 52 and on the connection electrode 41b, and the open edge of the connection electrode 41b is lower than the other side(outer mounting surface). The connection electrode 41b is formed of one kind of metal which is selected among gold, silver, copper, lead, and tin, or, of an alloy whose main component is these metals. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a film carrier used as a connection medium when connecting a semiconductor element to an external substrate or the like, and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, there has been an increasing demand for smaller and lighter LSIs so as to be able to respond to miniaturization, higher density, and higher performance of electronic devices. Above all, FBGA (Fine Pitch Ball Grid Array) packages of a memory type of 100 pins or less and a logic type of 100 to 300 pin class are mass-produced as CSPs compatible with mobile phones, digital videos, digital cameras, and the like. Furthermore, a 0.5 mm ball pitch FBGA has been adopted for the purpose of miniaturization. However, the bonding behavior at the time of secondary mounting using fine solder balls is different from the behavior of normal secondary mounting, and defects such as solder constriction and solder ball drop occur, thus causing a problem in securing reliability.
[0003]
The structure of a conventional film carrier used for FBGA and the behavior of solder balls will be described.
First, a three-layer film carrier generally used for FBGA will be briefly described.
5 (a) to 5 (e) are schematic sectional views showing a manufacturing process and a mounting process of a conventional 0.8 mm ball pitch FBGA film carrier.
First, an opening 131 is formed using a mold on a film substrate with an adhesive layer having an adhesive layer 121 formed on an insulating film 111 (see FIG. 5A).
Usually, a polyimide film is used as the insulating film 111, and the thickness thereof is generally 50 μm or more, and the thickness of the adhesive layer 121 is generally 12 μm. .
[0004]
Next, a copper foil having a desired film thickness is bonded to form a conductor layer 141 (see FIG. 5B).
As the thickness of the conductor layer 141, 12 μm to 18 μm is often used.
Next, the film layer 300 on which the desired pad electrode 141a is formed by patterning the conductor layer 141 using photolithography and etching techniques is produced (see FIG. 5C).
[0005]
Further, the semiconductor element 161 is mounted on the film carrier 300, the solder bump 151 is formed, and a primary mounting semiconductor package (interposer) is obtained (see FIG. 5D). At this time, the use of an underfill 191 material, a sealing material 171 and the like are used to improve the connection strength and the insulation.
Further, the secondary mounting is performed by soldering the solder bumps 151 of the primary mounting semiconductor package and the lands 181 of the printed wiring board (see FIG. 5E).
Here, in the conventional 0.8 mm ball pitch FBGA mounting, defects such as solder ball drop and solder constriction after solder ball mounting hardly occur.
[0006]
However, it has become necessary to set the solder ball pitch to 0.5 mm as a configuration corresponding to lightness and shortness. Due to the reduction in the solder ball pitch, it is necessary to keep the thickness of the insulating film base as it is and to reduce the diameter of the opening and the diameter of the solder ball.
FIGS. 6A and 6B are explanatory diagrams showing the relationship between the thickness of the insulating film and the opening hole diameter.
By reducing the hole diameter λ of the opening 131 to λ ′ without changing the thickness t of the insulating film 111, the aspect ratio (t / λ ′) of the opening 131a is increased, and the printed wiring board after the solder balls are mounted is mounted. When the solder is connected to the land 181, the area of solder contact with the back surface of the pad electrode 141 a of the film carrier decreases, and a solder ball drop phenomenon (see FIG. 7A) and a solder constriction phenomenon (see FIG. 7B) occur. As a result, a problem of an open defect occurs. FIG. 7C shows a solder shape when the solder connection is normally performed.
Since the area of the electrode in the opening hole is smaller than the land area of the printed board, the solder of the solder ball part on the FBGA side may be replaced with the land on the printed board side because the solder ball drop or the solder constriction of the FBGA is smaller than the land area of the printed board. It is caused by being sucked.
[0007]
As a technique for avoiding the above-described solder ball drop or solder constriction defect, a method of forming a connection electrode 132 by copper plating or the like in the opening 131 after forming an opening 131 to raise the contact surface of the solder ball (for example, see Patent Reference 1) has been proposed (see FIG. 8A), and technical considerations have been made on the solder ball drop phenomenon (for example, see Non-Patent Document 1).
FIG. 8B shows a semiconductor package in which the solder bump 152 is formed on the raised connection electrode 132, the semiconductor element 161 is mounted, and the secondary mounting is performed.
This method reduces solder contact failure, but usually requires a few tens of μm to raise the connection electrode 132 by plating, requires considerable plating time, and costs the connection electrode 132 to occupy the film carrier. Cannot be ignored. In addition, it is difficult to set plating conditions, the plating thickness varies in the connection electrode 132, and there is a problem that a via hole with insufficient height raises a problem such as a solder ball drop or a solder constriction.
[0008]
[Patent Document 1]
JP-A-10-41356 [Non-Patent Document 1]
Journal of Japan Institute of Electronics Packaging, Vol. 4, no. 1, 2001, P63-67
[0009]
[Problems to be solved by the invention]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a film carrier on which connection electrodes can be formed technically easily and at low cost, and a method for manufacturing the same.
[0010]
[Means for Solving the Problems]
In order to solve the above problem in the present invention, first, in claim 1, the pad electrode 52 is formed on one surface of the insulating base material 11 and the connection electrode 41b is formed on the other surface. 52 is a film carrier in which the connection electrode 41b is electrically connected to the connection electrode 41b, wherein the connection electrode 41b is formed by a driving conductor 41a formed by punching a metal foil 41. is there.
[0011]
2. The film carrier according to claim 1, wherein the surface position of the connection electrode 41b is lower than the other surface (outer surface) of the insulating base material 11.
[0012]
According to a third aspect of the present invention, in the film carrier according to the first or second aspect, the connection electrode 41b is formed of copper, lead, tin, or an alloy containing these metals as main components. Things.
[0013]
The film carrier according to any one of claims 1 to 3, wherein the pad electrode 52 is formed of the copper foil 21 and the reinforcing conductor layer 51 having a thickness of 2 µm or more. It is what it was.
[0014]
Furthermore, a fifth aspect of the present invention is the method for producing a film carrier according to any one of the first to fourth aspects, wherein at least the following steps are provided.
(A) a step of preparing a single-sided copper-clad laminate sheet 10 in which a copper foil 21 is laminated on one side of an insulating base material 11;
(B) A step of forming an opening 31 at a predetermined position of the single-sided copper-clad laminated sheet 10 using the press dies 71 and 72.
(C) The metal foil 41 having a predetermined thickness is placed on the copper foil 21 side of the laminated sheet in which the opening 31 is formed, and the conductors 41 a are formed in the opening 31 using the press dies 73 and 74. Process.
(D) A step of pushing back the implanted conductor 41a to the upper surface of the copper foil 21 using the press dies 75 and 76 to form the connection electrode 41b in which the upper end of the implanted conductor 41a and the upper surface of the copper foil 21 are on the same plane. .
(E) A step of forming a protective resist 61 so as to cover the connection electrode 41b and forming a reinforcing conductor layer 51 on the copper foil 21 and the connection electrode 41b by electrolytic copper plating or the like.
(F) forming a pad electrode 52 by patterning the copper foil 21 and the reinforcing conductor layer 51;
(G) A step of forming a solder resist 62 and forming a plating layer 53 made of nickel or gold plating on the connection electrode 41b and a part of the pad electrode 52.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described.
FIG. 1 is a schematic partial cross-sectional view showing one embodiment of the film carrier of the present invention.
In the film carrier 100 according to the first aspect of the present invention, the pad electrode 52 is formed on one surface of the insulating base material 11, and the connection electrode 41 b is formed on the other surface by the implanted conductor formed in the opening 31. The pad electrode 52 and the connection electrode 41b are electrically connected.
Here, an organic resin film typified by a polyimide film is used as the insulating base material 11, and the film thickness is generally 50 μm or more.
Further, a plating layer 53 made of a nickel or gold plating layer is formed on a part of the pad electrode 52 and the connection electrode 41b.
[0016]
The open end of the connection electrode 41b is lower than the other surface (exterior surface) of the insulating base material 11, so that the solder balls can be easily set, and the solder bonding between the film carrier and the printed wiring circuit board can be performed. It facilitates and improves the bonding strength.
The height of the connection electrode 41b is controlled by the thickness of the metal foil to be driven.
[0017]
The connection electrode 41b is formed of one kind of metal selected from copper, lead, tin, gold, silver and the like, or an alloy containing these metals as main components. As the alloy, for example, Sn-Cn, Sn-Bi, Sn-Ag-Cu, Ni-Pd-Au, Sn-Ag-Bi-Cu, Sn-Lu, Pb-Zn-Al, Sn-Ag-Cu- Bi and the like can be mentioned.
[0018]
The pad electrode 52 formed on one surface of the insulating base material 11 is formed by patterning the copper foil 21 and the reinforcing conductor layer 51 of 2 μm or more to improve the physical strength of the pad electrode 52. This is to complete the electrical connection with the connection electrode 41b.
[0019]
Hereinafter, the method for producing the film carrier of the present invention will be described.
3 (a) to 3 (e) and 4 (f) to 4 (j) are schematic partial cross-sectional views showing the steps of the method for producing a film carrier of the present invention.
First, a single-sided copper foil laminated sheet 10 in which a copper foil 21 is laminated on one side of an insulating base material 11 made of a long polyimide film or the like is prepared (see FIG. 3A).
[0020]
Next, alignment mark holes and sprocket holes (especially not shown) are formed at both ends of the single-sided copper foil laminated sheet 10 along the longitudinal direction by a punching press. Next, using a punching press die including a die 71 having an opening punch 71a and a receiving die 72 with the alignment mark hole of the single-sided copper foil laminated sheet 10 as a base point (see FIG. 3B), An opening 31 is formed at a predetermined position of the copper foil laminated sheet 10 (see FIG. 3C).
[0021]
Next, the metal foil 41 having a predetermined thickness is placed on the copper foil 21 side of the laminated sheet in which the opening 31 is formed, and the punch 73 a of the mold 73 and the opening 31 are aligned with each other to receive the mold 74. Is set (see FIG. 3D), the punch 73a for pushing the mold 73 is pushed into the opening 31 with a predetermined load, and the driving conductor 41a is formed in the opening 31 (see FIG. 3E).
Here, there are a method of controlling the height of the implanted conductor 41a by the thickness of the metal foil 41 and a method of controlling the height by the etching process after forming the implanted conductor 41a. preferable.
[0022]
Next, the press punch 75a of the mold 75 and the punching conductor 41a are aligned with each other, and the flat mold 76 is set (see FIG. 4 (f)), and the press punch 75a of the mold 75 is driven with a predetermined load. When pushed into the conductor 41a, the implanted conductor 41a is pushed back to the upper surface of the copper foil 21 to form a rivet-shaped connection electrode 41b in which the upper end of the implanted conductor 41a and the upper surface of the copper foil 21 are on the same plane (FIG. 4). (G)).
[0023]
Next, a protective resist layer 61 is formed by a method such as laminating a dry film on the connection electrode 41b side of the insulating base material 11, and electrolytic copper plating or the like is performed on the copper foil 21 and the connection electrode 41b, and the thickness is 2 μm or more. (See FIG. 4H).
As described above, the reinforcing conductor layer 51 serves to improve the physical strength of the pad electrode 52 and complete the electrical connection with the connection electrode 41b.
[0024]
Next, a resist pattern is formed on the copper foil 21 and the reinforcing conductor layer 51, and a series of patterning processes such as etching are performed to form a pad electrode 52 in which the connection electrodes 41b are electrically disconnected (FIG. 4 (i)).
[0025]
Next, the protective resist layer 61 is peeled off, a solder resist pattern 62 is formed on the pad electrode 52, and electrolytic nickel plating and gold plating are performed on a part of the pad electrode 52 and the connection electrode 41b. 53 are formed to obtain the film carrier 100 of the present invention (see FIG. 4 (j)).
[0026]
Using the film carrier 100 of the present invention, the semiconductor element 81 is mounted, a solder bump is formed on the connection electrode 41b to form a primary semiconductor package (interposer), and further, it is soldered to the printed circuit board 200. FIG. 2 shows an example of the semiconductor package obtained as described above.
[0027]
In the film carrier 100 of the present invention, since the connection electrodes are formed by a punching press, the cost can be significantly reduced as compared with the conventional plating method, and the reliability of the solder joint with the printed circuit board is improved.
[0028]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples.
First, a 12 μm-thick electrolytic copper foil 21 is laminated on one surface of a long insulating base material 11 made of a heat-resistant polyimide film having a thickness of 50 μm to form a super-wide copper-clad laminate sheet 10 (see FIG. 3A). A sprocket hole for use and an alignment mark of 100 μmφ were punched and formed.
[0029]
Next, using a punching press die including a die 71 having an opening punch 71a and a receiving die 72 with the alignment mark hole of the single-sided copper foil laminated sheet 10 as a base point (see FIG. 3B), An opening 31 was formed at a predetermined position of the copper foil laminated sheet 10 (see FIG. 3C).
[0030]
Next, a metal foil 41 made of a rolled copper foil having a thickness of 60 μm is placed on the copper foil 21 side of the laminated sheet in which the opening 31 is formed, and the punch 73a for pressing the mold 73 and the opening 31 are aligned. The receiving mold 74 is set (see FIG. 3D), and a punch 73a for pushing the mold 73 is pushed into the opening 31 with a predetermined load, thereby forming a driving conductor 41a in the opening 31 (FIG. e)).
[0031]
Next, the pressing punch 75a of the mold 75 and the driving conductor 41a are aligned with each other, the flat mold 76 is set (see FIG. 4F), and the pressing punch 75a of the mold 75 is pressed with a predetermined load. Then, the implanted conductor 41a is pushed back to the upper surface of the copper foil 21 to form a rivet-shaped 52 μm-long connection electrode 41b in which the upper end of the implanted conductor 41a and the upper surface of the copper foil 21 are flush (FIG. 4 (g)). )reference).
The surface position of the connection electrode 41b was set to be 10 μm lower than the other surface (outer surface) of the insulating base material 11.
[0032]
Next, a dry film is laminated on the side of the connection electrode 41b of the insulating base material 11 and the entire surface is exposed to form a protective resist layer 61. Electrolytic copper plating is performed on the copper foil 21 and the connection electrode 41b to form a 5 μm Was formed (see FIG. 4H).
[0033]
Next, a resist pattern is formed on the copper foil 21 and the reinforcing conductor layer 51, and a series of patterning processes such as etching are performed to form a pad electrode 52 in which the connection electrodes 41b are electrically disconnected. 4 (i)).
[0034]
Next, the protective resist layer 61 is stripped with a dedicated stripping solution, a solder resist pattern 62 is formed on the pad electrode 52, and electrolytic nickel plating and electrolytic gold plating are formed on a part of the pad electrode 52 and the connection electrode 41b. Then, a plating layer 53 was formed to obtain a film carrier 100 of the present invention (see FIG. 4 (j)).
[0035]
Next, a flux treatment was applied to the film carrier 100, and a solder ball having a diameter of 300 μm was placed on the opening 31 on the connection electrode 41b and heated to form a solder bump. At this time, there was no defect such as solder constriction or void between the connection electrode 41b and good electrical continuity was obtained. Further, the solder bumps on the opening 31 had a substantially uniform spherical shape. The film carrier with the solder bumps was secondarily mounted on the printed circuit board 200, but no solder ball drop or solder necking defect was found. In addition, good results were obtained in the reliability test evaluation using the DAZ chain.
[0036]
【The invention's effect】
As described above, since the connection electrode of the film carrier of the present invention is formed by punching a metal foil by a punching press or the like, it can be manufactured easily and inexpensively technically, and furthermore, the height of the connection electrode can be adjusted with high precision. Therefore, a highly reliable semiconductor package having excellent solder jointability can be obtained.
[Brief description of the drawings]
FIG. 1 is a schematic partial cross-sectional view showing one embodiment of a film carrier of the present invention.
FIG. 2 is an explanatory view showing a state in which a semiconductor element is mounted using the film carrier of the present invention and soldered to a printed circuit board.
3 (a) to 3 (e) are schematic structural partial cross-sectional views showing a part of the steps in the method for producing a film carrier of the present invention.
FIGS. 4 (f) to (j) are schematic structural partial sectional views showing a part of the steps in the method for producing a film carrier of the present invention.
FIGS. 5A to 5C are schematic sectional views showing an example of a conventional film carrier manufacturing process.
(D) and (e) are explanatory views showing an example of a semiconductor package mounted on a semiconductor element and a printed circuit board using a conventional film carrier.
FIGS. 6A and 6B are explanatory diagrams showing the relationship between the thickness of an insulating film substrate and the hole diameter of an opening.
FIGS. 7A to 7C are explanatory views showing a formation state when a solder ball is mounted on an opening and a solder bump is formed by a heat flow.
FIG. 8A is a schematic sectional view showing an example of the structure of a conventional film carrier.
(B) is a schematic cross-sectional view showing an example of a package mounted on a land of a semiconductor chip and a printed wiring board using a conventional film carrier.
[Explanation of symbols]
10 Single-sided copper-clad laminate sheet 11 Insulating base material 21 Copper foil 31, 131, 131a Opening 41 Metal foil 41a Driving conductor 41b, 132 Connection electrode 51 Reinforcing conductor Layers 52, 141a Pad electrode 61 Protective resist 62 Solder resist patterns 71, 73, 75 Mold 71a Opening punches 72, 74 Receiving mold 73a Driving punch 75a ... Pressing punches 76. Flat molds 81, 161. Semiconductor elements 91, 92, 151, 152 .. Solder bumps 100, 300 .. Film carriers 101, 181. Lands 111. Insulating films 121. Agent layers 122, 123, 124 Solder shape 141 after mounting Conductor layer 162 Pad electrode 171 Sealants 191 and 192 Underflow Le t ...... insulating film thickness λ, λ '...... opening hole diameter

Claims (5)

A pad electrode (52) is formed on one surface of the insulating base material (11), and a connection electrode (41b) is formed on the other surface. The pad electrode (52) and the connection electrode (41b) are electrically connected to each other. Wherein the connection electrode (41b) is formed by a conductor (41a) driven by a punching press of a metal foil (41). The film carrier according to claim 1, wherein the surface position of the connection electrode (41b) is lower than the other surface (outer surface) of the insulating base material (11). The film carrier according to claim 1, wherein the connection electrode is formed of copper, lead, tin, or an alloy containing these metals as main components. The film carrier according to any one of claims 1 to 3, wherein the pad electrode (52) is formed of a copper foil (21) and a reinforcing conductor layer (51) having a thickness of 2 µm or more. The method for producing a film carrier according to any one of claims 1 to 4, comprising at least the following steps.
(A) A step of preparing a single-sided copper-clad laminate sheet (10) in which a copper foil (21) is laminated on one side of an insulating base material (11).
(B) A step of forming an opening (31) at a predetermined position of the single-sided copper-clad laminated sheet (10) using a press die (71 and 72).
(C) A metal foil (41) having a predetermined thickness is placed on the copper foil (21) side of the laminated sheet in which the opening (31) is formed, and the opening ( 31) forming the implanted conductor (41a) in the inside;
(D) Using the press dies (75 and 76), the implanted conductor (41a) is pushed back to the upper surface of the copper foil (21), so that the upper end of the implanted conductor (41a) and the upper surface of the copper foil (21) are in contact with each other. Forming a connection electrode (41b) on the same surface;
(E) A protective resist (61) is formed so as to cover the connection electrode (41b), and a reinforcing conductor layer (51) is formed on the copper foil (21) and the connection electrode (41b) by electrolytic copper plating or the like. Process.
(F) forming a pad electrode (52) by patterning the copper foil (21) and the reinforcing conductor layer (51);
(G) forming a solder resist (62) and forming a plating layer (53) made of nickel and gold plating on the connection electrode (41b) and on a part of the pad electrode (52);

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