JP4103656B2 - Film carrier and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a film carrier used as a connection medium when a semiconductor element is connected to an external substrate or the like, and a manufacturing method thereof.
[0002]
[Prior art]
In recent years, there has been an increasing demand for miniaturization and weight reduction of LSIs in order to cope with downsizing, high density and high performance of electronic devices. In particular, FBGA (Fine Pitch Ball Grid Array) packages of memory types of 100 pins or less and logic types of 100 to 300 pin classes are mass-produced as CSPs that can be used for mobile phones, digital videos, digital cameras, and the like. Furthermore, a 0.5 mm ball pitch FBGA has been adopted with the aim of miniaturization. However, the bonding behavior at the time of secondary mounting using fine solder balls is different from the behavior of normal secondary mounting, and defects such as solder constriction and solder ball dropping occur, causing a problem in ensuring reliability.
[0003]
The structure of a conventional film carrier used for FBGA and the behavior of solder balls will be described.
First, a three-layer film carrier generally used for FBGA will be briefly described.
FIGS. 5A to 5E are schematic cross-sectional views showing a manufacturing process and a mounting process of a conventional 0.8 mm ball pitch FBGA film carrier.
First, an opening 131 is formed using a mold on a film base material with an adhesive layer on which an adhesive layer 121 is formed on an insulating film 111 (see FIG. 5A).
Usually, a polyimide film is used as the insulating film 111, and the film thickness is generally 50 μm or more, and the film thickness of the adhesive layer 121 is usually 12 μm. .
[0004]
Next, a copper foil having a desired film thickness is laminated to form a conductor layer 141 (see FIG. 5B).
As the thickness of the conductor layer 141, 12 μm to 18 μm is often used.
Next, a film carrier 300 in which a desired pad electrode 141a is formed by patterning the conductor layer 141 using photolithography and etching technology is manufactured (see FIG. 5C).
[0005]
Further, the semiconductor element 161 is mounted on the film carrier 300, and the solder bump 151 is formed to obtain a primary mounting semiconductor package (interposer) (see FIG. 5D). At that time, the underfill 191 material, the sealing material 171 and the like are used in combination to improve connection strength and insulation.
Further, the solder bump 151 of the primary mounting semiconductor package and the land 181 of the printed wiring board are soldered to perform secondary mounting (see FIG. 5E).
Here, in the conventional 0.8 mm ball pitch FBGA mounting, defects such as solder ball dropping and solder constriction after solder ball mounting hardly occur.
[0006]
However, it has become necessary to set the solder ball pitch to 0.5 mm as a configuration corresponding to lightness, thinness, and smallness. By shortening the solder ball pitch, it is necessary to keep the insulating film base material thickness as it is and to reduce the opening diameter and the solder ball diameter.
6A and 6B are explanatory views showing the relationship between the insulating film thickness and the opening hole diameter.
By reducing the hole diameter λ of the opening 131 to λ ′ without changing the thickness t of the insulating film 111, the aspect ratio (t / λ ′) of the opening 131a is increased, and the printed wiring board is mounted after the solder balls are mounted. When soldering to the land 181, the area of solder contact with the back surface of the pad electrode 141 a of the film carrier is reduced, and a solder ball dropping phenomenon (see FIG. 7A) and a solder necking phenomenon (see FIG. 7B) occur. As a result, a problem of an open failure occurs. FIG. 7C shows a solder shape when the solder connection is normally performed.
The occurrence of solder ball drop or solder constriction in the FBGA is smaller than the land area of the printed circuit board, so the area of the electrode in the opening hole is small. It is caused by being sucked.
[0007]
As a technique for avoiding the defect of the solder ball dropping or the soldering constriction, a method of forming the connection electrode 132 by copper plating or the like in the opening 131 after forming the opening 131 and raising the contact surface of the solder ball (for example, patent Document 1) has been proposed (see FIG. 8A), and technical considerations on the solder ball drop phenomenon (for example, see Non-Patent Document 1) have been made.
FIG. 8B shows a semiconductor package in which solder bumps 152 are formed on the raised connection electrodes 132, the semiconductor element 161 is mounted, and secondarily mounted.
Although this method reduces the contact failure of the solder, it is usually necessary to increase the size of the connection electrode 132 by the plating process to several tens of μm, which requires a considerable plating process time, and the manufacturing cost of the connection electrode 132 occupying the film carrier. Cannot be ignored. In addition, it is difficult to set the plating conditions, the plating thickness varies in the connection electrode 132, and there is a problem that in the via hole that is insufficiently raised, solder ball drop or solder constriction occurs.
[0008]
[Patent Document 1]
Japanese Patent Laid-Open No. 10-41356 [Non-Patent Document 1]
Journal of Japan Institute of Electronics Packaging, Vol.4, No.1, 2001, P63-67
[0009]
[Problems to be solved by the invention]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a film carrier capable of forming connection electrodes technically easily and at low cost, and a method for manufacturing the same.
[0010]
[Means for Solving the Problems]
In order to solve the above problems in the present invention, first, in claim 1, a pad electrode (52) is formed on one surface of the insulating base material (11), and a connection electrode (41b) is formed on the other surface. In the film carrier in which the pad electrode (52) and the connection electrode (41b) are electrically connected, the connection electrode (41b) is driven by a punching press of a metal foil (41) (41a) The pad electrode (52) is formed of a copper foil (21) on an insulating substrate and a reinforcing conductor layer (51) on the copper foil (21) and the connection electrode (41b) . The film carrier is characterized by the following.
[0011]
2. The film carrier according to claim 1, wherein the surface position of the connection electrode 41 b is lower than the other surface (exterior surface) of the insulating base material 11.
[0012]
Moreover, in Claim 3, the said connection electrode 41b is formed with the alloy which has copper, lead, tin, and these metals as a main component, It was set as the film carrier of Claim 1 or 2 characterized by the above-mentioned. Is.
[0013]
The film carrier according to any one of claims 1 to 3, wherein the pad electrode 52 is formed of the copper foil 21 and a reinforcing conductor layer 51 of 2 µm or more. It is what.
[0014]
Furthermore, in Claim 5, it is set as the manufacturing method of the film carrier as described in any one of Claims 1 thru | or 4 characterized by including the following processes at least.
(A) The process of preparing the single-sided copper clad laminated sheet 10 by which the copper foil 21 was laminated | stacked on the single side | surface of the insulating base material 11. FIG.
(B) The process of forming the opening part 31 in the predetermined position of the single-sided copper-clad laminated sheet 10 using the press dies 71 and 72.
(C) A metal foil 41 having a predetermined thickness is placed on the copper foil 21 side of the laminated sheet on which the opening 31 is formed, and a driving conductor 41a is formed in the opening 31 using press dies 73 and 74. Process.
(D) A step of pushing back the driving conductor 41a to the upper layer surface of the copper foil 21 using the press dies 75 and 76, and forming the connection electrode 41b having the same upper surface of the driving conductor 41a and the upper layer surface of the copper foil 21. .
(E) A step of forming the protective resist 61 so as to cover the connection electrode 41b and forming the reinforcing conductor layer 51 on the copper foil 21 and the connection electrode 41b by electrolytic copper plating or the like.
(F) A step of patterning the copper foil 21 and the reinforcing conductor layer 51 to form the pad electrode 52.
(G) A step of forming a solder resist 62 and forming a plating layer 53 made of nickel or gold plating on the connection electrode 41b and a part of the pad electrode 52.
Furthermore, in claim 6, the semiconductor element is mounted using the film carrier according to any one of claims 1 to 4, and solder balls are formed on the connection electrode (41b) of the film carrier. Thus, the semiconductor package is mounted on a printed wiring circuit board.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described.
FIG. 1 is a schematic partial sectional view showing an embodiment of the film carrier of the present invention.
In the film carrier 100 of the present invention according to claim 1, the pad electrode 52 is formed on one surface of the insulating base material 11, and the connection electrode 41 b is formed by a driving conductor formed in the opening 31 on the other surface. Therefore, the pad electrode 52 and the connection electrode 41b are electrically connected.
Here, an organic resin film typified by a polyimide film is used for the insulating substrate 11, and the film thickness is generally 50 μm or more.
Also, a plating layer 53 made of nickel or gold is formed on a part of the pad electrode 52 and the connection electrode 41b.
[0016]
The open end of the connection electrode 41b is lower than the other surface (exterior surface) of the insulating base material 11, making it easier to set the solder balls, and solder bonding between the film carrier and the printed circuit board. It is easy to improve the bonding strength.
The height of the connection electrode 41b is controlled by the thickness of the metal foil to be driven.
[0017]
The connection electrode 41b is made of one kind of metal selected from copper, lead, tin, gold, silver, or the like, or an alloy containing these metals as a main component. Examples of alloys include Sn—Cn, Sn—Bi, Sn—Ag—Cu, Ni—Pd—Au, Sn—Ag—Bi—Cu, Sn—Lu, Pb—Zn—Al, Sn—Ag—Cu—. Bi etc. can be mentioned.
[0018]
The pad electrode 52 formed on one surface of the insulating substrate 11 is formed by patterning the copper foil 21 and the reinforcing conductor layer 51 of 2 μm or more, and improves the physical strength of the pad electrode 52. This is to complete electrical connection with the connection electrode 41b.
[0019]
Hereinafter, the manufacturing method of the film carrier of this invention is demonstrated.
3 (a) to 3 (e) and FIGS. 4 (f) to 4 (j) are schematic structural partial cross-sectional views showing the steps of the film carrier manufacturing method of the present invention.
First, a single-sided copper foil laminated sheet 10 in which a copper foil 21 is laminated on one side of an insulating base material 11 made of a long polyimide film or the like is prepared (see FIG. 3A).
[0020]
Next, alignment mark holes and sprocket holes (not shown) are formed by punching press along the longitudinal direction at both ends of the single-sided copper foil laminated sheet 10. Next, using a punching press die comprising a die 71 having a punch 71a for opening and a receiving die 72 with the alignment mark hole of the single-sided copper foil laminated sheet 10 as a base point (see FIG. 3 (b)), one side An opening 31 is formed at a predetermined position of the copper foil laminated sheet 10 (see FIG. 3C).
[0021]
Next, a metal foil 41 having a predetermined thickness is placed on the copper foil 21 side of the laminated sheet on which the opening portion 31 is formed, and the pressing punch 73a of the die 73 and the opening portion 31 are aligned to receive the receiving die 74. Is set (see FIG. 3D), the pushing punch 73a of the mold 73 is pushed into the opening 31 with a predetermined load, and a driving conductor 41a is formed in the opening 31 (see FIG. 3E).
Here, there are a method of controlling the height of the implanted conductor 41a by the thickness of the metal foil 41 and a method of controlling by the etching process after forming the implanted conductor 41a. preferable.
[0022]
Next, the pressing punch 75a of the mold 75 and the punching conductor 41a are aligned to set the flat mold 76 (see FIG. 4 (f)), and the pressing punch 75a of the mold 75 is driven with a predetermined load. When pushed into the conductor 41a, the drive-in conductor 41a is pushed back to the upper layer surface of the copper foil 21 to form a rivet-shaped connection electrode 41b in which the upper end of the drive-in conductor 41a and the upper layer surface of the copper foil 21 are the same surface (FIG. 4). (See (g)).
[0023]
Next, a protective resist layer 61 is formed by a method such as laminating a dry film on the connection electrode 41b side of the insulating base material 11, and electrolytic copper plating or the like is performed on the copper foil 21 and the connection electrode 41b. The reinforcing conductor layer 51 is formed (see FIG. 4H).
As described above, the reinforcing conductor layer 51 is for improving the physical strength of the pad electrode 52 and perfecting the electrical connection with the connection electrode 41b.
[0024]
Next, a resist pattern is formed on the copper foil 21 and the reinforcing conductor layer 51, and a series of patterning processes such as etching are performed to form a pad electrode 52 in which the connection electrodes 41b are electrically isolated (see FIG. 4 (i)).
[0025]
Next, the protective resist layer 61 is stripped, a solder resist pattern 62 is formed on the pad electrode 52, electrolytic nickel plating and gold plating are performed on a part of the pad electrode 52 and the connection electrode 41b, and a plating layer is formed. 53 is formed to obtain the film carrier 100 of the present invention (see FIG. 4J).
[0026]
Using the film carrier 100 of the present invention, the semiconductor element 81 is mounted, solder bumps are formed on the connection electrodes 41b to form a primary semiconductor package (interposer), and further soldered to the printed circuit board 200. An example of the semiconductor package obtained in this way is shown in FIG.
[0027]
In the film carrier 100 of the present invention, since the connection electrode is formed by a punching press, the cost can be greatly reduced as compared with the conventional plating method, and the reliability of the solder joint with the printed circuit board is improved.
[0028]
【Example】
Hereinafter, the present invention will be described in detail by way of examples.
First, a 12 μm-thick electrolytic copper foil 21 is laminated on one side of an insulating base material 11 made of a long 50 μm-thick heat-resistant polyimide film, and super-wide on a single-sided copper-clad laminate sheet 10 (see FIG. 3A). A sprocket hole for use and an alignment mark of 100 μmφ were punched and formed.
[0029]
Next, using a punching press die comprising a die 71 having a punch 71a for opening and a receiving die 72 with the alignment mark hole of the single-sided copper foil laminated sheet 10 as a base point (see FIG. 3 (b)), one side The opening part 31 was formed in the predetermined position of the copper foil laminated sheet 10 (refer FIG.3 (c)).
[0030]
Next, a metal foil 41 made of a rolled copper foil having a thickness of 60 μm is placed on the copper foil 21 side of the laminated sheet on which the opening 31 is formed, and the pressing punch 73a of the mold 73 and the opening 31 are aligned. Then, the receiving mold 74 is set (see FIG. 3D), the pushing punch 73a of the mold 73 is pushed into the opening 31 with a predetermined load, and a driving conductor 41a is formed in the opening 31 (FIG. 3 ( e)).
[0031]
Next, the pressing punch 75a of the mold 75 and the driving conductor 41a are aligned to set the flat mold 76 (see FIG. 4 (f)), and the pressing punch 75a of the mold 75 is pushed in with a predetermined load. Then, the implanted conductor 41a was pushed back to the upper surface of the copper foil 21, and the upper end surface of the implanted conductor 41a and the upper layer surface of the copper foil 21 formed a rivet-shaped connection electrode 41b having a length of 52 μm (FIG. 4G )reference).
The surface position of the connection electrode 41b was set to be 10 μm lower than the other surface (exterior surface) of the insulating base material 11.
[0032]
Next, a dry film is laminated on the side of the connection electrode 41b of the insulating base 11, and the entire surface is exposed to form a protective resist layer 61, and electrolytic copper plating is performed on the copper foil 21 and the connection electrode 41b to obtain a thickness of 5 μm. The reinforced conductor layer 51 was formed (see FIG. 4H).
[0033]
Next, a resist pattern is formed on the copper foil 21 and the reinforcing conductor layer 51, and a series of patterning processes such as etching are performed to form a pad electrode 52 in which the connection electrodes 41b are electrically isolated (see FIG. 4 (i)).
[0034]
Next, the protective resist layer 61 is stripped with a dedicated stripping solution to form a solder resist pattern 62 on the pad electrode 52. Electrolytic nickel plating and electrolytic gold plating are formed on a part of the pad electrode 52 and the connection electrode 41b. And the plating layer 53 was formed, and the film carrier 100 of this invention was obtained (refer FIG.4 (j)).
[0035]
Next, the film carrier 100 was subjected to flux treatment, and a solder ball of 300 μmφ was placed on the opening 31 on the connection electrode 41b and heated to form a solder bump. At this time, defects such as solder constriction and voids did not occur between the connection electrode 41b and good electrical conduction was obtained. In addition, the solder bumps on the opening 31 have a substantially uniform spherical shape. Although this film carrier with solder bumps was secondarily mounted on the printed circuit board 200, no solder ball drop or solder neck defect occurred. In addition, good results were obtained in the evaluation of reliability tests using a daisy chain.
[0036]
【The invention's effect】
As described above, since the connection electrode of the film carrier of the present invention is formed by driving a metal foil by punching press or the like, it can be manufactured easily and inexpensively technically, and the height of the connection electrode is high precision. Therefore, it is possible to obtain a highly reliable semiconductor package with excellent solder jointability.
[Brief description of the drawings]
FIG. 1 is a schematic partial cross-sectional view showing an embodiment of a film carrier of the present invention.
FIG. 2 is an explanatory view showing a state in which a semiconductor element is mounted using the film carrier of the present invention and soldered to a printed wiring circuit board.
FIGS. 3A to 3E are schematic partial cross-sectional views showing a part of steps in a method for producing a film carrier of the present invention. FIGS.
4 (f) to (j) are schematic structural partial cross-sectional views showing some of the steps in the film carrier manufacturing method of the present invention.
FIGS. 5A to 5C are schematic cross-sectional views showing an example of a manufacturing process of a conventional film carrier.
(D) And (e) is explanatory drawing which shows an example of the semiconductor package mounted in the semiconductor element and the printed wiring circuit board using the conventional film carrier.
FIGS. 6A and 6B are explanatory views showing the relationship between the thickness of the insulating film substrate and the hole diameter of the opening.
FIGS. 7A to 7C are explanatory views showing a formation state when a solder ball is mounted on the opening and a solder bump is formed by a heat flow; FIGS.
FIG. 8A is a schematic cross-sectional view showing an example of the configuration of a conventional film carrier.
(B) is a schematic cross-sectional view showing an example of a package mounted on a land of a semiconductor chip and a printed wiring board using a conventional film carrier.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Single-sided copper clad laminated sheet 11 ... Insulating base material 21 ... Copper foil 31, 131, 131a ... Opening part 41 ... Metal foil 41a ... Driving conductor 41b, 132 ... Connection electrode 51 ... Reinforcing conductor Layers 52, 141a ... Pad electrode 61 ... Protective resist 62 ... Solder resist pattern 71, 73, 75 ... Mold 71a ... Opening punch 72, 74 ... Receiving die 73a ... Punching punch 75a ... ... Punch 76 for pushing in ....... Plate mold 81, 161 .... Semiconductor elements 91, 92, 151, 152 ... Solder bump 100, 300 ... Film carrier 101, 181 ... Land 111 ... Insulating film 121 ... Adhesion Agent layer 122, 123, 124 ... Solder shape 141 after mounting 141 ... Conductor layer 162 ... Pad electrode 171 ... Sealing material 191, 192 ... Undercoat Le t ...... insulating film thickness λ, λ '...... opening hole diameter

Claims (6)

A pad electrode (52) is formed on one surface of the insulating substrate (11), and a connection electrode (41b) is formed on the other surface. The pad electrode (52) and the connection electrode (41b) are electrically connected. In the film carrier connected to the metal carrier (41b), the connection electrode (41b) is formed by a conductor (41a) driven by a punching press of a metal foil (41), and the pad electrode (52) is a copper foil (21 ), The copper foil (21), and the reinforcing conductor layer (51) on the connection electrode (41b) . The film carrier according to claim 1, wherein the surface position of the connection electrode (41b) is lower than the other surface (exterior surface) of the insulating substrate (11). The film carrier according to claim 1 or 2, wherein the connection electrode (41b) is made of copper, lead, tin, and an alloy mainly composed of these metals. The film carrier according to any one of claims 1 to 3, wherein the pad electrode (52) is formed of a copper foil (21) and a reinforcing conductor layer (51) of 2 µm or more. The method for producing a film carrier according to claim 1, comprising at least the following steps.
(A) The process of preparing the single-sided copper clad laminated sheet (10) by which the copper foil (21) was laminated | stacked on the single side | surface of the insulating base material (11).
(B) The process of forming an opening part (31) in the predetermined position of a single-sided copper bonding laminated sheet (10) using a press metal mold | die (71 and 72).
(C) A metal foil (41) having a predetermined thickness is placed on the copper foil (21) side of the laminated sheet on which the opening (31) is formed, and the opening ( 31) A step of forming a driving conductor (41a) in the inside.
(D) Using a press die (75 and 76), the driven conductor (41a) is pushed back to the upper layer surface of the copper foil (21), and the upper end surface of the driven conductor (41a) and the upper layer surface of the copper foil (21) are Forming a connection electrode (41b) on the same surface;
(E) A protective resist (61) is formed so as to cover the connection electrode (41b), and a reinforcing conductor layer (51) is formed on the copper foil (21) and the connection electrode (41b) by electrolytic copper plating or the like. Process.
(F) A step of patterning the copper foil (21) and the reinforcing conductor layer (51) to form a pad electrode (52).
(G) A step of forming a solder resist (62) and forming a plating layer (53) made of nickel or gold on the connection electrode (41b) and part of the pad electrode (52). A semiconductor element is mounted using the film carrier according to any one of claims 1 to 4, and further, a solder ball is formed on a connection electrode (41b) of the film carrier and mounted on a printed wiring circuit board. A semiconductor package characterized by comprising:

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