JP2004296724A - Substrate for packaging electronic part and method for manufacturing electronic device using the same - Google Patents

Substrate for packaging electronic part and method for manufacturing electronic device using the same Download PDF

Info

Publication number
JP2004296724A
JP2004296724A JP2003086192A JP2003086192A JP2004296724A JP 2004296724 A JP2004296724 A JP 2004296724A JP 2003086192 A JP2003086192 A JP 2003086192A JP 2003086192 A JP2003086192 A JP 2003086192A JP 2004296724 A JP2004296724 A JP 2004296724A
Authority
JP
Japan
Prior art keywords
electronic component
main surface
substrate
frame member
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003086192A
Other languages
Japanese (ja)
Other versions
JP3842751B2 (en
Inventor
Katsuyuki Yoshida
克亨 吉田
Chihiro Makihara
千尋 牧原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2003086192A priority Critical patent/JP3842751B2/en
Publication of JP2004296724A publication Critical patent/JP2004296724A/en
Application granted granted Critical
Publication of JP3842751B2 publication Critical patent/JP3842751B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for packaging an electronic part that is superior in productivity when a micro electronic mechanical mechanism on the main surface of a semiconductor substrate is hermetically packaged and an electronic device is manufactured, and to provide a method for manufacturing an electronic device. <P>SOLUTION: The substrate 6 for packaging an electronic part is provided with an insulation substrate 1 wherein a wiring conductor 2 led from one main surface to the other main surface or a side surface is formed, a connection pad 3 that is formed on one main surface of the insulation substrate 1 and is connected with the wiring conductor 2, a frame member 4 that is joined with one main surface of the insulation substrate 1 while surrounding the connection pad 3, and a connection terminal 5 that is formed on the connection pad 3 and of which height is the same as that of the frame member 4. An electronic part 10 wherein a micro electronic mechanical mechanism 8 and an electrode 9 connected with it are formed on the main surface of a semiconductor substrate 7 packages the micro mechanical mechanism 8 hermetically inside the frame member 4, by joining the electrode 9 with the connection terminal 5 and joining the main surface of the semiconductor substrate 7 with the main surface of the frame member 4. Thus, the electronic device can be made excellent in productivity. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、半導体基板の主面に、微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品領域を形成して成る電子部品を封止するための電子部品封止用基板、およびそれを用いて電子部品の微小電子機械機構を封止することにより形成される電子装置の製造方法に関するものである。
【0002】
【従来の技術】
近年、シリコンウェーハ等の半導体基板の主面に、半導体集積回路素子等の微細配線を形成する加工技術を応用して、極めて微小な電子機械機構、いわゆるMEMS(Micro Electromechanical System)を形成した電子部品が注目され、実用化に向けて開発が進められている。
【0003】
このような微小電子機械機構としては、加速度計・圧力センサ・アクチュエータ等のセンサや、微細な鏡面体を可動式に形成したマイクロミラーデバイス、光デバイス、あるいはマイクロポンプ等を組み込んだマイクロ化学システム等、非常に広い分野にわたるものが試作・開発されている。
【0004】
そのような微小電子機械機構を形成した電子部品を用いて電子装置を構成するための従来の電子部品封止用基板およびそれを用いて成る電子装置の一例を図4に断面図で示す。図4に示す例では、微小電子機械機構22が形成された半導体基板21の主面には、微小電子機械機構22に電力を供給したり、微小電子機械機構22から外部の電気回路に電気信号を送り出したりするための電極23が微小電子機械機構22と電気的に接続されて形成されており、これら半導体基板21・微小電子機械機構22および電極23により、1つの電子部品24が構成される。
【0005】
なお、このような電子部品24は、通常、後述するように、半導体基板21の主面に多数個が縦横に配列形成された多数個取りの形態で形成した後、個々の半導体基板21に切断することにより製作されるので、この切断の際に切削粉等の異物が微小電子機械機構22に付着して作動の妨げになることを防止するために、ガラス板25等で覆われて保護されている。
【0006】
そして、この電子部品24を、電子部品収納用の凹部Aを有するパッケージ31の凹部A内に収納するとともに、電子部品24の電極23をパッケージ31の電極パッド32にボンディングワイヤ33等の導電性接続材を介して接続した後、パッケージ31の凹部Aを蓋体34で覆って電子部品24を凹部A内に気密封止することにより、電子装置として完成する。この場合、電子部品24は、微小電子機械機構22の動作を妨げないようにするため、中空状態で気密封止する必要がある。
【0007】
この電子装置について、あらかじめパッケージ31の電極パッド32から外表面に導出するようにして形成しておいた配線導体35の導出部分を外部電気回路に接続することにより、気密封止された微小電子機械機構22が、電極23・ボンディングワイヤ33・電極パッド32および配線導体35を介して外部の電気回路と電気的に接続される。
【0008】
また、このような電子部品24は、通常、広面積の半導体基板の主面に多数個を縦横に配列形成させることにより製作されており、この場合の電子装置の製造方法は、従来、以下のようなものであった。すなわち、
▲1▼半導体基板の主面に、微小電子機械機構22およびこれに電気的に接続された電極23が形成されて成る電子部品領域を多数個、縦横に配列形成した電子部品を準備する工程と、
▲2▼各電子部品の微小電子機械機構22を、その周囲が中空状態となるようにして、ガラス板25等で覆って封止する工程と、
▲3▼半導体基板にダイシング加工等の切断加工を施して、個々の電子部品24に分割する工程と、
▲4▼個々の電子部品24を、電子部品収納用パッケージ31内に気密封止する工程と、により製作される。
【0009】
このような従来の製造方法においては、半導体基板の主面に配列形成された多数の電子部品領域の1個ずつをガラス板25等で封止して保護しておく必要があること、また、一旦ガラス板25で封止した電子部品を、個片の電子部品24に分割した後、改めてパッケージ31内に気密封止するとともに、その電極23をパッケージ31の電極パッド32等に接続して外部接続させる必要があること、等のため、生産性が悪く、実用化が難しいという問題があった。
【0010】
この問題に対し、半導体基板の主面に配列形成された多数個の機構微小電子機械を一括して覆い、封止するような基板が提案されている。
【0011】
このような封止用の基板としては、半導体基板を材料とするものや導電性の金属板等を材料にするもの等が知られている。
【0012】
半導体基板を材料とする場合は、例えば、主面に多数個の電子部品領域が配列形成された第1の半導体基板とは別に、この電子部品領域の配列に対応させて多数の凹部を配列形成した封止用の第2の半導体基板を準備し、第1の半導体基板の主面上に第2の半導体基板を、第2の半導体基板の凹部が第1の半導体基板の電子部品領域を覆うようにして接合し、第2の半導体基板に内側に第1の半導体基板の電子部品領域(特に微小電子機械機構)を封止するようにした技術が提案されている(例えば、特許文献1参照。)。
【0013】
また、導電性を有する基板を材料とする場合には、導電性を有するカバー用の基板にパターン溝を形成するとともに、このパターン溝をガラスやセラミック材料で充填して平坦化させた後、その上にボンディングパターン(電極パッド等)を形成し、このボンディングパターンに電子部品の電極を接続するとともに導電性のカバー用基板を半導体基板の主面に接合し、その後、電子部品領域をセラミックやガラス等で封着するとともに、ボンディングパターンを外部に導出するための外部配線用電極パターンを形成するようにした技術が提案されている(例えば、特許文献2参照。)。
【0014】
〔特許文献1〕
特開2001−144117号公報
〔特許文献2〕
特開2002−43463号公報
【0015】
【発明が解決しようとする課題】
しかしながら、このような従来の封止用基板を用いて半導体基板の主面の電子部品領域を封止する場合は、多数個の電子部品領域を一括して封止することはできるものの、例えば、半導体基板を材料とした封止用基板の場合であれば、半導体基板の内部に3次元状の配線導体を形成することができないため、封止用の(第2の)半導体基板の、電子部品領域が配列形成された(第1の)半導体基板に接合される主面から対向する他方主面にかけて配線導体を導出することができず、電子部品の電極は、第1の半導体基板の主面に形成された電極の一部を封止部の外側に延出させるとともに、この延出部をボンディングワイヤを介して電子部品収納用パッケージの電極パッドや外部の電気回路に接続する必要があり、実装工程(電子部品領域の封止から電子装置として完成させて外部電気回路に接続するまでの工程)が長く、また、個々の電子装置のサイズが大きくなってしまうという問題が残る。また、電子装置を組み込んだ電子システムの小型化に有利な、表面実装ができないという問題もある。
【0016】
また、導電性の金属板等を材料とした封止用基板の場合であれば、金属板に電極パッド等の導体パターンを形成することができるように、一旦ガラスやセラミックスで金属板の表面に形成したパターン溝等を埋めて絶縁部を形成したり、その絶縁部の表面に、実装工程の途中で導体部を形成したりする必要があるため、この場合も、電子部品の実装工程を短くすることが困難であるという問題がある。
【0017】
本発明は上記従来の技術における諸問題に鑑みて完成されたものであり、その目的は、半導体基板の主面に形成された微小電子機械機構を容易かつ確実に封止することができるとともに、この微小電子機械機構と接続された半導体基板の主面に形成されている電極を容易かつ確実に、例えば表面実装が可能な形態で、外部接続させることが可能な電子部品封止用基板を提供することにある。
【0018】
また、本発明の他の目的は、このような微小電子機械機構および電極から成る電子部品領域が半導体基板の主面に多数個、縦横に配列形成されていたとしても、これらを容易かつ確実に封止することが可能な封止用基板を提供するとともに、このような封止用基板を用いて、微小電子機械機構が封止されて成る多数個の電子装置を、例えば表面実装が可能な形態で、一括して形成することが可能な、電子装置の製造方法を提供することにある。
【0019】
【課題を解決するための手段】
本発明の電子部品封止用基板は、一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、この絶縁基板の前記一方主面に形成された、前記配線導体と電気的に接続された接続パッドと、前記絶縁基板の前記一方主面に、前記接続パッドを取り囲むようにして接合された枠部材と、前記接続パッド上に形成された、前記枠部材と同じ高さの接続端子とから成り、半導体基板の主面に微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品が、前記電極を前記接続端子に接合し、前記半導体基板の前記主面を前記枠部材の主面に接合されることによって、前記枠部材の内側に前記電子部品の前記微小電子機械機構を気密封止することを特徴とするものである。
【0020】
また本発明の電子部品封止用基板は、上記構成において、前記接続パッドおよび前記接続端子が内側に形成された前記枠部材が多数個、縦横に配列形成されていることを特徴とするものである。
【0021】
また本発明の電子装置の製造方法は、半導体基板の主面に、微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品領域を多数個、縦横に配列形成した電子部品を準備する工程と、一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、この絶縁基板の前記一方主面に形成された、前記配線導体と電気的に接続された接続パッドと、前記絶縁基板の前記一方主面に前記接続パッドを取り囲むようにして接合された枠部材と、前記接続パッド上に形成された、前記枠部材と同じ高さの接続端子とから成る電子部品封止領域を多数個、前記電子部品の電子部品領域に対応させて配列形成した電子部品封止用基板を準備する工程と、前記電子部品を、前記電極を前記接続端子に接合するとともに、前記微小電子機械機構の周囲の前記半導体基板の前記主面を前記枠部材の主面に接合して、前記微小電子機械機構を前記枠部材の内側に気密封止する工程と、互いに接合された前記電子部品および前記電子部品封止用基板を前記電子部品封止領域毎に分割して、前記電子部品封止領域に前記電子部品領域が接合されて成る個々の電子装置を得る工程とを具備することを特徴とするものである。
【0022】
本発明の電子部品封止用基板によれば、一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、絶縁基板の一方主面に形成された、配線導体と電気的に接続された接続パッドと、絶縁基板の一方主面に、接続パッドを取り囲むようにして接合された枠部材と、接続パッド上に形成された、枠部材と同じ高さの接続端子とから成り、半導体基板の主面に微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品を、電極を接続端子に接合し、半導体基板の主面を枠部材の主面に接合させることによって、枠部材の内側に電子部品の微小電子機械機構を気密封止するようにしたことから、枠部材の主面を半導体基板の主面に接合させるだけで、電子部品の微小電子機械機構を、枠部材と絶縁基板とにより容易かつ確実に封止することができる。
【0023】
また、枠部材の主面の高さが、接続パッド上に形成された接続端子の高さと同じであるので、枠部材の主面を半導体基板の主面に接合するときに、半導体基板の主面に形成されている電極を接続端子に容易かつ確実に接続することができる。また、この接続端子から接続パッドおよび配線導体を介して、電子部品の電極を外部に導出することもできる。
【0024】
また、本発明の電子部品封止用基板は、例えば、セラミック多層配線基板等の絶縁基板を用いて形成したものとすることにより、配線導体を、接続パッドや枠部材が形成・接合されている一方主面から他方主面や側面にかけて、基板の内部や表面に自由に形成して導出させることができ、この導出された端部に外部接続用の金属バンプを取着させること等により、容易に表面実装することが可能な電子装置として完成させることができる。
【0025】
また、本発明の電子部品封止用基板において、接続パッドおよび接続端子が内側に形成された枠部材を多数個、縦横に配列形成した場合には、半導体基板の主面に多数の電子部品領域が縦横に配列形成されていたとしても、これらを一括して、外部接続が可能なようにして封止することができる。
【0026】
また本発明の電子装置の製造方法によれば、上記各工程を具備することから、縦横に配列形成された多数個の電子部品領域について、それぞれの電極の外部接続のための接続と微小電子機械機構の封止とを同時に行なうことができるため、互いに接合された電子部品および電子部品封止用基板から成る電子装置を、容易かつ確実に、多数個製造することができる。
【0027】
また、互いに接合された電子部品および電子部品封止用基板を電子部品封止領域毎に分割することにより、電子部品封止領域に電子部品領域が接合されて成る個々の電子装置を多数個、同時に製造することができる。
【0028】
この分割の際、電子部品領域の微小電子機械機構は封止用基板により封止されているので、ダイシング加工等による分割で発生するシリコン等の半導体基板の切削粉が微小電子機械機構に付着するようなことはなく、分割後の電子装置において微小電子機械機構を確実に作動させることができる。
【0029】
また、分割して得られた電子装置は、絶縁基板の他方主面や側面に配線導体が導出されているので、この導出された端部に金属バンプ等の端子を取着するだけで、表面実装等により外部電気回路基板に実装することができるものとなり、実装の工程を非常に短く、かつ容易なものとすることができる電子装置となる。
【0030】
【発明の実施の形態】
本発明の電子部品封止用基板およびそれを用いた電子装置の製造方法について以下に詳細に説明する。
【0031】
図1は本発明の電子部品封止用基板の実施の形態の一例を示す断面図である。
【0032】
図1において、1は絶縁基板、2は配線導体、3は接続パッド、4は枠部材、5は接続端子である。これら絶縁基板1・配線導体2・接続パッド3・枠部材4および接続端子5により電子部品封止用基板6が形成される。
【0033】
この電子部品封止用基板6を用いて、半導体基板7の主面(この図1の例では下面)に、微小電子機械機構8と電極9とを互いに電気的に接続するようにして形成して成る電子部品10を封止することにより、微小電子機械機構8が外部接続可能な状態で封止されてなる電子装置が形成される。
【0034】
絶縁基板1は、微小電子機械機構8を封止するための蓋体として機能するとともに、配線導体2・接続パッド3・枠部材4および接続端子5を形成するための基体として機能する。
【0035】
この絶縁基板1は、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体・ムライト質焼結体・炭化珪素質焼結体・窒化珪素質焼結体・ガラスセラミックス焼結体等のセラミックス材料や、ポリイミド・ガラスエポキシ樹脂等の有機樹脂材料、セラミックスやガラス等の無機粉末をエポキシ樹脂等の有機樹脂で結合して成る複合材等により形成される。
【0036】
絶縁基板1は、例えば、酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウムとガラス粉末等の原料粉末をシート上に成形して成るグリーンシートを積層し、焼成することにより形成される。なお、絶縁基板1は、酸化アルミニウム質焼結体で形成するものに限らず、用途や気密封止する電子部品10の特性等に応じて適したものを選択することが好ましい。
【0037】
例えば、絶縁基板1は、後述するように、枠部材4を介して半導体基板7と機械的に接合されるので、半導体基板7との接合の信頼性、つまり微小電子機械機構8の封止の気密性を高くするためには、ムライト質焼結体や、例えばガラス成分の種類や添加量を調整することにより熱膨張係数を半導体基板7に近似させるようにした酸化アルミニウム−ホウ珪酸ガラス系等のガラスセラミックス焼結体等のような半導体基板7との熱膨張係数の差が小さい材料で形成することが好ましい。
【0038】
また、絶縁基板1は、配線導体2により伝送される電気信号の遅延を防止するような場合には、ポリイミド・ガラスエポキシ樹脂等の有機樹脂材料、セラミックスやガラス等の無機粉末をエポキシ樹脂等の有機樹脂で結合して成る複合材、または、酸化アルミニウム−ホウ珪酸ガラス系や酸化リチウム系等のガラスセラミックス焼結体等のような比誘電率の小さい材料で形成することが好ましい。
【0039】
また、絶縁基板1は、封止する微小電子機械機構8の発熱量が大きく、この熱の外部への放散性を良好とするような場合には、窒化アルミニウム質焼結体等のような熱伝導率の大きな材料で形成することが好ましい。
【0040】
また、絶縁基板1の一方主面に、電子部品10の微小電子機械機構8を内側に収めるような凹部1aを形成しておいてもよい。凹部1a内に微小電子機械機構8の一部を収めるようにしておくと、微小電子機械機構8を取り囲むための枠部材4の高さを低く抑えることができ、電子装置の低背化に有利なものとなる。
【0041】
絶縁基板1の一方主面(微小電子機械機構8を封止する側)からは、他方主面または側面に配線導体2が導出されている。
【0042】
また、この絶縁基板1の一方主面側の枠部材4の内側の部位には、配線導体2と接続された接続パッド3が形成されている。
【0043】
これらの配線導体2および接続パッド3は、接続パッド3上に形成される接続端子5を介して電子部品10の電極9と電気的に接続され、これを絶縁基板1の他方主面や側面に導出する機能を有する。
【0044】
これらの配線導体2および接続パッド3は、銅・銀・金・パラジウム・タングステン・モリブデン・マンガン等の金属材料により形成される。この形成の手段としては、メタライズ層・めっき層・蒸着等の金属を薄膜層として被着させる手段を用いることができる。例えば、タングステンのメタライズ層から成る場合であれば、タングステンのペーストを絶縁基板1となるグリーンシートに印刷してこれをグリーンシートとともに焼成することにより形成される。
【0045】
接続端子5は、錫−銀系・錫−銀−銅系等の半田、金−錫ろう等の低融点ろう材、銀−ゲルマニウム系等の高融点ろう材、導電性有機樹脂、あるいはシーム溶接・電子ビーム溶接等の溶接法による接合を可能とするような金属材料等により形成されている。
【0046】
この接続端子5を電子部品10の電極9に接合することにより、電子部品10の電極9が、接続端子5・接続パッド3および配線導体2を介して、絶縁基板1の他方主面または側面に導出される。そして、この導出された端部を外部の電気回路に錫−鉛半田等を介して接合することにより、電子部品10の電極9が外部の電気回路と電気的に接続される。
【0047】
また、絶縁基板1の一方主面には、接続パッド3を取り囲むようにして枠部材4が接合されている。
【0048】
枠部材4は、電子部品10の微小電子機械機構8をその内側に気密封止するための側壁として機能する。
【0049】
この枠部材4の主面(図1の例では上面)を電子部品10の主面(図1の例では下面)に接合させることにより、枠部材4の内側に微小電子機械機構8が気密封止される。なお、この場合、半導体基板7が底板となり、絶縁基板1が蓋体となる。
【0050】
枠部材4は、鉄−ニッケル−コバルト合金や鉄−ニッケル合金等の鉄−ニッケル系合金・無酸素銅・アルミニウム・ステンレス鋼・銅−タングステン合金・銅−モリブデン合金等の金属材料や、酸化アルミニウム質焼結体・ガラスセラミックス焼結体等の無機系材料、あるいはPTFE(ポリテトラフルオロエチレン)・ガラスエポキシ樹脂等の有機樹脂系材料等により形成される。
【0051】
また、枠部材4の主面を電子部品10の半導体基板7の主面に接合する方法としては、錫−銀系等の半田,金−錫ろう等の低融点ろう材,銀−ゲルマニウム系等の高融点ろう材,導電性有機樹脂等の接合材を介して接合する方法、あるいはシーム溶接・電子ビーム溶接等の溶接法を用いることができる。
【0052】
そして、半導体基板7の主面に微小電子機械機構8およびこれに電気的に接続された電極9が形成されて成る電子部品10について、電極9を接続端子5に接合し、半導体基板7の主面を枠部材4の主面に接合させることによって、枠部材4の内側に電子部品10の微小電子機械機構8が気密封止された電子装置が形成される。
【0053】
この電子装置のうち配線導体2の導出部分を、半田ボール等の外部端子11を介して外部の電気回路に接続することにより、微小電子機械機構8が外部電気回路と電気的に接続される。
【0054】
なお、図1に示すように、枠部材4が接合される絶縁基板1の主面に、接続パッド3と同様の材料により導体層3aを形成しておき、この導体層3aから絶縁基板1の他方主面にかけて配線導体2の一部を導出させるようにしてもよい。この導体層3aから導出された配線導体2の導出部分は、上述の外部端子11等を介して外部電気回路の接地用端子等に接続することができる。
【0055】
この場合、接続端子5と電極9との接合、および枠部材4の主面と半導体基板7の主面との接合を一つの工程で確実かつ容易に行なうことを可能とするために、接続端子5の高さと枠部材4の高さとは同じ高さとしておく必要がある。
【0056】
また、本発明の電子部品封止用基板6は、図2に実施の形態の他の例を断面図で示すように、このような接続パッド3および枠部材4を広面積の母基板の一方主面に縦横に配列形成した、いわゆる多数個取りの形態としておくことが好ましい。なお、図2において、図1と同じ部位には同じ符号を付してある。
【0057】
このような多数個取りとしておくと、通常は、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が多数個配列形成された、多数個取りの形態で製作される電子部品10を、多数個、同時に気密封止することができ、生産性を優れたものとすることができる。
【0058】
また、このように、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が多数個配列形成された、多数個取りの形態で製作される電子部品10を一括して封止しておくと、この半導体基板7(および電子部品封止用基板6)にダイシング加工等の切断加工を施して、個々の電子部品10(電子装置)に分割する際に、切断に伴って発生する切削粉等が微小電子機械機構8に付着してその作動を妨害する、という不具合の発生を効果的に防止することができる。
【0059】
次に、このような電子部品封止用基板6を用いた、電子装置の製造方法について、図3(a)〜(e)に基づいて説明する。図3は本発明の電子装置の製造方法の実施の形態の一例をそれぞれ工程順に示した断面図であり、図3において図1および図2と同じ部位には同じ符号を付してある。
【0060】
まず、図3(a)に示すように、半導体基板7の主面に、微小電子機械機構8およびこれに電気的に接続された電極9が形成されて成る電子部品領域10aを多数個、縦横に配列形成した多数個取りの電子部品10bを準備する。
【0061】
半導体基板7は、例えば単結晶や多結晶等のシリコン基板から成る。
【0062】
このシリコン基板の表面に酸化シリコン層を形成するとともに、フォトリソグラフィ等の微細配線加工技術を応用して、微小な振動体等の微小電子機械機構8および円形状パターン等の導体から成る電極9が形成された電子部品領域10aを多数個配列形成することにより多数個取りの電子部品10bが形成される。なお、この例においては、微小電子機械機構8と電極9とは、それぞれ半導体基板7の主面に形成された微細配線(図示せず)を介して電気的に接続されている。
【0063】
次に、図3(b)に示すように、一方主面から他方主面または側面に導出された配線導体2が形成された絶縁基板1と、この絶縁基板1の一方主面に形成された、配線導体2と電気的に接続された接続パッド3と、絶縁基板1の一方主面に接続パッド3を取り囲むようにして接合された枠部材4と、接続パッド3上に形成された、枠部材4と同じ高さの接続端子5とから成る電子部品封止領域6aを多数個、電子部品の電子部品領域10aに対応させて配列形成した多数個取りの電子部品封止用基板6bを準備する。
【0064】
一方主面から他方主面または側面に導出された配線導体2が形成された絶縁基板1は、例えば、絶縁基板1が酸化アルミニウム質焼結体から成り、配線導体2がタングステンのメタライズ層から成る場合であれば、酸化アルミニウム・酸化珪素・酸化カルシウム等の原料粉末を、有機樹脂・バインダとともに混練してスラリーを得て、このスラリーをドクターブレード法やリップコータ法等によりシート状に成形して複数のグリーンシートを形成し、このグリーンシートの表面に、および必要に応じてグリーンシートにあらかじめ形成しておいた貫通孔内に、タングステンのメタライズペーストを印刷塗布・充填し、その後、これらのグリーンシートを積層して焼成することにより形成することができる。
【0065】
なお、これらのグリーンシートのうち、一部のものに打ち抜き加工を施して四角形状等の開口部を形成しておき、これを一方主面側の最表層に配置し、または最表層から内部に向かって数層積層するようにして、焼成後の絶縁基板1の一方主面に、電子部品領域10aの配列に対応する凹部1aが配列形成されるようにしておいてもよい。このように凹部1aを形成しておくと、この凹部1aの内側に微小電子機械機構8を収めることができるので、微小電子機械機構8を取り囲むための枠部材4の高さを低く抑えることができ、電子装置の低背化に有利なものとなる。
【0066】
また、接続パッド3は、通常、配線導体2と同様の材料から成り、例えば、タングステンのペーストを絶縁基板1となるグリーンシートのうち最表面に、配線導体2となる印刷されたタングステンペーストと接続されるようにして、かつ多数個が縦横に配列形成されるようにして、スクリーン印刷法等により印刷しておくことにより形成される。
【0067】
また、枠部材4は、例えば、鉄−ニッケル−コバルト合金から成る場合であれば、鉄−ニッケル−コバルト合金の金属板に圧延加工や金型による打ち抜き加工またはエッチング加工を行ない、枠状に成形することにより製作される。
【0068】
枠部材4と絶縁基板1との接合は、錫−銀系等の半田,金−錫ろう等の低融点ろう材や銀−ゲルマニウム系等の高融点ろう材,導電性有機樹脂等の接合材を介して接合する方法、あるいはシーム溶接・電子ビーム溶接等の溶接法により行なうことができる。
【0069】
この枠部材4と同じ高さとなるようにして、接続端子5が接続パッド3上に形成される。接続端子5は、例えば、錫−銀系等の半田から成る場合であれば、この半田のボールを接続パッド3上に位置決めして加熱・溶融・接合させることにより形成される。
【0070】
接続端子5の高さを枠部材4の高さと同じとする方法としては、例えば、接続端子5となる錫−銀半田を溶融させて接続パッド3上に取着形成する際に、その上面を枠部材4と同じ高さとなるようにしてセラミックス製の治具等で押さえておく等の方法を用いることができる。
【0071】
次に、図3(c)に示すように、電子部品10bを電子部品封止用基板6bに対し各電子部品領域10aと各電子部品封止領域6aとを対応させて重ね合わせ、電極7を接続端子5に接合するとともに、微小電子機械機構8の周囲の半導体基板7の主面を枠部材4の主面に接合して、微小電子機械機構8を枠部材4の内側に気密封止する。
【0072】
ここで、電極7と接続端子5との接合は、例えば、接続端子5が錫−銀系半田から成る場合であれば、電極7上に接続端子5を位置合わせして載せ、これらを約250℃〜300℃程度の温度のリフロー炉中で熱処理すること等により行なわれる。
【0073】
また、微小電子機械機構8の周囲の半導体基板7の主面と枠部材4の主面との接合は、例えば、この接合面に、接続端子5と同様の錫−銀系の半田を挟んでおき、上述の電極7と接続端子5との接合と同時にリフロー炉中で熱処理することにより行なうことができる。
【0074】
この場合、接続端子5の高さを枠部材4の高さと同じとしていることから、電極7と接続端子5との接合と、枠部材4の主面と半導体基板7の主面との接合を容易かつ確実に、同時に行なうことができる。
【0075】
このように、本発明の電子装置の製造方法によれば、電子部品領域10aの電極7の外部導出のための接合と、微小電子機械機構8の気密封止のための接合とを同時に行なうことができるため、数時間程度を要する半田(ろう)付け等の接合の工程を、従来の製造方法に比べて、確実に少なくとも1工程減らすことができるので、電子装置の生産性を非常に高めることができる。
【0076】
そして、図3(d)に示すように、互いに接合された多数個取りの形態の電子部品10bおよび電子部品封止用基板6bを電子部品封止領域6a毎に分割して、電子部品封止領域6aが分割された電子部品封止用基板6に電子部品領域10aが分割された電子部品10が接合されて成る個々の電子装置を得る。
【0077】
互いに接合された、それぞれ多数個取りの形態の電子部品10bおよび電子部品封止用基板6bの接合体の切断は、この接合体に対して、ダイシング加工等の切断加工を施すことにより行なうことができる。
【0078】
本発明の電子装置の製造方法においては、このダイシング加工等の切断加工の際に、各微小電子機械機構8は枠部材4の内側でこの枠部材4と半導体基板7と絶縁基板1とにより気密封止されているので、半導体基板7や絶縁基板1等の切断に伴って発生するシリコンやセラミックス等の切削粉等が微小電子機械機構8に付着することはなく、完成した電子装置において、微小電子機械機構8を確実に正常に作動させることができる。
【0079】
このように、本発明の電子装置の製造方法によれば、従来のように、半導体基板7の主面に多数個を縦横に配列形成した電子部品領域10aを切断する際に、その微小電子機械機構8をガラス板等で覆って保護するような工程を別途追加する必要はなく、この、保護のためだけという工程を確実に削除することができるので、電子装置の生産性を非常に高いものとすることができる。
【0080】
また、このようにして製造された電子装置は、すでに気密封止されているとともに、その電極が配線導体2を介して外部に導出された状態であるので、これを別途パッケージ内に実装するような工程を追加する必要はなく、配線導体2の導出された部分を外部の電気回路に半田ボール等の外部端子11を介して接続するだけで、外部電気回路基板に実装して使用することができる。
【0081】
また、この場合、配線導体2は、絶縁基体1の他方主面または側面に導出されているので、外部電気回路に表面実装の形態で接続することができ、高密度に実装することや、外部電気回路の基板を効果的に小型化することができる。
【0082】
なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨の範囲内であれば、種々の変形は可能である。
【0083】
例えば、上述の実施の形態の例では一つの電子装置内に一つの微小電子機械機構を気密封止したが、一つの電子装置内に複数の微小電子機械機構を気密封止してもよい。
【0084】
また、図1に示した例では、配線導体2は絶縁基板1の他方主面側に導出しているが、これを、側面に導出したり、側面および他方主面の両方に導出したりしてもよい。また、この導出された部分の外部電気回路への電気的な接続は、外部端子として半田ボールを介して行なうものに限らず、リード端子や導電性接着剤等を介して行なってもよい。
【0085】
【発明の効果】
本発明の電子部品封止用基板によれば、一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、絶縁基板の一方主面に形成された、配線導体と電気的に接続された接続パッドと、絶縁基板の一方主面に、接続パッドを取り囲むようにして接合された枠部材と、接続パッド上に形成された、枠部材と同じ高さの接続端子とから成り、半導体基板の主面に微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品を、電極を接続端子に接合し、半導体基板の主面を枠部材の主面に接合させることによって、枠部材の内側に電子部品の微小電子機械機構を気密封止するようにしたことから、枠部材の主面を半導体基板の主面に接合させるだけで、電子部品の微小電子機械機構を、枠部材と絶縁基板とにより容易かつ確実に封止することができる。
【0086】
また、枠部材の主面の高さが、接続パッド上に形成された接続端子子の高さと同じであるので、枠部材の主面を半導体基板の主面に接合するときに、半導体基板の主面に形成されている電極を接続端子に容易かつ確実に接続することができる。また、この接続端子から接続パッドおよび配線導体を介して、電子部品の電極を外部に導出することもできる。
【0087】
また、本発明の電子部品封止用基板は、例えば、セラミック多層配線基板等の絶縁基板を用いて形成したものとすることにより、配線導体を、接続パッドや枠部材が形成・接合されている一方主面から他方主面や側面にかけて、基板の内部や表面に自由に形成して導出させることができ、この導出された端部に外部接続用の金属バンプを取着させること等により、容易に表面実装することが可能な電子装置として完成させることができる。
【0088】
また、本発明の電子部品封止用基板において、接続パッドおよび接続端子が内側に形成された枠部材を多数個、縦横に配列形成した場合には、半導体基板の主面に多数の電子部品領域が縦横に配列形成されていたとしても、これらを一括して、外部接続が可能なようにして封止することができる。
【0089】
また本発明の電子装置の製造方法によれば、上記各工程を具備することから、縦横に配列形成された多数個の電子部品領域について、それぞれの電極の外部接続のための接続と微小電子機械機構の封止とを同時に行なうことができるため、互いに接合された電子部品および電子部品封止用基板から成る電子装置を、容易かつ確実に、多数個製造することができる。
【0090】
また、互いに接合された電子部品および電子部品封止用基板を電子部品封止領域毎に分割することにより、電子部品封止領域に電子部品領域が接合されて成る個々の電子装置を多数個、同時に製造することができる。
【0091】
この分割の際、電子部品領域の微小電子機械機構は封止用基板により封止されているので、ダイシング加工等による分割で発生するシリコン等の半導体基板の切削粉が微小電子機械機構に付着するようなことはなく、分割後の電子装置において微小電子機械機構を確実に作動させることができる。
【0092】
また、分割して得られた電子装置は、絶縁基板の他方主面や側面に配線導体が導出されているので、この導出された端部に金属バンプ等の端子を取着するだけで、表面実装等により外部電気回路基板に実装することができるものとなり、実装の工程を非常に短く、かつ容易なものとすることができる電子装置となる。
【図面の簡単な説明】
【図1】本発明の電子部品封止用基板の実施の形態の一例を示す断面図である。
【図2】本発明の電子部品封止用基板の実施の形態の他の例を示す断面図である。
【図3】(a)〜(d)は、本発明の電子装置の製造方法の実施の形態の一例をそれぞれ工程順に示した断面図である。
【図4】従来の電子部品封止用基板およびそれを用いて成る電子装置の一例を示す断面図である。
【符号の説明】
1:絶縁基板
2:配線導体
3:接続パッド
4:枠部材
5:接続端子
6:電子部品封止用基板
6a:電子部品封止領域
6b:電子部品封止用基板
7:半導体基板
8:微小電子機械機構
9:電極
10:電子部品
10a:電子部品領域
10b:電子部品
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electronic component encapsulation for encapsulating an electronic component formed on a main surface of a semiconductor substrate by forming an electronic component region in which a microelectromechanical mechanism and an electrode electrically connected thereto are formed. The present invention relates to a substrate for use and a method for manufacturing an electronic device formed by sealing a micro-electro-mechanical mechanism of an electronic component using the substrate.
[0002]
[Prior art]
2. Description of the Related Art In recent years, an electronic component in which an extremely minute electromechanical mechanism, that is, a so-called MEMS (Micro Electromechanical System) is formed on a main surface of a semiconductor substrate such as a silicon wafer by applying a processing technology for forming fine wiring such as a semiconductor integrated circuit element. Has been attracting attention, and development is proceeding toward practical use.
[0003]
Examples of such microelectromechanical mechanisms include sensors such as accelerometers, pressure sensors, and actuators; micromirror devices, optical devices, and microchemical systems that incorporate a micropump, etc. A wide range of fields are being prototyped and developed.
[0004]
FIG. 4 is a cross-sectional view showing an example of a conventional electronic component sealing substrate for forming an electronic device using an electronic component having such a microelectromechanical mechanism formed thereon and an electronic device using the same. In the example shown in FIG. 4, power is supplied to the micro-electro-mechanical mechanism 22 on the main surface of the semiconductor substrate 21 on which the micro-electro-mechanical mechanism 22 is formed, or an electric signal is transmitted from the micro-electro-mechanical mechanism 22 to an external electric circuit. An electrode 23 for sending out the semiconductor substrate 21 is formed so as to be electrically connected to the micro-electro-mechanical mechanism 22. The semiconductor substrate 21, the micro-electro-mechanical mechanism 22 and the electrode 23 constitute one electronic component 24. .
[0005]
In general, such an electronic component 24 is formed in a multi-cavity form in which a large number of the electronic components 24 are arranged vertically and horizontally on the main surface of the semiconductor substrate 21 and then cut into individual semiconductor substrates 21 as described later. In order to prevent foreign matter such as cutting powder from adhering to the microelectromechanical mechanism 22 at the time of cutting and hindering the operation, it is protected by being covered with a glass plate 25 or the like. ing.
[0006]
The electronic component 24 is accommodated in the concave portion A of the package 31 having the concave portion A for accommodating the electronic component, and the electrodes 23 of the electronic component 24 are electrically connected to the electrode pads 32 of the package 31 such as bonding wires 33. After the connection via the material, the concave part A of the package 31 is covered with the lid 34 and the electronic component 24 is hermetically sealed in the concave part A, thereby completing the electronic device. In this case, the electronic component 24 needs to be hermetically sealed in a hollow state so as not to hinder the operation of the microelectromechanical mechanism 22.
[0007]
In this electronic device, a lead-out portion of a wiring conductor 35 formed in advance from the electrode pad 32 of the package 31 to the outer surface is connected to an external electric circuit, so that a hermetically sealed microelectronic machine is provided. The mechanism 22 is electrically connected to an external electric circuit via the electrodes 23, the bonding wires 33, the electrode pads 32, and the wiring conductors 35.
[0008]
Further, such electronic components 24 are usually manufactured by arranging a large number of semiconductor devices in a matrix on a main surface of a large-area semiconductor substrate. In this case, a method of manufacturing an electronic device is conventionally described as follows. It was something like That is,
(1) a step of preparing an electronic component in which a large number of electronic component regions in which a microelectromechanical mechanism 22 and an electrode 23 electrically connected to the microelectronic mechanical mechanism 22 are formed on the main surface of a semiconductor substrate are vertically and horizontally arranged; ,
(2) a step of sealing the microelectromechanical mechanism 22 of each electronic component by covering the microelectromechanical mechanism 22 with a glass plate 25 or the like so that the periphery thereof is hollow;
(3) a step of subjecting the semiconductor substrate to a cutting process such as a dicing process to divide the semiconductor substrate into individual electronic components 24;
(4) a process of hermetically sealing the individual electronic components 24 in the electronic component storage package 31.
[0009]
In such a conventional manufacturing method, it is necessary to seal and protect each of a large number of electronic component regions arranged and formed on the main surface of the semiconductor substrate with a glass plate 25 or the like. After the electronic component once sealed with the glass plate 25 is divided into individual electronic components 24, it is air-tightly sealed again inside the package 31, and the electrodes 23 are connected to the electrode pads 32 of the package 31 and the like. Because of the necessity of connection, etc., there is a problem that productivity is low and practical application is difficult.
[0010]
To cope with this problem, there has been proposed a substrate which collectively covers and seals a large number of mechanical microelectronic machines arranged and formed on the main surface of a semiconductor substrate.
[0011]
As such a sealing substrate, a substrate made of a semiconductor substrate and a substrate made of a conductive metal plate or the like are known.
[0012]
When a semiconductor substrate is used as a material, for example, apart from the first semiconductor substrate having a large number of electronic component regions arranged and formed on the main surface, a large number of concave portions are formed so as to correspond to the arrangement of the electronic component regions. A second semiconductor substrate for sealing is prepared, and the second semiconductor substrate is covered on the main surface of the first semiconductor substrate, and the concave portion of the second semiconductor substrate covers the electronic component region of the first semiconductor substrate. Thus, a technique has been proposed in which the electronic component region (particularly, microelectromechanical mechanism) of the first semiconductor substrate is sealed inside the second semiconductor substrate inside the second semiconductor substrate (for example, see Patent Document 1). .).
[0013]
When a conductive substrate is used as a material, a pattern groove is formed on a conductive cover substrate, and the pattern groove is filled with glass or a ceramic material, and then flattened. A bonding pattern (electrode pad, etc.) is formed thereon, an electrode of an electronic component is connected to the bonding pattern, and a conductive cover substrate is joined to the main surface of the semiconductor substrate. A technique has been proposed in which an external wiring electrode pattern for leading a bonding pattern to the outside is formed in addition to sealing with a sealer or the like (for example, see Patent Document 2).
[0014]
[Patent Document 1]
JP 2001-144117 A
[Patent Document 2]
JP-A-2002-43463
[0015]
[Problems to be solved by the invention]
However, when the electronic component region on the main surface of the semiconductor substrate is sealed using such a conventional sealing substrate, although a large number of electronic component regions can be sealed at once, for example, In the case of a sealing substrate using a semiconductor substrate as a material, a three-dimensional wiring conductor cannot be formed inside the semiconductor substrate. Therefore, the electronic component of the (second) semiconductor substrate for sealing is used. The wiring conductor cannot be led from the main surface joined to the (first) semiconductor substrate in which the regions are arranged and formed to the other main surface opposite thereto, and the electrodes of the electronic component are connected to the main surface of the first semiconductor substrate. It is necessary to extend a part of the electrode formed on the outside of the sealing part, and to connect this extension part to an electrode pad of an electronic component housing package or an external electric circuit via a bonding wire, Mounting process (for electronic components Up step) is long to connect to an external electric circuit to complete the electronic device from the stop, also a problem that there remains the size of individual electronic devices increases. In addition, there is a problem that surface mounting cannot be performed, which is advantageous for miniaturization of an electronic system incorporating an electronic device.
[0016]
Also, in the case of a sealing substrate made of a conductive metal plate or the like, the surface of the metal plate is once made of glass or ceramic so that a conductor pattern such as an electrode pad can be formed on the metal plate. Since it is necessary to form an insulating part by filling the formed pattern grooves and the like, and to form a conductor part on the surface of the insulating part during the mounting process, the mounting process of the electronic component is also shortened in this case. There is a problem that it is difficult to do.
[0017]
The present invention has been completed in view of the above-described problems in the related art, and an object thereof is to easily and reliably seal a micro-electro-mechanical mechanism formed on a main surface of a semiconductor substrate, Provided is an electronic component sealing substrate that can be externally connected to an electrode formed on a main surface of a semiconductor substrate connected to the microelectromechanical mechanism easily and reliably, for example, in a form that can be surface-mounted. Is to do.
[0018]
Another object of the present invention is to easily and reliably form a large number of electronic component regions including such microelectromechanical mechanisms and electrodes on a main surface of a semiconductor substrate, both vertically and horizontally. A sealing substrate that can be sealed is provided, and a large number of electronic devices in which a micro-electromechanical mechanism is sealed can be surface-mounted using such a sealing substrate. It is an object of the present invention to provide a method of manufacturing an electronic device, which can be formed collectively in a form.
[0019]
[Means for Solving the Problems]
The electronic component sealing substrate of the present invention includes an insulating substrate on which a wiring conductor led from one main surface to the other main surface or side surface is formed, and the wiring conductor formed on the one main surface of the insulating substrate. A connection pad electrically connected to the same, a frame member joined to the one main surface of the insulating substrate so as to surround the connection pad, and the same as the frame member formed on the connection pad. An electronic component comprising a connection terminal having a height and a microelectromechanical mechanism and an electrode electrically connected thereto formed on the main surface of the semiconductor substrate, joining the electrode to the connection terminal, The micro-mechanical mechanism of the electronic component is hermetically sealed inside the frame member by joining the main surface of the substrate to the main surface of the frame member.
[0020]
Further, the electronic component sealing substrate according to the present invention is characterized in that, in the above configuration, a large number of the frame members, in which the connection pads and the connection terminals are formed inside, are arranged vertically and horizontally. is there.
[0021]
The method of manufacturing an electronic device according to the present invention is also directed to an electronic device in which a large number of electronic component regions each having a microelectromechanical mechanism and electrodes electrically connected thereto are formed on a main surface of a semiconductor substrate. A step of preparing a component, an insulating substrate on which a wiring conductor led from one main surface to the other main surface or a side surface is formed, and the wiring conductor formed on the one main surface of the insulating substrate is electrically connected to the wiring conductor. A connected connection pad, a frame member joined to the one main surface of the insulating substrate so as to surround the connection pad, and a connection terminal formed on the connection pad and having the same height as the frame member Preparing a plurality of electronic component sealing regions consisting of: an electronic component sealing substrate arranged and formed in correspondence with the electronic component region of the electronic component; and providing the electronic component with the electrode as the connection terminal. As well as joining Joining the main surface of the semiconductor substrate around the micro-electro-mechanical mechanism to the main surface of the frame member to hermetically seal the micro-electro-mechanical mechanism inside the frame member; Dividing the electronic component and the electronic component sealing substrate for each of the electronic component sealing regions to obtain individual electronic devices each having the electronic component region joined to the electronic component sealing region. It is characterized by doing.
[0022]
According to the electronic component sealing substrate of the present invention, an insulating substrate formed with a wiring conductor led out from one main surface to the other main surface or side surface, and a wiring conductor formed on one main surface of the insulating substrate. A connection pad that is electrically connected, a frame member joined to one main surface of the insulating substrate so as to surround the connection pad, and a connection terminal formed on the connection pad and having the same height as the frame member. An electronic component comprising a microelectromechanical mechanism and electrodes electrically connected to the microelectronic mechanical mechanism formed on the main surface of the semiconductor substrate is joined to the connection terminal, and the main surface of the semiconductor substrate is connected to the main surface of the frame member. By bonding to the surface, the micro-electromechanical mechanism of the electronic component is hermetically sealed inside the frame member, so only by bonding the main surface of the frame member to the main surface of the semiconductor substrate, Micro-electromechanical mechanism, frame member and insulating substrate It can be easily and reliably sealed by.
[0023]
Further, since the height of the main surface of the frame member is the same as the height of the connection terminal formed on the connection pad, when the main surface of the frame member is joined to the main surface of the semiconductor substrate, The electrodes formed on the surface can be easily and reliably connected to the connection terminals. Also, the electrodes of the electronic component can be led out from the connection terminals via the connection pads and the wiring conductors.
[0024]
Also, the electronic component sealing substrate of the present invention is formed by using an insulating substrate such as a ceramic multilayer wiring substrate, for example, so that the wiring conductor is formed and joined with connection pads and frame members. From one main surface to the other main surface or side surface, it can be freely formed inside and on the surface of the substrate and led out. By attaching metal bumps for external connection to the led-out end, etc. It can be completed as an electronic device that can be surface-mounted on a semiconductor device.
[0025]
Further, in the electronic component sealing substrate of the present invention, when a large number of frame members having connection pads and connection terminals formed inside and arranged vertically and horizontally are provided, a large number of electronic component regions are formed on the main surface of the semiconductor substrate. Even if they are arranged vertically and horizontally, they can be sealed together so that external connection is possible.
[0026]
Further, according to the method for manufacturing an electronic device of the present invention, since the method includes the above-described steps, the connection for external connection of each electrode and the microelectronic Since the sealing of the mechanism can be performed at the same time, a large number of electronic devices including the electronic component and the electronic component sealing substrate bonded to each other can be easily and reliably manufactured.
[0027]
Further, by dividing the electronic component and the electronic component sealing substrate bonded to each other for each electronic component sealing region, a large number of individual electronic devices in which the electronic component region is bonded to the electronic component sealing region, Can be manufactured at the same time.
[0028]
At the time of this division, since the microelectromechanical mechanism in the electronic component region is sealed by the sealing substrate, the cutting powder of the semiconductor substrate such as silicon generated by the division by dicing or the like adheres to the microelectromechanical mechanism. This is not the case, and the microelectromechanical mechanism can be reliably operated in the divided electronic device.
[0029]
In addition, in the electronic device obtained by division, the wiring conductor is led out to the other main surface or side surface of the insulating substrate. The electronic device can be mounted on an external electric circuit board by mounting or the like, and the electronic device can have a very short and easy mounting process.
[0030]
BEST MODE FOR CARRYING OUT THE INVENTION
The substrate for sealing electronic components of the present invention and a method for manufacturing an electronic device using the same will be described in detail below.
[0031]
FIG. 1 is a sectional view showing an example of an embodiment of an electronic component sealing substrate according to the present invention.
[0032]
In FIG. 1, 1 is an insulating substrate, 2 is a wiring conductor, 3 is a connection pad, 4 is a frame member, and 5 is a connection terminal. These insulating substrate 1, wiring conductor 2, connection pad 3, frame member 4, and connection terminal 5 form an electronic component sealing substrate 6.
[0033]
Using the electronic component sealing substrate 6, a microelectromechanical mechanism 8 and an electrode 9 are formed on the main surface (the lower surface in the example of FIG. 1) of the semiconductor substrate 7 so as to be electrically connected to each other. By sealing the electronic component 10 formed as described above, an electronic device in which the microelectromechanical mechanism 8 is sealed so as to be connectable to the outside is formed.
[0034]
The insulating substrate 1 functions as a lid for sealing the microelectromechanical mechanism 8 and also functions as a base for forming the wiring conductor 2, the connection pad 3, the frame member 4, and the connection terminal 5.
[0035]
The insulating substrate 1 is made of a ceramic material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a silicon nitride sintered body, a glass ceramic sintered body, or the like. And an organic resin material such as polyimide / glass epoxy resin, or a composite material formed by combining inorganic powders such as ceramics and glass with an organic resin such as epoxy resin.
[0036]
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, the insulating substrate 1 is formed by laminating green sheets formed by forming raw material powders such as aluminum oxide and glass powder on a sheet, and firing the green sheets. . The insulating substrate 1 is not limited to the one formed of the aluminum oxide sintered body, and it is preferable to select a suitable one according to the application, the characteristics of the electronic component 10 to be hermetically sealed, and the like.
[0037]
For example, since the insulating substrate 1 is mechanically joined to the semiconductor substrate 7 via the frame member 4 as described later, the reliability of the joining with the semiconductor substrate 7, that is, the sealing of the microelectromechanical mechanism 8 is performed. In order to increase the airtightness, a mullite sintered body or, for example, an aluminum oxide-borosilicate glass system in which the coefficient of thermal expansion is approximated to that of the semiconductor substrate 7 by adjusting the type and amount of the glass component, or the like It is preferable to use a material having a small difference in thermal expansion coefficient from the semiconductor substrate 7, such as a glass ceramic sintered body.
[0038]
In order to prevent a delay of an electric signal transmitted by the wiring conductor 2, the insulating substrate 1 is made of an organic resin material such as polyimide / glass epoxy resin, or an inorganic powder such as ceramic or glass. It is preferable to use a composite material having a small relative dielectric constant, such as a composite material formed by bonding with an organic resin, or a glass ceramic sintered body of aluminum oxide-borosilicate glass or lithium oxide.
[0039]
Further, the insulating substrate 1 generates a large amount of heat from the microelectromechanical mechanism 8 to be sealed, and when the heat dissipation from the microelectromechanical mechanism 8 is good, the insulating substrate 1 may be made of heat such as an aluminum nitride sintered body. It is preferable to use a material having high conductivity.
[0040]
Further, a concave portion 1a for accommodating the micro-electromechanical mechanism 8 of the electronic component 10 inside may be formed on one main surface of the insulating substrate 1. If a part of the micro-electro-mechanical mechanism 8 is accommodated in the recess 1a, the height of the frame member 4 surrounding the micro-electro-mechanical mechanism 8 can be kept low, which is advantageous for reducing the height of the electronic device. It becomes something.
[0041]
A wiring conductor 2 is led out from one main surface (the side that seals the microelectromechanical mechanism 8) of the insulating substrate 1 to the other main surface or side surface.
[0042]
A connection pad 3 connected to the wiring conductor 2 is formed in a portion inside the frame member 4 on one main surface side of the insulating substrate 1.
[0043]
The wiring conductor 2 and the connection pad 3 are electrically connected to the electrode 9 of the electronic component 10 via the connection terminal 5 formed on the connection pad 3, and are connected to the other main surface or side surface of the insulating substrate 1. It has the function of deriving.
[0044]
These wiring conductors 2 and connection pads 3 are formed of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, and manganese. As a means for this formation, a means for depositing a metal such as a metallized layer, a plating layer, and a vapor deposition as a thin film layer can be used. For example, in the case of a metallized layer of tungsten, it is formed by printing a paste of tungsten on a green sheet to be the insulating substrate 1 and firing it with the green sheet.
[0045]
The connection terminal 5 is made of solder such as tin-silver or tin-silver-copper, low-melting brazing material such as gold-tin brazing, high-melting brazing material such as silver-germanium, conductive organic resin, or seam welding. -It is formed of a metal material or the like that enables joining by a welding method such as electron beam welding.
[0046]
By joining the connection terminal 5 to the electrode 9 of the electronic component 10, the electrode 9 of the electronic component 10 is connected to the other main surface or side surface of the insulating substrate 1 via the connection terminal 5, the connection pad 3 and the wiring conductor 2. Derived. Then, the electrode 9 of the electronic component 10 is electrically connected to the external electric circuit by joining the derived end to an external electric circuit via tin-lead solder or the like.
[0047]
A frame member 4 is joined to one main surface of the insulating substrate 1 so as to surround the connection pad 3.
[0048]
The frame member 4 functions as a side wall for hermetically sealing the microelectromechanical mechanism 8 of the electronic component 10 inside.
[0049]
By joining the main surface (upper surface in the example of FIG. 1) of the frame member 4 to the main surface (lower surface in the example of FIG. 1) of the electronic component 10, the microelectromechanical mechanism 8 is hermetically sealed inside the frame member 4. Is stopped. In this case, the semiconductor substrate 7 serves as a bottom plate, and the insulating substrate 1 serves as a lid.
[0050]
The frame member 4 is made of a metal material such as an iron-nickel alloy such as an iron-nickel-cobalt alloy or an iron-nickel alloy, oxygen-free copper, aluminum, stainless steel, a copper-tungsten alloy, a copper-molybdenum alloy, or aluminum oxide. It is formed of an inorganic material such as a porous sintered body or a glass ceramic sintered body, or an organic resin material such as PTFE (polytetrafluoroethylene) or glass epoxy resin.
[0051]
As a method of joining the main surface of the frame member 4 to the main surface of the semiconductor substrate 7 of the electronic component 10, solder such as tin-silver, low melting point brazing material such as gold-tin brazing, silver-germanium based, etc. Bonding method such as a high melting point brazing material and a conductive organic resin, or a welding method such as seam welding and electron beam welding.
[0052]
The electrode 9 is joined to the connection terminal 5 of the electronic component 10 in which the microelectromechanical mechanism 8 and the electrode 9 electrically connected to the microelectromechanical mechanism 8 are formed on the main surface of the semiconductor substrate 7. By joining the surface to the main surface of the frame member 4, an electronic device in which the microelectromechanical mechanism 8 of the electronic component 10 is hermetically sealed inside the frame member 4 is formed.
[0053]
The microelectromechanical mechanism 8 is electrically connected to an external electric circuit by connecting a lead-out portion of the wiring conductor 2 of the electronic device to an external electric circuit via an external terminal 11 such as a solder ball.
[0054]
As shown in FIG. 1, a conductor layer 3a is formed on the main surface of the insulating substrate 1 to which the frame member 4 is joined by using the same material as the connection pads 3, and the conductor layer 3a A part of the wiring conductor 2 may be led out to the other main surface. The lead portion of the wiring conductor 2 derived from the conductor layer 3a can be connected to a ground terminal or the like of an external electric circuit via the external terminal 11 or the like.
[0055]
In this case, in order to enable the connection between the connection terminal 5 and the electrode 9 and the connection between the main surface of the frame member 4 and the main surface of the semiconductor substrate 7 to be performed reliably and easily in one step, the connection terminal The height of 5 and the height of the frame member 4 need to be the same.
[0056]
Further, as shown in a cross-sectional view of another example of the embodiment in FIG. 2, the electronic component sealing substrate 6 of the present invention includes such connection pads 3 and frame members 4 on one side of a large-area mother substrate. It is preferable to form a so-called multi-cavity arrangement in which the main surface is arranged vertically and horizontally. In FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals.
[0057]
When such a multi-cavity is prepared, usually, a multi-cavity configuration in which a large number of micro-electro-mechanical mechanisms 8 and electrodes 9 electrically connected to the micro-electro-mechanical mechanism 8 are formed and arranged on the main surface of the semiconductor substrate 7. A large number of the electronic components 10 manufactured in the above can be hermetically sealed at the same time, and the productivity can be improved.
[0058]
Further, as described above, on the main surface of the semiconductor substrate 7, the microelectronic mechanical mechanism 8 and the electrodes 9 electrically connected to the microelectromechanical mechanism 8 are arrayed and formed. When the semiconductor substrate 7 (and the electronic component encapsulating substrate 6) is cut into pieces such as dicing to be divided into individual electronic components 10 (electronic devices). In addition, it is possible to effectively prevent a problem that cutting powder or the like generated by cutting adheres to the microelectromechanical mechanism 8 and hinders its operation.
[0059]
Next, a method of manufacturing an electronic device using such an electronic component sealing substrate 6 will be described with reference to FIGS. FIG. 3 is a sectional view showing an example of an embodiment of a method of manufacturing an electronic device according to the present invention in the order of steps. In FIG. 3, the same portions as those in FIGS. 1 and 2 are denoted by the same reference numerals.
[0060]
First, as shown in FIG. 3A, on the main surface of a semiconductor substrate 7, a large number of electronic component regions 10a each having a microelectromechanical mechanism 8 and an electrode 9 electrically connected thereto are formed. A multi-cavity electronic component 10b is formed.
[0061]
The semiconductor substrate 7 is made of, for example, a single crystal or polycrystalline silicon substrate.
[0062]
A silicon oxide layer is formed on the surface of the silicon substrate, and a microelectromechanical mechanism 8 such as a microvibrator and an electrode 9 made of a conductor such as a circular pattern are formed by applying a fine wiring processing technique such as photolithography. By arranging a large number of the formed electronic component regions 10a, a multi-piece electronic component 10b is formed. In this example, the microelectromechanical mechanism 8 and the electrode 9 are electrically connected to each other via fine wiring (not shown) formed on the main surface of the semiconductor substrate 7.
[0063]
Next, as shown in FIG. 3B, the insulating substrate 1 on which the wiring conductor 2 led from one main surface to the other main surface or side surface is formed, and the insulating substrate 1 is formed on one main surface of the insulating substrate 1. A connection pad 3 electrically connected to the wiring conductor 2, a frame member 4 joined to one main surface of the insulating substrate 1 so as to surround the connection pad 3, and a frame formed on the connection pad 3. A multi-piece electronic component sealing substrate 6b formed by arranging a large number of electronic component sealing regions 6a each including the member 4 and the connection terminal 5 having the same height and corresponding to the electronic component region 10a of the electronic component is prepared. I do.
[0064]
The insulating substrate 1 on which the wiring conductor 2 led from one main surface to the other main surface or side surface is formed, for example, the insulating substrate 1 is made of an aluminum oxide sintered body, and the wiring conductor 2 is made of a tungsten metallized layer. In such a case, raw material powders such as aluminum oxide, silicon oxide, and calcium oxide are kneaded together with an organic resin and a binder to obtain a slurry, and the slurry is formed into a sheet shape by a doctor blade method, a lip coater method, or the like to form a plurality of sheets. A green metallized paste of tungsten is printed and filled on the surface of the green sheet and, if necessary, into the through holes formed in the green sheet beforehand, and then these green sheets are formed. Can be formed by stacking and firing.
[0065]
In addition, among these green sheets, a part of the green sheet is subjected to a punching process to form a rectangular opening or the like, and this is disposed on the outermost layer on one main surface side, or from the outermost layer to the inside. A plurality of layers may be stacked toward each other, so that the concave portions 1a corresponding to the arrangement of the electronic component regions 10a may be formed on one main surface of the insulating substrate 1 after firing. By forming the concave portion 1a in this way, the micro-electro-mechanical mechanism 8 can be accommodated inside the concave portion 1a, so that the height of the frame member 4 surrounding the micro-electro-mechanical mechanism 8 can be kept low. This is advantageous in reducing the height of the electronic device.
[0066]
The connection pad 3 is usually made of the same material as the wiring conductor 2. For example, a tungsten paste is connected to a printed tungsten paste to be the wiring conductor 2 on the outermost surface of a green sheet to be the insulating substrate 1. The printing is performed by a screen printing method or the like in such a manner that a large number of pieces are arranged vertically and horizontally.
[0067]
In the case where the frame member 4 is made of, for example, an iron-nickel-cobalt alloy, the metal plate of the iron-nickel-cobalt alloy is subjected to rolling, punching or etching using a mold, and is formed into a frame shape. It is produced by doing.
[0068]
The joining between the frame member 4 and the insulating substrate 1 is performed by using a solder such as tin-silver, a low-melting brazing material such as gold-tin brazing, a high-melting brazing material such as silver-germanium, or a joining material such as a conductive organic resin. Can be performed by a welding method such as seam welding or electron beam welding.
[0069]
The connection terminal 5 is formed on the connection pad 3 so as to have the same height as the frame member 4. If the connection terminal 5 is made of, for example, a tin-silver solder, the connection terminal 5 is formed by positioning the solder ball on the connection pad 3 and heating, melting, and joining.
[0070]
As a method of setting the height of the connection terminal 5 to be the same as the height of the frame member 4, for example, when the tin-silver solder to be the connection terminal 5 is melted and formed on the connection pad 3, the upper surface thereof is A method of holding the frame member 4 at the same height as the frame member 4 and holding it with a ceramic jig or the like can be used.
[0071]
Next, as shown in FIG. 3C, the electronic component 10b is superimposed on the electronic component sealing substrate 6b so that the electronic component regions 10a and the electronic component sealing regions 6a correspond to each other. The microelectronic mechanical mechanism 8 is hermetically sealed inside the frame member 4 by joining the main surface of the semiconductor substrate 7 around the microelectronic mechanical mechanism 8 to the main surface of the frame member 4 while joining to the connection terminal 5. .
[0072]
Here, when the connection between the electrode 7 and the connection terminal 5 is performed, for example, when the connection terminal 5 is made of a tin-silver-based solder, the connection terminal 5 is aligned and mounted on the electrode 7, and these are connected by about 250 mm. Heat treatment is performed in a reflow furnace at a temperature of about 300C to about 300C.
[0073]
The main surface of the semiconductor substrate 7 around the micro-electromechanical mechanism 8 and the main surface of the frame member 4 are joined, for example, by sandwiching the same tin-silver solder as the connection terminals 5 on this joint surface. The heat treatment can be performed in a reflow furnace at the same time as the above-described bonding of the electrode 7 and the connection terminal 5.
[0074]
In this case, since the height of the connection terminal 5 is the same as the height of the frame member 4, the joining between the electrode 7 and the connection terminal 5 and the joining between the main surface of the frame member 4 and the main surface of the semiconductor substrate 7 are performed. It can be performed easily and reliably at the same time.
[0075]
As described above, according to the method of manufacturing an electronic device of the present invention, the joining for leading out the electrode 7 in the electronic component region 10a and the joining for hermetically sealing the microelectromechanical mechanism 8 are performed simultaneously. Therefore, the number of bonding steps, such as soldering, which takes several hours, can be reduced by at least one step as compared with the conventional manufacturing method, so that the productivity of the electronic device can be greatly increased. Can be.
[0076]
Then, as shown in FIG. 3D, the multi-piece electronic component 10b and the electronic component sealing substrate 6b joined to each other are divided for each electronic component sealing region 6a, and the electronic component sealing is performed. An individual electronic device is obtained in which the electronic component 10 in which the electronic component region 10a is divided is joined to the electronic component sealing substrate 6 in which the region 6a is divided.
[0077]
Cutting of the joined body of the electronic component 10b and the electronic component encapsulating substrate 6b, each of which is joined to each other and in the form of multiple pieces, can be performed by subjecting the joined body to a cutting process such as a dicing process. it can.
[0078]
In the manufacturing method of the electronic device of the present invention, each of the micro-electro-mechanical mechanisms 8 is separated by the frame member 4, the semiconductor substrate 7 and the insulating substrate 1 inside the frame member 4 during the cutting process such as the dicing process. Since the semiconductor device is tightly sealed, cutting powder such as silicon and ceramics generated by cutting the semiconductor substrate 7 and the insulating substrate 1 does not adhere to the micro-electro-mechanical mechanism 8. The electromechanical mechanism 8 can be reliably operated normally.
[0079]
As described above, according to the electronic device manufacturing method of the present invention, when cutting the electronic component region 10 a in which a large number of semiconductor devices are formed in a matrix on the main surface as in the related art, It is not necessary to separately add a step of protecting the mechanism 8 by covering it with a glass plate or the like, and the step only for protection can be reliably eliminated, so that the productivity of the electronic device is extremely high. It can be.
[0080]
In addition, the electronic device manufactured in this manner is already hermetically sealed, and its electrodes are led out to the outside via the wiring conductor 2. Therefore, it is necessary to separately mount this in a package. It is not necessary to add an additional process, and the lead-out portion of the wiring conductor 2 is simply connected to an external electric circuit via an external terminal 11 such as a solder ball. it can.
[0081]
Further, in this case, since the wiring conductor 2 is led out to the other main surface or side surface of the insulating base 1, it can be connected to an external electric circuit in a surface mounting form, so that the wiring conductor 2 can be mounted at a high density. The substrate of the electric circuit can be effectively reduced in size.
[0082]
The present invention is not limited to the above-described embodiment, and various modifications are possible within the scope of the present invention.
[0083]
For example, in the above-described embodiment, one micro-electro-mechanical mechanism is hermetically sealed in one electronic device, but a plurality of micro-electro-mechanical mechanisms may be hermetically sealed in one electronic device.
[0084]
Further, in the example shown in FIG. 1, the wiring conductor 2 is led out to the other main surface side of the insulating substrate 1, but it may be led out to the side surface or both the side surface and the other main surface. You may. Further, the electrical connection of the derived portion to the external electric circuit is not limited to the connection via a solder ball as an external terminal, but may be through a lead terminal or a conductive adhesive.
[0085]
【The invention's effect】
According to the electronic component sealing substrate of the present invention, an insulating substrate formed with a wiring conductor led out from one main surface to the other main surface or side surface, and a wiring conductor formed on one main surface of the insulating substrate. A connection pad that is electrically connected, a frame member joined to one main surface of the insulating substrate so as to surround the connection pad, and a connection terminal formed on the connection pad and having the same height as the frame member. An electronic component comprising a microelectromechanical mechanism and electrodes electrically connected to the microelectronic mechanical mechanism formed on the main surface of the semiconductor substrate is joined to the connection terminal, and the main surface of the semiconductor substrate is connected to the main surface of the frame member. By bonding to the surface, the micro-electromechanical mechanism of the electronic component is hermetically sealed inside the frame member, so only by bonding the main surface of the frame member to the main surface of the semiconductor substrate, Micro-electromechanical mechanism, frame member and insulating substrate It can be easily and reliably sealed by.
[0086]
In addition, since the height of the main surface of the frame member is the same as the height of the connection terminal formed on the connection pad, when the main surface of the frame member is joined to the main surface of the semiconductor substrate, The electrodes formed on the main surface can be easily and reliably connected to the connection terminals. Also, the electrodes of the electronic component can be led out from the connection terminals via the connection pads and the wiring conductors.
[0087]
Also, the electronic component sealing substrate of the present invention is formed by using an insulating substrate such as a ceramic multilayer wiring substrate, for example, so that the wiring conductor is formed and joined with connection pads and frame members. From one main surface to the other main surface or side surface, it can be freely formed inside and on the surface of the substrate and led out. By attaching metal bumps for external connection to the led-out end, etc. It can be completed as an electronic device that can be surface-mounted on a semiconductor device.
[0088]
Further, in the electronic component sealing substrate of the present invention, when a large number of frame members having connection pads and connection terminals formed inside and arranged vertically and horizontally are provided, a large number of electronic component regions are formed on the main surface of the semiconductor substrate. Even if they are arranged vertically and horizontally, they can be sealed together so that external connection is possible.
[0089]
Further, according to the method for manufacturing an electronic device of the present invention, since the method includes the above-described steps, the connection for external connection of each electrode and the microelectronic Since the sealing of the mechanism can be performed at the same time, a large number of electronic devices including the electronic component and the electronic component sealing substrate bonded to each other can be easily and reliably manufactured.
[0090]
Further, by dividing the electronic component and the electronic component sealing substrate bonded to each other for each electronic component sealing region, a large number of individual electronic devices in which the electronic component region is bonded to the electronic component sealing region, Can be manufactured at the same time.
[0091]
At the time of this division, since the microelectromechanical mechanism in the electronic component region is sealed by the sealing substrate, the cutting powder of the semiconductor substrate such as silicon generated by the division by dicing or the like adheres to the microelectromechanical mechanism. This is not the case, and the microelectromechanical mechanism can be reliably operated in the divided electronic device.
[0092]
In addition, in the electronic device obtained by division, the wiring conductor is led out to the other main surface or side surface of the insulating substrate. The electronic device can be mounted on an external electric circuit board by mounting or the like, and the electronic device can have a very short and easy mounting process.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating an example of an embodiment of an electronic component sealing substrate according to the present invention.
FIG. 2 is a sectional view showing another example of the embodiment of the electronic component sealing substrate of the present invention.
3A to 3D are cross-sectional views showing an example of an embodiment of a method for manufacturing an electronic device according to the present invention in the order of steps.
FIG. 4 is a cross-sectional view showing an example of a conventional electronic component sealing substrate and an electronic device using the same.
[Explanation of symbols]
1: Insulating substrate
2: Wiring conductor
3: Connection pad
4: Frame member
5: Connection terminal
6: Substrate for sealing electronic components
6a: Electronic component sealing area
6b: Electronic component sealing substrate
7: Semiconductor substrate
8: Microelectromechanical mechanism
9: Electrode
10: Electronic components
10a: Electronic component area
10b: Electronic components

Claims (3)

一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、
該絶縁基板の前記一方主面に形成された、前記配線導体と電気的に接続された接続パッドと、
前記絶縁基板の前記一方主面に、前記接続パッドを取り囲むようにして接合された枠部材と、
前記接続パッド上に形成された、前記枠部材と同じ高さの接続端子とから成り、
半導体基板の主面に微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品が、前記電極を前記接続端子に接合し、前記半導体基板の前記主面を前記枠部材の主面に接合されることによって、
前記枠部材の内側に前記電子部品の前記微小電子機械機構を気密封止することを特徴とする電子部品封止用基板。
An insulating substrate on which a wiring conductor led from one main surface to the other main surface or side surface is formed,
A connection pad formed on the one main surface of the insulating substrate and electrically connected to the wiring conductor;
A frame member joined to the one main surface of the insulating substrate so as to surround the connection pad;
Formed on the connection pad, a connection terminal having the same height as the frame member,
An electronic component having a microelectromechanical mechanism and an electrode electrically connected to the microelectromechanical mechanism formed on a main surface of the semiconductor substrate, joining the electrode to the connection terminal, and connecting the main surface of the semiconductor substrate to the frame member; By being joined to the main surface of
An electronic component sealing substrate, wherein the microelectromechanical mechanism of the electronic component is hermetically sealed inside the frame member.
前記接続パッドおよび前記接続端子が内側に形成された前記枠部材が多数個、縦横に配列形成されていることを特徴とする請求項1記載の電子部品封止用基板。2. The electronic component sealing substrate according to claim 1, wherein a plurality of the frame members having the connection pads and the connection terminals formed inside are arranged vertically and horizontally. 3. 半導体基板の主面に、微小電子機械機構およびこれに電気的に接続された電極が形成されて成る電子部品領域を多数個、縦横に配列形成した電子部品を準備する工程と、
一方主面から他方主面または側面に導出された配線導体が形成された絶縁基板と、該絶縁基板の前記一方主面に形成された、前記配線導体と電気的に接続された接続パッドと、前記絶縁基板の前記一方主面に前記接続パッドを取り囲むようにして接合された枠部材と、前記接続パッド上に形成された、前記枠部材と同じ高さの接続端子とから成る電子部品封止領域を多数個、前記電子部品の前記電子部品領域に対応させて配列形成した電子部品封止用基板を準備する工程と、
前記電子部品を、前記電極を前記接続端子に接合するとともに、前記微小電子機械機構の周囲の前記半導体基板の前記主面を前記枠部材の主面に接合して、前記微小電子機械機構を前記枠部材の内側に気密封止する工程と、
互いに接合された前記電子部品および前記電子部品封止用基板を前記電子部品封止領域毎に分割して、前記電子部品封止領域に前記電子部品領域が接合されて成る個々の電子装置を得る工程と
を具備することを特徴とする電子装置の製造方法。
A step of preparing an electronic component in which a large number of electronic component regions formed by forming a micro-electro-mechanical mechanism and electrodes electrically connected to the micro-electromechanical mechanism on the main surface of the semiconductor substrate, and arranged vertically and horizontally;
An insulating substrate on which a wiring conductor led out from one main surface to the other main surface or side surface is formed, and a connection pad formed on the one main surface of the insulating substrate and electrically connected to the wiring conductor; An electronic component seal comprising: a frame member joined to the one main surface of the insulating substrate so as to surround the connection pad; and a connection terminal formed on the connection pad and having the same height as the frame member. A number of regions, a step of preparing an electronic component sealing substrate arranged and formed corresponding to the electronic component region of the electronic component,
The electronic component, while joining the electrode to the connection terminal, joining the main surface of the semiconductor substrate around the microelectromechanical mechanism to the main surface of the frame member, the microelectronic mechanical mechanism A step of hermetically sealing inside the frame member,
The electronic component and the electronic component sealing substrate bonded to each other are divided for each of the electronic component sealing regions to obtain individual electronic devices in which the electronic component regions are bonded to the electronic component sealing region. And a method of manufacturing an electronic device.
JP2003086192A 2003-03-26 2003-03-26 Electronic component sealing substrate and electronic device manufacturing method using the same Expired - Fee Related JP3842751B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003086192A JP3842751B2 (en) 2003-03-26 2003-03-26 Electronic component sealing substrate and electronic device manufacturing method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003086192A JP3842751B2 (en) 2003-03-26 2003-03-26 Electronic component sealing substrate and electronic device manufacturing method using the same

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006187834A Division JP2006295213A (en) 2006-07-07 2006-07-07 Board for sealing electronic component, board of multi-patterned form for sealing electronic component, and electronic apparatus

Publications (2)

Publication Number Publication Date
JP2004296724A true JP2004296724A (en) 2004-10-21
JP3842751B2 JP3842751B2 (en) 2006-11-08

Family

ID=33400918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003086192A Expired - Fee Related JP3842751B2 (en) 2003-03-26 2003-03-26 Electronic component sealing substrate and electronic device manufacturing method using the same

Country Status (1)

Country Link
JP (1) JP3842751B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006142447A (en) * 2004-11-22 2006-06-08 Sony Corp Functional element and its manufacturing method
KR100593934B1 (en) 2005-03-23 2006-06-30 삼성전기주식회사 Light emitting diode package with function of electrostatic discharge protection
JP2006300976A (en) * 2005-04-15 2006-11-02 Fujitsu Ltd Micro movable element and optical switching device
JP2007144617A (en) * 2005-11-22 2007-06-14 Honeywell Internatl Inc Mems device packaging method
JPWO2006080388A1 (en) * 2005-01-28 2008-06-19 松下電器産業株式会社 Electronic device package manufacturing method and electronic device package
US8159059B2 (en) 2006-08-25 2012-04-17 Kyocera Corporation Microelectromechanical device and method for manufacturing the same
US8282358B2 (en) 2006-08-31 2012-10-09 Kyocera Corporation Fluidic device
US10510726B2 (en) 2017-08-28 2019-12-17 Kabushiki Kaisha Toshiba Semiconductor device, method for manufacturing semiconductor device, and method for manufacturing semiconductor package
US10811391B2 (en) 2018-03-13 2020-10-20 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing semiconductor device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006142447A (en) * 2004-11-22 2006-06-08 Sony Corp Functional element and its manufacturing method
JP4556637B2 (en) * 2004-11-22 2010-10-06 ソニー株式会社 Functional element body
JP4588753B2 (en) * 2005-01-28 2010-12-01 パナソニック株式会社 Electronic device package manufacturing method and electronic device package
JPWO2006080388A1 (en) * 2005-01-28 2008-06-19 松下電器産業株式会社 Electronic device package manufacturing method and electronic device package
KR100593934B1 (en) 2005-03-23 2006-06-30 삼성전기주식회사 Light emitting diode package with function of electrostatic discharge protection
JP2006300976A (en) * 2005-04-15 2006-11-02 Fujitsu Ltd Micro movable element and optical switching device
JP4550653B2 (en) * 2005-04-15 2010-09-22 富士通株式会社 Micro movable element and optical switching device
JP2007144617A (en) * 2005-11-22 2007-06-14 Honeywell Internatl Inc Mems device packaging method
TWI447867B (en) * 2005-11-22 2014-08-01 Honeywell Int Inc Mems device packaging methods
US8159059B2 (en) 2006-08-25 2012-04-17 Kyocera Corporation Microelectromechanical device and method for manufacturing the same
US8282358B2 (en) 2006-08-31 2012-10-09 Kyocera Corporation Fluidic device
US10510726B2 (en) 2017-08-28 2019-12-17 Kabushiki Kaisha Toshiba Semiconductor device, method for manufacturing semiconductor device, and method for manufacturing semiconductor package
US10811391B2 (en) 2018-03-13 2020-10-20 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JP3842751B2 (en) 2006-11-08

Similar Documents

Publication Publication Date Title
US8159059B2 (en) Microelectromechanical device and method for manufacturing the same
JP4741621B2 (en) Electronic component sealing substrate, electronic device using the same, and electronic device manufacturing method
US20110038132A1 (en) Microstructure Apparatus, Manufacturing Method Thereof, and Sealing Substrate
JP4268480B2 (en) Electronic component sealing substrate and electronic device using the same
JP3842751B2 (en) Electronic component sealing substrate and electronic device manufacturing method using the same
JP2005262382A (en) Electronic device and its manufacturing method
JP4761713B2 (en) Electronic component sealing substrate, multi-component electronic component sealing substrate, and method of manufacturing electronic device
JP4126459B2 (en) Electronic component sealing substrate, electronic device using the same, and electronic device manufacturing method
JP4903540B2 (en) Substrate for encapsulating microelectromechanical components, substrate for encapsulating microelectromechanical components in plural shapes, microelectromechanical device, and manufacturing method of microelectronic mechanical device
JP2020120195A (en) MEMS oscillator
JP4434870B2 (en) Multi-cavity electronic component sealing substrate, electronic device, and method of manufacturing electronic device
JP4116954B2 (en) Electronic component sealing substrate and electronic device using the same
JP2005212016A (en) Electronic part sealing substrate, electronic part sealing substrate for installing a large number and method of manufacturing electronic device
JP4404647B2 (en) Electronic device and electronic component sealing substrate
JP4731291B2 (en) Electronic component sealing substrate, electronic device using the same, and method of manufacturing electronic device
KR101917716B1 (en) Module and production method
JP2005153067A (en) Substrate for sealing of electronic part and manufacturing method of electronic device using it
JP2006295213A (en) Board for sealing electronic component, board of multi-patterned form for sealing electronic component, and electronic apparatus
JP2006185968A (en) Electronic device
JP2003197803A (en) Semiconductor package
JP3051225B2 (en) Package for integrated circuit
JP3464136B2 (en) Electronic component storage package
JP3881542B2 (en) Wiring board
JP2006100446A (en) Composite structure and substrate for sealing electronic component
JP2003309205A (en) Ceramic package

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050201

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060117

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060320

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060508

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060707

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060801

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060810

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090818

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100818

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100818

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110818

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110818

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120818

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130818

Year of fee payment: 7

LAPS Cancellation because of no payment of annual fees