JP2004179677A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2004179677A5 JP2004179677A5 JP2004025535A JP2004025535A JP2004179677A5 JP 2004179677 A5 JP2004179677 A5 JP 2004179677A5 JP 2004025535 A JP2004025535 A JP 2004025535A JP 2004025535 A JP2004025535 A JP 2004025535A JP 2004179677 A5 JP2004179677 A5 JP 2004179677A5
- Authority
- JP
- Japan
- Prior art keywords
- inner lead
- electrode pad
- bonded
- semiconductor chip
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 3
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004025535A JP3702963B2 (ja) | 1997-01-07 | 2004-02-02 | 半導体集積回路装置の製造方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1206697 | 1997-01-07 | ||
| JP1739597 | 1997-01-14 | ||
| JP2004025535A JP3702963B2 (ja) | 1997-01-07 | 2004-02-02 | 半導体集積回路装置の製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27393997A Division JP3534583B2 (ja) | 1997-01-07 | 1997-09-19 | 半導体集積回路装置の製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005142458A Division JP4004513B2 (ja) | 1997-01-07 | 2005-05-16 | 半導体集積回路装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004179677A JP2004179677A (ja) | 2004-06-24 |
| JP2004179677A5 true JP2004179677A5 (enExample) | 2005-06-16 |
| JP3702963B2 JP3702963B2 (ja) | 2005-10-05 |
Family
ID=32718590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004025535A Expired - Fee Related JP3702963B2 (ja) | 1997-01-07 | 2004-02-02 | 半導体集積回路装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3702963B2 (enExample) |
-
2004
- 2004-02-02 JP JP2004025535A patent/JP3702963B2/ja not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2007117931A3 (en) | Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices | |
| JP2009540606A5 (enExample) | ||
| JP2004063767A5 (enExample) | ||
| JP2006523964A5 (enExample) | ||
| JP2009278103A5 (enExample) | ||
| JP2007502530A5 (enExample) | ||
| TW200644135A (en) | Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure | |
| TW200504952A (en) | Method of manufacturing semiconductor package and method of manufacturing semiconductor device | |
| JP2009512999A5 (enExample) | ||
| JP2005519150A5 (enExample) | ||
| TW200642065A (en) | Semiconductor bond pad structures and method of manufacturing thereof | |
| JP2005191053A5 (enExample) | ||
| EP1385208A3 (en) | Folded tape area array package with one metal layer | |
| NL1027869A1 (nl) | Multi-chipverpakking. | |
| JP2002093949A5 (enExample) | ||
| JP2011003764A5 (ja) | 半導体装置 | |
| ATE481734T1 (de) | Selektive verbindung bei der ic-kapselung | |
| JP2004179677A5 (enExample) | ||
| JP2004153260A5 (enExample) | ||
| TWI318791B (en) | Semiconductor device | |
| JP2004031432A5 (enExample) | ||
| TW200639981A (en) | Integrated circuit packaging and method of making the same | |
| TW200727422A (en) | Package structure and manufacturing method thereof | |
| TWI272729B (en) | Multi-chip sensor package | |
| JP2005277173A5 (enExample) |