JP2004095750A - Method for manufacturing laminated electronic component - Google Patents

Method for manufacturing laminated electronic component Download PDF

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Publication number
JP2004095750A
JP2004095750A JP2002253151A JP2002253151A JP2004095750A JP 2004095750 A JP2004095750 A JP 2004095750A JP 2002253151 A JP2002253151 A JP 2002253151A JP 2002253151 A JP2002253151 A JP 2002253151A JP 2004095750 A JP2004095750 A JP 2004095750A
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Japan
Prior art keywords
insulator layer
conductor pattern
insulator
electronic component
photosensitive
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JP2002253151A
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Japanese (ja)
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JP2004095750A5 (en
Inventor
Kuniaki Watanabe
渡辺 邦昭
Shigeru Nishiyama
西山  茂
Shuichi Ishida
石田 修一
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Toko Inc
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Toko Inc
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Publication of JP2004095750A publication Critical patent/JP2004095750A/en
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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that the line width of a conductor pattern or the interval of the conductor pattern are wide at the time of forming the conductor pattern by screen printing, and that the conductor pattern can not be formed on a ceramic green film at the time of forming the conductor pattern by a thick film photolithography technology. <P>SOLUTION: Insulating materials with photosensitive agent is used on a supporting body, and hardening is carried out to form a first insulator layer. Then, a second insulator layer formed of a conductor pattern formed by a photo-lithography technology by using photosensitive conductive paste and the insulating materials with the photosensitive agent is laminated on the first insulator layer. Then, a third insulator layer is formed on those laminated bodies by using the insulating materials with the photosensitive agent. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、絶縁体層と導体パターンを積層し、積層体内に導体パターンによって回路素子が形成された積層型電子部品の製造方法に関するものである。
【0002】
【従来の技術】
この種の積層型電子部品としては、コイル、コンデンサ、トランス、コモンモードチョークコイル、バラン、方向性結合器及び、複数の素子を一体化したフィルタ等がある。例えば、従来の積層型のコイルでは、絶縁体層と導体パターンを交互に積層し、絶縁体層間の導体パターンを接続して積層体内にコイルが形成される。コイルの両端は、積層体の端面に引き出され、積層体の端面に設けられた外部電極に接続される。
この様な積層型電子部品は、絶縁体層と導体パターンを順次印刷する、いわゆる印刷積層法や、導体パターンが印刷されたシートを積層する、いわゆるシート積層法によって形成される。
【0003】
【発明が解決しようとする課題】
近年、電子機器においては小型化、軽量化、高性能化が進み、電子機器に実装される電子部品も小型化、軽量化、高性能化が望まれている。
従来の積層型電子部品は、導体パターンがスクリーン印刷により形成されるので、印刷する際の導体ペーストのダレやニジミの発生及び、印刷マスクのメッシュの存在により、導体パターンの形状のバラツキが大きかった。従って、従来の積層型電子部品は、導体パターン間の間隔と導体パターンの線幅を大きくする必要があり、小型化、軽量化、高性能化できなかった。
【0004】
この様な問題点を解決するために、導体パターンを感光性導体ペーストを用いた厚膜フォトリソグラフィー技術によって形成することが行われている。導体パターンを、感光性導体ペーストによる厚膜フォトリソグラフィー技術を用いて形成した場合、導体パターンの線幅と導体パターン間の間隔をスクリーン印刷のものに比べて小さくできる。
しかしながら、この様な従来の積層型電子部品は、絶縁体層となるセラミックグリーン膜の表面に感光性導体ペーストを塗布した場合、感光性導体ペースト中の感光剤がセラミックグリーン膜内に吸収されてしまうため、露光しても所定のパターン形状に硬化せず、現像によって導体膜が流失してしまい、セラミックグリーン膜の表面に導体パターンを形成できなかった。
【0005】
この様な問題を解決するために、あらかじめポリエチレンテレフタレートフィルム上に感光性導体ペーストを用いたフォトリソグラフィー技術によって導体パターンを形成しておき、このポリエチレンテレフタレートフィルム上の導体パターンを絶縁体層となるセラミックグリーン膜上に転写することが行われている。しかしながら、この様に形成された従来の積層型電子部品は、ポリエチレンテレフタレートフィルム上の導体パターンを絶縁体層となるセラミックグリーン膜上に転写する際に加えられる圧力によって導体パターンが変形したり、転写する際に導体パターンの位置がずれたりして導体パターンを充分に高精細度化できなかった。また、セラミックグリーン膜上に導体パターンを転写する工程が必要となり、その分製造工程が増加する。
また、前述の問題を解決する別の方法として、焼成済みの基板の上に、感光性導電ペーストを用いフォトリソ技術によって所定のパターン形状に形成し、焼成することにより形成された導体パターンと、感光性絶縁体ペーストを用いフォトリソ技術によって形成し、焼成することにより形成された絶縁体層とが所定の順序で積み重ねられ、最後に焼成済みの基板をガラス材等で接合することが行われている。この様に形成された従来の積層型電子部品は、絶縁体層上に導体パターンを形成することができるが、一層ごとに焼成する必要があるのに加え、何回も焼成することにより積層体のひずみが大きくなり、最下層の基板が薄い場合には基板が割れるという問題があった。
【0006】
本発明は、製造工程を増加させることなく、高精細度の導体パターンを精度よく形成でき、これにより積層型電子部品の小型化、高性能化に貢献できる積層型電子部品の製造方法を提供することを目的とする。
【0007】
【課題を解決するための手段】
本発明の積層型電子部品の製造方法は、導体パターンと絶縁体層の形成の仕方を改良することにより、前述の課題を解決するものである。すなわち、本発明は、絶縁体層と導体パターンを積層し、積層体内に導体パターンによって回路素子が形成された積層型電子部品の製造方法において、支持体上に感光剤入りの絶縁材料を用い、硬化処理を施して第1の絶縁体層を形成する工程、第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に、感光剤入りの絶縁材料を用いて第3の絶縁体層を形成する工程を備える。
また、本発明は、絶縁体層と導体パターンを積層し、積層体内に導体パターンによって回路素子が形成された積層型電子部品の製造方法において、支持体上に絶縁性セラミック材料で第1の絶縁体層を形成する工程、第1の絶縁体層上に感光剤入りの絶縁材料を用いて緩衝層を形成する工程、緩衝層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に第3の絶縁体層を形成する工程を備える。
【0008】
さらに、本発明は、絶縁体層と導体パターンを積層し、絶縁体層間の導体パターンを絶縁体層のスルーホール内の導体を介して接続し、積層体内に導体パターンによって回路素子が形成された積層型電子部品の製造方法において、支持体上に感光剤入りの絶縁材料を用い、硬化処理を施して第1の絶縁体層を形成する工程、第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に、感光剤入りの絶縁材料を用いて第3の絶縁体層を形成する工程を備える。
またさらに、本発明は、絶縁体層と導体パターンを積層し、絶縁体層間の導体パターンを絶縁体層のスルーホール内の導体を介して接続し、積層体内に導体パターンによって回路素子が形成された積層型電子部品の製造方法において、支持体上に絶縁性セラミック材料で第1の絶縁体層を形成する工程、第1の絶縁体層上に感光剤入りの絶縁材料を用いて緩衝層を形成する工程、緩衝層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に第3の絶縁体層を形成する工程を備える。
【0009】
【発明の実施の形態】
本発明の積層型電子部品の製造方法は、まず、支持体上に、絶縁性セラミック材料又は感光剤入りの絶縁材料を用いて少なくとも1層以上の第1の絶縁体層を形成する。第1の絶縁体層を感光剤入りの絶縁材料を用いて形成した場合は、光又は熱によって硬化させる。次に、この第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる。この時、導体パターンは、この導体パターン上に絶縁体層を形成する前に、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒以上、60000℃・秒以下の条件で加熱処理が施される。また、第1の絶縁体層が絶縁性セラミック材料で形成された場合には、第1の絶縁体層上に感光剤入りの絶縁材料で形成された30μm以上の緩衝層を設け、この緩衝層上に導体パターンと第2の絶縁体層が積み重ねられる。さらに、これらの積層体上に絶縁性セラミック材料又は感光剤入りの絶縁材料を用いて少なくとも1層以上の第3の絶縁体層を形成する。
この様に導体パターンを形成した場合、その幅及び導体パターン間の間隔を15μm程度まで微細化することができ、従来のものよりも高精細度のものを絶縁体層上に精度よく形成できる。また、絶縁性セラミック材料で形成された第1の絶縁体層上に感光剤入りの絶縁材料で形成された30μm以上の緩衝層を設けた場合は、緩衝層の第1の絶縁体層の近い部分で感光剤の第1絶縁体層への拡散が起こるものの、緩衝層の表面近くでは感光剤の拡散がほとんどなくなる。従って、この緩衝層上に形成される導体パターンや絶縁体層に含有する感光剤が絶縁性セラミック材料に拡散することがない。さらに、導体パターンに、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒以上、60000℃・秒以下の条件で加熱処理が施された場合、導体パターンの強度が向上し、導体パターン上に絶縁体層を形成する際の応力によって変形したり、導体パターンが流失したりするのを防止できる。
【0010】
【実施例】
以下、本発明の積層型電子部品の製造方法の実施例を図1乃至図7を参照して説明する。
図1は本発明の積層型電子部品の製造方法の第1の実施例に係る積層型電子部品の分解斜視図、図2は本発明の積層型電子部品の製造方法の第1の実施例を模式的に示す斜視図である。
本発明の積層型電子部品の製造方法の第1の実施例に係る積層型電子部品としては、例えば、図1に示す様に、絶縁体層11A、11B上に1ターン未満のコイル用導体パターン14と絶縁体層12A〜12Dとを積み重ね、これら積層体上に絶縁体層13A、13Bを形成して、積層体内にコイルを形成したものがある。
絶縁体層11A、11Bと絶縁体層13A、13Bは、磁性体や誘電体等の絶縁性セラミックで形成される。また、絶縁体層12A〜12Dは、磁性体や誘電体等の絶縁性セラミックで形成される。
絶縁体層11B、12A、12B、12C、12Dの表面には、それぞれ導体パターン14が形成される。導体パターン14は、図1では1ターン未満のコイル用導体パターンが示されており、絶縁体層間の導体パターン14が絶縁体層のスルーホール内の導体を介して螺旋状に接続されて積層体内にコイルが形成される。
コイルの一端を構成する絶縁体層11Bの導体パターン14の一端は、絶縁体層11Bの端面に引き出され、積層体の端面に形成された外部電極に接続される。また、コイルの他端を構成する絶縁体層12Dの導体パターン14の他端は、絶縁体層12Dの端面に引き出され、積層体の端面に形成された外部電極に接続される。
【0011】
この様な積層型電子部品は、次のようにして製造される。まず、図2(A)に示す様に、支持体20の表面に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線(例えば、紫外線)を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、支持体20上に絶縁体層21が形成される。感光剤入りの絶縁材料は、磁性体や誘電体等の絶縁性セラミックに感光剤が混入されてペースト状に形成され、スクリーン印刷、スピンコート、ドクターブレード等の方法を用いて厚みが一様になる様に支持体20上に塗布される。なお、絶縁体21は、形成される素子に応じて所定の厚みになる様に複数層(例えば、1層の厚みが10μmの絶縁体層の形成を厚みが150μm〜200μmとなるまで繰返すことにより15〜20層)形成してもよい。また、支持体20は、絶縁体層21を支持でき、後述の工程での運搬に耐えられる強度を有するものであればどの様なものでもよいが、例えば、大きさが60mm×50mmで、厚みが1mmのアルミナ基板等の基板の表面に適当な剥離強度を持ったフィルムを貼り付けたものが用いられる。基板の表面に貼り付けられるフィルムは、例えば、下面にシリコン系粘着剤を形成した厚みが210μmのポリエステルフィルムが用いられる。
次に、図2(B)に示す様に、この絶縁体層21の表面全体に感光性導電ペーストを塗布し、乾燥させて絶縁体層21上に感光性導電膜24Aが形成される。感光性導電ペーストは、銀、銀とパラジウムの合金、銅、ニッケル等の導電材料に感光剤が混入されて形成され、スクリーン印刷、スピンコート、ドクターブレード等の方法を用いて厚みが一様になる様に絶縁体層21上に例えば10μmの厚みで塗布される。
さらに、この感光性導電膜24Aの表面に所定の導体パターン形状の光透過用孔を有するマスク(例えば、ガラス乾板)を密着させ、このマスクを介して光線を照射して露光することにより感光性導電膜24Aを所定パターン形状に硬化させる。この光線は、例えば10〜1000mJのエネルギーの紫外線が用いられる。この感光性導電膜24Aを現像液を用いて現像することにより、感光されていない部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図2(C)に示す様に、絶縁体層21の表面に導体パターン24が形成される。なお、図2では、複数個の積層型電子部品を一度に製造するために(いわゆる複数個取りするために)、絶縁体層の表面に複数個分の1ターン未満のコの字型のコイル用導体パターンが形成されている。
続いて、この導体パターン24が形成された絶縁体層21の表面全体に感光剤入りの絶縁材料を塗布し、乾燥させて絶縁体層21上に感光性絶縁体膜が形成される。感光剤入りの絶縁材料は、磁性体や誘電体等の絶縁性セラミックに感光剤が混入されてペースト状に形成され、スクリーン印刷、スピンコート、ドクターブレード等の方法を用いて厚みが一様になる様に絶縁体層21上に例えば10μmの厚みで塗布される。この感光性絶縁体膜表面にスルーホールとなる部分を遮光する遮光パターンを有するマスク(例えば、ガラス乾板)を密着させ、このマスクを介して光線(例えば、10〜1000mJのエネルギーの紫外線)を照射して露光し、現像液で現像することにより、感光性絶縁体膜のスルーホールとなる部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図2(D)に示す様に、絶縁体層21の表面にスルーホールSを有する絶縁体層12Aが形成される。
次に、図2(E)に示す様に、この絶縁体層12Aの表面全体に感光性導電ペーストを塗布し、乾燥させることにより、絶縁体層12Aのスルーホール内に導体が充填されると共に、絶縁体層12A上に感光性導電膜24Bが形成される。さらに、この感光性導電膜24B上に所定の導体パターン形状の光透過用孔を有するマスクを介して光線(例えば、10〜1000mJのエネルギーの紫外線)を照射して露光し、現像液で現像することにより、感光されていない部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図2(F)に示す様に、絶縁体層12Aの表面に導体パターン24が形成される。この絶縁体層12Aの表面の導体パターン24は、絶縁体層12Aのスルーホール内の導体を介して絶縁体層21の表面の導体パターンに接続される。
またさらに、図2(D)〜図2(F)の工程を所定の回数繰返して、図2(G)に示す様に絶縁体層22上に導体パターン24を形成することにより積層体内に所定のターン数のコイルが形成される。
続いて、図2(H)に示す様に、絶縁体層22の表面全体に、感光剤入りの絶縁材料を塗布し、乾燥させた後、光線(例えば、紫外線)を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、絶縁体層22上に絶縁体層23が形成される。なお、絶縁体層23は、形成される素子に応じて所定の厚みになる様に複数層(例えば、1層の厚みが10μmの絶縁体層の形成を厚みが350μmとなるまで繰返すことにより35層)形成してもよい。
そして、これらの積層体を所定の形状になる様に図2(H)に示す点線の位置で切断し、バレル研磨によって形状を整え、コイルの引き出し端を露出させた後脱脂し、800〜900℃で焼成した。この焼成体を再度バレル研磨によって整形及び引き出し導体の露出を行った後、端面に外部電極を形成する。
【0012】
図3は本発明の積層型電子部品の製造方法の第2の実施例に係る積層型電子部品の分解斜視図、図4は本発明の積層型電子部品の製造方法の第2の実施例を模式的に示す斜視図である。
本発明の積層型電子部品の製造方法の第2の実施例に係る積層型電子部品としては、例えば、図3に示す様に、絶縁体層31A、31B上に緩衝層36を設け、この緩衝層36上に1ターン未満のコイル用導体パターン34と絶縁体層32A〜32Dとを積み重ね、これら積層体上に絶縁体層33A、33Bを形成して、積層体内にコイルを形成したものがある。
この様な積層型電子部品は、次のようにして製造される。まず、図4(A)に示す様に、磁性体や誘電体等の絶縁性セラミック材料で支持体40上に少なくとも1層以上の絶縁体膜41が形成される。
次に、図4(B)に示す様に、この絶縁体膜41の表面全体に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、絶縁体膜41上に緩衝層36が形成される。感光剤入りの絶縁材料は、磁性体や誘電体等の絶縁性セラミックに感光剤が混入されてペースト状に形成され、スクリーン印刷、スピンコート、ドクターブレード等の方法を用いて厚みが一様になる様に絶縁体膜41上に塗布される。この緩衝層36は、絶縁体膜41の厚みに関係なく、その厚みを30μm以上にすることにより、後工程においてこの緩衝層36上に導体パターンを形成することができた。なお、図4の緩衝層36の厚みは、特性の安定性を十分に確保するために40μmにした。
さらに、図4(C)に示す様に、この緩衝層36の表面全体に感光性導電ペーストを塗布し、乾燥させて緩衝層36上に感光性導電膜44Aが形成される。この感光性導電膜44Aの表面に所定の導体パターン形状の光透過用孔を有するマスクを介して光線を照射して露光し、この感光性導電膜44Aを現像液を用いて現像することにより、感光されていない部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図4(D)に示す様に、緩衝層36の表面に導体パターン44が形成される。
続いて、この導体パターン44が形成された緩衝層36の表面全体に感光剤入りの絶縁材料を塗布し、乾燥させて緩衝層36上に感光性絶縁体膜が形成される。感光剤入りの絶縁材料は、磁性体や誘電体等の絶縁性セラミックに感光剤を混入してペースト状にしたものが用いられる。この感光性絶縁体膜表面にスルーホールとなる部分を遮光する遮光パターンを有するマスク(例えば、ガラス乾板)を介して光線を照射して露光し、現像液で現像することにより、感光性絶縁体膜のスルーホールとなる部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図4(E)に示す様に、スルーホールSを有する絶縁体層32Aが形成される。
次に、図4(F)に示す様に、この絶縁体層32Aの表面全体に感光性導電ペーストを塗布し、乾燥させることにより、絶縁体層32Aのスルーホール内に導体が充填されると共に、絶縁体層32A上に感光性導電膜44Bが形成される。この感光性導電膜44B上にマスクを介して光線を照射して露光し、現像液で現像することにより、感光されていない部分が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件(例えば、ピーク温度が144℃で、100℃にさらされる時間が466秒)で加熱することにより、図4(G)に示す様に、絶縁体層32Aの表面に導体パターン44が形成される。この絶縁体層32Aの表面の導体パターン24は、絶縁体層32Aのスルーホール内に充填された導体を介して絶縁体層31の表面の導体パターンに接続される。
さらに、図4(E)〜図4(G)の工程を所定回数繰返して、図4(H)に示す様に絶縁体層42上に導体パターン44を形成することにより、積層体内に所定のターン数のコイルが形成される。
またさらに、図4(I)に示す様に、絶縁体層42の表面全体に、感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、絶縁体層42上に少なくとも1層以上の絶縁体層43が形成される。
そして、これらの積層体を所定の形状になる様に図4(I)に示す点線の位置で切断し、バレル研磨によって形状を整え、コイルの引き出し端を露出させた後脱脂し、800〜900℃で焼成した。この焼成体を再度バレル研磨によって整形及び引き出し導体の露出を行った後、端面に外部電極を形成する。
この様に形成された積層型電子部品は、第1の絶縁体層に従来と同様の感光剤の入っていない絶縁性セラミックを使用できるので、前述の実施例のものよりも材料コストを抑えることができる。
【0013】
図5は本発明の積層型電子部品の製造方法の第3の実施例に係る積層型電子部品の分解斜視図、図6、図7は本発明の積層型電子部品の製造方法の第3の実施例を模式的に示す斜視図である。
本発明の積層型電子部品の製造方法の第3の実施例に係る積層型電子部品としては、例えば、図5に示す様に、絶縁体層51A、51B上に緩衝層56を設け、この緩衝層56上に絶縁体層52A〜52Eとコイル用導体パターン54A、54B、54、55、55A、55Bとを積み重ね、これら積層体上に絶縁体層53A、53Bを形成して、積層体内に互いに電磁気的に結合する2つのコイルを形成したものがある。
絶縁体層51A、51B、緩衝層56及び、絶縁体層53A、53Bは、磁性セラミックで形成される。また、絶縁体層52A〜52Eは、絶縁性セラミックで形成される。
絶縁体層52Aの表面には、引き出し用の導体パターン54A、54Bが形成される。また、絶縁体層52Bの表面には、渦巻き状の導体パターン54が形成される。この導体パターン54は、内側端が絶縁体層52Bのスルーホール内の導体を介して導体パターン54Aに、外側端が絶縁体層52Bのスルーホール内の導体を介して導体パターン54Bにそれぞれ接続される。
絶縁体層52Cの表面には、渦巻き状の導体パターン55が形成される。また、絶縁体層52Dの表面には、引き出し用の導体パターン55A、55Bが形成される。この導体パターン55Aは、渦巻き状の導体パターン55の内側端に接続される。また、この導体パターン55Bは、渦巻き状の導体パターン55の外側端に接続される。引き出し用の導体パターン54A、54B、55A、55Bは、積層体に設けられた外部端子に接続される。
この様な積層型電子部品は、トランスやコモンモードチョクコイルとして用いられる。
【0014】
この様な積層型電子部品は、次のようにして製造される。まず、図6(A)に示す様に、磁性体の絶縁性セラミック材料で支持体60上に少なくとも1層以上の絶縁体膜61が形成される。なお、絶縁体膜61は、形成される素子に応じて所定の厚みになる様に、例えば、1層の厚みが6μmの絶縁体膜の形成を厚みが400μmとなるまで繰返すことにより複数層形成してもよい。
次に、図6(B)に示す様に、この絶縁体膜61の表面全体に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、絶縁体膜61上に緩衝層56が形成される。感光剤入りの絶縁材料は、磁性体の絶縁性セラミックに感光剤を混入してペースト状にしたものが用いられる。
さらに、図6(C)に示す様に、この緩衝層56の表面全体に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、緩衝層56上に絶縁体層52Aが形成される。感光剤入りの絶縁材料は、磁性体や誘電体等の絶縁性セラミックに感光剤を混入してペースト状にしたものが用いられる。
続いて、この絶縁体層52Aの表面全体に感光性導電ペーストを塗布し、乾燥させて感光性導電膜が形成された後、露光、現像することにより、導体パターンとなる部分以外が除去される。そして、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図6(D)に示す様に、絶縁体層52Aの表面に導体パターン54A、54Bが形成される。
次に、この導体パターン54A、54Bが形成された絶縁体層52Aの表面全体に感光剤入りの絶縁材料を塗布し、露光、現像、乾燥した後、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図6(E)に示す様に、絶縁体層52A上にスルーホールSを有する絶縁体層52Bが形成される。
さらに、この絶縁体層52Bの表面全体に感光性導電膜を形成し、露光、現像した後、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図6(F)に示す様に、絶縁体層52Bの表面に導体パターン54が形成される。この絶縁体層52B上に形成された導体パターン54は、渦巻き形に形成され、内側端が絶縁体層52Bのスルーホール内の導体を介して絶縁体層52Aの導体パターン54Aに、外側端が絶縁体層52Bのスルーホール内の導体を介して絶縁体層52Aの導体パターン54Bにそれぞれ接続される。
続いて、この導体パターン54が形成された絶縁体層52Bの表面全体に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、図7(A)に示す様に、絶縁体層52B上に絶縁体層52Cが形成される。
さらに続いて、この絶縁体層52Cの表面全体に感光性導電膜を形成し、露光、現像した後、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図7(B)に示す様に、絶縁体層52Cの表面に導体パターン55が形成される。この導体パターン55は、渦巻き形に形成される。
次に、この導体パターン55が形成された絶縁体層52Cの表面全体に感光剤入りの絶縁材料を塗布し、露光、現像、乾燥した後、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図7(C)に示す様に、絶縁体層52C上にスルーホールSを有する絶縁体層52Dが形成される。
さらに、この絶縁体層52Dの表面全体に感光性導電膜を形成し、露光、現像した後、これを乾燥し、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱することにより、図7(D)に示す様に、絶縁体層52Dの表面に導体パターン55A、55Bが形成される。この導体パターン55Aは、絶縁体層52Dのスルーホール内の導体を介して絶縁体層52Cの導体パターン55の内側端に接続される。また、導体パターン55Bは、絶縁体層52Dのスルーホール内の導体を介して絶縁体層52Cの導体パターン55の外側端に接続される。
続いて、この導体パターン55A、55Bが形成された絶縁体層52Dの表面全体に感光剤入りの絶縁材料を塗布し、乾燥させた後、光線を用いて全体を露光するか又は、乾燥温度よりも高く、脱脂温度よりも低い温度で加熱することにより、図7(E)に示す様に絶縁体層52Eが形成される。
そして、図7(F)に示す様に、この絶縁体層52E上に磁性体の絶縁性セラミック材料で少なくとも1層以上の絶縁体層63を形成した後、これらの積層体を所定の形状になる様点線の位置で切断し、バレル研磨によって形状を整え、コイルの引き出し端を露出させた後脱脂し、800〜900℃で焼成した。この焼成体を再度バレル研磨によって整形及び引き出し導体の露出を行った後、端面に外部電極を形成する。なお、絶縁体膜63は、形成される素子に応じて所定の厚みになる様に、例えば、1層の厚みが6μmの絶縁体膜の形成を厚みが450μmとなるまで繰返すことにより複数層形成してもよい。
【0015】
以上、本発明の積層型電子部品の製造方法の実施例を述べたが、本発明はこれらの実施例に限られるものではない。例えば、感光剤入りの絶縁材料と感光性導電ペーストは、ネガ型、ポジ型いずれのものでもよい。また、実施例では導体パターンと第2の絶縁体層の両方を加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱する場合を示したが、導体パターンを加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒〜60000℃・秒の条件で加熱してあれば、導体パターンの変形や流出を防止でき、第2の絶縁体層をこの条件で加熱しなくてもよい。
また、第1の実施例と第2の実施例において、導体パターンは、コ字状、L字状、U字状、スパイラル状等様々な形状にすることができる。さらに、第2の実施例において、絶縁体層33A、33Bが感光剤の入っていない絶縁性セラミック材料で形成されてもよい。またさらに、第3の実施例において、第1の絶縁体層、第2の絶縁体層及び第3の絶縁体層の材質の組み合わせは、形成される素子に応じて様々に変えることができ、例えば、第1の絶縁体層と第3の絶縁体層を誘電体で形成してもよい。
また、本発明の積層型電子部品の製造方法は、実施例でコイル、トランス、コモンモードチョークの場合を説明したが、この他にも方向性結合器、バラン、集中定数型フィルタ、分布定数型フィルタ、様々な回路素子を一体化して多機能化した積層型複合電子部品にも適用できる。
【0016】
【発明の効果】
以上述べた様に、本発明の積層型電子部品の製造方法は、支持体上に感光剤入りの絶縁材料を用い、硬化処理を施して第1の絶縁体層を形成する工程、第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に、感光剤入りの絶縁材料を用いて第3の絶縁体層を形成する工程を備えるので、製造工程を増加させることなく、高精細度の導体パターンを精度よく形成でき、これにより積層型電子部品の小型化、高性能化に貢献できる。
また、本発明の積層型電子部品の製造方法は、支持体上に絶縁性セラミック材料で第1の絶縁体層を形成する工程、第1の絶縁体層上に感光剤入りの絶縁材料を用いて緩衝層を形成する工程、緩衝層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に第3の絶縁体層を形成する工程を備えるので、製造工程を増加させることなく、高精細度の導体パターンを精度よく形成でき、これにより積層型電子部品の小型化、高性能化に貢献できる。また、感光剤の入っていない絶縁性セラミックを用いることができるので、コストを抑えることができる。
【図面の簡単な説明】
【図1】本発明の積層型電子部品の製造方法の第1の実施例に係る積層型電子部品の分解斜視図である。
【図2】本発明の積層型電子部品の製造方法の第1の実施例を模式的に示す斜視図である。
【図3】本発明の積層型電子部品の製造方法の第2の実施例に係る積層型電子部品の分解斜視図である。
【図4】本発明の積層型電子部品の製造方法の第2の実施例を模式的に示す斜視図である。
【図5】図5は本発明の積層型電子部品の製造方法の第3の実施例に係る積層型電子部品の分解斜視図である。
【図6】本発明の積層型電子部品の製造方法の第3の実施例を模式的に示す斜視図である。
【図7】本発明の積層型電子部品の製造方法の第3の実施例を模式的に示す斜視図である。
【符号の説明】
11A、11B 第1の絶縁体層
12A、12B、12C、12D 第2の絶縁体層
13A、13B 第3の絶縁体層
14 導体パターン
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed in the laminate by the conductor pattern.
[0002]
[Prior art]
Examples of this type of laminated electronic component include a coil, a capacitor, a transformer, a common mode choke coil, a balun, a directional coupler, and a filter integrating a plurality of elements. For example, in a conventional laminated coil, an insulator layer and a conductor pattern are alternately laminated, and the conductor pattern between the insulator layers is connected to form a coil in the laminate. Both ends of the coil are drawn out to the end face of the laminate and connected to external electrodes provided on the end face of the laminate.
Such a laminated electronic component is formed by a so-called printing lamination method in which an insulator layer and a conductor pattern are sequentially printed, or a so-called sheet lamination method in which sheets on which a conductor pattern is printed are laminated.
[0003]
[Problems to be solved by the invention]
In recent years, electronic devices have been reduced in size, weight, and performance, and electronic components mounted on the electronic devices have also been desired to be reduced in size, weight, and performance.
In the conventional multilayer electronic component, since the conductor pattern is formed by screen printing, dripping and bleeding of the conductor paste at the time of printing and the presence of the mesh of the print mask greatly vary the shape of the conductor pattern. . Therefore, in the conventional multilayer electronic component, it is necessary to increase the interval between the conductor patterns and the line width of the conductor patterns, and it has not been possible to reduce the size, weight, and performance.
[0004]
In order to solve such a problem, a conductor pattern is formed by a thick-film photolithography technique using a photosensitive conductor paste. When the conductor pattern is formed by using a thick film photolithography technique using a photosensitive conductor paste, the line width of the conductor pattern and the interval between the conductor patterns can be made smaller than those obtained by screen printing.
However, in such a conventional multilayer electronic component, when a photosensitive conductor paste is applied to the surface of a ceramic green film serving as an insulator layer, a photosensitive agent in the photosensitive conductor paste is absorbed into the ceramic green film. For this reason, even when exposed to light, the conductive pattern was not cured into a predetermined pattern shape, and the conductive film was washed away by development, and a conductive pattern could not be formed on the surface of the ceramic green film.
[0005]
In order to solve such a problem, a conductor pattern is formed in advance on a polyethylene terephthalate film by a photolithography technique using a photosensitive conductor paste, and the conductor pattern on the polyethylene terephthalate film is converted into a ceramic to be an insulator layer. Transferring to a green film has been performed. However, in the conventional laminated electronic component formed in this manner, the conductor pattern is deformed or transferred due to the pressure applied when the conductor pattern on the polyethylene terephthalate film is transferred onto the ceramic green film serving as the insulator layer. In such a case, the position of the conductor pattern was displaced, and the definition of the conductor pattern could not be made sufficiently high. In addition, a step of transferring the conductor pattern onto the ceramic green film is required, and the number of manufacturing steps increases accordingly.
Further, as another method for solving the above-mentioned problem, a conductive pattern formed by forming a predetermined pattern on a baked substrate by a photolithographic technique using a photosensitive conductive paste, Insulator layers formed by photolithography using a conductive insulator paste and fired are stacked in a predetermined order, and finally the fired substrate is joined with a glass material or the like. . In the conventional multilayer electronic component formed in this manner, a conductor pattern can be formed on the insulator layer. However, in addition to firing each layer, the multilayer body is fired many times. However, when the lowermost substrate is thin, the substrate is cracked.
[0006]
The present invention provides a method for manufacturing a multilayer electronic component that can accurately form a high-definition conductor pattern without increasing the number of manufacturing steps, thereby contributing to miniaturization and high performance of the multilayer electronic component. The purpose is to:
[0007]
[Means for Solving the Problems]
The method for manufacturing a multilayer electronic component according to the present invention solves the above-mentioned problem by improving the method of forming a conductor pattern and an insulator layer. That is, the present invention provides a method for manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated and a circuit element is formed by the conductor pattern in the laminate, using an insulating material containing a photosensitive agent on a support, A step of forming a first insulator layer by performing a hardening treatment; a conductive pattern formed by a photolithography technique using a photosensitive conductive paste on the first insulator layer and an insulating material containing a photosensitive agent; A step of stacking the second insulator layer and a step of forming a third insulator layer on these laminates using an insulating material containing a photosensitive agent.
The present invention also provides a method for manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed by the conductor pattern in the laminate. Forming a body layer, forming a buffer layer using a photosensitive agent-containing insulating material on the first insulator layer, and forming a conductive pattern on the buffer layer using a photosensitive conductive paste by photolithography And a second insulator layer formed of an insulating material containing a photosensitive agent, and a step of forming a third insulator layer on the stacked body.
[0008]
Furthermore, in the present invention, the insulator layer and the conductor pattern are laminated, the conductor pattern between the insulator layers is connected via a conductor in a through hole of the insulator layer, and a circuit element is formed by the conductor pattern in the laminate. In a method for manufacturing a laminated electronic component, a step of forming a first insulator layer by performing a curing process using an insulating material containing a photosensitive agent on a support, and forming a photosensitive conductive material on the first insulator layer A step of stacking a conductor pattern formed by a photolithography technique using a paste and a second insulator layer formed of an insulating material containing a photosensitive agent, and using an insulating material containing a photosensitive agent on these laminates; Forming a third insulator layer by using the same.
Still further, according to the present invention, an insulator layer and a conductor pattern are laminated, and the conductor pattern between the insulator layers is connected via a conductor in a through hole of the insulator layer, and a circuit element is formed by the conductor pattern in the laminate. Forming a first insulator layer of an insulating ceramic material on a support, forming a buffer layer on the first insulator layer by using an insulating material containing a photosensitive agent. A forming step, a step of stacking a conductive pattern formed by a photolithographic technique using a photosensitive conductive paste on a buffer layer and a second insulator layer formed of an insulating material containing a photosensitive agent, and lamination thereof. Forming a third insulator layer on the body.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
In the method of manufacturing a multilayer electronic component of the present invention, first, at least one or more first insulator layers are formed on a support using an insulating ceramic material or an insulating material containing a photosensitive agent. When the first insulator layer is formed using an insulating material containing a photosensitive agent, the first insulator layer is cured by light or heat. Next, a conductor pattern formed by photolithography using a photosensitive conductive paste and a second insulator layer formed of an insulating material containing a photosensitive agent are stacked on the first insulator layer. At this time, before forming the insulator layer on the conductor pattern, the conductor pattern is exposed to a temperature range of 40000 ° C. sec. The heat treatment is performed under a condition of not more than ° C · sec. When the first insulator layer is formed of an insulating ceramic material, a buffer layer of 30 μm or more formed of an insulating material containing a photosensitive agent is provided on the first insulator layer. A conductor pattern and a second insulator layer are stacked on top. Further, at least one or more third insulator layers are formed on these laminates using an insulating ceramic material or an insulating material containing a photosensitive agent.
When the conductor pattern is formed in this manner, the width and the interval between the conductor patterns can be reduced to about 15 μm, and a higher definition than the conventional one can be formed on the insulator layer with higher precision. In the case where a buffer layer having a thickness of 30 μm or more formed of an insulating material containing a photosensitive agent is provided on the first insulating layer formed of an insulating ceramic material, the buffer layer is close to the first insulating layer. Although the diffusion of the photosensitive agent into the first insulator layer occurs in the portion, the diffusion of the photosensitive agent hardly occurs near the surface of the buffer layer. Therefore, the photosensitive agent contained in the conductor pattern and the insulator layer formed on the buffer layer does not diffuse into the insulating ceramic material. Further, when the conductor pattern is subjected to a heat treatment under the condition that the time (second) of exposure to the temperature region of the maximum heating temperature (° C.) × 100 ° C. or more is 40,000 ° C. or more and 60,000 ° C. or less. The strength of the conductor pattern is improved, and it is possible to prevent the conductor pattern from being deformed by the stress when the insulator layer is formed on the conductor pattern and from being washed away.
[0010]
【Example】
Hereinafter, an embodiment of a method of manufacturing a multilayer electronic component according to the present invention will be described with reference to FIGS.
FIG. 1 is an exploded perspective view of a multilayer electronic component according to a first embodiment of the method for manufacturing a multilayer electronic component of the present invention, and FIG. 2 is a diagram illustrating a first embodiment of the method of manufacturing a multilayer electronic component of the present invention. It is a perspective view which shows typically.
As a multilayer electronic component according to the first embodiment of the method for manufacturing a multilayer electronic component of the present invention, for example, as shown in FIG. 1, a conductor pattern for a coil having less than one turn is formed on insulator layers 11A and 11B. 14 is laminated with the insulator layers 12A to 12D, the insulator layers 13A and 13B are formed on these laminates, and a coil is formed in the laminate.
The insulator layers 11A and 11B and the insulator layers 13A and 13B are formed of an insulating ceramic such as a magnetic or dielectric material. Further, the insulator layers 12A to 12D are formed of an insulating ceramic such as a magnetic material or a dielectric material.
Conductor patterns 14 are formed on the surfaces of the insulator layers 11B, 12A, 12B, 12C, and 12D, respectively. In FIG. 1, the conductor pattern 14 is a coil conductor pattern having less than one turn, and the conductor pattern 14 between the insulator layers is spirally connected via conductors in through holes in the insulator layer to form a laminate. A coil is formed at the end.
One end of the conductor pattern 14 of the insulator layer 11B constituting one end of the coil is drawn out to the end face of the insulator layer 11B and connected to an external electrode formed on the end face of the laminate. The other end of the conductor pattern 14 of the insulator layer 12D constituting the other end of the coil is drawn out to the end face of the insulator layer 12D and connected to an external electrode formed on the end face of the laminate.
[0011]
Such a laminated electronic component is manufactured as follows. First, as shown in FIG. 2A, an insulating material containing a photosensitive agent is applied to the surface of the support 20 and dried, and then the entire surface is exposed to light (eg, ultraviolet light) or dried. By heating at a temperature higher than the temperature and lower than the degreasing temperature, the insulator layer 21 is formed on the support 20. The insulating material containing the photosensitive agent is formed into a paste by mixing the photosensitive agent into an insulating ceramic such as a magnetic substance or a dielectric substance, and has a uniform thickness using a method such as screen printing, spin coating, or a doctor blade. It is applied on the support 20 as shown. The insulator 21 is formed by repeating a plurality of layers (for example, the formation of an insulator layer having a thickness of 10 μm until the thickness becomes 150 μm to 200 μm) so that the insulator 21 has a predetermined thickness according to an element to be formed. 15 to 20 layers). Further, the support 20 may be of any type as long as it can support the insulator layer 21 and has strength enough to withstand transportation in a process described below. For example, the size is 60 mm × 50 mm, and the thickness is 60 mm × 50 mm. A film having an appropriate peel strength is attached to the surface of a substrate such as an alumina substrate having a thickness of 1 mm. As the film to be attached to the surface of the substrate, for example, a polyester film having a thickness of 210 μm with a silicon-based adhesive formed on the lower surface is used.
Next, as shown in FIG. 2B, a photosensitive conductive paste is applied to the entire surface of the insulator layer 21 and dried to form a photosensitive conductive film 24A on the insulator layer 21. The photosensitive conductive paste is formed by mixing a photosensitive material into a conductive material such as silver, an alloy of silver and palladium, copper, and nickel, and has a uniform thickness using a method such as screen printing, spin coating, or a doctor blade. It is applied on the insulator layer 21 in a thickness of, for example, 10 μm.
Further, a mask (for example, a glass dry plate) having a light-transmitting hole having a predetermined conductor pattern shape is brought into close contact with the surface of the photosensitive conductive film 24A, and light is irradiated through the mask to expose the photosensitive conductive film. The conductive film 24A is cured into a predetermined pattern shape. As this light beam, for example, ultraviolet light having an energy of 10 to 1000 mJ is used. By developing the photosensitive conductive film 24A using a developing solution, the unexposed portions are removed. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 100 seconds at 466 seconds, the conductor pattern 24 is formed on the surface of the insulator layer 21 as shown in FIG. In FIG. 2, in order to manufacture a plurality of laminated electronic components at one time (so as to obtain a plurality of electronic components), a U-shaped coil of less than one-turn turns is formed on the surface of the insulator layer. Conductor pattern is formed.
Subsequently, a photosensitive material-containing insulating material is applied to the entire surface of the insulator layer 21 on which the conductor pattern 24 is formed, and dried to form a photosensitive insulator film on the insulator layer 21. The insulating material containing the photosensitive agent is formed into a paste by mixing the photosensitive agent into an insulating ceramic such as a magnetic substance or a dielectric substance, and has a uniform thickness using a method such as screen printing, spin coating, or a doctor blade. It is applied on the insulator layer 21 in a thickness of, for example, 10 μm. A mask (for example, a glass dry plate) having a light-shielding pattern that shields a portion to be a through hole is brought into close contact with the surface of the photosensitive insulator film, and a light beam (for example, ultraviolet light having an energy of 10 to 1000 mJ) is irradiated through the mask. Then, by developing with a developer, a portion to be a through hole of the photosensitive insulator film is removed. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 466 seconds (exposure time to 100 ° C.), an insulator layer 12A having a through hole S is formed on the surface of the insulator layer 21 as shown in FIG. 2D.
Next, as shown in FIG. 2E, a photosensitive conductive paste is applied to the entire surface of the insulator layer 12A and dried to fill the through holes of the insulator layer 12A with a conductor. Then, a photosensitive conductive film 24B is formed on the insulator layer 12A. Further, the photosensitive conductive film 24B is exposed to a light beam (for example, ultraviolet light having an energy of 10 to 1000 mJ) through a mask having a light transmission hole having a predetermined conductor pattern shape, and is exposed to light, and developed with a developer. This removes the unexposed portions. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 466 seconds (exposure time to 100 ° C.), the conductor pattern 24 is formed on the surface of the insulator layer 12A as shown in FIG. The conductor pattern 24 on the surface of the insulator layer 12A is connected to the conductor pattern on the surface of the insulator layer 21 via a conductor in a through hole of the insulator layer 12A.
2D to 2F are repeated a predetermined number of times to form a conductor pattern 24 on the insulator layer 22 as shown in FIG. The number of turns of the coil is formed.
Subsequently, as shown in FIG. 2H, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator layer 22 and dried, and then the entire surface is exposed using a light beam (for example, ultraviolet light). Alternatively, by heating at a temperature higher than the drying temperature and lower than the degreasing temperature, the insulator layer 23 is formed on the insulator layer 22. The insulator layer 23 is formed by a plurality of layers (for example, by repeating the formation of an insulator layer having a thickness of 10 μm until the thickness becomes 350 μm) so that the insulator layer 23 has a predetermined thickness according to the element to be formed. Layer).
Then, these laminates are cut at a dotted line position shown in FIG. 2 (H) so as to have a predetermined shape, the shape is adjusted by barrel polishing, and the coil drawing ends are exposed and then degreased. Fired at ℃. After reshaping the fired body by barrel polishing and exposing the lead conductor, an external electrode is formed on the end face.
[0012]
FIG. 3 is an exploded perspective view of a multilayer electronic component according to a second embodiment of the method for manufacturing a multilayer electronic component of the present invention, and FIG. 4 is a diagram illustrating a second embodiment of the method of manufacturing a multilayer electronic component of the present invention. It is a perspective view which shows typically.
As a multilayer electronic component according to the second embodiment of the method for manufacturing a multilayer electronic component of the present invention, for example, as shown in FIG. 3, a buffer layer 36 is provided on insulator layers 31A and 31B, The coil conductor pattern 34 of less than one turn and the insulator layers 32A to 32D are stacked on the layer 36, and the insulator layers 33A and 33B are formed on these laminates, and a coil is formed in the laminate. .
Such a laminated electronic component is manufactured as follows. First, as shown in FIG. 4A, at least one or more insulating films 41 are formed on a support 40 using an insulating ceramic material such as a magnetic material or a dielectric material.
Next, as shown in FIG. 4B, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator film 41 and dried, and then the entire surface is exposed to light using a light beam or a drying temperature. By heating at a higher temperature than the degreasing temperature, the buffer layer 36 is formed on the insulator film 41. The insulating material containing the photosensitive agent is formed into a paste by mixing the photosensitive agent into an insulating ceramic such as a magnetic substance or a dielectric substance, and has a uniform thickness using a method such as screen printing, spin coating, or a doctor blade. It is applied on the insulator film 41 as shown. By setting the thickness of the buffer layer 36 to 30 μm or more, regardless of the thickness of the insulator film 41, a conductor pattern could be formed on the buffer layer 36 in a later step. The thickness of the buffer layer 36 in FIG. 4 was set to 40 μm in order to sufficiently secure the stability of the characteristics.
Further, as shown in FIG. 4C, a photosensitive conductive paste is applied to the entire surface of the buffer layer 36 and dried to form a photosensitive conductive film 44A on the buffer layer 36. By irradiating and irradiating light on the surface of the photosensitive conductive film 44A through a mask having a light transmission hole having a predetermined conductor pattern shape, and developing the photosensitive conductive film 44A using a developing solution, The unexposed parts are removed. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 466 seconds (exposure time to 100 ° C.), the conductor pattern 44 is formed on the surface of the buffer layer 36 as shown in FIG.
Subsequently, a photosensitive material-containing insulating material is applied to the entire surface of the buffer layer 36 on which the conductor pattern 44 is formed, and dried to form a photosensitive insulator film on the buffer layer 36. As the insulating material containing a photosensitive agent, a paste obtained by mixing a photosensitive agent into an insulating ceramic such as a magnetic substance or a dielectric substance is used. The photosensitive insulator film is exposed to light through a mask (for example, a glass dry plate) having a light-shielding pattern that shields a portion to be a through hole on the surface of the photosensitive insulator film, and is exposed to light. Portions of the film that will become through holes are removed. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 466 seconds exposed to 100 ° C., an insulator layer 32A having a through hole S is formed as shown in FIG.
Next, as shown in FIG. 4 (F), a photosensitive conductive paste is applied to the entire surface of the insulator layer 32A and dried to fill the through holes in the insulator layer 32A with a conductor. Then, a photosensitive conductive film 44B is formed on the insulator layer 32A. By exposing the photosensitive conductive film 44B to light by irradiating it through a mask, and developing with a developer, unexposed portions are removed. Then, this is dried, and the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s (for example, when the peak temperature is 144 ° C., By heating for 466 seconds (exposure time to 100 ° C.), the conductor pattern 44 is formed on the surface of the insulator layer 32A as shown in FIG. The conductor pattern 24 on the surface of the insulator layer 32A is connected to the conductor pattern on the surface of the insulator layer 31 via a conductor filled in a through hole of the insulator layer 32A.
Further, the steps of FIG. 4E to FIG. 4G are repeated a predetermined number of times to form a conductor pattern 44 on the insulator layer 42 as shown in FIG. A number of turns of the coil are formed.
Further, as shown in FIG. 4 (I), an insulating material containing a photosensitive agent is applied to the entire surface of the insulator layer 42 and dried, and then the whole is exposed using a light beam or the drying temperature. By heating at a higher temperature than the degreasing temperature, at least one insulator layer 43 is formed on the insulator layer 42.
Then, these laminates are cut at the positions indicated by the dotted lines shown in FIG. 4 (I) so as to have a predetermined shape, the shapes are adjusted by barrel polishing, and the coil drawing ends are exposed and then degreased. Fired at ℃. After reshaping the fired body by barrel polishing and exposing the lead conductor, an external electrode is formed on the end face.
In the multilayer electronic component formed in this manner, the same insulating ceramic without a photosensitive agent as in the related art can be used for the first insulator layer, so that the material cost can be reduced as compared with the above-described embodiment. Can be.
[0013]
FIG. 5 is an exploded perspective view of a multilayer electronic component according to a third embodiment of the method of manufacturing a multilayer electronic component of the present invention, and FIGS. 6 and 7 are third views of the method of manufacturing a multilayer electronic component of the present invention. It is a perspective view which shows an Example typically.
As a multilayer electronic component according to the third embodiment of the method for manufacturing a multilayer electronic component of the present invention, for example, as shown in FIG. 5, a buffer layer 56 is provided on insulator layers 51A and 51B, The insulator layers 52A to 52E and the coil conductor patterns 54A, 54B, 54, 55, 55A, and 55B are stacked on the layer 56, and the insulator layers 53A and 53B are formed on these laminates. There is one in which two coils that are electromagnetically coupled are formed.
The insulator layers 51A and 51B, the buffer layer 56, and the insulator layers 53A and 53B are formed of magnetic ceramic. Further, the insulator layers 52A to 52E are formed of an insulating ceramic.
Leading conductor patterns 54A and 54B are formed on the surface of the insulator layer 52A. A spiral conductor pattern 54 is formed on the surface of the insulator layer 52B. The conductor pattern 54 has an inner end connected to the conductor pattern 54A via a conductor in a through hole of the insulator layer 52B, and an outer end connected to the conductor pattern 54B via a conductor in a through hole of the insulator layer 52B. You.
A spiral conductive pattern 55 is formed on the surface of the insulator layer 52C. In addition, on the surface of the insulator layer 52D, lead conductor patterns 55A and 55B are formed. The conductor pattern 55A is connected to the inner end of the spiral conductor pattern 55. The conductor pattern 55B is connected to the outer end of the spiral conductor pattern 55. The lead conductor patterns 54A, 54B, 55A, and 55B are connected to external terminals provided on the laminate.
Such a laminated electronic component is used as a transformer or a common mode choke coil.
[0014]
Such a laminated electronic component is manufactured as follows. First, as shown in FIG. 6A, at least one or more insulating films 61 are formed on a support 60 using a magnetic insulating ceramic material. Note that the insulator film 61 is formed into a plurality of layers by repeating formation of an insulator film having a thickness of 6 μm until the thickness becomes 400 μm, for example, so that the insulator film 61 has a predetermined thickness according to the element to be formed. May be.
Next, as shown in FIG. 6B, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator film 61 and dried, and then the entire surface is exposed to light using a light beam or a drying temperature. By heating at a temperature higher than the degreasing temperature, the buffer layer 56 is formed on the insulator film 61. As the insulating material containing a photosensitive agent, a paste obtained by mixing a photosensitive agent into a magnetic insulating ceramic is used.
Further, as shown in FIG. 6 (C), an insulating material containing a photosensitive agent is applied to the entire surface of the buffer layer 56 and dried, and then the entire surface is exposed to light using a light beam or the drying temperature is increased. By heating at a high temperature but lower than the degreasing temperature, the insulator layer 52A is formed on the buffer layer 56. As the insulating material containing a photosensitive agent, a paste obtained by mixing a photosensitive agent into an insulating ceramic such as a magnetic substance or a dielectric substance is used.
Subsequently, a photosensitive conductive paste is applied to the entire surface of the insulator layer 52A and dried to form a photosensitive conductive film, which is then exposed and developed to remove portions other than the portion serving as the conductive pattern. . Then, this is dried and heated under the condition that the time (second) of exposure to a temperature region of not less than the maximum temperature of heating (° C.) × 100 ° C. is 40,000 ° C. · s to 60,000 ° C. · s, thereby obtaining FIG. As shown in (), conductor patterns 54A and 54B are formed on the surface of the insulator layer 52A.
Next, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator layer 52A on which the conductor patterns 54A and 54B are formed, exposed, developed, and dried, and then heated to a maximum temperature (° C.) × 100 ° C. or more. As shown in FIG. 6E, the insulating layer 52A has a through-hole S on the insulator layer 52A by heating under the condition that the time (second) of exposure to the temperature region of 40000 ° C. · sec to 60000 ° C. · sec. A body layer 52B is formed.
Further, a photosensitive conductive film is formed on the entire surface of the insulator layer 52B, exposed and developed, dried, and exposed to a temperature region of a maximum heating temperature (° C.) × 100 ° C. or more (seconds). 6) is heated under the conditions of 40000 ° C. · sec to 60000 ° C. · sec, so that the conductor pattern 54 is formed on the surface of the insulator layer 52B as shown in FIG. The conductor pattern 54 formed on the insulator layer 52B is formed in a spiral shape, and the inner end is connected to the conductor pattern 54A of the insulator layer 52A via the conductor in the through hole of the insulator layer 52B, and the outer end is connected to the conductor pattern 54A. The conductors are connected to the conductor patterns 54B of the insulator layer 52A via conductors in the through holes of the insulator layer 52B.
Subsequently, an insulating material containing a photosensitizer is applied to the entire surface of the insulator layer 52B on which the conductor pattern 54 is formed, and after drying, the entire surface is exposed to light using a light beam or a temperature higher than the drying temperature. By heating at a temperature lower than the degreasing temperature, an insulator layer 52C is formed on the insulator layer 52B as shown in FIG.
Subsequently, a photosensitive conductive film is formed on the entire surface of the insulator layer 52C, exposed and developed, dried, and exposed to a temperature region of a maximum heating temperature (° C.) × 100 ° C. or more. By heating at (second) 40,000 ° C.-second to 60,000 ° C.-second, the conductor pattern 55 is formed on the surface of the insulator layer 52C as shown in FIG. 7B. The conductor pattern 55 is formed in a spiral shape.
Next, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator layer 52C on which the conductor pattern 55 is formed, exposed, developed, dried, and then heated to a maximum temperature (° C.) × 100 ° C. or more. By heating under the condition that the exposure time (second) to the region is 40,000 ° C. · sec to 60,000 ° C. · sec, as shown in FIG. 7C, the insulating layer having the through hole S on the insulating layer 52C 52D is formed.
Further, a photosensitive conductive film is formed on the entire surface of the insulator layer 52D, exposed and developed, dried, and exposed to a temperature region of a maximum heating temperature (° C.) × 100 ° C. or more (seconds). ) Is heated under the condition of 40000 ° C. · sec to 60000 ° C. · sec, so that the conductor patterns 55A and 55B are formed on the surface of the insulator layer 52D as shown in FIG. 7D. The conductor pattern 55A is connected to the inside end of the conductor pattern 55 of the insulator layer 52C via a conductor in a through hole of the insulator layer 52D. The conductor pattern 55B is connected to the outer end of the conductor pattern 55 of the insulator layer 52C via a conductor in a through hole of the insulator layer 52D.
Subsequently, an insulating material containing a photosensitive agent is applied to the entire surface of the insulator layer 52D on which the conductor patterns 55A and 55B are formed, and after drying, the entire surface is exposed to light using a light beam or a drying temperature. By heating at a lower temperature than the degreasing temperature, the insulator layer 52E is formed as shown in FIG.
Then, as shown in FIG. 7 (F), after forming at least one or more insulator layers 63 with a magnetic insulating ceramic material on the insulator layer 52E, these laminates are formed into a predetermined shape. The coil was cut at the position indicated by the dotted line, the shape was adjusted by barrel polishing, the exposed end of the coil was exposed, degreased, and fired at 800 to 900 ° C. After reshaping the fired body by barrel polishing and exposing the lead conductor, an external electrode is formed on the end face. The insulator film 63 is formed in a plurality of layers by repeating formation of an insulator film having a thickness of 6 μm until the thickness becomes 450 μm, for example, so that the insulator film 63 has a predetermined thickness in accordance with an element to be formed. May be.
[0015]
Although the embodiments of the method for manufacturing a multilayer electronic component according to the present invention have been described above, the present invention is not limited to these embodiments. For example, the insulating material containing the photosensitive agent and the photosensitive conductive paste may be either negative type or positive type. In the embodiment, the time (second) for exposing both the conductor pattern and the second insulator layer to a temperature region of not less than the maximum heating temperature (° C.) × 100 ° C. is from 40,000 ° C. · s to 60,000 ° C. · s. Although the case where the heating is performed is described in the above, the time (second) for exposing the conductor pattern to a temperature region of 100 ° C. or more of the maximum temperature of heating (° C.) × 40 ° C. · 60 ° C. · second is required. If this is the case, deformation and outflow of the conductor pattern can be prevented, and the second insulator layer does not need to be heated under these conditions.
In the first embodiment and the second embodiment, the conductor pattern can have various shapes such as a U-shape, an L-shape, a U-shape, and a spiral shape. Further, in the second embodiment, the insulator layers 33A and 33B may be formed of an insulating ceramic material containing no photosensitive agent. Furthermore, in the third embodiment, the combination of the materials of the first insulator layer, the second insulator layer, and the third insulator layer can be variously changed depending on the element to be formed. For example, the first insulator layer and the third insulator layer may be formed of a dielectric.
In the method of manufacturing a multilayer electronic component according to the present invention, the case of a coil, a transformer, and a common mode choke has been described in the embodiment. In addition, a directional coupler, a balun, a lumped filter, a distributed The present invention can also be applied to a multilayer composite electronic component in which a filter and various circuit elements are integrated to make it multifunctional.
[0016]
【The invention's effect】
As described above, the method for manufacturing a multilayer electronic component of the present invention comprises the steps of: using an insulating material containing a photosensitive agent on a support, performing a curing treatment to form a first insulator layer; A process in which a conductor pattern formed by a photolithographic technique using a photosensitive conductive paste and a second insulator layer formed of an insulating material containing a photosensitive agent are stacked on the insulator layer, and And a step of forming a third insulator layer using an insulating material containing a photosensitive agent, so that a high-definition conductor pattern can be accurately formed without increasing the number of manufacturing steps. Can contribute to miniaturization and high performance of
Further, in the method for manufacturing a multilayer electronic component of the present invention, a step of forming a first insulator layer on a support with an insulating ceramic material, using an insulating material containing a photosensitive agent on the first insulator layer. Forming a buffer layer by stacking, on the buffer layer, a conductor pattern formed by a photolithographic technique using a photosensitive conductive paste and a second insulator layer formed of an insulating material containing a photosensitive agent; and And a step of forming a third insulator layer on these laminates, so that a high-definition conductor pattern can be formed with high precision without increasing the number of manufacturing steps. , Can contribute to higher performance. Further, since an insulating ceramic containing no photosensitive agent can be used, the cost can be reduced.
[Brief description of the drawings]
FIG. 1 is an exploded perspective view of a multilayer electronic component according to a first embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 2 is a perspective view schematically showing a first embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 3 is an exploded perspective view of a multilayer electronic component according to a second embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 4 is a perspective view schematically showing a second embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 5 is an exploded perspective view of a multilayer electronic component according to a third embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 6 is a perspective view schematically showing a third embodiment of the method for manufacturing a multilayer electronic component of the present invention.
FIG. 7 is a perspective view schematically showing a third embodiment of the method for manufacturing a multilayer electronic component of the present invention.
[Explanation of symbols]
11A, 11B First insulator layer
12A, 12B, 12C, 12D Second insulator layer
13A, 13B Third insulator layer
14 Conductor pattern

Claims (8)

絶縁体層と導体パターンを積層し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に感光剤入りの絶縁材料を用い、硬化処理を施して第1の絶縁体層を形成する工程、該第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に、感光剤入りの絶縁材料を用いて第3の絶縁体層を形成する工程を備えたことを特徴とする積層型電子部品の製造方法。
In a method of manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed in the laminate by the conductor pattern,
A step of forming a first insulator layer by performing a curing treatment using an insulating material containing a photosensitive agent on the support, and forming the first insulator layer on the first insulator layer by photolithography using a photosensitive conductive paste; A step of stacking the conductor pattern and the second insulator layer formed of an insulating material containing a photosensitive agent, and forming a third insulator layer on the laminate by using an insulating material containing a photosensitive agent. A method for manufacturing a laminated electronic component, comprising a step of forming.
絶縁体層と導体パターンを積層し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に絶縁性セラミック材料で第1の絶縁体層を形成する工程、該第1の絶縁体層上に感光剤入りの絶縁材料を用いて緩衝層を形成する工程、該緩衝層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に第3の絶縁体層を形成する工程を備えたことを特徴とする積層型電子部品の製造方法。
In a method of manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed in the laminate by the conductor pattern,
A step of forming a first insulator layer of an insulating ceramic material on a support, a step of forming a buffer layer on the first insulator layer by using an insulating material containing a photosensitive agent, Stacking a conductor pattern formed by a photolithographic technique using a photosensitive conductive paste and a second insulator layer formed of an insulating material containing a photosensitive agent, and a third insulator formed on these laminates A method for manufacturing a multilayer electronic component, comprising a step of forming a layer.
絶縁体層と導体パターンを積層し、該絶縁体層間の導体パターンを該絶縁体層のスルーホール内の導体を介して接続し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に感光剤入りの絶縁材料を用い、硬化処理を施して第1の絶縁体層を形成する工程、該第1の絶縁体層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に、感光剤入りの絶縁材料を用いて第3の絶縁体層を形成する工程を備えたことを特徴とする積層型電子部品の製造方法。
A laminated electronic device in which an insulator layer and a conductor pattern are laminated, a conductor pattern between the insulator layers is connected via a conductor in a through hole in the insulator layer, and a circuit element is formed in the laminate by the conductor pattern. In the method of manufacturing parts,
A step of forming a first insulator layer by performing a curing treatment using an insulating material containing a photosensitive agent on the support, and forming the first insulator layer on the first insulator layer by photolithography using a photosensitive conductive paste; A step of stacking the conductor pattern and the second insulator layer formed of an insulating material containing a photosensitive agent, and forming a third insulator layer on the laminate by using an insulating material containing a photosensitive agent. A method for manufacturing a laminated electronic component, comprising a step of forming.
絶縁体層と導体パターンを積層し、該絶縁体層間の導体パターンを該絶縁体層のスルーホール内の導体を介して接続し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に絶縁性セラミック材料で第1の絶縁体層を形成する工程、該第1の絶縁体層上に感光剤入りの絶縁材料を用いて緩衝層を形成する工程、該緩衝層上に、感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンと感光剤入りの絶縁材料で形成された第2の絶縁体層とが積み重ねられる工程及び、これらの積層体上に第3の絶縁体層を形成する工程を備えたことを特徴とする積層型電子部品の製造方法。
A laminated electronic device in which an insulator layer and a conductor pattern are laminated, a conductor pattern between the insulator layers is connected via a conductor in a through hole in the insulator layer, and a circuit element is formed in the laminate by the conductor pattern. In the method of manufacturing parts,
A step of forming a first insulator layer of an insulating ceramic material on a support, a step of forming a buffer layer on the first insulator layer by using an insulating material containing a photosensitive agent, Stacking a conductor pattern formed by a photolithographic technique using a photosensitive conductive paste and a second insulator layer formed of an insulating material containing a photosensitive agent, and a third insulator formed on these laminates A method for manufacturing a multilayer electronic component, comprising a step of forming a layer.
前記導体パターンが、感光性導電ペーストを塗布し、これを露光、現像した後、加熱処理を施すことにより形成される請求項1乃至請求項4のいずれかに記載の積層型電子部品の製造方法。The method for manufacturing a multilayer electronic component according to claim 1, wherein the conductive pattern is formed by applying a photosensitive conductive paste, exposing and developing the photosensitive conductive paste, and then performing a heat treatment. . 前記導体パターンが、感光性導電ペーストを塗布し、これを露光、現像した後、加熱の最高温度(℃)×100℃以上の温度領域にさらされる時間(秒)が40000℃・秒以上、60000℃・秒以下の条件で加熱処理を施すことにより形成される請求項1乃至請求項4のいずれかに記載の積層型電子部品の製造方法。After applying the photosensitive conductive paste, exposing and developing the photosensitive conductive paste, the conductive pattern is exposed to a temperature region of a maximum heating temperature (° C.) × 100 ° C. or more. The method for manufacturing a multilayer electronic component according to claim 1, wherein the method is performed by performing a heat treatment at a temperature of not more than a second. 前記緩衝層の厚みが30μm以上に形成される請求項2、4、5、6のいずれかに記載の積層型電子部品の製造方法。The method for manufacturing a multilayer electronic component according to claim 2, wherein the thickness of the buffer layer is 30 μm or more. 前記第1の絶縁体層及び第3の絶縁体層が誘電体、磁性体のいずれかによって形成される請求項1乃至請求項7に記載の積層型電子部品の製造方法。The method according to claim 1, wherein the first and third insulator layers are formed of one of a dielectric and a magnetic material. 9.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006344860A (en) * 2005-06-10 2006-12-21 Toko Inc Manufacturing method of stacked electronic part

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006344860A (en) * 2005-06-10 2006-12-21 Toko Inc Manufacturing method of stacked electronic part
JP4579774B2 (en) * 2005-06-10 2010-11-10 東光株式会社 Manufacturing method of multilayer electronic component

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