JP2004087737A - Printed wiring board for evaluation - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flexible printed wiring board for evaluation which does not require manufacturing of an exclusive printed wiring board for evaluation each time the thermal fatigue life of electronic component such as ball grid array, chip size package or the like is evaluated. <P>SOLUTION: The cost and the time can be reduced because manufacturing of the exclusive printed wiring board for evaluation corresponding to each package is no longer required for the evaluation of this printed wiring board, in which a plurality of pads 5 are located in the shape of a lattice on a rectangular area 4 with a predetermined pitch and a signal line 7 is led to the outside of the rectangular area 4 from the pad 51 located on the diagonal line 6 of the rectangular area 4 and the pad 52 adjacent to the pad 51. <P>COPYRIGHT: (C)2004,JPO

Description

【００３８】
（第３実施形態）
図１０は、本発明の一実施例の評価用プリント配線基板の平面図であり、以下、第１実施形態および第２実施形態との相違点について詳細に説明する。
【００３９】
評価用プリント配線基板３に複数の矩形エリア４１〜４６があり、それぞれの矩形エリア内にあるパッド５のピッチＰおよび列数が異なる点が第１実施形態および第２実施形態との相違点である。
【００４０】
例えば、前記矩形エリア４１内の前記パッド５のピッチを０．８ｍｍで列数を３０列×３０列、前記矩形エリア４２内の前記パッド５のピッチを０．７５ｍｍで列数を３２列×３２列、前記矩形エリア４３内の前記パッド５のピッチを０．５ｍｍで列数を５０列×５０列、前記矩形エリア４４内の前記パッド５のピッチを０．８ｍｍで列数を３１列×３１列、前記矩形エリア４５内の前記パッド５のピッチを０．７５ｍｍで列数を３３列×３３列、前記矩形エリア４６内の前記パッド５のピッチを０．５ｍｍで列数を５１列×５１列とすることにより、６種類のチップサイズパッケージの評価を１枚の評価用プリント配線基板でできるようになる。
【００４１】
（第４実施形態）
図１１は、本発明の一実施例の評価用プリント配線基板の平面図であり、以下、第３実施形態との相違点について詳細に説明する。
【００４２】
第３実施形態で説明した前記矩形エリア４１〜４６をブロック２０とし、１枚の評価用プリント配線基板３に複数のブロックを設けた点が第３実施形態との相違点である。
【００４３】
前記ブロックを１枚の評価用プリント配線基板３に複数設けることにより、複数の同一のパッケージのハンダ接続部の評価を同時に行うことができる。
【００４４】
上述の実施形態は、説明のために例示したもので、本発明としてはそれらに限定されるものでは無く、特許請求の範囲、発明の詳細な説明および図面の記載から当業者が認識することができる本発明の技術的思想に反しない限り、変更および付加が可能である。
例えば、第３実施形態で説明した矩形エリアは６個に限定しているわけではなく、ピッチおよび列数が異なっている矩形エリアの組み合わせであれば良い。いうまでもなく、第４実施形態で説明したブロックは、６個の矩形エリアで構成されていることに限定しているわけではなく、第３実施形態と同様、ピッチおよび列数が異なっている矩形エリアから構成されていれば良い。
【００４５】
【効果】
前記した本発明は、どのようなパッケージでもピッチが一致すれば、信頼性を評価できるため、新しいパッケージの評価をする場合に専用の評価用基板を新規に製作する必要がなくなり、費用と時間を削減し、開発スピードの短縮が可能となる。
【図面の簡単な説明】
【図１】評価専用のパッケージのデジチェーンパターンを説明するための図である。
【図２】評価専用のパッケージのデジチェーンパターンを説明するための図である。
【図３】従来の評価専用のプリント配線基板の平面図である。
【図４】従来のデジチェーン回路を説明するための図である。
【図５】第１実施形態の評価用プリント配線基板示す平面図である。
【図６】第１実施形態の評価用プリント配線基板を示す部分拡大図である。
【図７】第１実施形態のデジチェーン回路を説明するための図である。
【図８】第２実施形態の評価用プリント配線基板を示す平面図である。
【図９】第２実施形態の評価用プリント配線基板を示す平面図である。
【図１０】第３実施形態の評価用プリント配線基板を示す平面図である。
【図１１】第４実施形態の評価用プリント配線基板を示す平面図である。
【符号の説明】
３　評価用プリント配線基板
４　矩形エリア
５　パッド
６　対角線
７　信号線
８　スルーホール
２０　ブロック[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an evaluation printed wiring board for evaluating the thermal fatigue life of a solder connection between an electronic component and a printed wiring board by electrical conduction.
[0002]
[Prior art]
When electronic components such as a ball grid array (BGA) and a chip size package (CSP) are mounted on a printed wiring board and the thermal fatigue life of the solder connection is evaluated by electrical continuity, the electronic components to be evaluated are It is common practice to use a package for evaluation that has a so-called digital chain pattern in which the same package is used and wiring is performed so that adjacent solder balls are connected inside the package.
[0003]
Electronic components such as BGA and CSP have various package shapes, and the reliability after mounting differs greatly depending on the package shape as compared with gull-wing type electronic components such as QFP and SOP. For this reason, it is necessary to evaluate the thermal fatigue life of the solder joint after mounting for each electronic component package.
[0004]
In order to evaluate the thermal fatigue life by electrical continuity, electronic components such as BGA and CSP are provided with a dedicated package having a digital chain pattern. FIGS. 1 and 2 show an example of an evaluation-only package having a digital chain pattern.
[0005]
FIG. 1 and FIG. 2 are views of the package 1 dedicated to evaluation as viewed from the side where the solder balls 13 are attached. As shown in FIGS. 1 and 2, the package 1 generally has adjacent solder balls 13 connected by an internal connection pattern (digital chain pattern 2). Since the digital chain pattern 2 is inside the package 1, it cannot be actually seen from the side where the solder ball 13 is attached, but is shown by a solid line for easy understanding.
[0006]
Since there is no unified wiring pattern in the digital chain pattern 2, as shown in FIGS. 1 and 2, a package designed and manufactured by an electronic component maker is supplied.
[0007]
To evaluate the thermal fatigue life of the solder connection, the package 1 was soldered and mounted on a printed wiring board dedicated for evaluation, and then the printed wiring board dedicated for evaluation → solder connection → digital chain pattern 2 → solder connection → evaluation A method of continuously or periodically measuring the resistance value by continuously forming a digital chain circuit called `` dedicated printed wiring board '' and applying a voltage while exposing the printed wiring board for evaluation to high or low temperature General.
[0008]
For example, when evaluating the package 1 having the digital chain pattern 2 shown in FIG. 2, a printed wiring board 11 dedicated to evaluation shown in FIG. 3 is designed and manufactured, and the package 1 is used as the printed wiring board dedicated to evaluation. 11 and soldering. Solder mounting is performed by first printing cream solder on all pads 14 of the printed wiring board 11 dedicated to evaluation, positioning the solder balls 13 of the package 1 thereon and mounting the solder balls, and then soldering in a reflow oven or the like. It is done by attaching.
[0009]
FIG. 4 shows a digital chain circuit when the package 1 shown in FIG. 2 is soldered and mounted on the printed wiring board 11 for evaluation shown in FIG. Since the digital chain circuit is continuously connected through the solder connection portion from the through hole 15 to the through hole 16, the resistance value between the through hole 15 and the through hole 16 can be measured.
[0010]
By measuring the resistance between the through hole 15 and the through hole 16 with a resistance measuring device or the like, for example, if a problem such as a crack occurs in the solder connection portion, the resistance value of the above-mentioned digital chain circuit changes. , Thermal fatigue life can be evaluated. If the change in the resistance value is always constant throughout the evaluation period, the thermal fatigue life can be determined as having no problem.
[0011]
[Problems to be solved by the invention]
As described above, there is no unified wiring pattern in the digital chain pattern, and it differs for each package. For this reason, in order to perform the above-mentioned evaluation of the thermal fatigue life by electrical connection, it is necessary to correspond to the digital chain pattern of a dedicated package for evaluation prepared for evaluating the thermal fatigue life of the solder connection part of each electronic component. Each time a new package is evaluated, a printed wiring board for evaluation having the connection pattern described above must be designed and manufactured.
[0012]
For example, in order to evaluate the package 1 shown in FIG. 2, the printed wiring board 11 shown in FIG. 3 was manufactured. Can not be used. This is because a continuous digital chain circuit cannot be formed between the through hole 15 and the through hole 16.
[0013]
That is, every time a new electronic component is adopted, a printed wiring board for evaluation must be manufactured with a wiring pattern formed to correspond to the digital chain pattern of the package prepared for the evaluation of the electronic component. However, there is a problem that it takes a lot of cost and time and cannot keep up with the development speed of the printed wiring board in recent years.
[0014]
The present invention has been made in order to solve such a problem. The purpose of the present invention is to produce a dedicated printed wiring board each time the thermal fatigue life is evaluated by electrical connection. It is an object of the present invention to provide a versatile evaluation printed wiring board that can evaluate any kind of digital chain pattern package that is not required if the pitch is matched.
[0015]
[Means for Solving the Problems]
The printed wiring board for evaluation according to claim 1, wherein a plurality of pads are provided in a rectangular area provided on the printed wiring board in the evaluation printed wiring board for evaluating a solder connection portion between the electronic component and the printed wiring board. Arranged in a grid at a pitch, a signal line is drawn out of the rectangular area from a pad located near a diagonal line of the rectangular area and a pad adjacent to the pad. Any digital chain pattern can be mounted to evaluate the thermal fatigue life.
[0016]
In the printed wiring board for evaluation according to claim 2, the signal line is further drawn out of the rectangular area from a pad located at the outermost periphery of the plurality of pads arranged in a grid in claim 1. Accordingly, if the package has the same pitch, any digital chain pattern can be mounted and the thermal fatigue life can be evaluated.
[0017]
The printed wiring board for evaluation according to claim 3, wherein the through hole or the pad is formed at an end of the signal line drawn out of the rectangular area according to claim 1 or 2. To connect a cable, a test pin, a probe, etc., to easily measure a change in resistance value.
[0018]
According to a fourth aspect of the present invention, there is provided the printed wiring board for evaluation according to the first, second or third aspect, wherein the plurality of rectangular areas are provided, and the pitch and the number of rows of the plurality of pads arranged in a grid are set. In addition, the difference in each rectangular area makes it possible to evaluate the thermal fatigue life with one evaluation printed wiring board, regardless of the package having any pitch.
[0019]
According to a fifth aspect of the present invention, in the evaluation printed wiring board according to the first, second, or third aspect, the pitch and the number of rows of the plurality of pads arranged in a lattice are different for each of the rectangular areas. By forming a block by the rectangular area of the above and having a plurality of blocks, it is possible to evaluate the thermal fatigue life with one evaluation printed wiring board regardless of the package having any pitch. It is possible to simultaneously evaluate a plurality of the same packages.
[0020]
The printed wiring board for evaluation according to claim 6, wherein a plurality of pads are arranged in a grid pattern at a predetermined pitch in a rectangular area provided on the printed wiring board, and a pad located on a diagonal line of the rectangular area; A signal line is drawn out of the rectangular area from a pad adjacent to the pad and a pad located at the outermost periphery of the plurality of pads arranged in a grid pattern, and a through-hole is formed at an end of the signal line drawn out of the rectangular area. By forming holes or pads, any package having the same pitch can be mounted on any digital chain pattern to evaluate the thermal fatigue life.
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0021]
(1st Embodiment)
FIG. 5 is a plan view of a printed wiring board for evaluation showing one embodiment of the present invention. For example, the signal line 7 and the through hole 8 are shown in detail for the upper left quarter of the rectangular area 4. is there. The other parts in FIG. 5 are not shown in the figure, and signal lines and through holes are provided in the same manner as the upper left quarter shown. FIG. 6 is a partially enlarged view of the upper left quarter of FIG.
[0022]
As shown in FIGS. 5 and 6, a plurality of pads 5 are arranged on the printed wiring board 3 for evaluation in a grid pattern at a predetermined pitch P in the rectangular area 4 which is equal to or larger than the size of the package to be evaluated. It is arranged.
[0023]
The signal lines 7 are drawn out of the rectangular area 4 from all the pads 51 arranged near the diagonal line 6 of the rectangular area 4, for example, on the diagonal line 6 and all the pads 52 adjacent to the pad 51. ing. Here, the pad 52 adjacent to the pad 51 disposed on the diagonal line 6 refers to a pad adjacent to the pad 51 in the up-down direction and the left-right direction as shown in FIG.
[0024]
The end of the extracted signal line 7 is connected to the through hole 8. By connecting cables, test pins, and the like to the through holes 8, connection to a resistance measuring device can be facilitated. The through hole 8 may be a pad.
[0025]
Most of the solder balls located on the diagonal line of the package are connected to the solder balls in any direction of up, down, left and right inside the package as shown in FIGS. By mounting the package 9 on the printed wiring board 3 for evaluation as described above, it is possible to evaluate the solder connection portions on the two diagonal lines 6.
[0026]
FIG. 7 is a plan view in which the package 1 shown in FIG. 2 is soldered to the evaluation printed wiring board 3 shown in FIG. For simplicity of description, the digital chain pattern shown in FIG. 2 is shown as it is by a solid line. As shown in FIG. 7, a digital chain circuit of through hole 81 → solder connection portion → digital chain pattern in package → solder connection portion → through hole 82 can be formed between through hole 81 and through hole 82. .
[0027]
Also, in FIG. 7, since a digital chain circuit is similarly formed between the through hole 83 and the through hole 84, between the through hole 85 and the through hole 86, between the through hole 87 and the through hole 88, etc. By connecting the holes 82 and the through holes 83, the through holes 84 and the through holes 85, and the through holes 86 and the through holes 87 with cables, a digital chain circuit can be formed between the through holes 81 to 88. Therefore, by measuring the resistance value between the through-hole 81 and the through-hole 88, it is possible to evaluate the thermal fatigue life of the eight solder connection portions therebetween.
[0028]
In FIG. 7, the parts other than the upper left quarter are similarly connected by a cable or the like, so that the thermal fatigue life of the solder connection part on the two diagonal lines 6 can be evaluated.
[0029]
According to the tests and researches of the present inventors, the test for evaluating the thermal fatigue life of the solder connection by electrical connection is performed by evaluating the solder connection on the diagonal line of the package. It is known that a desired evaluation result can be obtained without performing the evaluation.
[0030]
The reason is that the solder joints located farthest from the center of the package are most susceptible to the thermal expansion of the package, the silicon chip in the package, the printed wiring board for evaluation, etc. due to temperature changes. This is because a failure occurs first on the long diagonal line of. Further, when the package size is different from the size of the silicon chip in the package, the solder connection portion near the corner of the silicon chip, for example, just below the corner (on the diagonal) of the silicon chip, may fail. This is probably because the thermal expansion coefficient of silicon is significantly different from that of glass epoxy, which is the material of the printed wiring board for evaluation.
[0031]
As described above, after the package is soldered and mounted, by applying a predetermined voltage to the signal line and continuously or periodically measuring the resistance value while exposing the entire printed wiring board 3 for evaluation to high and low temperatures, The thermal fatigue life at the solder connection can be electrically measured.
[0032]
(2nd Embodiment)
FIG. 8 is a plan view of a printed wiring board for evaluation according to one example of the present invention. Hereinafter, differences from the first embodiment will be described in detail.
[0033]
The difference from the first embodiment is that the signal lines 7 are further drawn from the pads 5 positioned on the outer periphery of the plurality of pads arranged in a grid in the rectangular area 4. By mounting the chip 9 as shown in FIG. 4, it is possible to evaluate all solder connection portions on two sides of the chip size package 9.
[0034]
Since the pads 5 located on the outer periphery of the plurality of pads arranged in a lattice are located far from the center of the package, the package, the silicon chip in the package, the printed wiring board for evaluation, etc. Because of the susceptibility to thermal expansion, the solder connection at this portion can be evaluated.
[0035]
In FIG. 8, as an example, a printed wiring board for evaluation of an even-row pattern of 20 rows × 20 rows (total number of pads in a rectangular area is 400) is shown. As described above, an odd-numbered row pattern of 21 rows × 21 rows (a total of 441 pads in a rectangular area) may be used.
[0036]
Also, the number of columns is not limited to this. In order to make the evaluation printed wiring board versatile, the number of columns shown in Table 1 is appropriate.
[0037]
[Table 1]

[0038]
(Third embodiment)
FIG. 10 is a plan view of an evaluation printed wiring board according to one example of the present invention. Hereinafter, differences from the first embodiment and the second embodiment will be described in detail.
[0039]
The difference from the first and second embodiments is that the evaluation printed wiring board 3 has a plurality of rectangular areas 41 to 46, and the pitch P and the number of columns of the pads 5 in each rectangular area are different. is there.
[0040]
For example, the pitch of the pads 5 in the rectangular area 41 is 0.8 mm and the number of rows is 30 rows × 30 rows, and the pitch of the pads 5 in the rectangular area 42 is 0.75 mm and the number of rows is 32 rows × 32 Rows, the pitch of the pads 5 in the rectangular area 43 is 0.5 mm and the number of rows is 50 rows × 50 rows, and the pitch of the pads 5 in the rectangular area 44 is 0.8 mm and the number of rows is 31 rows × 31 Rows, the pitch of the pads 5 in the rectangular area 45 is 0.75 mm and the number of rows is 33 rows × 33 rows. The pitch of the pads 5 in the rectangular area 46 is 0.5 mm and the number of rows is 51 rows × 51. By forming the rows, it is possible to evaluate six types of chip size packages with one evaluation printed wiring board.
[0041]
(Fourth embodiment)
FIG. 11 is a plan view of a printed wiring board for evaluation according to one example of the present invention. Hereinafter, differences from the third embodiment will be described in detail.
[0042]
The difference from the third embodiment is that the rectangular areas 41 to 46 described in the third embodiment are blocks 20 and a plurality of blocks are provided on one evaluation printed wiring board 3.
[0043]
By providing a plurality of blocks on one evaluation printed wiring board 3, it is possible to simultaneously evaluate solder connection portions of a plurality of identical packages.
[0044]
The above-described embodiment has been described by way of example, and the present invention is not limited to the embodiment. It will be recognized by those skilled in the art from the claims, the detailed description of the invention, and the drawings. Modifications and additions are possible without violating the technical idea of the present invention.
For example, the rectangular area described in the third embodiment is not limited to six, but may be any combination of rectangular areas having different pitches and different numbers of columns. Needless to say, the blocks described in the fourth embodiment are not limited to being constituted by six rectangular areas, but have different pitches and different numbers of columns as in the third embodiment. What is necessary is just to consist of a rectangular area.
[0045]
【effect】
According to the present invention described above, the reliability can be evaluated if the pitch of any package matches.Therefore, when a new package is evaluated, it is not necessary to newly manufacture a dedicated evaluation board, and cost and time are reduced. And speed up development.
[Brief description of the drawings]
FIG. 1 is a diagram for explaining a digital chain pattern of an evaluation-only package.
FIG. 2 is a diagram for explaining a digital chain pattern of an evaluation-only package.
FIG. 3 is a plan view of a conventional printed wiring board dedicated to evaluation.
FIG. 4 is a diagram for explaining a conventional digital chain circuit.
FIG. 5 is a plan view showing a printed wiring board for evaluation of the first embodiment.
FIG. 6 is a partially enlarged view showing the printed wiring board for evaluation of the first embodiment.
FIG. 7 is a diagram for explaining the digital chain circuit of the first embodiment.
FIG. 8 is a plan view showing a printed wiring board for evaluation of a second embodiment.
FIG. 9 is a plan view showing a printed wiring board for evaluation of a second embodiment.
FIG. 10 is a plan view showing a printed wiring board for evaluation of a third embodiment.
FIG. 11 is a plan view showing a printed wiring board for evaluation of a fourth embodiment.
[Explanation of symbols]
3 evaluation printed wiring board 4 rectangular area 5 pad 6 diagonal line 7 signal line 8 through hole 20 block

Claims (6)

In an evaluation printed wiring board for evaluating a solder connection portion between an electronic component and a printed wiring board,
In a rectangular area provided on the printed wiring board, a plurality of pads are arranged in a grid at a predetermined pitch,
A printed wiring board for evaluation, wherein a signal line is drawn out of the rectangular area from a pad located near a diagonal line of the rectangular area and a pad adjacent to the pad. The printed wiring board for evaluation according to claim 1,
Furthermore, a printed wiring board for evaluation, wherein a signal line is drawn out of the rectangular area from a pad located at the outermost periphery of the plurality of pads arranged in a grid. The evaluation printed wiring board according to claim 1 or 2,
A printed wiring board for evaluation, wherein a through hole or a pad is formed at an end of a signal line drawn out of the rectangular area. The printed wiring board for evaluation according to claim 1, claim 2, or claim 3,
Having a plurality of said rectangular areas,
A printed wiring board for evaluation, wherein a pitch and a number of rows of a plurality of pads arranged in a lattice shape are different for each of the rectangular areas. The printed wiring board for evaluation according to claim 1, claim 2, or claim 3,
A block is formed by a plurality of rectangular areas, in which the pitch and the number of columns of the plurality of pads arranged in a lattice are different for each of the rectangular areas,
An evaluation printed wiring board comprising a plurality of said blocks. In an evaluation printed wiring board for evaluating a solder connection portion between an electronic component and a printed wiring board,
A plurality of pads are arranged in a grid at a predetermined pitch in a rectangular area provided on a printed wiring board,
A signal line is drawn out of the rectangular area from a pad located on a diagonal line of the rectangular area, a pad adjacent to the pad, and a pad located at the outermost periphery of the plurality of pads arranged in a grid,
A printed wiring board for evaluation, wherein a through hole or a pad is formed at an end of a signal line drawn out of the rectangular area.

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