KR200144292Y1 - PBGA Package - Google Patents
PBGA Package Download PDFInfo
- Publication number
- KR200144292Y1 KR200144292Y1 KR2019960026026U KR19960026026U KR200144292Y1 KR 200144292 Y1 KR200144292 Y1 KR 200144292Y1 KR 2019960026026 U KR2019960026026 U KR 2019960026026U KR 19960026026 U KR19960026026 U KR 19960026026U KR 200144292 Y1 KR200144292 Y1 KR 200144292Y1
- Authority
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- South Korea
- Prior art keywords
- substrate
- pbga
- package
- grid array
- ball grid
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Abstract
기판(1)과, 기판상면의 집적회로칩(2)을 포위하고 있는 모울드(2)와, 기판하면의 격자구조의 솔더볼(5)과, 상기 기판(1)의 외면에 부착되어 상기 각 솔더볼(5)과 미소패턴(8)에 의해 연결된 미소전극(7)으로 이루어져서 검사를 용이하게 한 PBGA(PLASTIC BALL GRID ARRAY) 패키지Each solder ball attached to the substrate 1, the mold 2 surrounding the integrated circuit chip 2 on the upper surface of the substrate, the solder balls 5 having a lattice structure on the lower surface of the substrate, and the outer surface of the substrate 1 PBGA (PLASTIC BALL GRID ARRAY) package made of microelectrode (7) connected by (5) and micro pattern (8) to facilitate inspection
Description
제1도는 종래의 PBGA(PLASTIC BALL GRID ARRAY) 패키지를 나타낸 도면으로, (a)도는 측단면도, (b)도는 사시도, (c)도는 배면도.1 is a view showing a conventional PBGA (PLASTIC BALL GRID ARRAY) package, (a) is a side cross-sectional view, (b) is a perspective view, (c) is a rear view.
제2도는 종래의 PBGA(PLASTIC BALL GRID ARRAY) 패키지의 솔더링불량의 형태를 나타낸 도면.2 is a view showing a form of soldering failure of a conventional PBGA (PLASTIC BALL GRID ARRAY) package.
제3도는 본 고안에 따른 PBGA(PLASTIC BALL GRID ARRAY) 패키지를 나타낸 도면으로, (a)는 사시도, (b)는 배면도.3 is a view showing a PBGA (PLASTIC BALL GRID ARRAY) package according to the present invention, (a) is a perspective view, (b) is a rear view.
제4도는 본 고안에 따른 또 다른 PBGA(PLASTIC BALL GRID ARRAY) 패키지를 나타낸 측단면도.Figure 4 is a side cross-sectional view showing another PLASTIC BALL GRID ARRAY (PBGA) package according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 기판 2 : 모울드1 substrate 2 mold
5 : 솔더볼 7 : 미소전극5 solder ball 7 electrode
8 : 미소패턴 9 : IVH(Intersitial Via Hole)8: micro pattern 9: IVH (Intersitial Via Hole)
본 고안은 PBGA(PLASTIC BALL GRID ARRAY) 패키지에 관한 것으로, 특히, 패킹된 상태에서 불량이 검사가능하고, 또한 인쇄회로기판상에 탑재된 상태에서 검사가 능하도록 한 PBGA(PLASTIC BALL GRID ARRAY) 패키지에 관한 것이다.The present invention relates to a PLASTIC BALL GRID ARRAY (PBGA) package, and in particular, a PLASTIC BALL GRID ARRAY (PBGA) package that enables inspection of defects in a packed state and inspection on a printed circuit board. It is about.
BGA(BALL GRID ARRAY)는 기판에 솔더볼을 장착하여 기존의 PGA(PIN GRID ARRAY)를 대체하도록 고안된 칩부품 패키지로서, 표면실장시 수율이 높고 솔더볼을 이용하므로 인쇄회로기판 실장시 리드 손상이 없으며 솔더볼이 칩의 열을 회로기판에 쉽게 전달하는 파이프역할을 하므로 우수한 열방출 효과를 나타낸다. 하지만 검사가 어렵다는 단점이 있다.BGA (BALL GRID ARRAY) is a chip component package designed to replace the existing PGA (PIN GRID ARRAY) by mounting solder balls on the board.It has high yield when surface mounted and uses solder balls, so there is no damage to the lead when mounting PCB It acts as a pipe that easily transfers the heat from the chip to the circuit board, resulting in excellent heat dissipation effect. However, the disadvantage is that the test is difficult.
BGA(BALL GRID ARRAY)는 기판의 종류에 따라 세라믹 BGA와 플래스틱 BGA로 구분된다.BGA (BALL GRID ARRAY) is divided into ceramic BGA and plastic BGA according to substrate type.
이중 비용면에서 가장 유리하며 일반적으로 사용되고 있는 PBGA는 제1도에 도시된 바와 같이, 기판(1)과, 기판상면의 집적회로칩(2)과, 칩을 포위하고 있는 모울드(3)와, 기판하면의 솔더볼(5)로 이루어진다. (4)는 솔더마스크이다.The most advantageous and generally used PBGA in terms of cost is the substrate 1, the integrated circuit chip 2 on the substrate, the mold 3 surrounding the chip, It consists of the solder ball 5 of the board surface. (4) is a solder mask.
이러한 PBGA 패키지를 회로기판에 장착한 후 나타날 수 있는 솔더링불량은 제2도에 도시한 바와 같다.The soldering defects that may occur after the PBGA package is mounted on the circuit board are shown in FIG. 2.
이러한 솔더링불량에 대한 검사를 수행하기 위해서는 기존의 육안검사만으로는 불가능하고 고가의 적외선, 초음파, X선 검사등이 요구된다는 문제점이 있었다. 또한 PBGA가 탑재된 회로기판의 검사시간이 길어져서, 전체적인 검사의 효율성이 저하된다는 문제점이 있었다.In order to perform the inspection for such a soldering defect, there was a problem that it is impossible only with the existing visual inspection and expensive infrared, ultrasonic, X-ray inspection is required. In addition, the inspection time of the PBGA-mounted circuit board is long, there is a problem that the overall inspection efficiency is reduced.
본 고안은 이러한 종래기술의 문제점을 해결하기 위한 것으로, 집적회로칩의 내부회로 또는 인접한 핀간을 연결시킨 미소전극을 설치함으로서, 패키지의 검사가 가능하고, 회로기판상에 탑재된 PBGA에 대하여 검사가 가능하고, 솔더링결합검사가 가능하여, 검사의 효율성을 향상시킬 수 있는 PBGA(PLASTIC BALL GRID ARRAY) 패키지의 제공을 목적으로 한다.The present invention is to solve the problems of the prior art, by installing a micro electrode connecting the internal circuit of the integrated circuit chip or adjacent pins, it is possible to inspect the package, the inspection of the PBGA mounted on the circuit board In order to provide a PBGA (PLASTIC BALL GRID ARRAY) package, which is possible and can be soldered joint inspection, which improves inspection efficiency.
상기 목적을 달성하기 위하여, 본 고안의 PBGA(PLASTIC BALL GRID ARRAY)패키지는, 기판과, 기판상면의 집적회로칩과, 칩을 포위하고 있는 모울드와, 기판하면의 솔더볼로 이루어진 PBGA패키지에 있어서, 상기 기판의 외면에 상기 솔더볼과 미소패턴으로 연결된 미소전극을 설치한 것을 특징으로 한다.In order to achieve the above object, the PBGA (PLASTIC BALL GRID ARRAY) package of the present invention is a PBGA package consisting of a substrate, an integrated circuit chip on the upper surface of the substrate, a mold surrounding the chip, and a solder ball on the lower surface of the substrate, On the outer surface of the substrate is characterized in that the microelectrode connected to the solder ball and the micro pattern is installed.
이하, 첨부도면에 의거하여 본 고안의 외곽요철형 PBGA(PLASTIC BALL GRID ARRAY)패키지를 상세히 설명한다.Hereinafter, based on the accompanying drawings will be described in detail the outer concave-convex PBGA (PLASTIC BALL GRID ARRAY) package of the present invention.
본 고안의 PBGA(PLASTIC BALL GRID ARRAY) 패키지는, 제3도에 도시된 바와 같이, 기판(1)과, 기판상면의 집적회로칩(2)을 포위하고 있는 모울드(2)와, 기판하면의 격자구조의 솔더볼(5)과, 상기 기판(1)의 외면에 부착되어 상기 각 솔더볼(5)과 미소패턴(8)에 의해 연결된 미소전극(7)으로 이루어진다. 이때 외부미소전극(7)을 만들기 위한 핀 설정은, BGA를 회로기판상에 탑재한 후 인접한 핀과의 쇽트, 오픈검사를 할 수 있도록 핀들을 설정하여 외부전극과 연결시키고, 한편, 집적회로(2)를 검사할 수 있는 핀을 포함시키어 PBGA 패키지를 자체적으로 검사할 수 있도록 한다.In the PBGA (PLASTIC BALL GRID ARRAY) package of the present invention, as shown in FIG. 3, the mold 2 surrounding the substrate 1, the integrated circuit chip 2 on the upper surface of the substrate, and the lower surface of the substrate It consists of a solder ball 5 of a lattice structure and a microelectrode 7 attached to an outer surface of the substrate 1 and connected by the solder balls 5 and the micropattern 8. At this time, the pin setting for making the external smile electrode (7), after mounting the BGA on the circuit board, and set the pins for the test, the open pin and the adjacent pin, and connected to the external electrode, Include a pin to test 2), allowing the PBGA package to inspect itself.
한편, 제4도에 도시된 PBGA(PLASTIC BALL GRID ARRAY) 패키지는 각 솔더볼(4)간의 피치가 더욱 작은 협피치이며, 다층기판(1)에 IVH(Interstitial Via Hole)(9)를 이용하여 집적회로칩(2)의 와이어본드와 미소전극(7)을 연결한 것이다.On the other hand, the PBGA (PLASTIC BALL GRID ARRAY) package shown in FIG. 4 has a smaller pitch between the solder balls 4, and is integrated in the multi-layer substrate 1 by using an interstitial via hole (IVH) 9. The wire bond of the circuit chip 2 and the microelectrode 7 are connected.
이상, 설명한 바와 같이, 본 고안에 따르면, 집적회로칩 또는 인접한 핀간을 미소패턴으로 연결한 미소전극을 설치하여 종래의 협피치 패드테스터와 같은 간단한 장비로도 회로기판상에 탑재된 PBGA에 대하여 검사가 가능하게 되고, 솔더링결합의 검사도 가능하게 되어 검사시간이 단축되어 검사의 효율성을 향상시킬 수 있다.As described above, according to the present invention, the PBGA mounted on the circuit board can be inspected even with a simple device such as a narrow pitch pad tester by installing a microelectrode in which an integrated circuit chip or adjacent pins are connected in a small pattern. In addition, the inspection of the soldering joint is also possible, which reduces the inspection time, thereby improving the inspection efficiency.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960026026U KR200144292Y1 (en) | 1996-08-27 | 1996-08-27 | PBGA Package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960026026U KR200144292Y1 (en) | 1996-08-27 | 1996-08-27 | PBGA Package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19980012463U KR19980012463U (en) | 1998-05-25 |
| KR200144292Y1 true KR200144292Y1 (en) | 1999-06-15 |
Family
ID=53973657
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019960026026U KR200144292Y1 (en) | 1996-08-27 | 1996-08-27 | PBGA Package |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR200144292Y1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100302521B1 (en) * | 1998-04-08 | 2001-11-22 | 윤종용 | Microwave oven |
| KR100467020B1 (en) * | 2002-07-26 | 2005-01-24 | 삼성전자주식회사 | Semiconductor Device With Self-Aligned Junction Contact Hole And Method Of Fabricating The Same |
-
1996
- 1996-08-27 KR KR2019960026026U patent/KR200144292Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR19980012463U (en) | 1998-05-25 |
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