JP2004063652A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique for reducing defective contact between a bump of an LCD driver and a probe needle of a measuring instrument. <P>SOLUTION: On an insulating film 3 covering a semiconductor device on the main surface of a semiconductor substrate, a pad 4 consists of a metallic film of the same layer as the top layer wiring. On the upper layer of the pad 4, a passivation film 5 is deposited. On the passivation film 5, an opening part 6 having at least a chevron edge projecting in a slide-stopping direction of the probe needle 7 of the measuring instrument in a view from an upper surface, and a dimple 9b reflecting the level difference of the opening part, are formed on the upper surface of the bump 9. There are a plurality of contacts of the probe needle 7 and the bump 9. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technology for manufacturing a semiconductor device, and more particularly to a technology effective when applied to a method for forming a projection-like connection electrode of an LCD (Liquid Crystal Display) driver, a so-called bump.
[0002]
[Prior art]
The mounting process of a TFT (Thin Film Transistor) -LCD is performed, for example, as follows. First, an alignment film is applied to a TFT substrate and a color filter substrate provided with ITO (Indium Tin Oxide) electrodes. Subsequently, after rubbing, the two substrates are bonded to each other. Thereafter, the liquid crystal panel is divided into panels, and after injecting liquid crystal, a TCP (Tape Carrier Package) or a flexible substrate on which an LCD driver is mounted is mounted, and the mounting process is completed.
[0003]
In addition, FIG. 1 of a press journal "Semiconductor FPD World", February 2002, issued on January 20, 2002, p. 75, shows the structure of a general TFT-LCD panel viewed from the cell process. I have.
[0004]
[Problems to be solved by the invention]
The inventor has studied a bump forming method for an LCD driver. The following is the technology studied by the present inventors, and the outline is as follows.
[0005]
First, a pad having a thickness of about 0.8 μm made of a metal film such as an aluminum alloy film is formed on a main surface of a semiconductor wafer (a thin plate of a semiconductor having a substantially circular shape in a plane). This pad is constituted by the uppermost layer wiring of the LCD driver, and is an electrode provided for connecting the LCD driver to an external lead line, a so-called lead.
[0006]
Next, after a passivation film having a thickness of about 1.2 μm is deposited on the pad, the passivation film is processed using the patterned resist film as a mask to provide a rectangular opening for exposing the pad.
[0007]
Next, a titanium palladium (TiPd) film is deposited on the passivation film by a sputtering method, and then a resist film is applied. Next, the resist film is patterned to expose the titanium palladium film in the region including the opening and over the passivation film, and then a gold (Au) film is deposited on the exposed titanium palladium film by a plating method. Thereafter, by sequentially removing the resist film and the titanium palladium film under the resist film, a concave bump made of the gold film is formed.
[0008]
By the way, in recent years, due to miniaturization and increase in the number of pins of a semiconductor device constituting an LCD driver, the space between pads is becoming narrower and the size of the pad is becoming smaller.
[0009]
However, the present inventor has studied that, as the pitch of pads becomes narrower and smaller, for example, in a probe inspection process for determining whether each chip formed on a semiconductor wafer is good or bad, etc. It has been clarified that a contact resistance between the probe needle (touch probe) of the measuring instrument and the bump is increased, or a probe needle contact defect such as a deviation of the probe needle from the bump occurs.
[0010]
That is, the shape of the upper surface of the bump contacting the probe needle is a mortar shape having many flat portions affected by the shape of the opening provided in the passivation film, and the probe needle and the bump are at one point on the upper surface of the bump. Because of the contact, it is difficult to obtain a contact area necessary for negligible contact resistance. Further, in order to reduce the poor contact between the probe needle and the bump, a large load is currently applied to the probe needle as much as possible, but a larger load causes the probe needle to be displaced from the bump.
[0011]
The poor contact of the probe needle causes erroneous determination of the basic functions and characteristics of the LCD driver, and also leads to a decrease in the work efficiency in the inspection process of the LCD driver.
[0012]
An object of the present invention is to provide a technique capable of reducing poor contact between a bump of an LCD driver and a probe of a measuring instrument.
[0013]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0014]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
[0015]
The present invention is a step of forming a pad made of a metal film of the same layer as the uppermost layer wiring on a substrate, and after forming a passivation film on the substrate, a step of forming an opening in which the pad is exposed in the passivation film, After applying a resist film on the substrate, a step of removing the resist film in a region including the opening and extending over the passivation film, and a step of forming a bump reflecting the shape of the opening in the region where the resist film has been removed By forming the shape of the opening as viewed from the upper surface other than a rectangle, a bump having a plurality of depressions on the upper surface where the contact between the bump and the probe needle of the measuring instrument is plural is formed. .
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.
[0017]
(Embodiment 1)
FIG. 1 is a schematic external view of an LCD driver according to the first embodiment.
[0018]
Inside the semiconductor chip 1, for example, an amplifier circuit (OPAMP), a decoder circuit, a level shifter circuit, a bias circuit, a random logic circuit, etc., which constitute an LCD driver, are arranged. A predetermined number of pads (shown by hatching in the figure) 2 are formed in the peripheral portion. These pads 2 are formed of, for example, the same layer of metal film as the uppermost layer wiring of the LCD driver.
[0019]
FIG. 2 shows an example of a pad portion provided in the LCD driver according to the first embodiment. 2 (a) is a top view of the pad portion, FIG. 2 (b) is a top view of the pad portion when the probe needle of the measuring instrument is brought into contact with the pad portion, and FIG. 2 (c) is A in FIG. 2 (a). FIG. 2D is a cross-sectional view of a main part taken along line BB ′ in FIG. 2A.
[0020]
On the insulating film 3 covering the semiconductor device on the main surface of the semiconductor substrate, a pad 4 made of a metal film of the same layer as the uppermost wiring is formed. The metal film is, for example, an aluminum alloy film, and its thickness can be, for example, about 0.6 to 0.8 μm.
[0021]
A passivation film 5 is deposited on the pad 4. Passivation film 5 is formed of, for example, a silicon nitride film formed by a plasma CVD (Chemical Vapor Deposition) method, and has a thickness of, for example, about 1.4 μm.
[0022]
An opening 6 for exposing the pad 4 is formed in the passivation film 5, and the opening 6 has a shape that is convex in a mountain shape at least in a direction in which the probe needle 7 of the measuring instrument stops sliding when viewed from above. Side.
[0023]
In the upper layer of the passivation film 5, a bump 9 connected to the pad 4 via an UBM (Under Bump Metal) layer 8 is formed. The probe needle 7 comes into contact with the bump 9. UBM layer 8 is formed of, for example, a titanium palladium film, and has a thickness of, for example, about 0.35 to 0.5 μm. Bump 9 is formed of, for example, a gold film formed by a plating method. Is, for example, about 15 μm.
[0024]
The bump 9 is formed relatively long in the direction in which the probe needle 7 slides (the direction indicated by the arrow in FIG. 2B), and is substantially perpendicular to the direction in which the probe needle 7 slides when viewed from above. The dimension L1 of the side of the bump 9 is, for example, about 30 μm, and the dimension L2 of the side of the bump 9, which is substantially parallel to the direction in which the probe needle slides when viewed from above, is, for example, about 50 to 60 μm.
[0025]
The bump 9 is formed in a region including the opening 6 and over the passivation film 5, so that the bump 9 has a shape reflecting the step of the opening 6. That is, since the thicknesses of the bumps 9 formed on the passivation film 5 and the pads 4 are almost the same, a protruding guide 9 a is formed around the bump 9 located on the passivation film 5. At the center of the bump 9 located on the pad 4, there is formed a recess 9 b having an elevation difference (for example, about 1.5 to 2 μm) which is approximately the same as the thickness of the passivation film 5 as compared with the guide 9 a. You. Further, the shape of the recessed portion 9b is convex in the shape of a mountain at least in a direction in which the probe needle 7 stops sliding when viewed from above, and a plurality of contact points between the probe needle 7 and the bump 9 (FIG. (Encircled area).
[0026]
FIG. 3 shows another example of the pad portion provided in the LCD driver according to the first embodiment. FIG. 3A is a top view of a pad portion, and FIG. 3B is a top view of the pad portion when a probe needle of a measuring instrument is brought into contact with the pad portion.
[0027]
The opening 6 formed in the passivation film has a valley-shaped concave side at least in a direction in which the probe needle 7 of the measuring instrument stops slipping when viewed from above, and the bump 9 has the opening 6. Has a shape that reflects the step. That is, the shape of the concave portion of the bump 9 is concave in a valley shape at least in the direction in which the probe needle 7 stops sliding when viewed from above, and a plurality of contact points between the probe needle 7 and the bump 9 (FIG. 3B ), Circled area).
[0028]
As described above, according to the first embodiment, at least the shape of the concave portion 9b of the bump 9 in the direction in which the probe needle 7 of the measuring instrument stops slipping when viewed from the top surface is formed to be convex in a mountain shape or concave in a valley shape. Thereby, the contact between the probe needle 7 and the bump 9 can be improved by using a plurality of contact points between the probe needle 7 and the bump 9.
[0029]
Next, a method of manufacturing the LCD driver according to the first embodiment will be described with reference to cross-sectional views of main parts of the semiconductor substrate shown in FIGS. Note that a CMOS (Complementary Metal Oxide Semiconductor) device is described as an example of a semiconductor device constituting the LCD driver.
[0030]
First, as shown in FIG. 4, a semiconductor substrate (semiconductor wafer processed into a circular thin plate) 11 made of, for example, p-type silicon single crystal is prepared. Next, after an element isolation groove is formed in the semiconductor substrate 11 in the element isolation region, the silicon oxide film deposited on the semiconductor substrate 11 by the CVD method is polished by etch-back or CMP (Chemical Mechanical Polishing), and the element isolation is performed. The element isolation portion 12 is formed by leaving the silicon oxide film inside the groove.
[0031]
Next, impurities are ion-implanted into the semiconductor substrate 11 using the resist pattern as a mask to form a p-well 13 and an n-well 14. An impurity having p-type conductivity such as boron is ion-implanted into the p-well 13, and an impurity having n-type conductivity such as phosphorus is ion-implanted into the n-well 14. Thereafter, impurities for controlling the threshold value of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) may be ion-implanted into each well region.
[0032]
Next, after a silicon oxide film serving as a gate insulating film, a silicon polycrystalline film serving as a gate electrode, and a silicon oxide film serving as a cap insulating film are sequentially deposited to form a stacked film, the stacked film is formed using a resist pattern as a mask. By etching, the gate insulating film 15, the gate electrode 16, and the cap insulating film 17 are formed. Then, after depositing a silicon oxide film on the semiconductor substrate 11 by the CVD method, the silicon oxide film is anisotropically etched to form a sidewall spacer 18 on the side wall of the gate electrode 16. Thereafter, an impurity showing n-type conductivity, for example, arsenic is ion-implanted into p-well 13 using the resist pattern as a mask, and n-type semiconductor regions 19 are formed on both sides of gate electrode 16 on p-well 13. The n-type semiconductor region 19 is formed in a self-aligned manner with respect to the gate electrode 16 and the sidewall spacer 18, and functions as a source / drain of the n-channel MISFET Qn.
[0033]
Similarly, using the resist pattern as a mask, an impurity exhibiting p-type conductivity, for example, boron fluoride is ion-implanted into n-well 14 to form p-type semiconductor regions 20 on both sides of gate electrode 16 on n-well 14. The p-type semiconductor region 20 is formed in a self-aligned manner with respect to the gate electrode 16 and the sidewall spacer 18, and functions as a source / drain of the p-channel MISFET Qp.
[0034]
Next, as shown in FIG. 5, after a silicon oxide film 21 is formed on the semiconductor substrate 11, the surface is flattened by polishing the silicon oxide film 21 by, for example, a CMP method. Subsequently, a connection hole 22 is formed in the silicon oxide film 21 by etching using the resist pattern as a mask. The connection hole 22 is formed in a necessary portion such as on the n-type semiconductor region 19 or the p-type semiconductor region 20.
[0035]
Subsequently, a titanium nitride film is formed on the entire surface of the semiconductor substrate 11 including the inside of the connection hole 22 by, for example, the CVD method, and a tungsten film for filling the connection hole 22 is formed by, for example, the CVD method. The titanium nitride film and tungsten in the region are removed by the CMP method to form a plug 23 having the tungsten film as the main conductor layer inside the connection hole 22.
[0036]
Next, after forming, for example, a tungsten film on the semiconductor substrate 11, the tungsten film is processed by etching using the resist pattern as a mask, and the wiring 24 of the first wiring layer is formed. The tungsten film can be formed by, for example, a CVD method or a sputtering method.
[0037]
Next, after an insulating film covering the wiring 24, for example, a silicon oxide film is formed, the insulating film is polished by, for example, a CMP method to form an interlayer insulating film 25 having a flattened surface. Next, a connection hole 26 is formed in a predetermined region of the interlayer insulating film 25 by etching using the resist pattern as a mask.
[0038]
Subsequently, a barrier metal layer is formed on the entire surface of the semiconductor substrate 11 including the inside of the connection hole 26, and a copper film filling the connection hole 26 is formed. The barrier metal layer is, for example, a titanium nitride film, a tantalum film, a tantalum nitride film, or the like, and is formed by, for example, a CVD method or a sputtering method. The copper film functions as a main conductor layer and can be formed by, for example, a plating method. Before forming a copper film by plating, a thin copper film can be formed as a seed layer by, for example, a CVD method or a sputtering method. Thereafter, the copper film and the barrier metal layer in a region other than the connection hole 26 are removed by the CMP method, and a plug 27 is formed inside the connection hole 26.
[0039]
Next, a stopper insulating film 28 is formed on the semiconductor substrate 11, and an insulating film 29 for forming a wiring is further formed. The stopper insulating film 28 is, for example, a silicon nitride film, and the insulating film 29 is, for example, a silicon oxide film. Next, wiring grooves 30 are formed in predetermined regions of the stopper insulating film 28 and the insulating film 29 by etching using the resist pattern as a mask.
[0040]
Subsequently, a barrier metal layer is formed on the entire surface of the semiconductor substrate 11 including the inside of the wiring groove 30, and a copper film filling the wiring groove 30 is formed. After that, the copper film and the barrier metal layer in the region other than the wiring groove 30 are removed by the CMP method, and the wiring 31 of the second wiring layer having the copper film as a main conductor layer is formed inside the wiring groove 30. Although an upper layer wiring is formed, its illustration and description are omitted.
[0041]
Next, an uppermost layer wiring made of a metal film such as an aluminum alloy film is formed, and the pad 32 is formed by a metal film of the same layer as the uppermost layer wiring. The aluminum alloy film is formed by, for example, a sputtering method, and has a thickness of, for example, about 0.6 to 0.8 μm. Next, in order to stabilize the characteristics of the semiconductor device, after performing a hydrogen annealing process on the semiconductor substrate 11, a passivation film 33 covering the uppermost layer wiring is formed. The passivation film 33 can be, for example, a silicon nitride film formed by a plasma CVD method, and has a function of preventing intrusion of moisture or impurities from the outside or suppressing transmission of α rays. The thickness of the passivation film 33 is, for example, about 1.4 μm.
[0042]
Subsequently, by etching the passivation film 33 using the resist pattern as a mask, an opening 34 is formed on the pad 32 and the pad 32 is exposed. Here, the shape of the opening 34 is convex in a mountain shape (or concave in a valley shape) at least in the direction in which the probe needle of the measuring instrument stops slipping when viewed from above. Thereafter, a titanium palladium film 35 is deposited on the entire surface of the semiconductor substrate 11 including the inside of the opening 34 by, for example, a sputtering method. The thickness of titanium palladium film 35 is, for example, about 0.35 to 0.4 μm.
[0043]
Next, as shown in FIG. 6, a resist film 36 is applied on the semiconductor substrate 11. Next, the resist film 36 is patterned by a lithography technique to expose the titanium palladium film 35 in a region including the opening 34 and extending over the passivation film 33, that is, in a region where a bump is formed. A gold film 37a is deposited thereon by plating.
[0044]
Thereafter, as shown in FIG. 7, by sequentially removing the resist film 36 and the titanium palladium film 35 under the resist film 36, the bumps having a convex shape (or a concave shape having a valley) formed of the gold film 37a are formed. 37 are formed. The bump 37 serves as an external connection electrode with which the probe needle contacts.
[0045]
Thereafter, the LCD driver is mounted on a package substrate such as a TCP, but the description thereof is omitted.
[0046]
(Embodiment 2)
FIG. 8 shows an example of a pad portion provided in the LCD driver according to the second embodiment. FIG. 8A is a top view of a pad portion, and FIG. 8B is a top view of the pad portion when a probe needle of a measuring instrument is brought into contact with the pad portion.
[0047]
Each side of the opening 40 formed in the passivation film has a convex shape that bulges inward when viewed from above, and the bump 41 has a shape reflecting the step of the opening 40. That is, the shape of the concave portion 42 of the bump 41 is a convex shape that bulges inward when viewed from above, and a plurality of contacts between the probe needle 42 and the bump 41 (circled in FIG. 8B). Area).
[0048]
As described above, according to the second embodiment, by making the shape of the recessed portion of the bump 41 a convex shape that bulges inward when viewed from above, the contact between the probe needle 42 and the bump 41 becomes plural. The contact between the probe needle 42 and the bump 41 can be improved.
[0049]
(Embodiment 3)
FIG. 9 shows an example of a pad portion provided in the LCD driver according to the third embodiment. FIG. 9A is a top view of the pad portion, and FIG. 9B is a top view of the pad portion when the probe needle of the measuring instrument contacts the pad portion.
[0050]
Each side of the opening 43 formed in the passivation film has a mountain-like uneven shape when viewed from above. Since two sides substantially parallel to the direction in which the probe needle 44 slides when viewed from above are relatively long, a plurality of mountain-shaped irregularities can be formed on these two sides. Since the bump 45 has a shape reflecting the step of the opening 43, each side of the concave portion of the bump 45 has a mountain-shaped unevenness when viewed from above, and the contact between the probe needle 44 and the bump 45 is formed. There are a plurality of regions (circled regions in FIG. 9B).
[0051]
FIG. 10 shows an example of a pad portion provided in the LCD driver according to the third embodiment. FIG. 10A is a top view of a pad portion, and FIG. 10B is a top view of the pad portion when a probe needle of a measuring instrument is brought into contact with the pad portion.
[0052]
Of the four sides of the opening 46 formed in the passivation film, two sides that are substantially parallel to the direction in which the probe needle 47 slides when viewed from above have a plurality of mountain-shaped uneven shapes. Further, if two sides having a plurality of mountain-shaped irregularities have one side formed as a mountain-shaped convex, the mountain shaped on the other side opposite to the mountain-shaped convex becomes concave, and the distance between the two sides is reduced. It is formed to be almost always constant. Since the bump 48 has a shape reflecting the step of the opening 46, the shape of the recessed portion of the bump 48 is such that two sides which are substantially parallel to the direction in which the probe needle 47 slides when viewed from the top surface have a plurality of mountain shapes. Unevenness. Accordingly, a plurality of contact points between the probe needle 47 and the bumps 48 (regions circled in FIG. 10B) can be provided.
[0053]
As described above, according to the third embodiment, the contact between the probe needles 44 and 47 and the bumps 45 and 48 is made plural by making two or more sides of the depressions of the bumps 45 and 48 convex and concave. In addition, the contact between the probe needles 44 and 47 and the bumps 45 and 48 can be improved.
[0054]
As described above, the invention made by the inventor has been specifically described based on the embodiment of the invention. However, the invention is not limited to the embodiment, and can be variously modified without departing from the gist of the invention. Needless to say, there is.
[0055]
For example, in the above-described embodiment, a case where the present invention is applied to a bump portion of an LCD driver has been described. However, the present invention can be applied to, for example, a bump portion of a multi-pin microcomputer, and similar effects can be obtained.
[0056]
【The invention's effect】
The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.
[0057]
The bump recess is formed into a shape other than a simple rectangle, for example, a convex or concave valley in which at least the direction in which the probe needle of the measuring instrument stops sliding when viewed from the top is concave or convex in a valley. By making the shape, or by making two or more sides of the recessed portion a mountain-shaped unevenness, the contact between the probe needle and the bump can be improved by using a plurality of contacts between the probe needle and the bump. As a result, poor contact between the bumps of the LCD driver and the probe needles of the measuring instrument can be reduced.
[Brief description of the drawings]
FIG. 1 is a plan view showing a schematic external view of an LCD driver according to a first embodiment of the present invention.
FIGS. 2A and 2B are diagrams showing an example of a pad portion provided in the LCD driver according to the first embodiment of the present invention, wherein FIG. 2A is a top view of the pad portion, and FIG. FIG. 3C is a top view of the pad portion in the case of contact, FIG. 3C is a cross-sectional view of a main part along line AA ′ in FIG. 3A, and FIG. 3D is a cross-sectional view of a main part along line BB ′ in FIG. .
3A and 3B are diagrams showing another example of a pad portion provided in the LCD driver according to the first embodiment of the present invention, wherein FIG. 3A is a top view of the pad portion, and FIG. It is a top view of the pad part at the time of contacting a needle.
FIG. 4 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating an example of a method of manufacturing the LCD driver according to Embodiment 1 of the present invention in the order of steps;
FIG. 5 is a cross-sectional view of a principal part of the semiconductor substrate, illustrating an example of a method of manufacturing the LCD driver according to the first embodiment of the present invention in the order of steps;
FIG. 6 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating an example of a method of manufacturing the LCD driver according to Embodiment 1 of the present invention in the order of steps;
FIG. 7 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating an example of a method of manufacturing the LCD driver according to Embodiment 1 of the present invention in the order of steps;
8A and 8B are diagrams illustrating an example of a pad portion provided in the LCD driver according to the second embodiment of the present invention, wherein FIG. 8A is a top view of the pad portion, and FIG. It is a top view of the pad part at the time of contact.
FIGS. 9A and 9B are diagrams illustrating an example of a pad portion provided in the LCD driver according to the third embodiment of the present invention, wherein FIG. 9A is a top view of the pad portion, and FIG. It is a top view of the pad part at the time of contact.
FIGS. 10A and 10B are diagrams showing another example of the pad portion provided in the LCD driver according to the third embodiment of the present invention, wherein FIG. 10A is a top view of the pad portion, and FIG. It is a top view of the pad part at the time of contacting a needle.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Pad 3 Insulating film 4 Pad 5 Passivation film 6 Opening 7 Probe needle 8 UBM film 9 Bump 9a Guide 9b Depressed part 11 Semiconductor substrate 12 Element isolation part 13 P well 14 N well 15 Gate insulating film 16 Gate electrode 17 Cap insulating film 18 sidewall spacer 19 n-type semiconductor region 20 p-type semiconductor region 21 silicon oxide film 22 connection hole 23 plug 24 wiring 25 interlayer insulating film 26 connection hole 27 plug 28 stopper insulating film 29 insulating film 30 wiring groove 31 wiring 32 Pad 33 passivation film 34 opening 35 titanium palladium film 36 resist film 37 bump 37 a gold film 40 opening 41 bump 42 probe needle 43 opening 44 probe needle 45 bump 46 opening 47 probe needle 48 bump Qn n-channel MISFET
Qp p-channel MISFET

Claims (5)

(A) forming a pad made of a metal film in the same layer as the uppermost layer wiring on the substrate;
(B) forming an opening through which the pad is exposed in the passivation film after forming a passivation film on the substrate;
(C) after applying a resist film on the substrate, removing the resist film in a region including the opening and extending over the passivation film;
(D) forming a bump reflecting the shape of the opening in the region where the resist film has been removed,
A method of manufacturing a semiconductor device, comprising: forming the opening having a shape other than a rectangle when viewed from above; and forming a bump having a plurality of depressions on a top surface thereof, where the bump has a plurality of contacts with a probe needle. (A) forming a pad made of a metal film in the same layer as the uppermost layer wiring on the substrate;
(B) forming an opening through which the pad is exposed in the passivation film after forming a passivation film on the substrate;
(C) after applying a resist film on the substrate, removing the resist film in a region including the opening and extending over the passivation film;
(D) forming a bump in a region where the resist film has been removed,
At least in the direction in which the probe needle stops slipping when viewed from above, the opening is formed with a side that is convex in a mountain shape or concave in a valley shape, and the shape of the opening is reflected on the upper surface of the bump. A method of manufacturing a semiconductor device, wherein a recess is formed. (A) forming a pad made of a metal film in the same layer as the uppermost layer wiring on the substrate;
(B) forming an opening through which the pad is exposed in the passivation film after forming a passivation film on the substrate;
(C) after applying a resist film on the substrate, removing the resist film in a region including the opening and extending over the passivation film;
(D) forming a bump in a region where the resist film has been removed,
A method of manufacturing a semiconductor device, comprising: forming the opening having a convex side bulging inward when viewed from above, and forming a depression on the upper surface of the bump reflecting the shape of the opening. . (A) forming a pad made of a metal film in the same layer as the uppermost layer wiring on the substrate;
(B) forming an opening through which the pad is exposed in the passivation film after forming a passivation film on the substrate;
(C) after applying a resist film on the substrate, removing the resist film in a region including the opening and extending over the passivation film;
(D) forming a bump in a region where the resist film has been removed,
A semiconductor, wherein the opening is formed by having at least two sides of a mountain-like shape as viewed from above, and a depression reflecting the shape of the opening is formed on the upper surface of the bump; Device manufacturing method. (A) forming a pad made of a metal film in the same layer as the uppermost layer wiring on the substrate;
(B) forming an opening through which the pad is exposed in the passivation film after forming a passivation film on the substrate;
(C) after applying a resist film on the substrate, removing the resist film in a region including the opening and extending over the passivation film;
(D) forming a bump in a region where the resist film has been removed,
The opening portion is formed having two or more sides having a shape that becomes uneven in a mountain shape when viewed from above, and having a plurality of sides having a shape that becomes uneven in a mountain shape on relatively long sides, A method of manufacturing a semiconductor device, comprising: forming a depression on an upper surface of the bump, the depression reflecting the shape of the opening.

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