JP3427550B2 - Thin film semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device. More specifically, it relates to a pattern shape of metal wiring.

[0002]

2. Description of the Related Art A thin film semiconductor device is suitable for a drive substrate of an active matrix type display device and has been actively developed in recent years. FIG. 6 is a schematic diagram showing a general configuration of a conventional thin film semiconductor device. As shown in the figure, the thin film semiconductor device is formed using an insulating substrate 201 such as quartz. Although not shown, a semiconductor thin film such as polysilicon is formed on the insulating substrate 201. A thin film transistor or the like is integrated and formed using this semiconductor thin film as an active layer to form a thin film semiconductor device. The thin film transistor is covered with a first interlayer insulating film 202 made of PSG or the like, and a metal wiring 203 made of aluminum or the like is patterned on the first interlayer insulating film 202. The metal wiring 203 is used for interconnecting the thin film transistors formed in an integrated manner. The metal wiring 203 is covered with a second interlayer insulating film 204 also made of PSG or the like. When the thin film semiconductor device is used as a drive substrate of an active matrix display device, a pixel electrode is patterned on the second interlayer insulating film 204. Furthermore, a passivation film 205 made of silicon nitride or the like is formed thereon by plasma chemical vapor deposition.

When the semiconductor thin film is composed of polysilicon, hydrogenation treatment has been conventionally performed during the manufacturing process in order to improve the electrical characteristics of the thin film transistor. This hydrogenation treatment is to introduce the hydrogen contained in the interlayer insulating film and / or the passivation film into the semiconductor thin film by annealing. Thereby, the leak current of the thin film transistor can be reduced. When the passivation film 205 is composed of silicon nitride formed by plasma enhanced chemical vapor deposition, the passivation film itself serves as an appropriate hydrogen supply source. Further, since the passivation film has a dense composition, it is possible to prevent hydrogen introduced into the semiconductor thin film from being released to the outside again, and it also functions as a cap film.

[0004]

In the thin film semiconductor device having the laminated structure shown in FIG. 6, the disconnection of the metal wiring 203 made of aluminum or the like has been a problem in the past. this is,
As shown in FIG. 7, it is considered that the stress inherent in the laminated structure is applied to the metal wiring 203, migration of aluminum occurs, and the wiring is broken. In particular, disconnection frequently occurs in a linear metal wiring portion having a long wiring length and a short wiring width. The cause is the metal wiring 20
3 is greatly influenced by the stress of the passivation film 205 existing on the upper part of the No. 3 structure. Further, as a secondary factor, the stress of the interlayer insulating films 202 and 204 existing above and below the metal wiring also promotes the disconnection. In such a state, it is difficult to increase the density of the patterning of the metal wiring, and the reliability of the product is adversely affected.

Further explanation will be added to this point. Silicon nitride formed by plasma enhanced chemical vapor deposition (P-
When hydrogen contained in a passivation film made of SiN diffuses into polysilicon by annealing (heating) at about 400 ° C., stress in the passivation film inevitably increases. This affects the film existing in the lower layer, and the strain due to the stress reaches the metal wiring. In this state, a metal wiring part having a linear line width and a long line length is stochastically disadvantageous to disconnection. It is difficult for the aluminum film itself forming the metal wiring to absorb the stress. As a result, the film stress causes migration of aluminum and appears in the form of disconnection of metal wiring.

As a countermeasure against this, P-SiN after hydrogenation treatment
Techniques for completely removing the film have already been proposed. However, this causes plasma damage when the P-SiN film is removed by dry etching, and the electrical characteristics of the thin film transistor change. Further, since there is no cap film, hydrogen once introduced into polysilicon is released by annealing in a later step, so that the electrical characteristics of the thin film transistor also change, causing deterioration of the integrated circuit.

[0007]

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, it is an object of the present invention to improve the pattern shape of metal wiring included in a thin film semiconductor device and effectively prevent disconnection failure. The following measures have been taken in order to achieve this object. That is, the thin film semiconductor device according to the present invention has, as a basic configuration, an insulating substrate, a semiconductor thin film formed thereon, a thin film transistor formed by using the semiconductor thin film as an active layer, and an interlayer insulating film. And a metal wiring patterning formed on the thin film transistor, and a passivation film formed above the metal wiring. Characteristically, the passivation film is made of silicon nitride formed by plasma enhanced chemical vapor deposition, and is used as a diffusion source when introducing hydrogen into the semiconductor thin film, and after introducing hydrogen into the semiconductor thin film, It also functions as a cap film for preventing separation, and the metal wiring is made of aluminum, aluminum / silicon alloy, molybdenum, titanium, gold, silver, palladium, tantalum, tungsten, nickel, chromium, or a silicide thereof, The metal wiring is patterned so that a line width of more than 5 μm can be secured, and the line length of the portion where the line width of 5 μm cannot be secured is limited to 100 μm or less, and the metal wiring is disconnected due to the stress of the passivation film. Suppress. The passivation film is selectively removed by etching from a region overlapping with the line width and line length of the underlying metal wiring. The thin film semiconductor device having such a configuration is suitable as a drive substrate of an active matrix type display device by integrally forming pixel electrodes in addition to thin film transistors.

[0008]

In general, disconnection failure frequently occurs in a linear portion having a long wiring length and a short wiring width. In particular, according to the actual measurement result by the inventor, disconnection failure frequently occurs in a linear metal wiring pattern having a wiring length of 100 μm or more and a wiring width of 5 μm or less. That is, the probability of disconnection increases as the wiring width decreases. Also, the probability of disconnection increases as the wiring length increases. Therefore, the wiring width is preferably 5 μm or more, and the wiring length is preferably 100 μm or less. The present invention is characterized in that the line width and line length of the metal wiring are set to necessary values so that disconnection failure does not occur. Further, preferably, the passivation film made of P-SiN or the like which causes film stress is selectively removed only on the upper portion of the metal wiring. That is, the P-SiN film is selectively removed after hydrogenation of polysilicon. As a result, the strain of the stress applied to the metal wiring can be removed, and long-term reliability can be secured. Further, when it is necessary to design the metal wiring to have a line width of 5 μm or less or a line length of 100 μm or more in pattern design, selective removal of the P—SiN film is extremely effective.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows a first embodiment of a thin film semiconductor device according to the present invention. (A) is a partial cross-sectional view of a thin film semiconductor device, and (B) shows an example of a pattern shape of metal wiring. As shown in (A), this thin film semiconductor device is configured using a transparent insulating substrate 1 made of quartz glass or the like. A semiconductor thin film 2 made of polysilicon or the like is formed thereon. Thin film transistor (TF
T) 3 is formed by using the semiconductor thin film 2 as an active layer. However, only one TFT is shown for simplicity of illustration. The TFT has a gate electrode 5 formed by patterning on the semiconductor thin film 2 via a gate insulating film 4. Semiconductor thin films 2 located on both sides of the gate electrode 5
N-type impurities are implanted at a high concentration in
A source region S and a drain region D of FT3 are formed. As a result, an N-channel type TFT is obtained. When a P-channel type TFT is formed, p-type impurities may be injected into the semiconductor thin film 2.

The TFT 3 having such a structure is covered with a first interlayer insulating film 6 made of PSG or the like. Metal wirings 7a and 7b are patterned on the first interlayer insulating film 6. The metal wirings 7a and 7b are obtained by forming a film of aluminum by sputtering and then patterning it into a predetermined shape. Instead of aluminum, an aluminum / silicon alloy containing about 1% silicon may be used. Alternatively, instead of aluminum, a metal material such as molybdenum, titanium, gold, silver, palladium, tantalum, tungsten, nickel, or chromium can be used. Further, instead of a pure metal, silicon and a silicide which is a compound of these metal elements may be used. A contact hole is opened in advance in the first interlayer insulating film 6, and the metal wiring 7a is electrically connected to the source region S of the TFT 3 through the contact hole. The metal wiring 7b is also electrically connected to the drain region D of the TFT 3 via the contact hole. However, when the thin film semiconductor device is used as a drive substrate of an active matrix type display device, the pixel electrode is further formed by patterning by connecting to the metal wiring 7b. These metal wirings 7a and 7b are also covered with a second interlayer insulating film 8 made of PSG or the like. A passivation film 9 is formed thereon. In this example, the passivation film 9 is made of silicon nitride (P-SiN) formed by plasma enhanced chemical vapor deposition. P-Si
N contains 1% or more of hydrogen and is used as a diffusion source when hydrogen is introduced into the semiconductor thin film 2 by annealing. At the same time, after hydrogen is introduced into the semiconductor thin film 2, it also functions as a cap film for preventing the separation. Although this passivation film 9 contains a considerable amount of stress even during film formation, when a large amount of hydrogen is released during the hydrogenation process, further stress is generated.

As shown in (B) as a feature of the present invention, the metal wiring 7 is patterned so that a line width W exceeding 5 μm can be secured. However, the line length L is limited to 100 μm or less for the portion where the line width W of 5 μm cannot be secured due to the restriction on the pattern design.

FIG. 2A shows the result of actual measurement of the relationship between the line width W of the metal wiring and the rate of occurrence of wire breakage. Moreover, FIG.
(B) represents the result of actually measuring the relationship between the wire length L and the wire breakage occurrence rate. As is clear from these graphs, when the wiring width W is 5 μm or less, the disconnection rate increases rapidly. When the wiring length L exceeds 100 μm, the rate of occurrence of wire breakage tends to increase. As can be seen from this, the line width W is 5 μm
The above is preferable, and the line length L is preferably 100 μm or less. The present invention is characterized in that the line width W and the line length L of the metal wiring are limited to necessary values so that disconnection does not occur. That is, in principle, the metal wiring 7 is patterned so that the line width W exceeding 5 μm can be secured. In the part where the line width W of 5 μm cannot be secured due to the pattern design, the line length L is limited to 100 μm or less to suppress the occurrence rate of wire breakage.

FIGS. 3A and 3B show a second embodiment of the thin film semiconductor device according to the present invention. FIG. 3A is a partial sectional view and FIG. 3B is a partial plan view. Basically, it has the same configuration as that of the first embodiment shown in FIG. 1, and corresponding parts are designated by corresponding reference numerals to facilitate understanding.
However, for ease of illustration, the periphery of the TFT is omitted and only the periphery of the metal wiring is shown. As shown in the figure, this embodiment is characterized in that the passivation film 9 is selectively removed by etching from a region overlapping the metal wiring 7 in the lower layer. As shown in (B), the region 10 where the passivation film 9 is removed includes a slight margin as compared with the region of the underlying metal wiring 7. In the manufacturing process of the thin film semiconductor device having such a structure, the passivation film 9 is formed over the entire surface in advance. Annealing is performed in this state, and hydrogen is introduced from the passivation film 9 into a semiconductor thin film (not shown) made of polysilicon. After that, the passivation film 9 is selectively removed by patterning. This removes the stress of the passivation film 9 applied to the metal wiring 7,
This will ensure long-term reliability. Also, due to pattern design restrictions, the line width W of the metal wiring 7 must be 5 μm.
The selective removal of the passivation film 9 is effective when the length is set to m or less or the line length L is set to 100 μm or more.

FIG. 4 shows an actual measurement result of the wire breakage occurrence rate when the passivation film is selectively removed. Graphs (A) and (B) of FIG. 4 correspond to graphs (A) and (B) of FIG. 2, respectively. As is clear from comparison between FIG. 2 and FIG. 4, the disconnection occurrence rate is remarkably reduced by selectively removing the passivation film from the upper portion of the metal wiring. Especially, as shown in FIG. 4A, the line width W is 5 μm.
Even in the case of m or less, the wire breakage occurrence rate is remarkably reduced as compared with FIG. Similarly, as shown in FIG. 4B, even when the wiring length L exceeds 100 μm, the wire breakage occurrence rate is significantly lower than that in FIG. 2B. As described above, by selectively removing the passivation film made of P-SiN or the like from the upper portion of the metal wiring made of aluminum or the like, it is possible to greatly contribute to the reduction of the disconnection rate.

Finally, FIG. 5 shows an example of an active matrix type display device using the thin film semiconductor device having the structure shown in FIG. 1 or 3 as a drive substrate. As shown in the figure, this display device is composed of a drive substrate 101 made of quartz glass or the like, an opposite substrate 102 made of glass or the like, and an electro-optical substance made of a liquid crystal 103 held between the two. The pixel array unit 1 is provided on the drive substrate 101.
04 and the drive circuit unit are formed integrally. The drive circuit portion is divided into a vertical drive circuit 105 and a horizontal drive circuit 106, and is an integrated circuit of thin film transistors. Further, a terminal portion 107 for external connection is provided on the upper end of the peripheral portion of the driving substrate 101.
Are formed. The terminal portion 107 is connected to the vertical drive circuit 105 and the horizontal drive circuit 106 via the metal wiring 108. The pixel array section 104 includes a gate line 109 made of metal wiring and a signal line 110 made of metal wiring, which intersect each other. Both lines 109, 1
A pixel electrode 111 and a thin film transistor 112 for driving the pixel electrode 111 are integrally formed at the intersection of the ten. On the other hand, a counter electrode and a color filter (not shown) are formed on the inner surface of the counter substrate 102.

As described above, the pixel electrode 111, the thin film transistor 112, and the metal wiring (10) are formed on the driving substrate 101.
8, 109, 110) are formed. Counter substrate 1
In 02, at least a counter electrode is formed. A liquid crystal 103 is held as an electro-optical substance between the substrates 101 and 102 bonded to each other with a predetermined gap.
The driving substrate 101 includes a transparent insulating base material, a semiconductor thin film that becomes an active layer of the thin film transistor 112, a first interlayer insulating film, a metal wiring, a second interlayer insulating film, a passivation film, and a pixel electrode 111 in this order. It has a laminated laminated structure.
Characteristically, the metal wiring is patterned so that a line width exceeding 5 μm can be secured, and the line length of the portion where the line width of 5 μm cannot be secured is limited to 100 μm or less. Alternatively, the passivation film may be selectively removed by etching from a region overlapping the underlying metal wiring.

[0017]

As described above, according to the present invention, the metal wiring is patterned so that the line width exceeding 5 μm can be secured, and the line length of the portion where the line width of 5 μm cannot be secured is set to 100 μm or less. I have a limit. Alternatively, the passivation film is selectively removed by etching from a region overlapping the underlying metal wiring. With such a configuration, disconnection of the metal wiring can be prevented, so that image quality is improved when the thin film semiconductor device is incorporated as a drive substrate into an active matrix display device or the like. Further, it becomes possible to stably produce the active matrix type display device. Moreover,
The long-term reliability of the active matrix display device can be improved.

[Brief description of drawings]

FIG. 1 is a schematic partial cross-sectional view and a metal wiring pattern diagram showing a first embodiment of a thin film semiconductor device according to the present invention.

FIG. 2 is a graph showing a relationship between a wiring width and a wire breakage occurrence rate and a relationship between a wire length and a wire breakage occurrence rate.

FIG. 3 is a schematic partial cross-sectional view and partial plan view showing a second embodiment of a thin film semiconductor device according to the present invention.

FIG. 4 is a graph showing a relationship between a wiring width and a wire breakage occurrence rate, and a wiring length and a wire breakage occurrence rate.

FIG. 5 is a schematic perspective view showing an example of an active matrix type display device in which the thin film semiconductor device according to the present invention is incorporated as a drive substrate.

FIG. 6 is a schematic view showing an example of a conventional thin film semiconductor device.

FIG. 7 is a schematic plan view showing a disconnection state of a metal wiring formed in a conventional thin film semiconductor device.

[Explanation of symbols]

1 Insulation board 2 Semiconductor thin film 3 thin film transistor 4 Gate insulation film 5 Gate electrode 6 First interlayer insulating film 7 Metal wiring 8 Second interlayer insulating film 9 passivation film

Continuation of the front page (56) Reference JP-A-6-118446 (JP, A) JP-A-2-10331 (JP, A) JP-A-6-82826 (JP, A) JP-A-5-249493 (JP , A) JP 4-78826 (JP, A) JP 1-237524 (JP, A) JP 54-133090 (JP, A) JP 57-17146 (JP, A) JP 7-78996 (JP, A) JP-A-6-214255 (JP, A) JP-A-6-196704 (JP, A) JP-A-6-77481 (JP, A) JP-A-5-315328 (JP, A) A) JP-A-6-252399 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/768 G02F 1/1368

Claims (3)

(57) [Claims] 1. An insulating substrate, a semiconductor thin film formed on the insulating substrate, a thin film transistor integrated with the semiconductor thin film as an active layer, and metal wiring patterned on the thin film transistor via an interlayer insulating film. A thin film semiconductor device having a passivation film formed above the metal wiring, wherein the passivation film is made of silicon nitride formed by plasma enhanced chemical vapor deposition, and hydrogen is introduced into the semiconductor thin film. When used as a diffusion source at that time, it also functions as a cap film for preventing the semiconductor thin film from being released after introducing hydrogen into the semiconductor thin film, and the metal wiring is aluminum, aluminum / silicon alloy, molybdenum, titanium, gold, Made of silver, palladium, tantalum, tungsten, nickel, chromium, or their silicides The metal wiring is patterned so that a line width of more than 5 μm can be secured, and the line length of the portion where the line width of 5 μm cannot be secured is limited to 100 μm or less, and the metal wiring is disconnected due to the stress of the passivation film. Suppress
The passivation film is a region that overlaps the underlying metal wiring.
A thin film semiconductor device characterized by being selectively etched away from . 2. An insulating substrate, a semiconductor thin film formed on the insulating substrate, a thin film transistor in which the semiconductor thin film is used as an active layer, and a metal wiring pattern-formed on the thin film transistor via an interlayer insulating film. A thin film semiconductor device having a passivation film formed above the metal wiring, wherein the passivation film is made of silicon nitride formed by plasma enhanced chemical vapor deposition, and hydrogen is introduced into the semiconductor thin film. When used as a diffusion source at that time, it also functions as a cap film for preventing the semiconductor thin film from being released after introducing hydrogen into the semiconductor thin film, and the metal wiring is aluminum, aluminum / silicon alloy, molybdenum, titanium, gold, Made of silver, palladium, tantalum, tungsten, nickel, chromium, or their silicides The passivation film is selectively etched away from the regions overlapping the line width and line length of the lower metal interconnect, a thin film semiconductor device, characterized in that to suppress the disconnection of the metal wiring due to the stress of the passivation film. 3. An electro-optical material held between a driving substrate on which a pixel electrode, a thin film transistor and a metal wiring are formed, a counter substrate having at least a counter electrode, and both substrates bonded to each other with a predetermined gap. An active matrix type display device comprising: a driving substrate, a transparent insulating base material, a semiconductor thin film to be an active layer of the thin film transistor, a first interlayer insulating film, the metal wiring, and a second interlayer. It has a laminated structure in which an insulating film and a passivation film are sequentially stacked, and the passivation film is made of silicon nitride formed by plasma enhanced chemical vapor deposition, and is used as a diffusion source when hydrogen is introduced into the semiconductor thin film. And also functions as a cap film for preventing hydrogen from being removed after the hydrogen is introduced into the semiconductor thin film. The silicon / silicon alloy, molybdenum, titanium, gold, silver, palladium, tantalum, tungsten, nickel, chromium, or a silicide thereof, the passivation film is selected from a region overlapping with the line width and line length of the lower metal wiring. The active matrix type display device is characterized in that it is removed by etching to suppress the disconnection of the metal wiring due to the stress of the passivation film.