JP2004048025A - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP2004048025A
JP2004048025A JP2003207585A JP2003207585A JP2004048025A JP 2004048025 A JP2004048025 A JP 2004048025A JP 2003207585 A JP2003207585 A JP 2003207585A JP 2003207585 A JP2003207585 A JP 2003207585A JP 2004048025 A JP2004048025 A JP 2004048025A
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JP
Japan
Prior art keywords
dummy
insulating film
wiring
region
film
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003207585A
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English (en)
Japanese (ja)
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JP2004048025A5 (enExample
Inventor
Yasushi Kawabuchi
河渕　靖
Koichi Nagasawa
長沢　幸一
Masahiro Shigeniwa
茂庭　昌弘
Yohei Yamada
山田　洋平
Toshifumi Takeda
竹田　敏文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2003207585A priority Critical patent/JP2004048025A/ja
Publication of JP2004048025A publication Critical patent/JP2004048025A/ja
Publication of JP2004048025A5 publication Critical patent/JP2004048025A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2003207585A 1997-03-31 2003-08-14 半導体集積回路装置 Withdrawn JP2004048025A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003207585A JP2004048025A (ja) 1997-03-31 2003-08-14 半導体集積回路装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8101397 1997-03-31
JP2003207585A JP2004048025A (ja) 1997-03-31 2003-08-14 半導体集積回路装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP03338898A Division JP3638778B2 (ja) 1997-03-31 1998-02-16 半導体集積回路装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2005337967A Division JP2006128709A (ja) 1997-03-31 2005-11-24 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2004048025A true JP2004048025A (ja) 2004-02-12
JP2004048025A5 JP2004048025A5 (enExample) 2006-01-19

Family

ID=31718534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003207585A Withdrawn JP2004048025A (ja) 1997-03-31 2003-08-14 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JP2004048025A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005303089A (ja) * 2004-04-13 2005-10-27 Nec Electronics Corp 半導体装置
JP2009099738A (ja) * 2007-10-16 2009-05-07 Toshiba Corp 半導体装置、半導体装置の製造方法及び半導体記憶装置の製造方法
JP2012054530A (ja) * 2010-08-05 2012-03-15 Renesas Electronics Corp 半導体装置
CN101866884B (zh) * 2009-04-14 2012-04-18 中芯国际集成电路制造(北京)有限公司 非易失性存储器控制栅极字线的加工方法
CN103296202A (zh) * 2012-03-02 2013-09-11 中芯国际集成电路制造(上海)有限公司 相变存储器及其制作方法
JP2015188105A (ja) * 2015-06-04 2015-10-29 ルネサスエレクトロニクス株式会社 半導体装置
JP2015195385A (ja) * 2015-06-04 2015-11-05 ルネサスエレクトロニクス株式会社 半導体装置
CN115020379A (zh) * 2022-05-30 2022-09-06 上海华力集成电路制造有限公司 Hkmg寄生电容测试结构的版图

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005303089A (ja) * 2004-04-13 2005-10-27 Nec Electronics Corp 半導体装置
JP2009099738A (ja) * 2007-10-16 2009-05-07 Toshiba Corp 半導体装置、半導体装置の製造方法及び半導体記憶装置の製造方法
CN101866884B (zh) * 2009-04-14 2012-04-18 中芯国际集成电路制造(北京)有限公司 非易失性存储器控制栅极字线的加工方法
JP2012054530A (ja) * 2010-08-05 2012-03-15 Renesas Electronics Corp 半導体装置
CN103296202A (zh) * 2012-03-02 2013-09-11 中芯国际集成电路制造(上海)有限公司 相变存储器及其制作方法
JP2015188105A (ja) * 2015-06-04 2015-10-29 ルネサスエレクトロニクス株式会社 半導体装置
JP2015195385A (ja) * 2015-06-04 2015-11-05 ルネサスエレクトロニクス株式会社 半導体装置
CN115020379A (zh) * 2022-05-30 2022-09-06 上海华力集成电路制造有限公司 Hkmg寄生电容测试结构的版图

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