JP2003518865A - デジタル回路中のグリッチを低減する回路および方法 - Google Patents
デジタル回路中のグリッチを低減する回路および方法Info
- Publication number
- JP2003518865A JP2003518865A JP2001548529A JP2001548529A JP2003518865A JP 2003518865 A JP2003518865 A JP 2003518865A JP 2001548529 A JP2001548529 A JP 2001548529A JP 2001548529 A JP2001548529 A JP 2001548529A JP 2003518865 A JP2003518865 A JP 2003518865A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- input terminal
- removing means
- channel transistor
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 13
- 230000007704 transition Effects 0.000 claims description 32
- 230000001629 suppression Effects 0.000 description 107
- 238000010586 diagram Methods 0.000 description 14
- 238000005516 engineering process Methods 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/473,863 US6356101B1 (en) | 1999-12-28 | 1999-12-28 | Glitch removal circuitry |
| US09/473,863 | 1999-12-28 | ||
| PCT/US2000/034406 WO2001048925A1 (en) | 1999-12-28 | 2000-12-19 | Circuitry and method for removing glitches in digital circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003518865A true JP2003518865A (ja) | 2003-06-10 |
| JP2003518865A5 JP2003518865A5 (enExample) | 2008-02-07 |
Family
ID=23881329
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001548529A Pending JP2003518865A (ja) | 1999-12-28 | 2000-12-19 | デジタル回路中のグリッチを低減する回路および方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6356101B1 (enExample) |
| EP (1) | EP1243073A1 (enExample) |
| JP (1) | JP2003518865A (enExample) |
| TW (1) | TW584987B (enExample) |
| WO (1) | WO2001048925A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20170079057A (ko) * | 2015-12-30 | 2017-07-10 | 엘지디스플레이 주식회사 | 게이트 드라이브 ic와 이를 포함한 표시장치 |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002330346A (ja) * | 2001-05-02 | 2002-11-15 | Fujitsu Ltd | Cmosセンサ回路 |
| JP3744867B2 (ja) * | 2002-03-19 | 2006-02-15 | 株式会社半導体理工学研究センター | データ保持回路 |
| US6794908B2 (en) * | 2002-05-31 | 2004-09-21 | Honeywell International Inc. | Radiation-hard circuit |
| US6894540B1 (en) | 2003-12-17 | 2005-05-17 | Freescale Semiconductor, Inc. | Glitch removal circuit |
| US20060119410A1 (en) * | 2004-12-06 | 2006-06-08 | Honeywell International Inc. | Pulse-rejecting circuit for suppressing single-event transients |
| US7193451B2 (en) * | 2005-01-24 | 2007-03-20 | Honeywell International, Inc. | Method and system for reducing glitch effects within combinational logic |
| US20060267653A1 (en) * | 2005-05-25 | 2006-11-30 | Honeywell International Inc. | Single-event-effect hardened circuitry |
| US7236001B2 (en) * | 2005-09-02 | 2007-06-26 | Honeywell International Inc. | Redundancy circuits hardened against single event upsets |
| US7212056B1 (en) * | 2005-10-12 | 2007-05-01 | Honeywell International Inc. | Radiation hardened latch |
| US20070103185A1 (en) * | 2005-11-03 | 2007-05-10 | Honeywell International Inc. | Dual path redundancy with stacked transistor voting |
| US8115515B2 (en) * | 2006-03-28 | 2012-02-14 | Honeywell International Inc. | Radiation hardened differential output buffer |
| US7619455B2 (en) * | 2007-04-19 | 2009-11-17 | Honeywell International Inc. | Digital single event transient hardened register using adaptive hold |
| US9178553B2 (en) * | 2012-01-31 | 2015-11-03 | Broadcom Corporation | Systems and methods for enhancing audio quality of FM receivers |
| US9130643B2 (en) | 2012-01-31 | 2015-09-08 | Broadcom Corporation | Systems and methods for enhancing audio quality of FM receivers |
| US9264025B2 (en) * | 2013-08-14 | 2016-02-16 | Nanya Technology Corporation | Glitch filter and filtering method |
| WO2018189288A1 (en) * | 2017-04-12 | 2018-10-18 | Telefonaktiebolaget Lm Ericsson (Publ) | Short pulse suppression for phase/frequency detector |
| CN114124066B (zh) * | 2020-08-26 | 2024-07-02 | 浙江智识电子科技有限公司 | 环境缓变自适应电容感应检测系统 |
| KR102855219B1 (ko) | 2020-11-09 | 2025-09-03 | 삼성전자주식회사 | 반도체 회로 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62231521A (ja) * | 1986-03-31 | 1987-10-12 | Nec Corp | 半導体集積回路 |
| JPS6362413A (ja) * | 1986-09-02 | 1988-03-18 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JPH04160816A (ja) * | 1990-10-24 | 1992-06-04 | Nec Ic Microcomput Syst Ltd | 出力回路 |
| JPH04192808A (ja) * | 1990-11-27 | 1992-07-13 | Olympus Optical Co Ltd | 出力バッファ回路 |
| JPH04287517A (ja) * | 1991-03-18 | 1992-10-13 | Fujitsu Ltd | 半導体装置における出力バッファ |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4216388A (en) * | 1978-08-07 | 1980-08-05 | Rca Corporation | Narrow pulse eliminator |
| EP0264614A1 (en) | 1986-09-11 | 1988-04-27 | Matsushita Electric Industrial Co., Ltd. | Mos fet drive circuit providing protection against transient voltage breakdown |
| DE3708499A1 (de) * | 1987-03-16 | 1988-10-20 | Sgs Halbleiterbauelemente Gmbh | Digitale gegentakt-treiberschaltung |
| US5019724A (en) * | 1989-12-20 | 1991-05-28 | Sgs-Thomson Microelectronics, Inc. | Noise tolerant input buffer |
| US5184032A (en) * | 1991-04-25 | 1993-02-02 | Texas Instruments Incorporated | Glitch reduction in integrated circuits, systems and methods |
| US5198710A (en) * | 1991-05-30 | 1993-03-30 | Texas Instruments Incorporated | Bi-directional digital noise glitch filter |
| US5367205A (en) | 1993-05-13 | 1994-11-22 | Micron Semiconductor, Inc. | High speed output buffer with reduced voltage bounce and no cross current |
| US5440178A (en) * | 1993-11-30 | 1995-08-08 | Sgs-Thomson Microelectronics, Inc. | Static test mode noise filter |
| US5748034A (en) * | 1995-06-07 | 1998-05-05 | Cirrus Logic, Inc. | Combinational logic circuit, system and method for eliminating both positive and negative glitches |
| US5760612A (en) | 1996-08-13 | 1998-06-02 | Advanced Micro Devices Inc. | Inertial delay circuit for eliminating glitches on a signal line |
| US5761612A (en) | 1996-09-19 | 1998-06-02 | Northern Telecom Limited | Wireless receiver |
| KR100281108B1 (ko) * | 1997-12-26 | 2001-02-01 | 김영환 | 노이즈제거장치 |
-
1999
- 1999-12-28 US US09/473,863 patent/US6356101B1/en not_active Expired - Lifetime
-
2000
- 2000-12-19 JP JP2001548529A patent/JP2003518865A/ja active Pending
- 2000-12-19 WO PCT/US2000/034406 patent/WO2001048925A1/en not_active Ceased
- 2000-12-19 EP EP00984487A patent/EP1243073A1/en not_active Ceased
-
2001
- 2001-02-06 TW TW089127962A patent/TW584987B/zh not_active IP Right Cessation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62231521A (ja) * | 1986-03-31 | 1987-10-12 | Nec Corp | 半導体集積回路 |
| JPS6362413A (ja) * | 1986-09-02 | 1988-03-18 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JPH04160816A (ja) * | 1990-10-24 | 1992-06-04 | Nec Ic Microcomput Syst Ltd | 出力回路 |
| JPH04192808A (ja) * | 1990-11-27 | 1992-07-13 | Olympus Optical Co Ltd | 出力バッファ回路 |
| JPH04287517A (ja) * | 1991-03-18 | 1992-10-13 | Fujitsu Ltd | 半導体装置における出力バッファ |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20170079057A (ko) * | 2015-12-30 | 2017-07-10 | 엘지디스플레이 주식회사 | 게이트 드라이브 ic와 이를 포함한 표시장치 |
| KR102433746B1 (ko) * | 2015-12-30 | 2022-08-17 | 엘지디스플레이 주식회사 | 게이트 드라이브 ic와 이를 포함한 표시장치 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW584987B (en) | 2004-04-21 |
| EP1243073A1 (en) | 2002-09-25 |
| US6356101B1 (en) | 2002-03-12 |
| WO2001048925A1 (en) | 2001-07-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20071210 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20071210 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20100126 |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100129 |
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| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20100623 |