JP2003273163A - Substrate for mounting semiconductor element, semiconductor element and liquid crystal display panel using the substrate for mounting semiconductor element or semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve a continuity state even in the case that a recess exists in the bump of a semiconductor element or the surface of the electrode terminal of a substrate for mounting the semiconductor element, in the case that a height is fluctuated and in the case that the thickness of the semiconductor element or the substrate for mounting the semiconductor element is non-uniform, etc., without burying conductive particles excessively, to reduce the occurrence of continuity defects due to changes with time and to make the dent by the conductive particle easily appear. <P>SOLUTION: The electrode terminal 1 is formed of a plurality of layers in which a lowermost layer 1a, one or more inner layers 1b and a top layer 1c are laminated successively from the side of the substrate 4 for mounting the semiconductor element, and the top layer 1c and the lowermost layer 1a are harder than at least the one inner layer. When the thickness of the electrode terminal 1 is defined as T, the thickness of the one or more inner layers 1b is defined as t and the number of the layers of the electrode terminal is defined as (a), t≤3T/a is satisfied. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element mounting substrate having electrode terminals formed on its surface, a semiconductor element having bumps, and a liquid crystal display panel using the semiconductor element mounting substrate or semiconductor element.

[0002]

2. Description of the Related Art In recent years, in order to meet the demand for miniaturization of electronic equipment, higher density mounting of semiconductor elements is required.
A face-down mounting method is generally used as a method for this high-density mounting. FIG. 6 shows a state in which the semiconductor element IC1 is mounted face down on the semiconductor element mounting substrate 14. In this face-down mounting, the bumps 1B of the semiconductor element IC1 and the electrode terminals 11 of the semiconductor mounting substrate 14 are opposed to each other, and a pressure bonding tool is used to heat and pressurize the semiconductor element IC1 from above.
1 is an anisotropic conductive film containing conductive particles r on a transparent glass substrate which is a semiconductor mounting substrate 14.
This is a method of mounting the semiconductor element IC1 on the semiconductor mounting substrate 14 by fixing it via a film (ACF) 8 and enables the high density mounting by interposing the anisotropic conductive film 8 between the connection terminals. It is becoming like this (making fine pitch). According to this mounting method, as compared with a normal mounting method such as wire bonding, the semiconductor element I
There is an advantage that C1 can be mounted at high density.

The electrical connection between the bumps 1B of the semiconductor element IC1 mounted face down as described above and the electrode terminals 11 of the semiconductor mounting substrate 1 is performed by connecting the conductive particles r of the anisotropic conductive film 8 to the bumps 1B and the electrode terminals. A conductive state is obtained by being sandwiched between 11 and 11, but the electrical connection is reduced by crushing the conductive particles r by pressing force (thermocompression bonding) that presses the semiconductor element IC from above. It is confirmed by this.

Aluminum (Al), chromium (Cr), gold (Au), ITO, etc. are used as the material of the electrode terminal 11, and gold (A) is used as the material of the bump 1B.
u) etc. are used. The anisotropic conductive film 8 is a paste or film having conductive particles r dispersed in an insulating adhesive, having conductivity in the thickness direction (connection direction), and insulating in the plane direction (lateral direction). The adhesive 8 is shaped like nickel, and nickel particles or resin particles plated with gold are used as the conductive particles r.

The bumps 1B of the semiconductor element IC1 mounted by face down and the semiconductor element mounting substrate 1
There are various methods for inspecting the electrical connection with the electrode terminal 11 of No. 4, but as one of them, there is a method for inspecting by the presence or absence of the indentation of the conductive particles r (trace due to thermocompression). This inspection method is mainly used for transparent glass substrates 1 made of glass or plastic.
4 is a test method used in the case of COG mounting in which the semiconductor element IC is mounted on No. 4, and when the semiconductor element IC is pressed from above in the mounting step, the conductive particles r are applied to the electrode terminals 11.
This is a method of deciding the conduction state by observing the number, size, height, etc. of the indentations from the back side of the transparent glass substrate 14 when the electrode terminals 11 are raised and the indentations are generated. According to this inspection method, a predetermined standard is provided for the number, size, and height of the indentations of the conductive particles r. If the standard is higher than the standard, it is determined that the conduction is good, and if it is low, it is determined that the conduction is poor. In mounting a semiconductor element on a liquid crystal display panel, a COG (chip on gl) for directly connecting the semiconductor element to an electrode terminal (connection electrode or electrode pad) on a glass substrate.
Ass) mounting has become mainstream, but in COG mounting and the like, it is usual to mount a semiconductor element having bumps by using the anisotropic conductive film (ACF). Often used for continuity inspection of liquid crystal display panels.

[0006]

However, in the above-mentioned conventional structure, for example, aluminum (A
When a material with low hardness such as l) is used,
As shown in FIG. 6, when the semiconductor element IC1 was pressed by the crimping tool S2 (in the direction of the arrow in the drawing), the conductive particles r were sometimes buried too much in the electrode terminal 11 having low hardness and were not crushed. That is, the pressing force from the crimping tool is applied to the conductive particles r sandwiched between the bumps 1B and the electrode terminals 11 and buried in the electrode terminals 11, but the pressing force until the conductive particles r are further crushed is not applied. Sometimes it didn't collapse.
For this reason, the ground area between the bump 1B and the conductive particle r becomes small, the connection resistance becomes high, and the electrode terminal 11 and the bump 1
There is a problem that conduction failure may occur between B and B, and the reliability of electrical connection is low. Further, the electrode terminal 11 having a low hardness is vulnerable to impact, heat, etc., and a conduction failure may occur due to a change with time. Even if the conduction failure does not occur during the initial inspection, the conduction failure occurs after shipping. Sometimes it happened. As a change with time, for example, the shape or the like changes due to a change in temperature or the influence of mounting or assembling of other components.

This problem has occurred especially when the hardness of the electrode terminal 11 is lower than the hardness of the conductive particles r. That is, when the conductive particles r are formed of a material such as nickel particles and the electrode terminals 11 are formed of a material such as aluminum having a hardness lower than nickel or the like, the conductive particles r
Is buried in the electrode terminal 11 and is not crushed,
There was a poor continuity.

On the other hand, when a material having a high hardness such as nickel (Ni) is used for the electrode terminal 11, the conductive particles r are not buried too much in the electrode terminal 11 and the above problem does not occur, but FIG. As shown in, the plurality of bumps 1B, 1B
If there are variations in the height of the
In the case of 1, the conductive particles r are not sufficiently pressed and are not crushed,
As shown in FIG. 8 (b), the bump 1B
If there is a recess (crater) on the surface of (1B1),
If the conductive particles r are not sufficiently pressed and crushed at the concave portions, or if the thickness of the semiconductor element IC is uneven and partially thinned as shown in FIG. Bump 1B1 of the thinner element IC
However, since the conductive particles r are not sufficiently pressed and crushed, the connection resistance between the conductive particles r and the bumps 1B (1B1) and between the conductive particles r and the electrode terminals 11 becomes high, resulting in poor conduction.

These problems are caused when the surface of the electrode terminal 11 has a concave portion (the bump surface and the electrode terminal surface have irregularities and are deformed by about 1 to 2 μm in height by thermocompression bonding).
Similarly, when the heights of the electrode terminals 11 are varied, or when the thickness of the semiconductor element mounting substrate 14 is non-uniform, the same phenomenon occurs.

Further, in the inspection method for inspecting the conduction state by the indentation of the conductive particles r, when a material having a low hardness is used for the electrode terminal 11, the indentation is hard to appear on the electrode terminal 11, so that the semiconductor mounting substrate 14 of It was difficult to recognize the indentation from the back side, which made it difficult to perform a visual inspection using a microscope or the like, and the inspection accuracy deteriorated.

Therefore, an object of the present invention is to prevent the conductive particles from being buried too much, and to provide bumps of the semiconductor element or recesses on the surface of the electrode terminal of the semiconductor element mounting substrate, or when the height of the semiconductor element mounting substrate varies. Even if the thickness of the element or the semiconductor element mounting substrate is uneven, it is possible to improve the conduction state, and the occurrence of conduction failure due to changes over time is small,
In addition, a semiconductor mounting substrate on which indentations of conductive particles are likely to appear,
An object is to provide a semiconductor element and a liquid crystal display panel using the same.

[0012]

In a semiconductor element mounting substrate according to claim 1 of the present invention, a semiconductor element having bumps is mounted via an anisotropic conductive film containing conductive particles, and the conductive particles are used as bumps. In the substrate for mounting a semiconductor element on the surface of which an electrode terminal to be sandwiched is formed, the electrode terminal is composed of a plurality of layers in which one or more lower layers and the uppermost layer are laminated in order from the semiconductor element mounting substrate side. And the top layer has a higher hardness than the at least one sublayer. One or more lower layers may be one layer or two or more layers.

According to the present invention, when a semiconductor element having bumps is mounted by thermocompression bonding via an anisotropic conductive film containing conductive particles, the uppermost layer of the electrode terminals has a hardness higher than that of at least one lower layer. Because of the high hardness, the conductive particles sandwiched between the bumps and the electrode terminals are not buried too much in the uppermost layer having high hardness, and the conductive particles are easily crushed. It is possible to absorb unevenness in the surface of the element, variations in height, and uneven thickness of the semiconductor element.

In a semiconductor element mounting substrate according to a second aspect of the present invention, a semiconductor element having bumps is mounted via an anisotropic conductive film containing conductive particles, and the conductive particles are sandwiched between the bumps. In a semiconductor element mounting substrate which is formed of a transparent substrate on which a conductive electrode terminal is formed on the front surface and which can be seen through from the back surface side, the electrode terminal is the lowest layer in order from the semiconductor element mounting substrate side. It is composed of a plurality of layers in which one or more inner layers and an uppermost layer are laminated, and the uppermost layer and the lowermost layer have a hardness higher than that of at least one inner layer. One or more inner layers may be one layer or two or more layers.

According to the present invention, when a semiconductor element having bumps is mounted by thermocompression bonding via an anisotropic conductive film containing conductive particles, the uppermost layer of the electrode terminals has a hardness higher than that of at least one inner layer. Therefore, when the semiconductor element is placed and pressed, the conductive particles sandwiched between the bump and the electrode terminal are not buried too much in the uppermost layer having high hardness, and the conductive particles are easily crushed, and at least the hardness is low. The one lower layer can absorb the unevenness of the bumps and the surface of the semiconductor element, the unevenness of the height, and the unevenness of the thickness of the semiconductor element. Further, since the semiconductor element mounting substrate is made of a transparent substrate and the lowest layer of the electrode terminals has a high hardness, the semiconductor element mounting substrate makes it easy to recognize the indentations of the conductive particles from the back side of the semiconductor element mounting substrate, and the conductive particles It becomes easy to conduct the continuity inspection by the indentation of the particles.

The semiconductor element mounting substrate according to claim 3 of the present invention is based on the invention of claim 2, wherein the thickness of the electrode terminals is T, and the thickness of the one or more inner layers is t.
When the number of electrode terminal layers is a, t ≦ 3 T / a is satisfied.

According to the present invention, since the thickness of one or more inner layers does not become too thick, even if the semiconductor element is placed and pressed, the pressing force is not excessively absorbed by the inner layers. That is, the inventors of the present application recognize that the thicker the inner layer is, the lower the probability of crushing the conductive particles is. However, by satisfying the above relational expression, a suitable pressing force (thermocompression bonding) is applied to the conductive particles. Force), particularly a pressing force from above, makes it easier for the conductive particles to be crushed by the uppermost layer having high hardness. Further, since the pressing force is easily transmitted to the lowermost layer, indentations of the conductive particles are more likely to appear on the lowermost layer.

In the semiconductor element mounting substrate according to claim 4 of the present invention, the hardness of the uppermost layer of the electrode terminal is higher than the hardness of the conductive particles, on the premise of the inventions according to claims 1 to 3. Characterized by high price.

According to the present invention, since the hardness of the uppermost layer is higher than that of the conductive particles, the conductive particles are reliably buried without being buried in the uppermost layer.

The liquid crystal display panel according to claim 5 of the present invention is the semiconductor element mounting substrate according to any one of claims 1 to 4, wherein the one side substrate is a liquid crystal display panel in which liquid crystal is sandwiched between a pair of substrates. And the electrode terminal is an electrode terminal formed on the surface of the one-sided substrate.

According to the present invention, the structure of the electrode terminal is such that the conductive particles are easily crushed, and the bumps, the concave portions on the surface of the semiconductor element, the variation in the height and the uneven thickness of the semiconductor element can be absorbed. Therefore, the liquid crystal display panel has high reliability in connection between the electrode terminals and the bumps. Moreover, since the indentation of the conductive particles is likely to appear, the accuracy of the continuity inspection by the indentation can be improved.

A semiconductor element according to a sixth aspect of the present invention is mounted on a semiconductor element mounting substrate having electrode terminals formed on its surface via an anisotropic conductive film containing conductive particles, and the conductive particles are used as electrode terminals. In a semiconductor element in which a bump that is sandwiched between and conductive is formed, the bump is composed of a plurality of layers in which one or more lower layers and the uppermost layer are stacked in this order from the semiconductor element side. Has a higher hardness than at least one of the lower layers.

According to this invention, the hardness of the uppermost layer is higher than that of at least one lower layer. Therefore, when the semiconductor element is mounted and pressed, the uppermost layer having a high hardness has a gap between the protruding electrode and the electrode terminal. The conductive particles sandwiched between the two are not buried too much, and at least one lower layer having a low hardness can absorb variations in height of the bumps and semiconductor elements and uneven thickness of the semiconductor elements. Therefore, the conductive particles are easily crushed, and the reliability of conduction between the electrode terminal and the bump can be improved. Since the connection portion with the conductive particles is a layer having a high hardness, the conduction failure due to the change with time of the connection portion hardly occurs.

The semiconductor element according to claim 7 of the present invention is based on the semiconductor element according to claim 6, wherein the hardness of the uppermost layer of the bump is higher than the hardness of the conductive particles. .

According to the present invention, since the hardness of the uppermost layer of the bump is higher than that of the conductive particles, the conductive particles are securely buried without being buried in the uppermost layer of the bump.

A liquid crystal display panel according to claim 8 of the present invention is a liquid crystal display panel in which a liquid crystal is sandwiched between a pair of substrates, and the semiconductor element according to claim 6 or 7 has one side of the pair of substrates. It is characterized by being mounted on a substrate.

According to the present invention, since the bumps have a structure in which the conductive particles are easily crushed and the change in the connecting portion with time is small, the liquid crystal display panel has a highly reliable connection of the semiconductor elements. .

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) A first embodiment of the present invention is a semiconductor element mounting substrate 4 on which a semiconductor element IC having bumps B is mounted. FIG. 1A is a diagram showing a semiconductor element mounting substrate 4 according to the first embodiment of the present invention. Electrode terminals 1 are formed on the surface of the semiconductor element mounting substrate 4 so as to sandwich the conductive particles r between them and the bumps B of the semiconductor element IC for electrical conduction. An insulating film 2 is formed on the electrode terminal 1 so as to expose the center and cover both ends, and an ITO layer 3 is further formed on the electrode terminal 1 and the insulating film 2. The semiconductor element mounting substrate 4 is a glass transparent substrate, but may be another substrate such as a flexible substrate.

The electrode terminal 1 is constructed so that two layers, in which the lower layer 1a and the uppermost layer 1c are laminated in this order, protrude from the semiconductor element mounting substrate 4 side, and the uppermost layer 1c is the lower layer 1.
Hardness is higher than a. Specifically, the uppermost layer 1c is titanium (Ti), the lower layer 1a is aluminum (Al), and is formed by a method such as photolithography and plating. The material of the electrode terminal 1 is not limited to such a material, and may be any conductive material having a higher hardness in the uppermost layer 1c than in the lower layer 1a. Note that the electrode terminal 1 of the present embodiment has a two-layer structure in which the lower layer 1a is one layer and the uppermost layer 1c is one layer, but a structure in which the lower layer is two layers or more and the uppermost layer is one layer or more is three layers or more. good.
When there are two or more lower layers, it is sufficient that the uppermost layer has a hardness higher than that of at least one of the lower layers. Further, the materials for the uppermost layer and the lower layer are not limited to titanium and aluminum, but other materials such as nickel (Ni) and aluminum (Al), high-purity gold (Au) and low-purity gold (Au) may be used. good.

Next, a method of mounting the semiconductor element IC on the semiconductor element mounting substrate 4 of the present embodiment will be described. FIG. 1B is a diagram showing a state in which the semiconductor element IC is mounted on the semiconductor element mounting substrate 4 of the present embodiment via the anisotropic conductive film 8. On the back surface of the semiconductor element IC, a large number of bumps B, which are protruding electrodes, are formed along the outer periphery. When mounting the semiconductor element IC, the anisotropic conductive film 8 containing the conductive particles r is arranged (temporarily adhered) on the electrode terminal 1 of the semiconductor element mounting substrate 4, and the bump B of the semiconductor element IC is mounted. Aligns the semiconductor element IC so as to correspond to the electrode terminal 1 of the semiconductor element mounting substrate 4, and then pressurizes (thermocompression-bonds) while heating with the crimping tools S1 and S2 to form the semiconductor element IC as a semiconductor. It is mounted on the element mounting substrate 4. Conductive particles r are sandwiched between the electrode terminals 1 and the bumps B, and conduction is achieved through the conductive particles r. The anisotropic conductive film 8 is a paste or film having conductive particles r dispersed in an insulating adhesive, having conductivity in the thickness direction (connection direction), and insulating in the plane direction (lateral direction). It is the adhesive 8 in the shape of a circle. The conductive particles r may be nickel particles, resin particles plated with gold, or other particles. The adhesive is not limited to a thermosetting resin such as an epoxy resin, but a thermoplastic resin may be used.

When sandwiched by the crimping tools S1 and S2,
Since the uppermost layer 1c of the electrode terminal 1 has higher hardness than the lower layer 1a, the conductive particles r sandwiched between the protruding electrode (bumps) B and the electrode terminal 1 may be buried too much in the uppermost layer 1c. It is easy to be crushed without. That is, the force (compression force) applied to the conductive particles r by the amount that the buried amount of the conductive particles r is reduced.
As a result, the probability of crushing the conductive particles r that could not be completely crushed due to insufficient pressurization (not reaching) increases. For this reason, a conduction failure does not occur during the initial conduction inspection, but a conduction failure due to a change in the shape of the electrode terminal 1 over time is less likely to occur. In addition, a situation in which a concave portion is formed on the surface of the bump B, the heights of the bump B1 and the bump B2 vary, and the thickness of the semiconductor element IC is not uniform (in addition, the bump B and the conductive particles r Or, even if foreign matter is mixed between the conductive particles r and the electrode terminal 1), when pressed by the pressure bonding tool S2 from above, the lower layer 1a has a lower hardness than the uppermost layer 1c, It is possible to absorb the unevenness in the surface of the bump B, the variation in the height, and the uneven thickness of the semiconductor element IC. Therefore, the reliability of conduction between the electrode terminal 1 and the bump B can be improved.

(Second Embodiment) In the second embodiment of the present invention, the electrode terminals 1 formed on the surface of the semiconductor element mounting substrate 4 are the lowest in order from the semiconductor element mounting substrate 4 side. The layer 1a, the inner layer 1b, and the uppermost layer 1c are configured to project in three laminated layers, and the uppermost layer 1c and the lowermost layer 1a have higher hardness than the inner layer 1b. Specifically, the uppermost layer 1c and the lowermost layer 1a are made of titanium (T
i), and the inner layer 1b is aluminum (Al).
The semiconductor element mounting substrate 4 is a transparent substrate made of glass, but may be made of another material such as plastic resin as long as it is a transparent substrate.

The electrode terminal 1 of the present embodiment is the electrode terminal 1
Is T, and the thickness of the inner layer 1b is t, the electrode terminal 1
If the number of layers in is a, then t ≦ 3 T / a is satisfied. Since the number of layers of the electrode terminal 1 of the present embodiment is three, a = 3.

Here, the electrode terminal 1 of the present embodiment has a three-layer structure in which the lowermost layer 1a, the inner layer 1b, and the uppermost layer 1c are each one layer, but the lowermost layer 1a and the uppermost layer 1c are inner layers. If the hardness is higher than at least one layer of 1b,
The inner layer 1c has two or more layers, and the lowest layer 1a and the highest layer 1c
May have a structure of four layers or more, each having one layer. Also, FIG.
, The transparent electrode layer (I
TO) may be formed.

FIG. 2B is a view showing a state in which the semiconductor element IC is mounted on the semiconductor element mounting substrate 4 of this embodiment. Since the uppermost layer 1c and the lowermost layer 1a of the electrode terminal 1 have higher hardness than the inner layer 1b, the conductive particles r sandwiched between the protruding electrode B and the electrode terminal 1 are not too buried in the uppermost layer 1c. It is easily crushed. That is, since the amount of buried conductive particles r is reduced, the force applied to the conductive particles r is increased, and thus the conductive particles r that have not been crushed up to now can be obtained.
There is a high probability that it will collapse. Further, the bumps B have irregularities (there are irregularities on the bump surface and the electrode terminal surface, which deform by about 1 to 2 μm in height due to thermocompression bonding. The concave portions are also called craters), or bumps B1 and bumps. B
Even if the height of 2 is uneven or the thickness of the semiconductor element IC is not uniform, the inner layer 1b is lower in hardness than the lowermost layer 1a and the uppermost layer 1c. Will be absorbed in. Therefore, the reliability of conduction between the electrode terminal 1 and the bump B can be improved. Since the lowermost layer 1c has a high hardness, indentations of the conductive particles r are likely to appear. Further, since it becomes easy to recognize the indentation of the conductive particle r from the back side of the transparent semiconductor element mounting substrate 4, the conductive particle r
It becomes easier to conduct the continuity inspection by the indentation and the inspection accuracy can be improved.

Furthermore, the thickness t of the inner layer 1b is t≤3T / a.
If the semiconductor element IC is placed and pressed from the upper side, the pressing force is not excessively absorbed by the inner layer by satisfying the above condition. Therefore, since an appropriate pressing force is applied to the conductive particles r, the conductive particles r are more likely to be crushed, and the pressing force is more easily transmitted to the lowermost layer 1a, so that an indentation of the conductive particles r appears on the lowermost layer 1a. Easier to do.

(Application Example of Second Embodiment) As an application example of the second embodiment, a semiconductor element mounting substrate 4 on which an electrode terminal 1 having a four-layer structure is formed will be described. FIG. 3 is a diagram showing a semiconductor element mounting substrate 4 of an application example of the present embodiment. Semiconductor element mounting substrate 4 of an application example of the present embodiment
The electrode terminals 1 are, in order from the semiconductor element mounting substrate 4 side, the lowest layer 1a, the lower inner layer 1b1, and the upper inner layer 1b.
It has a four-layer structure in which 2 and the uppermost layer 1c are laminated, and the lowermost layer 1a and the uppermost layer 1c are two inner layers 1b.
Hardness is higher than 1, 1b2. Specifically, the lowermost layer 1c and the uppermost layer 1a are titanium (Ti),
The lower inner layer 1b1 is nickel (Ni), and the upper inner layer 1b2 is aluminum (Al). In the application example of the present embodiment, the lowermost layer 1a and the uppermost layer 1c have higher hardness than any of the inner layers 1b1 and 1b2.
It is sufficient that the hardness is higher than that of at least one of the inner layers 1b1 and 1b2.

(Third Embodiment) A semiconductor element IC according to a third embodiment of the present invention is a semiconductor element IC mounted on a semiconductor element mounting substrate 4 on which electrode terminals 1 are formed. A bump B is formed between the terminal 1 and the conductive particle r so that the bump B is electrically conductive. Figure 4 (a)
[FIG. 7] is a diagram showing a semiconductor device IC according to a third embodiment of the present invention. On the back surface of the semiconductor element IC, a large number of bumps B, which are protruding electrodes, are formed along the outer periphery.

The bump B is composed of two layers in which a lower layer Ba and an uppermost layer Bc are laminated in this order from the semiconductor element IC side, and the uppermost layer Bc has a higher hardness than the lower layer Ba. Specifically, the uppermost layer Bc is titanium (Ti), the lower layer Ba is aluminum Al, and the bumps B are formed by a method such as photolithography and plating. The material of the bump B is not limited to such a material, and may be any conductive material in which the hardness of the uppermost layer Bc is higher than that of the lower layer Ba. The bump B of the present embodiment has a two-layer structure in which the lower layer Ba is one layer and the uppermost layer Bc is one layer.
A structure in which c is one layer or three or more layers may be used. When the lower layer Ba has two or more layers, it is sufficient that the uppermost layer Bc has a higher hardness than at least one of the lower layers Ba. Further, the materials of the uppermost layer Bc and the lower layer Ba are not limited to titanium and aluminum, but gold (Au) with high purity and gold (Au) with low purity,
Other materials such as nickel (Ni) and aluminum may be used.

Next, a method of mounting the semiconductor element IC having the bumps B of the present embodiment on the semiconductor element mounting substrate 4 will be described. FIG. 4B is a diagram showing a state in which the semiconductor element IC of this embodiment is mounted on the semiconductor element mounting substrate 4. Since the uppermost layer Bc of the bump B has a higher hardness than the lower layer Ba, the conductive particles r sandwiched between the protruding electrode B and the electrode terminal 1 are not easily buried in the uppermost layer Bc and are easily crushed. In addition, even if the surface of the bump B has a concave portion, the heights of the bumps B1 and B2 vary, and the thickness of the semiconductor element IC is uneven, the lower layer Ba is harder than the uppermost layer Bc. Since it is low and easily crushed, it is possible to absorb the unevenness of the surface of the bump B, the variation of the height, the unevenness of the thickness of the semiconductor element IC, and the like.

(Fourth Embodiment) The semiconductor element mounting substrate or the semiconductor element of the present embodiment is the same as the semiconductor element mounting substrate 4 of the first embodiment or the second embodiment.
Alternatively, the semiconductor element IC according to the third embodiment,
The conductive particles r are conductive particles r obtained by plating a resin with gold. Since the uppermost layer 1c of the electrode terminal 1 formed on the semiconductor element mounting substrate 4 is titanium and has a hardness higher than that of the conductive particles r, the conductive particles r are not easily buried in the uppermost layer 1c and are easily crushed. (See FIG. 1 (b) and FIG. 2 (b)). Moreover, since the uppermost layer Bc of the bump B formed in the semiconductor element IC of the third embodiment is titanium and has a hardness higher than that of the conductive particle r, the conductive particle r is not included in the bump B.
It is easy to be crushed without being buried too much in the uppermost layer Bc (see FIG. 4B).

(Application Example to Liquid Crystal Display Device) As a specific example, a case where the semiconductor element mounting substrate 4 of the present invention or the semiconductor element IC of the present invention is applied to a COG mounted liquid crystal display device will be described below. . FIG. 5 is a diagram showing a COG-mounted liquid crystal display device. The liquid crystal panel LCD is a reflective liquid crystal display device LCD using a TFT which is a typical active element currently used.

One substrate (one substrate: also referred to as an AM substrate or an array substrate) 4 of the liquid crystal panel LCD is larger than the other substrate 5, and therefore when both substrates 4 and 5 are superposed, A mounting region 6 of the semiconductor element IC, which partially projects over the periphery, is formed. This AM board 4
A wiring pattern 7 for semiconductor mounting is formed in the mounting area 6 of FIG. The AM substrate 4 may be a flexible substrate made of synthetic resin, instead of the glass substrate.

In the semiconductor element IC of this embodiment, the anisotropic conductive film 8 containing the conductive particles r is provided in the mounting region 6 of the AM substrate 4.
Has been implemented through. On the back surface side of the semiconductor element IC, a large number of bumps B are formed facing each other along the outer periphery.

At the end of the wiring pattern 7, the semiconductor element I
The electrode terminal 1 connected to C is patterned. The electrode terminal 1 on one side (left side in FIG. 5) is an input electrode, and the electrode terminal 1 on the other side (right side in FIG. 5) is an output electrode. Then, a semiconductor element IC for driving the liquid crystal panel LCD
Is an anisotropic conductive film (AC containing conductive particles r in the adhesive).
F) It is implemented via 8.

When the semiconductor element mounting substrate 4 of the present invention is applied to such a liquid crystal panel LCD, it is used as the AM substrate 4. That is, the conventional electrode terminal 1 in the mounting area 5 is used as the electrode terminal 1 in the above-described embodiment. When the semiconductor element IC of the present invention is applied, it is used as the semiconductor element IC arranged in the mounting region 5. That is, the bumps B of the semiconductor element IC arranged in the mounting area 5 are the bumps B of the above-described embodiment. The semiconductor element mounting substrate 4 on which the electrode terminals 1 of the present invention are formed and the semiconductor element IC on which the bumps B of the present invention are formed may be applied simultaneously to the liquid crystal display panel LCD, or only one of them may be applied. May be.

In the application example of the present invention, the COG-mounted liquid crystal display device has been described as an example, but the invention is also applied to a COF-mounted liquid crystal display device in which a semiconductor element is mounted on a flexible substrate via an adhesive, and other electronic devices. It is possible.

[0049]

As described above, according to the present invention,
Since the uppermost layer and the lowermost layer have hardness higher than that of at least one inner layer, when the semiconductor element is placed and pressed, the conductive particles sandwiched between the protruding electrode and the electrode terminal in the uppermost layer having high hardness. Is not buried too much and is easily crushed, and at least one inner layer having a low hardness can absorb the recesses on the surface of the bump or the semiconductor element and the variations in height.
Since the connection part with the conductive particles is a layer of high hardness, conduction failure due to the change with time of the connection part is unlikely to occur.
According to the semiconductor element mounting substrate of the present invention or the semiconductor element of the present invention, it is possible to enhance the reliability of conduction between the bump and the electrode terminal. Further, since the lowest layer has a high hardness, it is possible to easily make the indentations of the conductive particles appear. Therefore, the indentations of the conductive particles can be easily recognized from the back side of the semiconductor element mounting substrate, so that the continuity inspection by the indentations of the conductive particles can be easily performed and the inspection accuracy can be improved.

[0050]

[Brief description of drawings]

FIG. 1A is a diagram showing a semiconductor element mounting substrate according to a first embodiment, and FIG. 1B is a diagram showing a state in which a semiconductor element is mounted on the semiconductor element mounting substrate.

2A is a diagram showing a semiconductor element mounting substrate according to a second embodiment, and FIG. 2B is a diagram showing a state in which a semiconductor element is mounted on the semiconductor element mounting substrate.

3A is a diagram showing a semiconductor element mounting substrate of an application example of the second embodiment, and FIG. 3B is a diagram showing a state in which a semiconductor element is mounted on the semiconductor element mounting substrate.

FIG. 4A is a diagram showing a semiconductor element according to a third embodiment, and FIG. 4B is a diagram showing the semiconductor element mounted on a semiconductor element mounting substrate.

FIG. 5 is a diagram showing a semiconductor element mounting substrate of the present invention and a liquid crystal display panel to which the semiconductor element is applied.

FIG. 6 is a diagram showing a state in which a semiconductor element is mounted face down on a semiconductor element mounting substrate.

FIG. 7 is a diagram showing a state in which conductive particles are buried in electrode terminals and are not crushed.

8A is a state in which the surface of the bump is concave, FIG. 8B is a state in which the heights of a plurality of bumps have variations, and FIG. 8C is a state in which the thickness of the semiconductor element is uneven. Figure

[Explanation of symbols]

IC, IC1 Semiconductor element 1, 11 Electrode terminal 1a Lower layer of electrode terminal, lowest layer 1b Inner layer of electrode terminal 1c Uppermost layer of electrode terminal 2 Insulation film 3 ITO 4, 14 Semiconductor element mounting substrate, one substrate ( AM substrate) 5 Other substrate 6 Mounting area 7 Wiring pattern 8 Anisotropic conductive film r Conductive particles B, 1B bump Ba Lower layer Bc of bump Uppermost layer t of bump T Inner layer thickness of electrode terminal T Electrode terminal thickness LCD LCD display panel

Continued front page    (72) Inventor Hikaru Fujita             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F term (reference) 2H092 GA42 GA48 GA55 HA19 HA20                       HA25 NA11                 5F044 KK06 KK13 LL09

Claims (8)

[Claims] 1. A substrate for mounting a semiconductor element, wherein a semiconductor element having bumps is mounted via an anisotropic conductive film containing conductive particles, and electrode terminals for sandwiching the conductive particles with the bumps are formed on the surface. The electrode terminal is composed of a plurality of layers in which one or more lower layers and the uppermost layer are laminated in this order from the semiconductor element mounting substrate side, and the uppermost layer has a higher hardness than at least one lower layer. A substrate for mounting a semiconductor element, comprising: 2. A semiconductor element having bumps is mounted via an anisotropic conductive film containing conductive particles, and electrode terminals for sandwiching the conductive particles with the bumps for electrical conduction are formed on the surface thereof. In a semiconductor element mounting substrate made of a transparent substrate through which the electrode terminals can be seen from the back side, the electrode terminals are formed by laminating a lowest layer, one or more inner layers, and a top layer in this order from the semiconductor element mounting substrate side. A substrate for semiconductor mounting, comprising a plurality of layers, wherein the uppermost layer and the lowermost layer have higher hardness than at least one inner layer. 3. When the thickness of the electrode terminal is T, the thickness of the one or more inner layers is t, and the number of electrode terminal layers is a, then t ≦ 3 T / a is satisfied. A substrate for mounting a semiconductor element as described above. 4. The substrate for mounting a semiconductor element according to claim 1, wherein the hardness of the uppermost layer of the electrode terminal is higher than the hardness of the conductive particles. 5. A liquid crystal display panel in which liquid crystal is sandwiched between a pair of substrates, wherein one side substrate of the pair of substrates is the semiconductor element mounting substrate according to any one of claims 1 to 4. LCD display panel. 6. A bump, which is mounted on a semiconductor element mounting substrate having an electrode terminal formed on the surface thereof through an anisotropic conductive film containing conductive particles, holds conductive particles between the electrode terminals to conduct electricity. In the formed semiconductor element, the bump is composed of a plurality of layers in which one or more lower layers and the uppermost layer are stacked in order from the semiconductor element side, and the uppermost layer is at least one lower layer of the lower layers. A semiconductor element characterized by having a higher hardness than. 7. The semiconductor device according to claim 6, wherein the hardness of the uppermost layer of the bump is higher than the hardness of the conductive particles. 8. A liquid crystal display panel in which liquid crystal is sandwiched between a pair of substrates, wherein the semiconductor element according to claim 6 or 7 is mounted on one side of the pair of substrates. Liquid crystal display panel.