JP2003258089A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device whose continuity defect between wires in a connection hole can be suppressed and a method for manufacturing the same. <P>SOLUTION: The method for manufacturing the semiconductor device secures an excellent electric connection between an Al alloy film and a barrier metal film by preventing a Ti film 4 for adhesion from being etched by peeling liquid by: forming the barrier metal film 2 on an insulating film 1; forming the Al alloy film 3 thereupon; forming the TiN film 5 for the barrier metal thereupon; patterning them to form a 1st Al alloy wire 6; forming an inter-layer insulating film 7 after forming a TiN film 10 as a barrier film for the resist peeling liquid on the sidewall of the Al alloy wire 6; forming a via hole positioned on the Al alloy wire 6 on the inter-layer insulating film; and peeling the resist pattern by the peeling liquid. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device and a method of manufacturing the same which can suppress the occurrence of defective conduction between wirings in a connection hole.

[0002]

2. Description of the Related Art FIGS. 7A and 7B are sectional views showing a conventional method for manufacturing a semiconductor device. First, as shown in FIG. 7A, an insulating film 101 is formed above a silicon substrate (not shown). Then, T is formed on the insulating film 101.
An iN film 102 is deposited and Al is deposited on the TiN film 102.
The alloy film 103 is deposited. Then, this Al alloy film 10
3, an adhesive film 104 is deposited on top of this, and a TiN film 105 for barrier metal is deposited on it. Then, the insulating film 1 is formed by patterning the quadruple film stacked in four layers.
A first Al alloy wiring 106 is formed on 01.

Next, an interlayer insulating film 107 made of a silicon oxide film or the like is deposited on the first Al alloy wiring 106. Next, a photoresist film is applied on the interlayer insulating film 107, and the photoresist film is exposed and developed to form an opening above the first Al alloy wiring 106 on the interlayer insulating film 107. Resist pattern 1
08 is formed. Then, this resist pattern 10
The interlayer insulating film 107 is etched by using 8 as a mask.
As a result, a via hole 107a located on the first Al alloy wiring 106 is formed in the interlayer insulating film 107.

After that, as shown in FIG. 7B, the resist pattern 108 is stripped by a stripping solution. An organic stripping solution (amine type) is used as this stripping solution. Next, a TiN film (not shown) is deposited in the via hole 107a and on the interlayer insulating film 107, and an Al alloy film is deposited on this TiN film. Next, by patterning the Al alloy film and the TiN film, the second Al alloy wiring 109 is formed in the interlayer insulating film 107, and the second Al alloy wiring 1 is formed.
09 is electrically connected to the first Al alloy wiring 106.

[0005]

By the way, in the conventional method of manufacturing a semiconductor device described above, as shown in FIG.
The opening of the resist pattern 108 may be displaced from the position of the first Al alloy wiring 106, and the interlayer insulating film 107 is etched using this resist pattern as a mask to form a via hole 107a. Then, beer hole 1
In 07a, the side wall of the first Al alloy wiring 106 is exposed. Therefore, the adhesive film 104 on the first Al alloy wiring 106 is etched by the stripping liquid used for stripping the resist pattern 108, and the Al alloy film 1 is formed.
03 and a TiN film for barrier metal 105 are provided with a gap. As a result, a conduction failure may occur between the first Al alloy wiring 106 and the second Al alloy wiring 109.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor device and a method of manufacturing the same capable of suppressing the occurrence of conduction failure between wirings in a connection hole. is there.

[0007]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention comprises a step of forming a first barrier metal film on an insulating film, and a conductive process on the first barrier metal film. A step of forming a film, a step of forming an adhesive film on the conductive film, a step of forming a second barrier metal film on the adhesive film, a second barrier metal film, an adhesive film, a conductive film and a first film. A step of forming a wiring on the insulating film by patterning the barrier metal film, a step of forming a side barrier film against the peeling liquid described later on the side wall of the wiring, and a step of forming a side barrier film on the wiring, the side barrier film and the insulating film. The step of forming an interlayer insulating film, the step of forming a resist film on this interlayer insulating film, and the step of etching the interlayer insulating film using this resist film as a mask, thereby contacting the interlayer insulating film on the wiring. A step of forming a hole, characterized by comprising a step of peeling the separation liquid resist film.

According to the above method of manufacturing a semiconductor device, the side barrier film against the stripping solution is formed on the side wall of the wiring. Therefore, even if the connection hole is misaligned with the wiring and the side surface of the wiring is exposed, it is possible to prevent the adhesive film from being etched by the resist film peeling liquid.
As a result, it is possible to prevent a gap from being formed between the conductive film and the barrier metal film. Therefore, it is possible to suppress the occurrence of conduction failure between the wiring and the upper wiring regardless of the alignment of the connection hole.

In the method of manufacturing a semiconductor device according to the present invention, in the step of forming the wiring, a resist film is applied on the second barrier metal film, and the resist film is exposed and developed to form a second film. In the step of forming a wiring on the insulating film by forming a resist pattern on the barrier metal film and etching the second barrier metal film, the adhesive film, the conductive film and the first barrier metal film using the resist pattern as a mask. Preferably there is.

Further, the method for manufacturing a semiconductor device according to the present invention can further include a step of forming an upper layer wiring in the connection hole and on the interlayer insulating film after the peeling step.

Further, in the method of manufacturing a semiconductor device according to the present invention, after the peeling step, a W film is deposited in the connection hole and on the interlayer insulating film, and the W film is etched back or CMP polished. Accordingly, it is possible to further include the step of embedding the W plug in the connection hole.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming an upper layer wiring electrically connected to the W plug on the W plug and the interlayer insulating film after the embedding step. Can be further included.

Further, in the method of manufacturing a semiconductor device according to the present invention, it is preferable that the stripping liquid has corrosiveness with respect to Ti. However, Ti of the stripping solution
It is preferable that the corrosiveness to is as weak as possible.

In the method of manufacturing a semiconductor device according to the present invention, it is preferable that the barrier metal film is a TiN film and the adhesive film is a Ti film.

A semiconductor device according to the present invention is a wiring formed on an insulating film, and includes a first barrier metal film, a conductive film formed on the first barrier metal film, an adhesive film formed on the first barrier metal film, and an adhesive film formed thereon. A wiring made of a barrier metal film formed, a side barrier film against the resist stripping liquid formed on the side wall of the wiring, an interlayer insulating film formed on the wiring, the side barrier film and the insulating film, and the interlayer And a connection hole formed in the insulating film and located on the wiring.

The semiconductor device according to the present invention can further include an upper layer wiring formed in the connection hole and on the interlayer insulating film.

Further, the semiconductor device according to the present invention may further include a W plug embedded in the connection hole.

Further, in the semiconductor device according to the present invention, the W plug and the interlayer insulating film are formed on the W plug and the W insulating film.
It is also possible to further include an upper layer wiring electrically connected to the plug.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment according to the present invention.
3 is a cross-sectional view showing the semiconductor device according to the embodiment of FIG.

As shown in FIG. 1, an insulating film 1 is formed above a silicon substrate (not shown). A first Al alloy wiring 6 is formed on the insulating film 1. The first Al alloy wiring 6 has a structure in which a TiN film 2, an Al alloy film 3, a Ti film 4 for adhesion, and a TiN film 5 for barrier metal are stacked from the bottom. A TiN film 10 is formed on the side wall of the first Al alloy wiring 6 as a side barrier film against the resist pattern stripping solution. First A
An interlayer insulating film 7 is formed on the entire surface including the l-alloy wiring 6, and a via hole located on the first Al alloy wiring 6 is formed in the interlayer insulating film 7.

Second Al alloy wirings 9a and 9b are formed in the via hole and on the interlayer insulating film 7. The second Al alloy wirings 9a and 9b have a structure in which a TiN film 8, an Al alloy film 11, a Ti film 12 for adhesion, and a TiN film 13 for barrier metal are stacked from the bottom. Second Al
On the side walls of the alloy wirings 9a and 9b, a TiN film 14 is formed as a side barrier film against the resist pattern stripping solution. An interlayer insulating film 17 is formed on the entire surface including the second Al alloy wirings 9a and 9b, and a via hole located on the second Al alloy wiring 9b is formed in the interlayer insulating film 17.

A third Al alloy wiring 25 is formed in the via hole and on the interlayer insulating film 17. The third Al alloy wiring 25 includes a TiN film 21, an Al alloy film 22,
The Ti film 23 for adhesion and the TiN film 24 for barrier metal are laminated from the bottom.

2 to 4 are sectional views showing a method of manufacturing the semiconductor device shown in FIG. First, as shown in FIG. 2A, an insulating film 1 made of a silicon oxide film or the like is formed on a silicon substrate (not shown) by CVD (Chemical Vapor Depo).
sition) method. Then, a TiN film 2 having a thickness of about 5 to 50 nm is deposited on the insulating film 1 by sputtering, and a thickness of 300 to 90 is formed on the TiN film 2.
An Al alloy film 3 of about 0 nm is deposited by sputtering.

Then, a thickness of 10 is formed on the Al alloy film 3.
A Ti film 4 for adhesion having a thickness of about 40 nm is deposited by sputtering, and a thickness of 30-80 n is deposited on the Ti film 4 for adhesion.
A TiN film 5 for barrier metal having a thickness of about m is deposited by sputtering. Then, the TiN film 5 for barrier metal, the Ti film 4 for adhesion, the Al alloy film 3 and the TiN film 2 are patterned to form the first Al alloy wiring 6 on the insulating film 1. The wiring width of the first Al alloy wiring 6 is about 0.2 to 0.3 μm.

Thereafter, as shown in FIG. 2B, a thickness of 50 to 100 n is formed on the first Al alloy wiring 6 and the insulating film 1.
A TiN film 10 of about m is deposited by sputtering.

Next, as shown in FIG. 2C, this Ti
By etching back the N film 10, the TiN film 10 is left on the side wall of the first Al alloy wiring 6.

Thereafter, as shown in FIG. 3D, an interlayer insulating film 7 made of a silicon oxide film or the like is deposited on the entire surface including the first Al alloy wiring 6 by the CVD method. Then
By applying a photoresist film on the interlayer insulating film 7 and exposing and developing the photoresist film, a resist having an opening above the first Al alloy wiring 6 is formed on the interlayer insulating film 7. The pattern 18 is formed. Then
The interlayer insulating film 7 is formed by using the resist pattern 18 as a mask.
To etch. As a result, the first interlayer insulating film 7
A via hole 7a located on the Al alloy wiring 6 is formed.

Next, as shown in FIG. 3E, the resist pattern 18 is removed with a stripping solution (Ti) such as an organic resist stripping solution.
It is peeled with a peeling liquid that is corrosive to. At this time, since the TiN film 10 is formed on the side wall of the first Al alloy wiring 6, it is possible to prevent the Ti film 4 for adhesion from being etched by the stripping solution, and as a result, It is possible to prevent a gap from being formed between the barrier metal TiN film 5.

Next, a TiN film 8 is deposited by sputtering in the via hole 7a and on the interlayer insulating film 7, and an Al alloy film 11 is deposited on this TiN film 8 by sputtering. Then, a Ti film 12 for adhesion is deposited on the Al alloy film 11 by sputtering, and a TiN film 13 for barrier metal is deposited on the Ti film 12 for adhesion by sputtering.

After that, as shown in FIG. 4F, the TiN film 13 for barrier metal, the Ti film 12 for adhesion, the Al alloy film 11 and the TiN film 8 are patterned to form a layer on the interlayer insulating film 7. Second Al alloy wirings 9a and 9b are formed, and the second Al alloy wiring 9a is electrically connected to the first Al alloy wiring 6.

Next, a TiN film 14 is deposited on the second Al alloy wirings 9a and 9b and the interlayer insulating film 7 by sputtering. Then, by etching back the TiN film 14, the TiN film 14 is left on the sidewalls of the second Al alloy wirings 9a and 9b.

Thereafter, as shown in FIG. 4G, an interlayer insulating film 17 made of a silicon oxide film or the like is deposited on the entire surface including the second Al alloy wirings 9a and 9b by the CVD method. Then, a photoresist film (not shown) is applied on the interlayer insulating film 17, and the photoresist film is exposed and developed to form a second film on the interlayer insulating film 17.
A resist pattern having an opening is formed above the Al alloy wiring 9b. Then, the interlayer insulating film 17 is etched using this resist pattern as a mask. As a result, a via hole 17a located on the second Al alloy wiring 9b is formed in the interlayer insulating film 17.

Next, as shown in FIG. 4 (g), the resist pattern is stripped with a stripping solution. At this time, the second Al
Since the TiN film 14 is formed on the side wall of the alloy wiring 9b, it is possible to prevent the adhesive Ti film 12 from being etched by the stripping solution, and as a result, the Al alloy film 11 and the barrier metal TiN film 13 are formed. It is possible to prevent a gap from being formed between them.

According to the first embodiment, the first A
A TiN film 10 is formed on the side wall of the 1-alloy wiring 6 as a side barrier film against the stripping solution. Therefore, in FIG.
Even if the via hole 7a is misaligned with the first Al alloy wiring 6 and the side surface of the Al alloy wiring 6 is exposed in the step shown in (d), the adhesive Ti film 4 is etched by the stripping solution of the resist pattern 18. It can be prevented. As a result, Al alloy film 3 and TiN for barrier metal
It is possible to prevent a gap from being formed between the membrane 5 and the membrane 5. Therefore,
No. 1 regardless of whether the via hole alignment is good or bad
It is possible to prevent poor conduction between the Al alloy wiring 6 and the second Al alloy wiring 9a, and it is possible to obtain sufficient electrical connection. Therefore, the yield can be improved and the reliability of the semiconductor device can be improved.

FIGS. 5A to 5C and 6D,
(E) is a sectional view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention, the same parts as those in FIGS. 1 to 4 are designated by the same reference numerals, and only different parts will be described. .

As shown in FIG. 5 (a), after removing the resist pattern (not shown) with a stripping solution, FIG.
As shown in, the W film 26 is deposited by sputtering in the via hole 7a and on the interlayer insulating film 7.

Then, as shown in FIG. 5C, the W film 2
6 is etched back or CMP (Chemical Mechanical Pol
polishing). As a result, the W film 26 existing on the interlayer insulating film 7 is removed, and the W film 2 is formed in the via hole 7a.
6 is buried, and the W plug 26a is formed in the via hole 7a.

Then, the W plug 26a and the interlayer insulating film 7 are formed.
A TiN film 8 is deposited on the TiN film 8 by sputtering, and an Al alloy film 11 is deposited on the TiN film 8 by sputtering. Then, a Ti film 12 for adhesion is deposited on the Al alloy film 11 by sputtering, and a TiN film 13 for barrier metal is deposited on the Ti film 12 for adhesion by sputtering.

Thereafter, as shown in FIG. 6D, the TiN film 13 for barrier metal, the Ti film 12 for adhesion, the Al alloy film 11 and the TiN film 8 are patterned to form a layer on the interlayer insulating film 7. Second Al alloy wirings 9a and 9b are formed, and the second Al alloy wiring 9a is electrically connected to the first Al alloy wiring 6 through the W plug 26a.

Next, a TiN film 14 is deposited on the second Al alloy wirings 9a and 9b and the interlayer insulating film 7 by sputtering. Then, by etching back the TiN film 14, the TiN film 14 is left on the sidewalls of the second Al alloy wirings 9a and 9b.

Thereafter, as shown in FIG. 6E, an interlayer insulating film 17 made of a silicon oxide film or the like is deposited on the entire surface including the second Al alloy wirings 9a and 9b by the CVD method. Then, a photoresist film (not shown) is applied on the interlayer insulating film 17, and the photoresist film is exposed and developed to form a second film on the interlayer insulating film 17.
A resist pattern having an opening is formed above the Al alloy wiring 9b. Then, the interlayer insulating film 17 is etched using this resist pattern as a mask. As a result, a via hole 17a located on the second Al alloy wiring 9b is formed in the interlayer insulating film 17. Next, the resist pattern is stripped with a stripping solution.

Then, a W film is deposited in the via hole 17a and on the interlayer insulating film 17 by sputtering. Next, this W film is polished by etch back or CMP. As a result, the W film existing on the interlayer insulating film 17 is removed, the W film is buried in the via hole 17a, and the W plug 27 is formed in the via hole 17a.

Then, the W plug 27 and the interlayer insulating film 17 are formed.
Then, a TiN film 21 is deposited on the TiN film 21 by sputtering, and an Al alloy film 22 is deposited on the TiN film 21 by sputtering. Next, a Ti film 23 for adhesion is deposited on the Al alloy film 22 by sputtering, and a TiN film 24 for barrier metal is deposited on the Ti film 23 for adhesion by sputtering. Next, the TiN film 24 for barrier metal, the Ti film 23 for adhesion, the Al alloy film 22, and the TiN film 21 are patterned to form a third Al alloy wiring 25 on the interlayer insulating film 17, and Of the Al alloy wiring 25 of the second A
It is electrically connected to the l-alloy wiring 9b.

Also in the second embodiment, the same effect as in the first embodiment can be obtained.

The present invention is not limited to the above embodiment, and can be implemented with various modifications.

[0046]

As described above, according to the present invention, the side barrier film against the stripping solution is formed on the side wall of the wiring. Therefore, it is possible to provide a semiconductor device and a method for manufacturing the same, which can suppress the occurrence of conduction failure between wirings in the connection hole.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention.

2A to 2C are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG.

3 (d) and 3 (e) show a method of manufacturing the semiconductor device shown in FIG. 1, and are cross-sectional views showing the next step of FIG. 2 (c).

4 (f) and 4 (g) show a method of manufacturing the semiconductor device shown in FIG. 1, and are cross-sectional views showing the next step of FIG. 3 (e).

5A to 5C are cross-sectional views showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

6 (d) and 6 (e) show a method for manufacturing a semiconductor device according to a second embodiment of the present invention, and are cross-sectional views showing the next step of FIG. 5 (c). .

7A and 7B are cross-sectional views showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1, 101 ... Insulating film 2, 102 ... T
iN film 3, 103 ... Al alloy film 4, 104 ... Adhesive Ti film 5, 105 ... Barrier metal TiN film 6, 106 ... First Al alloy wiring 7, 107 ... Interlayer insulating film 7a, 107a
... Via hole 8 ... TiN films 9a, 9b, 109 ... Second Al alloy wiring 10 ... TiN film 11 ... Al alloy film 12 ... Adhesive Ti film 13 ... Barrier metal TiN film 14 ... TiN film 17 ... Interlayer insulating film 18 , 108 ... Resist pattern 21 ... TiN film 22 ... Al alloy film 23 ... Adhesive T
i film 24 ... TiN film for barrier metal 25 ... Third A
l alloy wiring 26 ... W film 26a, 27 ...
W plug

Continued front page    F term (reference) 5F033 HH09 HH18 HH33 JJ01 JJ09                       JJ18 JJ19 JJ33 KK09 KK18                       KK33 MM05 MM08 MM10 MM13                       NN03 NN06 NN07 NN12 PP15                       QQ08 QQ09 QQ31 QQ37 QQ48                       RR04 SS11 XX09

Claims (12)

[Claims] 1. A step of forming a first barrier metal film on an insulating film, a step of forming a conductive film on the first barrier metal film, a step of forming an adhesive film on the conductive film, and the bonding step. A step of forming a second barrier metal film on the film, a step of forming a wiring on the insulating film by patterning the second barrier metal film, the adhesive film, the conductive film and the first barrier metal film; Forming a side barrier film against the stripping solution described later on the side wall of the wiring, a step of forming an interlayer insulating film on the wiring, the side barrier film and the insulating film, and a step of forming a resist film on the interlayer insulating film. Etching the interlayer insulating film using the resist film as a mask to form a connection hole located on the wiring in the interlayer insulating film; and removing the resist film with a remover. The method of manufacturing a semiconductor device according to claim Rukoto. 2. In the step of forming the wiring, a resist film is applied on the second barrier metal film, and the resist film is exposed and developed to form a resist pattern on the second barrier metal film. 2. The step of forming wiring on the insulating film by etching the second barrier metal film, the adhesive film, the conductive film and the first barrier metal film using the resist pattern as a mask. Manufacturing method of semiconductor device. 3. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of forming an upper wiring in the connection hole and on the interlayer insulating film after the peeling step. 4. A step of embedding a W plug in the connection hole by depositing a W film in the connection hole and on the interlayer insulating film after the step of peeling and etching back or CMP polishing the W film. The method for manufacturing a semiconductor device according to claim 1, further comprising: 5. The method according to claim 4, further comprising a step of forming an upper layer wiring electrically connected to the W plug on the W plug and the interlayer insulating film after the filling step. A method for manufacturing a semiconductor device as described above. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the stripping solution is corrosive to Ti. 7. The barrier metal film is a TiN film,
The adhesive film is a Ti film.
7. The method for manufacturing a semiconductor device according to claim 6. 8. A wiring formed on an insulating film, the first barrier metal film, a conductive film formed on the first barrier metal film, an adhesive film formed on the first barrier metal film, and a barrier metal film formed on the first barrier metal film. And a side barrier film against the resist stripping solution formed on the side wall of the wiring, an interlayer insulating film formed on the wiring, the side barrier film and the insulating film, and formed on the interlayer insulating film, A semiconductor device, comprising: a connection hole located on the wiring. 9. The semiconductor device according to claim 8, further comprising an upper layer wiring formed in the connection hole and on the interlayer insulating film. 10. The semiconductor device according to claim 8, further comprising a W plug embedded in the connection hole. 11. The semiconductor device according to claim 10, further comprising an upper layer wiring formed on the W plug and the interlayer insulating film and electrically connected to the W plug. 12. The semiconductor device according to claim 8, wherein the barrier metal film is a TiN film, and the adhesive film is a Ti film.