JPH1056022A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the manufacturing method of a highly reliable semiconductor device having a wiring part by effectively preventing the generation of migration on the wiring part formed by a metal film. SOLUTION: This manufacturing method is composed of a process in which an aluminum-based metal film 3, the first high melting point metal film 4 and a silicon oxide film 7 are successively deposited, a process in which the above- mentioned silicon oxide film 7, the first high melting point metal film 4 and an aluminum-based metal film 3 are patterned into a wiring pattern of the same shape, a process in which the wiring pattern, on which the second high melting point metal film 6 is deposited on the whole surface having a patterned wiring pattern, a process in which the second high melting point metal film, located between each wiring pattern part 10 and the wiring pattern part, is removed by etching back the second high melting point metal layer, and a process in which the second high melting point metal film, which is left between the wiring parts, is completely removed by overetching the semiconductor layer using the silicon oxide film on the wiring part as a mask.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for improving electromigration resistance and stress migration resistance (hereinafter, both migrations are collectively simply referred to as migration). The present invention relates to a method for manufacturing a semiconductor device having a reliable wiring portion.

[0002]

2. Description of the Related Art Conventionally, many techniques have been disclosed for a method of manufacturing a semiconductor device. Particularly, with the increase in the density of the semiconductor device, the width of the wiring portion of the semiconductor device is 0.5 μm.
In the case where such a thin wiring portion is formed of an aluminum-based metal material film, the migration of the upper portion of the wiring portion and the side wall portion or the upper portion of the wiring portion will be described below. Bulging part on the side wall,
Alternatively, a so-called hillock portion, a void, or the like, which is referred to as a projecting portion, occurs, causing a problem that a short circuit occurs between the wiring portions or that the wiring portion is disconnected.

As a method for solving such a problem, for example,
JP-A-5-304152, JP-A-5-12929
No. 7, Japanese Patent Application Laid-Open No. 7-235539, etc., the side surface portion of the wiring portion formed on the semiconductor layer or the side surface portion and the upper surface portion are appropriately formed of an aluminum-based metal material. A technique for solving such a problem by coating with a refractory metal film is disclosed.

[0004]

However, the above-described prior art also has the following problems. In particular, a problem found in Japanese Patent Application Laid-Open No. 5-129297 as an example of a solution to the problem will be described below with reference to FIGS.

As shown in FIG. 3A, the surface of an interlayer insulating film 2 on a semiconductor substrate 1 is, for example, Al-1% Si-0.5
% Cu film 3 and titanium nitride (Ti
N) The films 4 are sequentially deposited in this order. Next, FIG.
As shown in (1), a photoresist 5 is mounted by a photolithography process and patterned so as to form a predetermined wiring pattern.

Then, using the photoresist 5 as an etching mask, the TiN film 4 and the Al-1% S
By simultaneously etching the i-0.5% Cu film 3, the wiring portion 10 having a predetermined pattern is formed. Next, as shown in FIG.
Another TiN is formed on the entire surface of the semiconductor substrate 1 by the
A film 6 is formed.

After that, etching back is performed until the interlayer insulating film 2 which is a base layer of the TiN film 6 other than the wiring portion 10 is exposed, and Al-1% Si-0.5 as shown in FIG. % C
The structure of the wiring portion 10 whose central portion is formed by the u film 3 and whose upper surface and side walls are covered with the TiN film 6 is obtained. However, the above-described method of manufacturing the structure of the wiring portion 10 of the semiconductor device in the conventional example has the following problems.

That is, in the state shown in FIG. 3C, TiN actually existing on the underlying interlayer insulating film 2 between the wiring portions
In order to etch back the film 6 without any residue, the usual TiN
An etching time of at least 100% overetch of the etching just time of the film 6 is required. It is considered that this is because the interlayer insulating film 11 is not always flat as shown in FIG. 4, and in many cases, a step is caused by the influence of the lower wiring portion 12.

FIG. 4 shows an example of this state. As shown in the figure, when sufficient over-etching is not performed, the residue 9 of the TiN film remains between the wiring portions 10. As a result, a short circuit occurs between the wiring portions. This is true even when the interlayer is planarized using CMP or the like.

That is, in a region where the space between the wiring portions 10 is narrow and dense, the etching rate is reduced due to the microloading effect, so that an over-etch is also required. FIG. 5 shows a state in which the residue 9 of the TiN film shown in FIG. 4 has been completely removed.
In such a case, when the TiN film 6 is over-etched, not only the TiN film 6 on the Al-1% Si-0.5% Cu film 3 but also the TiN film 4 is etched. , Al-1% Si-
Since the upper surface of the 0.5% Cu film 3 is exposed, there is a problem that the resistance to migration deteriorates.

An object of the present invention is to improve the above-mentioned drawbacks of the prior art, and to cause migration of a wiring portion formed of an aluminum-based metal film in a semiconductor device, hillocks or hillocks caused by the migration. It is an object of the present invention to provide a method of manufacturing a semiconductor device having a highly reliable wiring portion in which voids are effectively prevented and a short circuit or disconnection between the wiring portions is prevented.

[0012]

SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object. That is, in the method of manufacturing a semiconductor device according to the present invention, a wiring portion made of a conductive metal is arranged at high density on a semiconductor layer, and the upper surface portion and both side surfaces of the wiring portion are made of a high melting point metal film. In the method of manufacturing a semiconductor device for forming a covered wiring portion structure, after forming a first high-melting-point metal film layer only on the upper surface of the wiring portion once,
When the entire surface of the semiconductor layer is again covered with the second high-melting point metal film layer, an insulating film is inserted between the first and second high-melting point metal film layers. A method of manufacturing a semiconductor device in which over-etching with a thickness as a margin is performed on a semiconductor substrate between the wiring portions, and more specifically,
A step of sequentially depositing a conductive metal film, a first refractory metal film, and an insulating film on the semiconductor layer in this order, by photolithography and etching, the insulating film, the first refractory metal film, and the conductive film; Patterning the metal film into a wiring pattern of the same shape, depositing a second high melting point metal film over the entire surface of the semiconductor layer having the patterned wiring pattern, etching the second high melting point metal film Backing and removing the second refractory metal film between the wiring portions and on the wiring portion, and further, using the insulating film on the wiring portion as a mask, overetching the semiconductor layer, Completely removing the second refractory metal film remaining between the wiring portions.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor device according to the present invention comprises:
Since the technical configuration as described above is employed, the wiring portion formed on the semiconductor layer is a conductive metal film, for example, an aluminum-based metal film, a first refractory metal film, and an insulating film. For example, a silicon oxide film is sequentially deposited in this order. Therefore, when etching back a second refractory metal film separately formed by covering the upper portion and the side wall portion of the wiring portion, the silicon oxide film is formed. Even if the oxide film is used as a mask and a large overetch is performed, the first refractory metal film formed on the wiring portion is not removed by etching. With the high melting point metal film on the top and side walls of the metal film completely left,
Since the wiring portion can be formed and the residue of the high melting point metal film can be prevented from being present between the wiring portions, it is possible to avoid the problem of short-circuit or disconnection between the wirings.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific example of a method for manufacturing a semiconductor device according to the present invention will be described below in detail with reference to FIGS. 1A and 1B are cross-sectional views showing the steps of a specific example of a method for manufacturing a semiconductor device according to the present invention.

That is, as shown in FIG.
If necessary, a conductive film 3 such as an aluminum-based metal film, a first refractory metal film 4, and an insulating film 7 such as a silicon oxide film are formed on the surface of the interlayer insulating film 2 if necessary. The layers are sequentially deposited. Next, as shown in FIG. 1B, after a photoresist 5 is formed on the entire surface of the semiconductor layer, the photoresist 5 is patterned into a predetermined wiring pattern by a photolithography process. Using the photoresist 5 as an etching mask, the silicon oxide film 7, the first refractory metal film 4, and the aluminum-based metal film 3 are simultaneously etched to form a wiring pattern 10 having the same shape.
Is patterned.

Thereafter, the photoresist 5 is stripped and removed by a normal stripping process. In addition, such etching is
First, a silicon oxide film 7 is formed using the photoresist 5 as a mask.
After the photoresist 5 is stripped and removed by a normal stripping step, the first refractory metal film 4 and the aluminum-based metal film 3 thereunder are patterned using the patterned silicon oxide film 7 as a mask. It may be formed by etching.

Next, as shown in FIG. 1C, another second refractory metal film 6 is formed on the entire surface of the semiconductor layer by sputtering or CVD. Then, the second refractory metal film 6 is etched back in accordance with a particularly anisotropic etching method, and the refractory metal film 6 formed on the side wall of the wiring portion 10 is left, while the refractory metal film 6 The metal film 6 is removed, and the state is shown in FIG.
It is shown in

As shown in the figure, a silicon oxide film 7 is exposed on the upper surface of a wiring portion 10 made of an aluminum-based metal film 3, and a residue of the high melting point metal film 6 is left between the wiring portions 10. Remaining. In the present invention, overetching is then performed using the silicon oxide film 7 as a mask, and the surface of the interlayer insulating film 2 is further shaved to completely remove the residue of the refractory metal film 6 and at the same time, form the wiring portion 10. The silicon oxide film 7 formed on the upper surface is also removed, and the state is shown in FIG.

According to the present invention, the central portion is constituted by the aluminum-based metal film 3 in the present invention.
The structure of the wiring section 10 whose upper surface is covered with the first refractory metal film 4 and whose side wall is covered with the second refractory metal film 6 can be formed. As the aluminum-based metal film 3 as an example of the conductive metal film used in the present invention, for example, pure aluminum, silicon-containing aluminum, copper-containing aluminum, silicon-copper-containing aluminum, or the like can be used. As the refractory metal films 4 and 6, for example, a titanium film (Ti), the above-described titanium TiN film, TiW film, W film, or TiN / Ti film can be used.

As is apparent from the above-described specific examples, in the method of manufacturing a semiconductor device according to the present invention, the wiring portions 10 made of the aluminum-based metal 3 are arranged on the semiconductor layer 1 at a high density. A method of manufacturing a semiconductor device in which a wiring portion structure in which the upper surface portion and both side surfaces of the wiring portion 10 are covered with the high melting point metal films 4 and 6 is provided. After the formation of the melting point metal film layer 4, when the entire surface of the semiconductor layer is again covered with the second high melting point metal film layer 6, silicon is interposed between the first and second high melting point metal film layers 4, 6. The oxide film 7 is inserted and interposed, and then overetching is performed on the interlayer insulating film 2 between the wiring portions 10 or the semiconductor substrate 1 with the thickness of the silicon oxide film 7 as a margin.

That is, according to the present invention, the interlayer insulating film 2 exposed at a portion between the wiring portions 10 arranged at high density is provided.
Alternatively, the necessity of leaving the refractory metal film 4 on the upper surface of the wiring portion 10 without leaving the residue of the refractory metal film 6 on the surface of the semiconductor substrate 1 has been solved. And using the silicon oxide film 7 provided between the first and second refractory metal film layers 4 and 6 as a mask,
The degree of etching the surface of the interlayer insulating film 2 or the surface of the semiconductor substrate 1 exposed in the portion between the wiring portions 10 can be adjusted by the thickness.

That is, when viewed from the wiring portion 10, when etching the surface of the interlayer insulating film 2 or the surface of the semiconductor substrate 1 exposed at the portion between the wiring portions 10, an etching margin is provided by the thickness of the silicon oxide film 7. You have it. Therefore, it is desirable to select the thickness of the silicon oxide film 7 according to the degree to which the surface of the interlayer insulating film 2 or the surface of the semiconductor substrate 1 exposed in the portion between the wiring portions 10 is etched.

The insulating film, the conductive metal film and the like used in the present invention are not particularly limited to the above-mentioned specific examples, and other materials capable of achieving the object of the present invention. It goes without saying that it can be used. Next, a more detailed embodiment of the above specific example will be described below.
That is, as shown in FIG. 1A, the surface of the interlayer insulating film 2 on the semiconductor layer 1 is coated with Al-1 by sputtering.
% Si-0.5% Cu film 3 and a first TiN film 4 as a first refractory metal film are sequentially deposited and deposited in this order, and a plasma CVD method is applied thereon. A silicon oxide film 7 was deposited at about 3000 °.

Next, as shown in FIG. 1B, the photoresist 5 was patterned into a predetermined wiring pattern by a photolithography process. Then, using the photoresist 5 as an etching mask, the silicon oxide film 7 is patterned using a fluorocarbon-based gas using an equilibrium flat plate RIE apparatus, and then the apparatus is changed, and the TiN film 4 and the Al-1 are etched with a chlorine-based gas. % Si-0.5% C
The u film 3 was etched.

In this embodiment, a silicon oxide film etching apparatus, a TiN film 4 and Al-1% Si-0.5% Cu
The etching apparatus was changed when the film 3 was etched. However, depending on the specifications of the apparatus, it is possible to perform the etching process using the same apparatus. Thereafter, the remaining photoresist 5 was stripped and removed by a normal stripping process. Next, as shown in FIG. 1C, a second TiN film as a second refractory metal film is formed on the entire surface of the semiconductor layer by sputtering.
A film 6 was formed at about 1000 °. Then, the second TiN film 6 was etched back by the thickness of the deposited film using an equilibrium flat plate RIE apparatus.

FIG. 1D shows the result. In the figure, Al
The silicon oxide film 7 is exposed on the upper surface of the wiring portion 10 made of -1% Si-0.5% Cu film 3, and the residue of the second TiN film 6 remains between the wiring portions as shown in the figure. I have. Next, FIG. 1E shows a state in which overetching is performed using the silicon oxide film 7 as a mask, and the residue of the second TiN film 6 is completely removed.

By such a processing operation, Al-1% Si-
A wiring portion 10 whose central portion is constituted by a 0.5% Cu film 3 and whose upper surface is covered with a first TiN film 4 and whose side wall is covered with a second TiN film 6. Could be formed. Note that in actual etching, the steps from FIG. 1C to FIG. 1D are a series of steps, and the semiconductor substrate is not taken out of the etching apparatus in the middle.

In this embodiment, the end detector is used to perform 100% overetching of the normal etching time of the TiN film 6. Also, Al-1%
The silicon oxide film 7 on the wiring portion 10 made of the Si-0.5% Cu film 3 does not need to be completely removed by the overetch, and the silicon oxide film 7 remains depending on the degree of the overetch. No problem.

Next, a second embodiment according to the present invention will be described with reference to FIG. That is, this specific example is shown in FIG.
As shown in FIG. 1A, a first refractory metal film 8, an aluminum-based metal film 3,
A second refractory metal film 4 'and a silicon oxide film 7 are sequentially deposited in this order. Next, as shown in FIG.
After the photoresist 5 is formed on the entire surface of the semiconductor layer, the photoresist 5 is patterned into a predetermined wiring pattern by a photolithography process. Using the photoresist 5 as an etching mask, the silicon oxide film 7, the second refractory metal film 4 ', the aluminum-based metal film 3, and the third refractory metal film 8 are simultaneously etched to have the same shape. The wiring pattern 10 is patterned.

Thereafter, the photoresist 5 is stripped and removed by a normal stripping process. In addition, such etching is
First, a silicon oxide film 7 is formed using the photoresist 5 as a mask.
After the photoresist 5 is stripped and removed by a normal stripping process, the second refractory metal film 4 'and the aluminum-based metal film 3 under the patterned silicon oxide film 7 are used as a mask. Alternatively, it may be formed by etching the third refractory metal film 8.

Then, as shown in FIG. 2C, another third refractory metal film 6 'is formed on the entire surface of the semiconductor layer by sputtering or CVD. And the third
The high melting point metal film 6 'is etched back in accordance with the anisotropic etching method, and the third high melting point metal film 6' formed on the side wall of the wiring portion 10 is left behind. To remove the high melting point metal film 6 ′.
This state is shown in FIG.

As shown in the figure, a silicon oxide film 7 is exposed on the upper surface of a wiring portion 10 made of an aluminum-based metal film 3, and a third refractory metal film 6 is provided between the wiring portions 10. 'Residue remains. In the present invention,
Overetching is performed using the silicon oxide film 7 as a mask to further remove the surface of the interlayer insulating film 2 to completely remove the residue of the third refractory metal film 6 ′,
The silicon oxide film 7 formed on the upper surface of the substrate 0 is also removed, and its state is shown in FIG.

According to the present invention, the central portion is formed by the aluminum-based metal film 3 in the present invention.
The structure of the wiring section 10 whose upper surface is covered with the second refractory metal film 4 'and whose side wall is covered with the third refractory metal film 6' can be formed. Next, a more detailed example of the second specific example according to the present invention will be described below.

That is, as shown in FIG.
On the surface of the upper interlayer insulating film 2, as a first refractory metal film 8, a TiN / Ti film (=
Laminated film 8 of about 1000/6000), Al-1% S
An i-0.5% Cu film 3 is deposited in an order of 4000 ° and a TiN film 4 ′ as a second refractory metal film is deposited in an order of 500 ° in this order, and a silicon oxide film is formed thereon by plasma CVD. 7 was deposited at about 3000 °.

Next, as shown in FIG. 2B, the photoresist 5 was patterned into a predetermined wiring pattern by a photolithography process. Then, using the photoresist 5 as an etching mask, the silicon oxide film 7 is patterned using a fluorocarbon-based gas using an equilibrium flat plate RIE apparatus, and then the apparatus is changed, and the TiN film 4 ′ and the Al— 1% Si-0.5% C
The u film 3 and the TiN / Ti film 8 were etched.

In this embodiment, a silicon oxide film etching apparatus, a TiN film 4 ', Al-1% Si-0.5% Cu
Although the etching apparatus was changed when etching the film 3 and the TiN / Ti film 8, it is possible to perform the etching process using the same apparatus depending on the specifications of the apparatus. Thereafter, the remaining photoresist 5 was stripped and removed by a normal stripping process.

Next, as shown in FIG. 2C, a TiN film 6 'was formed as a third refractory metal film at a thickness of about 1000 DEG on the entire surface of the semiconductor layer by sputtering. Then, the TiN film 6 'was etched back by the thickness of the deposited film using an equilibrium flat plate RIE apparatus. The result is shown in FIG.

In the figure, an Al-1% Si-0.5% Cu film 3
The silicon oxide film 7 is exposed on the upper surface of the wiring portion 10 made of Ti, and as shown in FIG.
Remains. Next, FIG. 2E shows a state in which overetching is performed using the silicon oxide film 7 as a mask, and residues of the TiN film 6 ′ are completely removed.

By such a processing operation, Al-1% Si-
A 0.5% Cu film 3 forms the structure of a wiring portion 10 whose central portion is formed, its upper surface is covered with a TiN film 4 ', and its side wall is covered with a TiN film 6'. I was able to do it. In actual etching, FIG.
2 to FIG. 2D are a series of steps, and the semiconductor substrate is not taken out of the etching apparatus in the middle.

In this embodiment, the end detector is used to perform 100% overetching of the normal etching time of the TiN film 6. Also, Al-1%
The silicon oxide film 7 on the wiring portion 10 made of the Si-0.5% Cu film 3 does not need to be completely removed by the overetch, and the silicon oxide film 7 remains depending on the degree of the overetch. No problem.

[0041]

As described above, in the method of manufacturing a semiconductor device according to the present invention, by using a silicon oxide film as a mask, the etch-back of a high melting point metal film can be sufficiently performed. There is no short circuit between wiring parts, and since the top and side walls of the wiring part made of aluminum-based metal film are covered with high melting point metal film, a semiconductor device with a wiring part structure that can greatly improve migration resistance is provided. You can get it.

Further, by further interposing a high-melting-point metal film at the bottom of the wiring portion of the aluminum-based metal film, the migration resistance can be further improved. Therefore, in the present invention, a highly reliable semiconductor device can be easily and inexpensively manufactured.

[Brief description of the drawings]

FIGS. 1A to 1E are cross-sectional views illustrating a procedure of a specific example of a method for manufacturing a semiconductor device according to the present invention.

FIGS. 2A to 2E are cross-sectional views illustrating the steps of another specific example of the method for manufacturing a semiconductor device according to the present invention.

3 (A) to 3 (D) are cross-sectional views showing steps in an example of a conventional method for manufacturing a semiconductor device.

FIG. 4 is a cross-sectional view for explaining a problem in a conventional method for manufacturing a semiconductor device.

FIG. 5 is a cross-sectional view for explaining a problem in a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor substrate 2 interlayer insulating film 3 aluminum-based metal film 4 first refractory metal film 4 ′ second refractory metal film 5 photoresist 6 second refractory metal film 6 ′ 3 high melting point metal film 7 ... silicon oxide film 8 ... first high melting point metal film 9 ... residue of high melting point metal film 10 ... wiring part 11 ... second interlayer insulating film 12 ... lower wiring part

Claims (6)

[Claims] 1. A wiring portion structure made of a conductive metal is disposed on a semiconductor layer at a high density, and a wiring portion structure is formed in which the upper surface and both side surfaces of the wiring portion are covered with a high melting point metal film. In the method of manufacturing a semiconductor device, once the first high-melting-point metal film layer is formed only on the upper surface of the wiring portion, when the entire surface of the semiconductor layer is again covered with the second high-melting-point metal film layer, An insulating film is inserted between the first and second refractory metal film layers, and then over-etching is performed on the semiconductor substrate between the wiring portions with the thickness of the insulating film as a margin. Manufacturing method of a semiconductor device. 2. A step of sequentially depositing a conductive metal film, a first refractory metal film, and an insulating film on a semiconductor layer in this order; Patterning the metal film and the conductive metal film into a wiring pattern of the same shape; depositing a second refractory metal film on the entire surface of the semiconductor layer having the patterned wiring pattern; A step of etching back the melting point metal film to remove the second high melting point metal film between each wiring part and on the wiring part; and further, using the insulating film on the wiring part as a mask, A step of performing over-etching to completely remove the second refractory metal film remaining between the wiring portions. 3. A step of sequentially depositing a first refractory metal film, a conductive metal film, a second refractory metal film, and an insulating film on the semiconductor layer in this order, by photolithography and etching. Patterning the film, the second refractory metal film, the conductive metal film, and the first refractory metal film into a wiring pattern of the same shape; and forming a third refractory metal film having the patterned wiring pattern. Depositing the third refractory metal film on the entire surface of the semiconductor layer, etching back the third refractory metal film to remove the third refractory metal film between each wiring portion and on the wiring portion; Using the insulating film as a mask, overetching the semiconductor layer to completely remove the third refractory metal film remaining between the wiring portions. Semiconductor device Manufacturing method. 4. The method for manufacturing a semiconductor device according to claim 1, wherein said insulating film is a silicon oxide film. 5. The method of manufacturing a semiconductor device according to claim 1, wherein said conductive metal is an aluminum-based metal. 6. An interlayer insulating film is formed between the semiconductor layer and the conductive metal film or between the semiconductor layer and the first refractory metal film. 6. The method for manufacturing a semiconductor device according to any one of claims 1 to 5.