JP2003243610A - Insulation type semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an inexpensive insulation type semiconductor device, in which a thermal stress or a thermal strain generated upon manufacturing or operating is reduced and the fear of deformation, denaturation or destruction of respective members is eliminated. <P>SOLUTION: The insulation type semiconductor device is constituted of a ceramics sheet having the thickness of 0.25-1.25 mm, a wiring metallic layer, provided on one of the main surface of the ceramics sheet and having the thickness of 0.1-2.3 mm, and a rear surface metallic layer, provided on the other main surface of the ceramics sheet and having the thickness of 0.025-2.0 mm. The wiring metallic layer and the rear surface metallic layer are constituted of a circuit substrate consisting of an aluminum alloy having the same quality and the same physical property, a semiconductor element substrate, fixed to the wiring metallic layer, and a supporting member fixed to the rear surface metallic layer. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating semiconductor device,
In particular, the present invention relates to an insulating semiconductor device using an Al wiring circuit board suitable for a power module.

[0002]

2. Description of the Related Art In an insulated semiconductor device represented by a power module, all electrodes are electrically insulated from a metal supporting member, and these electrodes are insulated from all package members including the metal supporting member by an insulating member. Be pulled out to the outside. Therefore, even in the use example in which the pair of main electrodes are floated from the ground potential on the circuit, the package can be fixed to the ground potential portion regardless of the electrode potential, so that the semiconductor device can be easily mounted.

In the insulated semiconductor device, in order to safely and stably operate the semiconductor element housed in the device, it is necessary to efficiently dissipate the heat generated during the operation of the device to the outside of the package. This heat dissipation is usually achieved by transferring heat from the semiconductor element substrate, which is a heat source, to the air through each member bonded thereto. Insulated semiconductor devices generally include an insulator, an adhesive layer used in a portion for adhering a semiconductor substrate, and a metal supporting member in the heat transfer path.

Further, as the electric power handled by a circuit including a semiconductor device becomes higher or the required reliability (stability over time, moisture resistance, heat resistance, etc.) becomes higher, complete insulation is required. The heat resistance referred to here includes not only the case where the ambient temperature of the semiconductor device rises due to an external cause but also the case where the electric power handled by the semiconductor device is large and the heat generated in the semiconductor substrate is large.

Since an insulated semiconductor device generally incorporates a certain electric circuit including a semiconductor element substrate,
It is necessary to electrically insulate at least a part of the circuit from the support member. For example, in Japanese Unexamined Patent Publication No. 9-289266 as a first prior art, a circuit pattern for mounting an electronic component is formed from an Al plate joined to one surface of a ceramic plate such as AlN or alumina, and the other is formed. There is disclosed an Al-ceramics composite substrate in which an Al plate for forming a heat radiating portion is bonded to the surface.

As a second prior art, Japanese Patent Laid-Open No. 2000-27
In Japanese Patent Publication No. 7953, a ceramic plate and a porous preform formed of SiC powder are arranged adjacent to each other, and the preform is impregnated with molten Al to manufacture an Al / SiC composite material, and at the same time, an Al / SiC composite material and a ceramic material. A circuit board is disclosed in which plates are integrally joined by molten Al and an Al circuit portion is formed on the surface of a ceramic plate.

As a third prior art, Japanese Patent Laid-Open No. 11-330
311 discloses a silicon nitride substrate having a thermal conductivity of 60 w / m · K or more, a semiconductor element mounted on this substrate, and a metal circuit board made of Cu bonded to a semiconductor element mounting surface of the substrate. , Bonded to the surface of the substrate on which semiconductor elements are not mounted,
Also disclosed is a semiconductor module including a single metal plate made of Cu that is integrally joined to a device casing or a mounting board.

[0008]

When the amount of heat generated in the semiconductor device is small and the required reliability is not so high, there is no problem in using any material as a member constituting the device. However, when a large amount of heat is generated and high reliability is required, the member to be applied must be selected.

In the conventional insulated semiconductor device, the semiconductor substrate is fixed to the circuit pattern side of the circuit board as disclosed in the first prior art by soldering, and the heat dissipation plate side is C.
Generally, a metal supporting plate such as u or Mo or a composite supporting plate such as Al / SiC material is integrated by soldering.

In such an Al-ceramics composite substrate, defects are likely to be formed at the bonding interface between the circuit pattern and the heat dissipation plate and the ceramics plate, and an interface having a strong bonding force is hard to be formed. However, there is a problem in that structural design must be performed in consideration of thermal stress and reliability. In addition, the semiconductor device obtained by applying the Al-ceramics composite substrate also has a problem that the reliability is likely to decrease due to the cutoff of the heat flow path and the breakage of the insulating member in the operation stage. Further, the number of members constituting the Al-ceramics composite substrate and the number of assembling steps are large, and there is a problem in cost.

An object of the present invention is to reduce the thermal stress or thermal strain generated during manufacturing or operation, to prevent the deformation, modification and destruction of each member, to provide a highly reliable, low-cost insulated semiconductor device. Is to provide.

[0012]

The insulated semiconductor device of the present invention which achieves the above object is a ceramic plate, a wiring metal layer provided on one main surface of the ceramic plate, and another wiring main layer provided on the other main surface of the ceramic plate. A backside metal layer
The wiring metal layer and the back surface metal layer are made of an Al alloy.

With such a structure, the insulating semiconductor device is provided with a strong bondability, excellent heat dissipation and reliability can be maintained, and the cost can be reduced.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION A circuit board in an insulated semiconductor device according to the present invention is provided with a wiring metal layer and a back surface metal layer on both surfaces of a ceramic plate, and the wiring metal layer and the back surface metal layer have the same quality and the same physical properties as each other. Made of alloy, ceramic plate 0.25 ~ 1.25mm, wiring metal layer 0.1 ~
The thickness of the back metal layer is adjusted to 2.3 mm and the back metal layer is adjusted to 0.025 to 2.0 mm.

Here, in the semiconductor device, (1) damage to the ceramic insulating plate, (2) man-hours for manufacturing the ceramic insulating plate, (3) patterning of chemical etching, and (4)
The problem of the joint strength of the aluminum layer will be described below.

In an insulating semiconductor device represented by a power module, a ceramic insulating plate (Al-ceramic composite substrate) as an insulating member is generally mounted by soldering on a supporting plate having a different coefficient of thermal expansion. When the ceramics insulating plate and the supporting plate are integrated, a heat treatment step of heating to above the melting point of the solder material and then cooling to room temperature is performed. In this case, each member contracts in accordance with the coefficient of thermal expansion specific to each member while being fixed to each other at the solidification point of the solder material, and thermal stress or thermal strain remains at the bonded portion and deformation occurs. Generally, a semiconductor substrate for electric power has a large size, and since a plurality of semiconductor substrates and other elements are mounted in an insulating semiconductor device,
The area of the insulating plate and the portion where the insulating plate is soldered is also increased. Therefore, residual thermal stress and thermal strain are large, and deformation of each member is easily promoted. Furthermore, when thermal stress during operation is repeatedly applied to the insulating semiconductor device and this is superimposed on the above residual thermal stress or thermal strain, the ceramic plate that is a constituent member of the insulating plate has a mechanically brittle property. As a result, the damage is caused, and the Al metal wiring layer formed on the ceramic plate and the Al back surface metal layer formed on the opposite side are peeled off. This peeling may occur at the bonding interface between the metal wiring layer and the backside metal layer, or may occur due to crack destruction of the ceramic plate parallel to the bonding interface. The ceramic plate, the Al metal wiring layer, and the Al rear surface metal layer are all arranged in the main heat dissipation path of the heat generated by the semiconductor element substrate. For this reason, damage to the ceramic plate or peeling of the Al metal wiring layer or the Al backside metal layer causes interruption of the heat flow path of the insulating semiconductor device, which impedes normal operation of the insulating semiconductor device. Further, the damage of the ceramic plate causes a safety problem such as deterioration of electric insulation of the insulated semiconductor device.

In manufacturing a ceramic insulating plate (Al-ceramic composite substrate), high purity (3
N) Al is melted under a nitrogen atmosphere, ceramic plates are inserted in order from the inlet of a guide-integrated die provided in the crucible, the Al molten metal is brought into contact, and then the molten metal is solidified on the outlet side. A 0.5 mm thick Al layer is bonded to both sides of the ceramic plate, and then Al on one side
An etching resist is heat-pressed onto the plate, light-shielding and development are performed to form a desired circuit pattern, and the Al layer is etched with a ferric chloride solution to obtain a composite substrate. Due to such complicated steps, a loss which cannot be ignored in terms of cost of the ceramic insulating plate and the insulating semiconductor device mounting the same is brought about.

As described above, the Al layer formed on the ceramic plate is patterned into a predetermined shape by chemical etching. The surface of the ceramic plate that is not covered with the Al layer is directly exposed to the etching solution. At this time, valley-shaped etching grooves are formed along the grain boundaries on the surface of the ceramic plate. The above-mentioned thermal stress concentrates and acts on the tips of these etching grooves. If the concentrated stress exceeds the breaking strength of the ceramic plate, the ceramic plate may be damaged or the metal wiring layer or the backside metal layer may be peeled off. As a result, problems such as normal operation hindrance and electrical insulation deterioration occur due to interruption of the heat flow path of the insulated semiconductor device.

The high-purity Al molten metal does not easily wet the ceramic plate. Therefore, it is difficult to give a strong bonding force to the interface between the Al layer and the ceramic plate. As a result, the peeling of the Al metal wiring layer and the Al back surface metal layer as described above is facilitated.

In the ceramic circuit board according to the second prior art, the Al / SiC base plate and the ceramic insulating plate are directly integrated in advance, so that the process of assembling the insulating semiconductor device is simplified. Moreover, by pouring the molten Al alloy into a predetermined mold, A
Fabrication of 1 / SiC and wiring to a ceramic plate are performed. For this reason, there is a possibility that the ceramic circuit board can be manufactured at a relatively low cost, and it is expected that the ceramic circuit board will eventually contribute to the cost reduction of the insulating semiconductor device. However, in the case of this structure, since the Al / SiC base plate and the ceramic insulating plate are directly integrated under high temperature, stress, strain, and warp deformation easily occur in the integrated product, and the ceramic plate or the ceramic plate is formed on this. The above problem remains in the Al wiring metal layer. The prior art does not disclose any solution to this problem, in particular, an optimum structure for avoiding a defect caused by application of new thermal stress or strain in the manufacturing and operating stages of the insulating semiconductor device.

In the semiconductor power module according to the third prior art, a silicon nitride plate having high strength and high toughness, a semiconductor element mounted on the silicon nitride plate, and an active metal method or DBC on the semiconductor element mounting surface of the silicon nitride plate. (Direct Bonded
A metal circuit board made of Cu bonded by a copper (Copper) method and a C bonded by a active metal method or a DBC (Direct Bonded Copper) method on a surface of a silicon nitride plate on which a semiconductor element is not mounted.
A ceramic insulating plate including a metal plate made of u is used. Here, according to an example, in the case of the active metal method, for the metal circuit board and the metal plate, (a) the silver braze paste is printed on both surfaces of the silicon nitride plate ⇒ (b) the Cu plate is set in a sandwich form ⇒ (c ) Heat treatment under a vacuum or reducing atmosphere (about 800 ° C) ⇒ (d) Formation of photoresist film ⇒
(E) Chemical etching ⇒ (f) Removal of photoresist film ⇒ (g) Ni plating, and a complicated manufacturing process. Also,
In the case of the DBC method, according to one example, (a) a Cu plate is set in a sandwich shape on both sides of a silicon nitride plate ⇒ (b) heat treatment under pressure in an oxidizing atmosphere (about 1000 ° C.) ⇒ (c) photoresist film Formation ⇒ (d) chemical etching ⇒ (e) removal of photoresist film ⇒ (f) Ni plating, which also goes through a complicated manufacturing process. Therefore, the above (2),
The problem of (3) remains.

Further, the metal circuit board and the joint carrier of the metal plate are
Silver braze in case of active metal method, Cu-O in case of DBC method
Bonded to the silicon nitride plate by the eutectic material. These bonding carriers usually have defects such as voids and parts which are not completely wet with the silicon nitride plate. Generally, the amount and type of these defects differ between the metal circuit board side and the metal plate side. Therefore, an imbalance is likely to occur in the stress and deformation contained in the entire silicon nitride plate obtained by joining the metal circuit plate and the metal plate. Specifically, excessive stress or complicated warp deformation along the pattern occurs at the end interface between the metal circuit board and the metal plate. As a result, the same problem as (1) described above also remains in the present prior art.

Next, the present invention will be described.

FIG. 1 is a plan view and a sectional view for explaining the details of a circuit board in the insulated semiconductor device of the present invention. (a)
Indicates the state on the side where the semiconductor substrate is mounted, and is a silicon nitride plate (sintered body, size: 30 mm x 50 m) as a ceramic plate.
m × 0.3mm) 110 and wiring metal layer 13 with a thickness of 0.4mm
0 (131, 132, 130c (for mounting the thermistor)) are provided. These wiring metal layers 130 are formed of an Al alloy (Al-20 wt% Si-1.5 wt% Mg). (C) shows the state of the surface on the opposite side, in which a backside metal layer 120 having a thickness of 0.2 mm on the silicon nitride plate 110 has the same quality and the same physical properties as the wiring metal layer 130 (Al-
20 wt% Si-1.5 wt% Mg). (B) shows a state of the AA ′ cross section, and the wiring metal layers 130 (131, 132, 1) are formed on both surfaces of the silicon nitride plate 110.
30c) and the back metal layer 120 are arranged in a sandwich shape to form a circuit board or a wiring board 125. Although not shown, the wiring metal layer 130 (13
Ni plating layers (thickness: 6 μm) are formed on the surfaces of the rear surface metal layer 120 and the rear surface metal layer 120 to provide solder wettability and wire bondability.

The Al alloys forming the wiring metal layer 130 and the back surface metal layer 120 have (a) high thermal conductivity, (b) excellent bondability with the ceramic plate 110, and (c) N.
i, Sn, Ag, Au, Pt, Pd, Zn and the like can be easily formed by a wet method, (d) shows excellent fluidity in a molten state, (e) at a relatively low temperature Since it melts, an alloy containing Al as a main component (for example, in the case of an alloy for casting or die casting, thermal conductivity: about 150 W
/ MK, thermal expansion coefficient: 23 ppm / ° C) is selected.
(A) has an important meaning in that the heat flow emitted from the semiconductor substrate is efficiently emitted to the outside. (B) is a matter necessary for firmly bonding to the ceramic plate 110 and suppressing the generation of interfacial voids that obstruct heat transfer. (c) is indispensable for mounting the semiconductor substrate 101 by soldering and performing wire bonding. (D) is Al as described later.
This is an important matter for efficiently flowing the molten alloy into the areas of the back surface metal layer 120 and the wiring metal layer 130. (E)
Are important in reducing warpage of the circuit board 125. From such a viewpoint, the back surface metal layer 120 and the wiring metal layer 13
An Al alloy is selected as the 0 material.

Al alloys satisfying the above requirements (a) to (e) are Si, Ge, Mn, Mg, Au, Ag, Ca, C.
It is preferable that the alloy is made of Al and at least one metal selected from the group consisting of u, Ni, Pd, Sb, Te, Ti, V, Zn and Zr. As a specific representative example, Al
-7wt% Si, Al-5wt% Au, Al-7.6wt
% Ca, Al-33 wt% Cu, Al-28 wt% G
e, Al-35 wt% Mg, Al-1 wt% Mn, Al
-5.7 wt% Ni, Al-3 wt% Pd, Al-2w
t% Sb, Al-11.7 wt% Si, Al-15 wt
% Te, Al-0.5 wt% Ti, Al-0.6 wt%
Binary alloys such as V, Al-30 wt% Zn, and Al-0.1 wt% Zr can be mentioned. Further, a multi-component alloy in which the above alloys are arbitrarily combined can be mentioned.

[0027]

[Table 1]

Further, as a practical Al alloy, the multi-component alloys listed in Table 1 can be listed. The Al-Cu system and the Al-Cu-Si system have high strength, and are excellent in toughness and heat resistance. The Al-Si system (silmin) has excellent castability and corrosion resistance, and has a relatively low coefficient of thermal expansion. Al-Si-Mg
The system (γ-sirmine) has improved mechanical properties and excellent corrosion resistance when Mg is added. The mechanical properties of the Al-Si-Cu system (copper-containing silmine) are improved by adding Cu instead of Mg. The Al-Si-Cu-Mg system has excellent corrosion resistance. Al-Cu-Ni-Mg system (Y alloy) is 200-2
Even in a high temperature range of 50 ° C. or lower, the hardness and strength can be maintained at a value similar to room temperature. Al-Mg (hydronalium) has excellent corrosion resistance. The Al-Si-Cu-Ni-Mg system is Cu or Ni.
The heat resistance strength is improved, the coefficient of thermal expansion is low, and the wear resistance is excellent. Furthermore, Ge, Au, Ag, Ca, Pd, S
It is possible to add a small amount of metals such as b, Te, and V to lower the solidus point of the Al alloy, improve the bondability with ceramics and corrosion resistance, and improve the fluidity of the molten metal. Is.

Si, Ge, M forming an alloy with Al
n, Mg, Au, Ag, Ca, Cu, Ni, Pd, S
b, Te, Ti, V, Zn, and Z play a role of firmly and densely joining the interface between the Al alloy and the ceramic plate 110, in addition to being added for adjusting the above-described properties of the Al alloy. These metals exist in the form of thin nitrides or oxides at the interface between the Al alloy and the ceramic plate 110 and serve as a joint carrier for both. The above-mentioned various metals in the Al alloy serve as a supply source of this bonding carrier.

According to the present invention, the manufacturing process of the circuit board 125 on which the semiconductor substrate 101 is mounted is simplified, and finally contributes to cost reduction of the insulating semiconductor device 900. This point will be described with reference to FIG.

FIG. 2 shows a comparison of manufacturing processes of the circuit board for an insulating semiconductor device of the present invention and a conventional circuit board. In the case of the present invention, the starting material is a silicon nitride plate (Si ₃ N ₄ , thermal conductivity: 90 W / m · K, coefficient of thermal expansion: ceramic plate 110).
Al for molten metal described above with 3.4 ppm / ℃, thickness: 0.3 mm)
It is an alloy. After the silicon nitride plate 110 is set in a mold made of a metal or an inorganic substance, which has been formed into a predetermined shape and size in advance, the molten Al alloy is pressed into the mold. In this step, the back surface metal layer 120 and the wiring metal layer 130 are formed on the silicon nitride plate 1
Simultaneously formed on both sides of 10. The back surface metal layer 120, the wiring metal layer 130, and the silicon nitride plate 110 are integrated by flowing an Al alloy molten metal into a space provided between the silicon nitride plate 110 and the mold. Therefore, the back surface metal layer 120 and the wiring metal layer 130 in the circuit board 125.
In the above, since the starting material is composed of an Al alloy of the same quality, the material has substantially the same quality and physical properties in the end.

The back metal layer 120 and the wiring metal layer 1 described above.
The assembly in which 30 is formed is transferred to an electroless wet plating process, and a Ni plating layer (thickness: 6 μm) is formed on the surfaces of the back surface metal layer 120 and the wiring metal layer 130. Here, the reason for providing the Ni plating layer on the wiring metal layer 130 is to ensure solder wettability when brazing and mounting the semiconductor substrate 101 and to reliably perform wire bonding. When chemical or thermal alteration of the back surface metal layer 120 is allowed, it is not essential to provide the Ni plating layer on this portion. However, if alteration or denaturation is not allowed, N is used in the sense of shutting off from the atmosphere of the outside air and preventing alteration inside.
An i plating layer is provided. Through the above steps, the insulating semiconductor device circuit board 125 of the present invention is completed.

In the case of the conventional process based on the first prior art,
First, an aluminum melt having a purity of 3N is brought into contact with both surfaces of the ceramic plate to form an aluminum layer having a thickness of 0.5 mm. After that, selective etching for forming a wiring metal layer and, if necessary, selective etching for the back surface metal layer are performed, and electroless Ni plating for imparting solder wettability and wire bonding property is applied to the wiring layer. In the selective etching for forming the wiring metal layer, patterning with high dimensional accuracy is possible when the layer is thin, but sufficient accuracy cannot be obtained when the layer is thick or fine patterning is required. Further, a step of forming and removing a resist film is also required for selective etching. The circuit board based on the conventional process goes through such complicated process.

As described above, according to the insulating semiconductor device circuit board 125 of the present invention, the manufacturing process thereof is simplified, and naturally the cost of the circuit board 125 and the insulating semiconductor device 900 using the same is reduced. Contribute to.

However, the merit of the present invention is not limited only to the method of manufacturing the circuit board 125, but to the circuit board 12 as well.
In the insulated semiconductor device 900 of the present invention to which No. 5 is applied, the size is further increased. Before explaining the reason, the structure of the insulating semiconductor device will be described.

FIG. 3 is a plan view and a sectional schematic view for explaining the basic structure of the insulated semiconductor device of the present invention. (A) is a plan view, (b) is an AA 'cross section in (a), (c) is a BB' cross section in (a), respectively. The circuit board 125 includes a silicon nitride plate 110 and wiring metal layers 131, 132, 13 provided on one main surface of the silicon nitride plate 110.
0c and the back surface metal layer 120 provided on the other main surface. The wiring metal layer 130 (131, 132, 130c) provided on each main surface of the silicon nitride plate 110 and the back surface metal layer 120 are made of Al alloys of the same quality and the same physical properties. On the wiring metal layer 131 of the circuit board 125, the MOS FET element substrate 10 as a semiconductor substrate is provided.
1 is fixed by the solder layer 113. On the back surface metal layer 120 side of the circuit board 125, an Al alloy matrix (Al-20 wt% Si-1.
5 wt% Mg, solid phase point: about 550 ° C) and green silicon carbide
(SiC) Support plate composed of a composite in which powder is dispersed (S
Addition amount of iC: 70vol%, coefficient of thermal expansion: 7.2ppm / ° C, thermal conductivity: 170W / mK, thickness: 3mm, size: 4
2.5 × 85 mm) fixed on 115. Support plate 1
An epoxy resin case 20 provided with a main terminal 30 and an auxiliary terminal 31 in advance is attached to 15. Between the element base 101 and the wiring metal layers 131 and 132, between the element base 101 and the auxiliary terminal 31, the wiring metal layer 131 and the main terminal 3
0 between the wiring metal layer 130c and the auxiliary terminal 31
A fine wire (direct line: 0.4 mm) 117 is wire-bonded. Silicone gel resin 22 in case 20
Is filled with epoxy resin lid 21 on the top of the case 20.
Is provided. Here, 8 is formed on the wiring metal layer 131.
The individual element substrates 101 are fixed by solder 113. This fixing is performed using a flux-containing paste solder material. Further, the temperature detecting thermistor element 34 is fixed between the wiring metal layers 130c with solder 124 (not shown). Although not shown in the drawing, a silicone adhesive resin 35 (not shown) is fixed between the case 20 and the support plate 115 and between the case 20 and the lid 21. A recess 25 is provided in the thick portion of the lid 21, a hole 30 'is provided in the main terminal 30, and a screw (not shown) for connecting the insulated semiconductor device 900 to an external circuit wiring is housed therein. Main terminal 3
0 and the auxiliary terminal 31 are made by punching and forming a predetermined shape into a copper plate and plated with Ni, and are attached to the epoxy resin case 20 by a transfer molding method. In the above structure, the circuit board 125 serves as a main heat dissipation path for the insulating semiconductor device 900 together with the support plate 115. In addition, the wiring metal layer 130 (131, 132, 130 c) of the circuit board 125 and the back surface metal layer 1
20 is composed of an Al alloy having the same quality and the same physical properties. By applying an Al alloy, the silicon nitride plate 110
At the interface between the wiring metal layer 130 (131, 132, 130c) and the back surface metal layer 120, a nitride is interposed to form a uniform, dense and strong bonding interface. With the above configuration, the insulating semiconductor device 900 is provided with excellent heat dissipation and reliability.

In order to reflect the advantages of the present invention in the insulating semiconductor device 900, the circuit board 125 must satisfy the following factors regarding the optimum structure. (A) The wiring metal layer and the back metal layer are composed of the same Al alloy. When the same 3N-purity Al melt as in the first prior art is used, the wettability of the Al melt to the ceramic plate is not sufficient. , An interface with high bonding strength cannot be obtained. According to the study by the present inventors, the bonding strength between the silicon nitride plate and the Al layer is about 6.9 MPa (broken interface: silicon nitride plate-Al layer).
It's nothing but. Even if the ceramic plate is aluminum nitride or alumina, the obtained bonding strength is about the same. On the other hand, the back surface metal layer 120 and the wiring metal layer 130 of the circuit board 125 applied to the insulated semiconductor device 900 of the present invention are made of an Al alloy made of the same molten metal. The above-mentioned impurities including Si contained in the Al alloy are chemically bonded to the constituent components of the ceramic plate to form a nitride or oxide of the above-mentioned impurities (ceramic plate 1).
10 is an alumina plate). Such a nitride or oxide constitutes a joint carrier between the back metal layer 120 or the wiring metal layer 130 and the silicon nitride plate 110. As a result, the bonding strength increases to 70 MP or more. Such advantages are brought about by using an Al alloy.

The back surface metal layer 120 and the wiring metal layer 130 are made of an Al alloy having the same quality and the same physical properties. Back metal layer 1
If the 20 and the wiring metal layer 130 have different physical properties (coefficient of thermal expansion, Young's modulus), the design of the circuit board 125 is hindered. On the other hand, in the circuit board 125 applied to the insulated semiconductor device 900 of the present invention, since they have the same physical properties, the optimum design described later in (B) becomes possible. (B) The thickness of members constituting the circuit board is adjusted. Circuit board 12 applied to the insulated semiconductor device 900 of the present invention.
5 is important, the wiring metal layer 130 is 0.1 to 2.
3 mm, the backside metal layer 120 is 0.025 to 2.0 mm, and the silicon nitride plate 110 as a ceramic plate is 0.25 to 1.25.
The point is that each is adjusted to a thickness of mm. -Thickness of wiring metal layer The wiring metal layer 130 serves as a main conductive path of the insulated semiconductor device 900. If the wiring metal layer itself generates heat when a predetermined current is applied, the heat generated by the wiring is superimposed on the heat generated by the wiring in the semiconductor substrate, and the current region that ensures the safe operation of the insulated semiconductor device is narrowed. . Therefore, in order to secure a wide safe operation area, it is necessary to form this portion as thick as possible.
Further, it is desirable that the Al alloy molten metal is appropriately thick in terms of smoothly flowing. However, the wiring metal layer 13
The thickness of 0 should be limited as follows in consideration of the performance of the insulation type semiconductor device 900 in which the circuit board 125 is incorporated.

FIG. 4 shows the thermal resistance, stress, and
It is a graph which shows the wiring metal layer thickness dependence regarding reliability. First, attention is paid to the relationship between the wiring metal layer thickness and the thermal resistance in (a). The thermal resistance shown here is based on a simulation, and is 4 in the insulating semiconductor device 900 shown in FIG.
It is a value when the individual semiconductor substrates 101 are operated. In the region where the wiring metal layer 130 is thin, the heat generated in the semiconductor substrate 101 is difficult to spread in the lateral direction, so that the thermal resistance shows a high value. As the wiring metal layer 130 becomes thicker, the lateral spreading effect increases, so that the thermal resistance gradually decreases. When the thickness is further increased, the vertical component of the wiring metal layer 130 itself affects, so that the thermal resistance starts to increase again. Here, the insulated semiconductor device 900 has a current capacity of 400 A, and its target thermal resistance is 0.25 ° C./°C for realizing an electrically stable operation.
It is set to W or less. The thickness of the wiring metal layer 130 that satisfies this is in the range of 0.1 to 3.7 mm.

Next, pay attention to the stress of (b). The vertical axis shown here is the stress of the silicon nitride plate 110 by simulation (temperature load (550 ° C. ⇒ −55 ° C.), and part e in the schematic sectional view of FIG. This is a value in the highest stress portion of 125. The stress in the e portion tends to increase as the wiring metal layer 130 becomes thicker.Here, the general fracture stress of silicon nitride is about 650 MPa. It is necessary that the stress in the e portion does not exceed this value, and the thickness of the wiring metal layer 130 selected from this point is 2.3 mm or less.

Next, pay attention to the crack occurrence rate of (d). The crack referred to here is the insulated semiconductor device 900.
Temperature cycle test (3000 cycles, -40 to 12
This is mechanical breakdown of the silicon nitride plate 110 that occurs after applying (5 ° C.). As the wiring metal layer 130 becomes thicker, crack breakage is not observed up to a thickness of 2.4 mm, but beyond that, the occurrence rate tends to increase.
The cracks observed here start from the portion corresponding to the portion e. The silicon nitride plate 110 is for maintaining the insulating property of the insulating semiconductor device 900, and if it breaks, the safe operation of the insulating semiconductor device 900 will be hindered. The thickness of the wiring metal layer 130 selected from this viewpoint is 2.4 mm or less.

The wiring metal layer 1 satisfying all the points is obtained by synthesizing the evaluation results of the thermal resistance, stress and reliability described above.
The thickness of 30 is in the range of 0.1 to 2.3 mm. Note that FIG.
Is a silicon nitride plate 110 having a thickness of 0.3 mm and a backside metal layer 12
Although the result is that the thickness of 0 is 0.3 mm, the silicon nitride plate 110 has a thickness of 0.25 to 1.25 mm and the back surface metal layer 120
In the range of 0.025 to 2.0 mm, similar results are obtained. Thickness of back surface metal layer The back surface metal layer 120 is a main heat conduction path for releasing heat generated in the semiconductor substrate 101 to the outside via the circuit board 125, and the heat dissipation and reliability of the insulated semiconductor device 900. The thickness must be selected within the range that does not impede sex. It is also an important requirement that the circuit board 125 can be manufactured stably. FIG. 5 is a graph showing the backside metal layer thickness dependence of thermal resistance, void ratio, and reliability. First, pay attention to the thermal resistance of (a). The thermal resistance shown here is a value obtained by simulation. Thermal resistance is on the backside metal layer 120
Although the thickness tends to increase as the thickness increases, the amount of change is extremely small. It is the thickness of the wiring metal layer 130 that is strongly related to the thermal resistance. Interpreting this result, it is judged that the backside metal layer 120 can be selected to have an arbitrary thickness within the range of 0 to 4.9 mm shown in the graph from the viewpoint of thermal resistance.

Attention is paid to the void ratio of (b). The void ratio mentioned here is the area ratio of the non-bonding region generated in the back surface metal layer 120. When the thickness is in the range of 0.025 or more, no void is generated in the back surface metal layer 120. This is because the molten Al alloy efficiently flows through the gap between the mold and the silicon nitride plate 110. On the other hand, the void ratio increases in the area thinner than 0.025 mm. This is because the voids are narrow and the flow of the molten Al alloy is obstructed. The above tendency is the same when the thickness of the wiring metal layer 130 is in the range of 0.1 to 2.3 mm, and although not shown in the figure, the thickness of the ceramic plate 110 is in the range of 0.25 to 1.25 mm. . As described above, the back surface metal layer 120 is a main conduction path for heat dissipation, and it is necessary to select the thickness of the back surface metal layer 120 to be 0.025 mm or more from the viewpoint of ensuring the heat radiation path.

Next, pay attention to the rate of increase in thermal resistance in (c). Temperature cycle test (3000 cycles, -40 to 125
If the heat dissipation path in the circuit board 125 is cut off due to the temperature rise, the thermal resistance of the insulated semiconductor device 900 increases.
The increase in thermal resistance referred to here is caused by the cutoff of the heat radiation path due to the improper thickness of the back metal layer 120. When the back surface metal layer 120 is thin, strain acting on the wiring metal layer 130 due to the influence of the back surface metal layer 120 can be suppressed to a small level, and thus the wiring metal layer 130 is less likely to be peeled from the silicon nitride plate 110 due to fatigue. As a result, no change in thermal resistance is observed in the region where the thickness of the back metal layer 120 is 2.0 mm or less. On the other hand, in the thick region where the thickness of the back surface metal layer 120 exceeds 2.0 mm, the strain acting on the wiring metal layer 130 becomes large, and the wiring metal layer 130 is fatigue fractured and the silicon nitride plate 110 is damaged.
Peel from. This peeling increases the thermal resistance. The above tendency is the same when the thickness of the wiring metal layer 130 is in the range of 0.1 to 2.3 mm, and in the thickness of the ceramic plate 110 which is not shown in the figure, in the range of 0.25 to 1.25 mm. . Therefore, in order to stably operate the insulated semiconductor device 900, the back surface metal layer 120 needs to be adjusted to a thickness of 2.3 mm or less.

As described above, the back metal layer 120
The thickness is 0 to 4.9 mm from the viewpoint of thermal resistance, 0.025 mm or more from the viewpoint of void rate, and 2.0 m from the viewpoint of thermal resistance increase rate.
m or less are selected respectively. Overall, the thickness of the back metal layer 120 that satisfies all the points is 0.025.
~ 2.0 mm. In addition, this proper thickness is the wiring metal layer 1
30 is 0.1 to 2.3 mm, and the silicon nitride plate 110 is 0.25 to
The same applies in the range of 1.25 mm. -Thickness of Silicon Nitride Plate The silicon nitride plate 110 is also one of the members constituting the main heat flow path of the insulated semiconductor device 900. In order to keep the thermal resistance low, it is desirable that this member be as thin as possible. However, this performance cannot be impaired as long as it is an insulating carrier.

FIG. 6 is a graph showing the dependency of the crack breakage rate and the thermal resistance increase rate on the thickness of the silicon nitride plate. First (a)
Pay attention to the crack destruction rate of. The crack fracture referred to here is a temperature cycle test (3000 cycles, −40 to −40).
The mechanical breakdown of the silicon nitride plate 110 due to 125 ° C.). In the region where the thickness is 0.25 mm or more, the silicon nitride plate 110 is not broken at all. On the other hand, 0.25m
Crack destruction occurs in the region thinner than m. This destruction starts from the above-mentioned part e. From the viewpoint of suppressing the insulation deterioration of the insulated semiconductor device 900 and operating it safely, the thickness of the silicon nitride plate 110 is selected in the range of 0.25 mm or more.

Next, pay attention to the rate of increase in thermal resistance in (b). Temperature cycle test (3000 cycles, -40 to 125
If the fatigue breakdown of the wiring metal layer 130 progresses with the increase of (.degree. The increase in the thermal resistance referred to here occurs due to the blocking of the heat flow path. While the thermal resistance does not fluctuate in the region where the thickness is 1.25 mm or less, the thermal resistance increases in the thicker region. This is because the stress in the portion e becomes large and the silicon nitride plate 110 is cracked, and the wiring metal layer 130 and the silicon nitride plate 110 are not thermally engaged. Therefore, in order to maintain the heat dissipation of the insulated semiconductor device 900, the thickness of the silicon nitride plate 110 needs to be selected within the range of 1.25 mm or less.

The above (a) and (b) show the results when the wiring metal layer 130 is 0.6 mm and the back surface metal layer 120 is 0.3 mm. Wiring metal layer 130 is 0.1 to 2.3 mm, back side metal layer 1
Similar results are obtained when 20 has a thickness of 0.025 to 2.0 mm.

As described above, the silicon nitride plate 110
The preferable thickness of is 0.25m from the viewpoint of crack fracture rate.
m or more and 1.25 mm or less in terms of the rate of increase in thermal resistance.
A more preferable silicon nitride plate 1 inclusive of these evaluation results
The thickness of 10 is in the range of 0.25 to 1.25 mm.

Table 2 shows the wiring metal layer 1 described above.
A summary of appropriate thicknesses of 30, the back surface metal layer 120, and the silicon nitride plate 110 is shown. The wiring metal layer 130 is 0.1-2.
The appropriate thickness is 3 mm, the back metal layer 120 is 0.025 to 2.0 mm, and the silicon nitride plate 110 is 0.25 to 1.25 mm.

[0051]

[Table 2]

The thermal resistance of the insulated semiconductor device 900 of the present invention was compared with that of a comparative sample. The comparative sample is AlN with a thickness of 0.63 mm.
A wiring metal layer (thickness: 0.4 mm) made of high-purity Al and a back surface metal layer (thickness: 0.0) are formed on both sides of the plate as in the first prior art.
5mm) circuit board, Al-SiC support plate (A
1-20 wt% Si-1.5 wt% Mg alloy matrix composite with green silicon carbide powder dispersed, SiC addition amount: 70 vol%, thermal expansion coefficient: 7.2 ppm / ° C., thermal conductivity:
170W / mK, Thickness: 3mm, Size: 42.5 × 85m
m) and the semiconductor substrate (8 pieces) is soldered on the circuit board. The steady-state thermal resistance is 0.35 ° C./W for both the insulating semiconductor device 900 of the present invention and the comparative sample.
showed that. The initial heat dissipation is the insulation type semiconductor device 900 of the present invention.
Although it is the same as that of the comparative sample, the superiority and inferiority of the both becomes clear in the test stage described below.

FIG. 7 is a graph for explaining the transition of the thermal resistance of the insulated semiconductor device of the present invention by the temperature cycle test.
The insulated semiconductor device 900 (curve A) maintains the same value as the initial value (0.35 ° C./W) even after 10,000 cycles. On the other hand, the comparative sample (curve B) shows the same initial thermal resistance, but the thermal resistance increases from 1,000 cycles. If the life related to heat dissipation is defined as “the number of temperature cycles when the initial thermal resistance reaches 1.5 times”, the life of the comparative sample is about 2,000 cycles.
That of 00 is over 10,000 cycles. The reason why the comparative sample reached the end of its life early even though the thickness of each member on the circuit board was adjusted to an appropriate range was that the bonding strength between the wiring metal layer and the back surface metal layer and the AlN plate was insufficient.
This is because the interface was separated and the main heat radiation path was blocked.
The reason why the bonding strength is insufficient is that substances other than Al nitride, for example, nitrides of Si and Mg are not formed at the bonding interface. In the circuit board 125 applied to the insulated semiconductor device 900 of the present invention, the silicon nitride plate 110, the back surface metal layer 120, and the wiring metal layer 130 have appropriate thicknesses so that excessive stress and strain are not concentrated on the local parts of the circuit board 125. Has been adjusted. Moreover, a dense and strong thin layer of Al, Si, and Mg nitride exists at the interface between the silicon nitride plate 110 and the back metal layer 120 and the wiring metal layer 130. This is the reason why the insulating semiconductor device 900 shows excellent reliability.

Further, in the present invention, when the silicon nitride plate 110 is replaced with an alumina plate, the carrier for joining the interface between the alumina plate 110 and the wiring metal layer 130 and the back surface metal layer 120 is an oxide of Al, Si, Mg. Become.

The Ni plating layer formed on the surface of the wiring metal layer 130 or the back surface metal layer 120 of the circuit board 125 in the insulated semiconductor device 900 of the present invention is Sn, Ag within a range in which solder wettability and wire bondability can be secured. , A
Metals such as u, Pt, Pd, Zn and Cu can be used as substitutes, and their thickness ensures solder wettability and wire bondability,
An arbitrary value can be selected within a range in which the quality deterioration of the circuit board 125 can be prevented. Furthermore, the above Ni plating layer is made of Ni, S
A laminated body of a plurality of metals selected from the group consisting of n, Ag, Au, Pt, Pd, Zn and Cu may be used instead.

In addition to silicon nitride, the ceramic plate 110 constituting the circuit board 125 may be aluminum nitride (AlN, thermal conductivity: 190 W / mK, thermal expansion coefficient: if necessary).
4.3 ppm / ° C), alumina (Al ₂ O ₃ , thermal conductivity: 20)
W / m · K and coefficient of thermal expansion: 7.2 ppm / ° C) can be substituted.

The insulated semiconductor device 900 to which the circuit board 125 described above is applied reduces the thermal stress or thermal strain generated during manufacturing or operation, and there is no fear of deformation, modification or destruction of each member, and the reliability is high. It is effective to provide a low-cost insulated semiconductor device.

The present invention will be described in detail below with reference to examples.

[Embodiment 1] In this embodiment, an insulating semiconductor device 900 to which a circuit board 125 of a basic form is applied will be described.

The circuit board 125 for the insulating semiconductor device 900 of this embodiment has the form shown in FIG. 110 is a silicon nitride plate as a ceramic plate (dimensions: 30 mm × 5)
0 mm × 0.3 mm, sintered body, coefficient of thermal expansion: 3.4 ppm / ° C., thermal conductivity: 90 W / m · K), semiconductor substrate 101
Wiring metal layer 130 with a thickness of 0.4 mm on the main surface on which the
(131, 132, 130c (for mounting the thermistor)) are provided. These wiring metal layers 130 are made of Al alloy
(Al-20 wt% Si-1.5 wt% Mg). On the main surface on the opposite side, a back surface metal layer 120 having a thickness of 0.2 mm is made of Al having the same quality and the same physical properties as the wiring metal layer 131.
It is formed of an alloy (Al-20 wt% Si-1.5 wt% Mg).

The circuit board 125 is obtained by the following simplification process. FIG. 8 is a schematic sectional view illustrating a method for manufacturing a circuit board for the insulated semiconductor device of this embodiment. As shown in (a), the silicon nitride plate 110 is formed in the hollow parts of the upper mold 920 and the lower mold 921 made of stainless steel and molded into a predetermined shape.
Set. The upper mold 920 is provided with a space 120 'in which the back metal layer 120 is to be formed, and the lower mold 921 is provided with a space 130' in which the wiring metal layer 130 is to be formed. Al alloys (Al-
Molten metal 12 consisting of 20 wt% Si-1.5 wt% Mg)
5'is supplied to a spout 125a ', a runner 125b', and a discharge port 125c 'for removing excess molten metal out of the system. The molten Al alloy 125 ′ heated to about 670 ° C. is pressurized and supplied to the molds 920 and 921 preheated to about 500 ° C. The Al alloy molten metal 125 'passes through the sprue 125a' and the runner 125b 'in this order to form the space 1
20 'and 130' are filled and then outlet 125c '
It is leaked out of the system via. Continuously, molds 920, 92
1 is cooled to solidify the molten metal 125 'to obtain a circuit board 125 in which the wiring metal layer 130 and the back metal layer 120 are formed on both surfaces of the silicon nitride plate 110 as shown in (b). A Ni plating layer is formed on the wiring metal layer 130 and the back surface metal layer 120 by an electroless plating method.

Here, the wiring metal layer 130 and the back metal layer 1
The thickness of 20 corresponds to the space 120 ′ formed in the upper mold 920.
And the depth of the space 130 'formed in the lower mold 921 is adjusted.

Circuit board 1 obtained by the above steps
In 25, the shapes and dimensions of the wiring metal layer 130 and the back surface metal layer 120 are adjusted by the dimensions and sizes of the spaces 120 ′ and 130 ′. Therefore, after casting the molten Al alloy 125 ', it is not necessary to perform selective etching for patterning the metal layer, which was necessary in the prior art 1. Therefore, the circuit board 125 capable of suppressing the thermal stress destruction can be obtained without forming fine grooves of the ceramic plate by the etching liquid.

The silicon nitride plate 110, the wiring metal layer 130, and the back surface metal layer 120 are molten Al alloy 125 'in the cooling process.
The constituent layers (Al, Si, Mg) and the silicon nitride plate 110 are bonded to each other by a nitride layer of Al, Si, Mg generated at the interface. This nitride layer is thin and dense with a thickness of 0.1 μm or less, and is uniformly formed over the entire interface.
Silicon nitride plate 110, wiring metal layer 130, and back metal layer 1
The bonding strength between 20 is as strong as 70 MPa or more. Further, since the wiring metal layer 130 and the back surface metal layer 120 use the same molten metal 125 ′ as a supply source, and the interface nitride layer is also generated under the same conditions, the wiring metal layer formed on the circuit board 125. 130 and the back surface metal layer 120 are in a state (composition, physical properties, interface state) that can be regarded as substantially the same.

The insulated semiconductor device 900 of this embodiment has the structure shown in FIG. (A) is a plan view, (b) is an AA 'cross section in (a), (c) is B in (a).
-B 'cross section is shown respectively. The circuit board 125 includes a silicon nitride plate 110, wiring metal layers 131, 132, and 130c provided on one main surface of the silicon nitride plate 110, and a back surface metal layer 120 provided on the other main surface. ing. Wiring metal layer 130 provided on each main surface of silicon nitride plate 110
(131, 132, 130c) and the back surface metal layer 120 are made of Al alloys of the same quality and physical properties. On the wiring metal layer 131 of the circuit board 125, the MOS FET element substrate 101 as a semiconductor substrate is provided with a solder layer (Sn).
-5 wt% Sb) 113. The back surface metal layer 120 side of the circuit board 125 has a solder layer (Sn−
5 wt% Sb) 114 by Al alloy matrix
(Al-20 wt% Si-1.5 wt% Mg, solid phase point: about 550 ° C.) A support plate made of a complex in which green silicon carbide (SiC) powder is dispersed (SiC addition amount: 70 vol%, thermal expansion coefficient) : 7.2 ppm / ° C, thermal conductivity: 170 W / mK,
The thickness is 3 mm and the size is 42.5 × 85 mm. The main terminal 3 is previously provided on the support plate 115.
0 and the epoxy resin case 20 provided with the auxiliary terminal 31 are attached. Element base 101 and wiring metal layer 13
1 and 132, between the element substrate 101 and the auxiliary terminal 31, between the wiring metal layer 131 and the main terminal 30, and between the wiring metal layer 130c and the auxiliary terminal 31, wire Al wire 117 (diameter: 0.4 mm) 117 is wire-bonded. It has been subjected. A silicone gel resin 22 is filled in the case 20, and an epoxy resin lid 21 is provided on the top of the case 20. Here, eight element bases 101 are soldered on the wiring metal layer 131.
It is fixed by 13. This fixing is performed using a flux-containing paste solder material. Further, the temperature detecting thermistor element 34 is fixed between the wiring metal layers 130c by solder (Sn-5 wt% Sb) 124 (not shown), and the wiring metal layer 130c is connected to the auxiliary terminal 31 by the Al thin wire 117. There is. Although not shown in the drawing, a silicone adhesive resin 35 is provided between the case 20 and the support plate 115 and between the case 20 and the lid 21.
It is fixed by (not shown). A recess 25 is provided in the thick portion of the lid 21, a hole 30 'is provided in the main terminal 30, and a screw (not shown) for connecting the insulated semiconductor device 900 to an external circuit wiring is housed therein. The main terminal 30 and the auxiliary terminal 31 are copper plates punched and formed in a predetermined shape in advance and plated with Ni, and are attached to the epoxy resin case 20 by a transfer molding method. In the above configuration, the circuit board 125
Together with the support plate 115 serve as a main heat dissipation path of the insulated semiconductor device 900. Further, the wiring metal layer 130 (131, 132, 130c) of the circuit board 125 and the back surface metal layer 120 are made of an Al alloy having the same quality and the same physical properties. By applying an Al alloy, the silicon nitride plate 11
0, a thin nitride intervenes at the interface between the wiring metal layer 130 (131, 132, 130c) and the back surface metal layer 120, and a uniform, dense and strong bonding interface is formed. With the above configuration, the insulating semiconductor device 900 is provided with excellent heat dissipation and reliability.

FIG. 9 is a diagram for explaining the circuit of the insulating semiconductor device. It has a block 910 of two systems in which MOS FET elements (four pieces) 101 are arranged in parallel, and each block
Reference numeral 910 is connected in series, and the input main terminal 30in, the output main terminal 30out, and the auxiliary terminal 31 are pulled out from a predetermined portion to form a main part of the insulated semiconductor device 900. Further, the temperature detecting thermistor 34 during operation of this circuit is independently arranged in the insulating semiconductor device 900. This insulated semiconductor device 900 was finally incorporated into the rotation speed control inverter device of the electric motor 960 shown in FIG.

In this example, for comparison, a circuit board having the same member structure as that of the first prior art was used, and a 400 A class comparative sample whose dimensions were approximately similar to those of the insulated semiconductor device 900 of this example was also prepared. . The circuit board used in this comparative sample was a wiring metal layer (thickness: made of high-purity Al (3N)) on both surfaces of an AlN plate having a thickness of 0.63 mm as in the first prior art.
0.4 mm) and a back metal layer (thickness: 0.05 mm) are formed. The circuit board is an Al-SiC support plate (Al-2
0 wt% Si-1.5 wt% Mg alloy matrix composite with green silicon carbide powder dispersed, SiC addition amount: 7
0 vol%, thermal expansion coefficient: 7.2 ppm / ° C, thermal conductivity: 170
W / m · K, thickness: 3 mm, size: 42.5 × 85 mm) were fixed by soldering, and the semiconductor substrates (8 pieces) were soldered on the circuit board.

The steady-state thermal resistance is the insulation type semiconductor device 9 of this embodiment.
00 and the comparative sample both showed 0.35 ° C./W, and the initial heat dissipation was the same for both samples.

The transition of the thermal resistance of the insulated semiconductor device 900 of this embodiment due to the temperature cycle test (-40 to 125 ° C.) is as shown in FIG. The insulated semiconductor device 900 (curve A) has an initial value (0.35 ° C /
The value equivalent to W) is maintained. On the other hand, the comparative sample (curve B) shows the same initial thermal resistance, but the thermal resistance increases from 1,000 cycles. If the life related to heat dissipation is defined as “the number of temperature cycles when the initial thermal resistance reaches 1.5 times”, the life of the comparative sample is about 2,000 cycles, and that of the insulated semiconductor device 900 is 10,000 cycles or more. become. The reason why the comparative sample reached the end of its life early even though the thickness configuration of the circuit board was adjusted to the above-mentioned appropriate range was that the bonding strength between the wiring metal layer and the back surface metal layer and the AlN plate was not sufficient. This is because the interface was separated and the main heat radiation path was blocked. The bonding strength is insufficient because substances other than Al nitride, such as Si and M, are present at the bonding interface.
This is because the nitride of g is not formed.

On the other hand, in the insulated semiconductor device 900 of this embodiment, the silicon nitride plate 110, the backside metal layer 120, and the wiring metal layer 130 have appropriate thicknesses so that excessive stress and strain are not concentrated on the local portion of the circuit board 125. Has been adjusted to. Moreover, the thin and dense Al, S of the metal forming the Al alloy at the joint interface
The i, Mg nitride layer exists at the interface between the silicon nitride plate 110 and the back metal layer 120 and the wiring metal layer 130. Further, since the silicon nitride plate 110 is sandwiched between the wiring metal layer 130 and the back surface metal layer 120 having the same quality and the same physical properties, the bonding interface between these layers and the silicon nitride plate 110 is kept in the same state. There is. As a result, the wiring metal layer 13
It is possible to prevent excessive stress and strain from acting unevenly on the bonding interface between the zero metal and the back metal layer 120, and to prevent peeling and fatigue damage of the wiring metal layer 130 and the back metal layer 120. This is the reason why the reliability is excellent.

FIG. 11 is a graph showing the transition of thermal resistance due to the intermittent energization test. In this test, the temperature of the supporting plate 115 was changed to 30 to 100 ° C. so that the MOS FE was changed.
The thermal resistance was traced by repeatedly energizing the T element substrate 101. The insulated semiconductor device 900 of this embodiment maintains a value equivalent to the initial value (0.35 ° C./W) up to 30,000 cycles. Although the thermal resistance gradually increases after 30,000 cycles, it does not exceed 0.53 ° C./W defined as the life (1.5 times the initial thermal resistance) in the present invention up to about 150,000 cycles. In this way, the insulated semiconductor device 900 of the present embodiment exhibited excellent intermittent current resistance because the wiring members arranged on both sides of the silicon nitride plate 110 in which the constituent members of the circuit board 125 were adjusted to appropriate values. It is based on the fact that the layer 130 and the back surface metal layer 120 have the same physical properties and are made of the same Al alloy material, and for the same reason as in the case of the temperature cycle test described above. On the other hand, the thermal resistance of the comparative sample has an initial value of 0.35.
Although it is ℃ / W, it has been increasing since 5,000 cycles, and the life (0.53 ℃ / W) is reached in about 10,000 cycles. The reason why the heat radiation reliability of the comparative sample is poor is basically the same as in the case of the above-mentioned temperature cycle test.

In the above-mentioned intermittent energization test, the wiring metal layer 13
Evaluation of insulation of the laminated structure from 1 to the back metal layer 120 was also advanced. FIG. 12 is a graph showing the results of the transition of the corona discharge inception voltage between the wiring metal layer and the back surface metal layer by the intermittent current test. The corona discharge starting voltage is a value when the charge amount is 100 pC. The insulated semiconductor device 900 of this embodiment has an initial value of about 8 kV, which is about 8 kV even after 130,000 cycles. In the insulated semiconductor device 900 of this embodiment, the wiring metal layer 130 is used.
The back surface metal layer 120 is firmly bonded, and no excessive stress acts on this bonding interface. Therefore, the silicon nitride plate 110
Since the wiring is not destroyed and the wiring metal layer 130 and the back surface metal layer 120 are not peeled off, excellent insulation is maintained. The above is
Each member of the circuit board 125 is adjusted to have an appropriate thickness, and the wiring metal layer 130 and the back surface metal layer 120 and the silicon nitride plate 110 having the same quality and the same physical properties are dense and strong Al, S.
i, Mg based on a thin nitride layer.

On the other hand, although the discharge start voltage of the comparative sample is initially equivalent to that of the insulated semiconductor device 900 of this embodiment, it gradually decreases as the number of tests increases, and becomes approximately 1 kV after 30,000 cycles. It shows a constant value. The reason why the insulation deterioration of the comparative sample is earlier than that of the insulated semiconductor device 900 is that the wiring metal layer and the back surface metal layer are separated from the AlN plate, or the mechanical properties of the AlN plate region corresponding to the wiring metal layer and the back surface metal layer are mechanically affected. This is because destruction proceeded early. When the insulator is destroyed and the wiring metal layer or the back surface metal layer is peeled off, the electric field becomes extremely high in these portions, and a discharge is generated. Along with mechanical destruction of the AlN plate region and peeling of the bonding interface between the wiring metal layer or the backside metal layer and the AlN plate, the balance between the appropriate thicknesses of the wiring metal layer, the backside metal layer, and the AlN plate is lost. This further accelerates breakage and peeling. Each member of the circuit board of the comparative sample was adjusted to have an appropriate thickness range, and the wiring metal layer and the back metal layer having the same quality and the same physical property were formed, but the bonding interface was kept dense and strong, for example, Si.
No thin nitride layer of Mg or Mg is present.

The insulated semiconductor device 900 of this embodiment was fixed by screwing a piano wire having a diameter of 200 μm on a flat Al fin. The tightening torque at this time is 45 kgf-c
m (for each screw). After this tightened state was continued for 30 days, the tightening was released. No mechanical damage to the circuit board 125 or deterioration of the electrical function of the insulated semiconductor device 900 due to this test was observed in any of the samples (10 pieces) put in. This is because each member of the circuit board 125 is adjusted to have an appropriate thickness so that the circuit board 125 does not break even if new stress or strain due to an external force is superposed thereon. Is precise and strong A
It is based on the fact that they are joined by a thin nitride layer of l, Si and Mg. On the other hand, a similar test (the number of samples: 10
Pieces). As a result, crack breakage of the AlN plate and peeling of the wiring metal layer and the backside metal layer were observed in the four samples. Even though each member that constitutes the circuit board is adjusted to an appropriate thickness, these breakage and peeling occurred.
This is because no nitride other than Al, for example, Si or Mg, is formed at the bonding interface, so that the members are not densely and firmly bonded.

Further, in this embodiment, the insulating semiconductor device 90 is used.
0 was dropped onto the concrete floor from a height of 1.5 m. Circuit board 1 for all 10 test samples
No mechanical damage to No. 25 or deterioration of the electrical function of the insulated semiconductor device 900 was observed. This is the circuit board 125
Each member is adjusted to have an appropriate thickness, and the wiring metal layer 130 and the back surface metal layer 120 are bonded to the silicon nitride plate 110 by a dense and strong nitride thin layer of Al, Si, and Mg. .

The insulated semiconductor device 900 of this embodiment is shown in FIG.
Can be used for controlling the rotation speed of the electric motor 960. Further, the inverter device and the electric motor can be incorporated in an electric vehicle as a power source thereof. In this vehicle, shock during shifting is reduced, smooth running is possible, and vibration and noise can be reduced.

Further, the inverter device incorporating the insulated semiconductor device 900 is an air conditioner (power consumption during cooling: 5 k
W, power consumption during heating: 3 kW). At this time, it is possible to obtain higher efficiency than in the case of using the conventional AC motor. This helps to reduce the power consumption when using the air conditioner. Further, the time from the start of the operation of the room until it reaches the set temperature can be shortened as compared with the case where the conventional AC motor is used.

The same effect as that of this embodiment can be obtained even when the insulating semiconductor device 900 is incorporated in a device for stirring or flowing another fluid, such as a washing machine or a fluid circulating device.

The wiring metal layer 130 and the back metal layer 12
The Al alloy constituting 0 is not limited to the materials shown in this embodiment. Si, Ge, Mn, Mg, Au, Ag, Ca,
Cu, Ni, Pd, Sb, Te, Ti, V, Zn, Zr
It is an alloy composed of at least one metal selected from the group and Al, and the alloy materials listed in Table 1 are particularly preferable. Further, the solder materials 113, 114, and 124 are not limited to only the material (Sn-5 wt% Sb) disclosed in this embodiment. Depending on the manufacturing process and the required characteristics of the insulation type semiconductor device 900, particularly the heat resistance fatigue reliability, Sn, Pb, S
n, Sb, Zn, Cu, Ni, Au, Ag, P, Bi,
In, Mn, Mg, Si, Ge, Ti, Zr, V, H
An alloy composed of two or more kinds selected from the group of f and Pd can be selected. For example, Sn-3 wt% Ag-0.5 wt%
Cu, Pb-52 wt% Sn-8 wt% Bi, Au-1
2 wt% Ge, Au-6 wt% Si, Au-20 wt% S
i, Al-11.7 wt% Si, Ag-4.5Si, Au
-85 wt% Pb, Au-26 wt% Sb, Cu-6
9.3 wt% Mg, Cu-35 wt% Mn, Cu-36w
t% Pb, Cu-76.5 wt% Sb, Cu-16.5w
t% Si, Cu-28wt% Ti, Cu-10wt% Z
A solder material such as r can be applied.

[Embodiment 2] In this embodiment, an insulated semiconductor device 900 for a computer power supply to which a circuit board 125 made of an aluminum nitride plate 110 is applied will be described.

FIG. 13 is a plan view and a sectional view for explaining a circuit board for the insulated semiconductor device of this embodiment. (A) is a plan view of a side on which a semiconductor element substrate is mounted, (b) is a sectional view,
(c) shows the top view of the side joined with a support plate. The aluminum nitride plate as the ceramic plate 110 is a sintered body having a coefficient of thermal expansion of 4.3 ppm / ° C., a coefficient of thermal conductivity of 170 W / m · K, a thickness of 0.63 mm, and a size of 21 × 30 mm. A wiring metal layer 130 (131, 132) is formed on one main surface of the aluminum nitride plate 110, and a back surface metal layer 120 is formed on the other main surface. Wiring metal layer 130 (1
31 and 132) and the back surface metal layer 120 have the same quality and the same physical properties as an Al alloy (Al-3 wt% Cu-7.5 wt% Si-
0.3 wt% Mg-1 wt% Zn-0.9 wt% Fe-
0.5 wt% Mn-0.5 wt% Ni-0.3 wt% S
n, solid phase point: about 560 ° C.), and is formed by press-fitting and casting a molten metal 125 ′ made of this Al alloy in the same manner as in the first embodiment. Wiring metal layer 130 (131, 132)
Has a thickness of 0.8 mm and the backside metal layer 120 has a thickness of 0.35 mm. The surfaces of the wiring metal layers 130 (131, 132) and the back surface metal layer 120 are plated with Ni (thickness: 5 μm).
m) is provided (not shown).

Aluminum nitride plate 110 and wiring metal layer 1
30 and the back surface metal layer 120 are components (Al, C) of the Al alloy molten metal 125 ′ during the cooling process of the Al alloy molten metal 125 ′.
u, Si, Mg, Zn, Fe, Mn, Ni, Sn) reacts with the surface of the aluminum nitride plate 110, and as a result, Al, Cu, Si, Mg, Zn, Fe, generated at the interface.
It is joined by a nitride layer of Mn, Ni and Sn. This nitride layer is thin and dense with a thickness of 0.1 μm or less, and is uniformly formed over the entire interface. Aluminum nitride plate 11
The bonding strength between 0 and the wiring metal layer 130 and the back surface metal layer 120 is as strong as 70 MPa or more. Further, the wiring metal layer 130 and the back surface metal layer 120 are the same molten metal 12
5'is used as the supply source, and the interfacial nitride layer is also generated under the same conditions. Therefore, the wiring metal layer 130 and the back surface metal layer 120 formed on the circuit board 125 can be regarded as being substantially the same ( Composition, physical properties, interface state).

The circuit board 125 is subjected to a temperature cycle test (-5
5 to 150 ° C., the number of samples: 20). The crack generation state of the aluminum nitride plate 110 and the peeling state of the wiring metal layer 130 and the back surface metal layer 120 were observed. None of the above failures were observed by the 10,000 cycle test. The circuit board 125 has an excellent breakdown resistance because the constituent members are adjusted to have an appropriate thickness, the wiring metal layer 130 and the back surface metal layer 120 are made of an Al alloy of the same quality and the same physical properties, and are formed at the interface. It is based on the fact that the nitride layer is thin and dense and is uniformly formed over the entire interface.

The circuit board 125 was subjected to the following drop test. In this test, the circuit board 125 is 1.
It was dropped (3 times) on the concrete floor from a height of 5 m 2. After this test, the dielectric strength of the circuit board 125 was examined. Dielectric strength is in the initial stage (AC voltage 3000V x 1min
It is equivalent to (no insulation deterioration upon application), and no damage to the aluminum nitride 110, the wiring metal layer 130, and the back surface metal layer 120 was observed. With respect to the excellent breaking strength of the circuit board 125, the constituent members are adjusted to have an appropriate thickness, and the wiring metal layer 13
0 and the back surface metal layer 120 are made of an Al alloy of the same quality and the same physical properties, and it is contributed that the interface nitride layer is thin and is densely and strongly formed uniformly.

FIG. 14 is a plan view, a sectional view and a circuit diagram for explaining the insulated semiconductor device of this embodiment. The insulated semiconductor device 900 shown in (a) and (b) has the following configuration. In the circuit board 125, the wiring metal layers 130 (131, 132) and the back surface metal layer 120 are formed on the aluminum nitride plate 110. On the wiring metal layer 131, the MOS FET element substrate 101 (4 pieces, 7 × 7 × 0.2) made of Si is formed.
8mm is solder material 113 (Sn-3wt% Ag-0.8)
wt% Cu alloy, thickness: 70 μm). The chip resistor 112 is fixed to the wiring metal layer 132 with a solder material 124 (Sn-3 wt% Ag-0.8 wt% Cu alloy, not shown). In addition, the back surface metal layer 120 of the circuit board 125 is a Cu support plate (25 × 3).
3 mm, thickness: 2 mm, thickness: 5 μm, Ni plating layer is formed.) Solder material 114 (Sn-3 wt% Ag-)
It is fixed by a 0.8 wt% Cu alloy, thickness: 70 μm. In these soldering processes, a paste-like solder material is applied to a predetermined portion of the circuit board 125 to form the element substrate 101.
And the chip resistor 112 are set, a paste-like solder material is applied to a predetermined portion of the Cu support plate 115, the circuit board 125 is set, and then heated in nitrogen. The process of discharging bubbles is performed. The Cu terminal 30 is integrated in advance with the epoxy resin case 20, and the case 20 is attached on the Cu support plate 115 with a silicone adhesive resin 35 (not shown). An Al wire (diameter: 300 μm) is used for the gate, the source and the drain of the element substrate 101.
m) 117 has been wire-bonded. The gate terminal 30a is shared by each element substrate 101, and the source terminal 30c and the drain terminal 30b are wired so as to be dedicated to each element substrate 101. The mounting portion of the element substrate 101 is filled with the silicone gel resin 22, and the chip resistor 1
An epoxy resin 22a (not shown) is applied to the 12 mounting portion. Silicone adhesive resin 35 in case 20
An epoxy resin lid 21 is attached by (not shown). Insulated semiconductor device 90 manufactured as described above
0 constitutes the circuit shown in (c).

FIG. 15 is a graph for explaining the transient thermal resistance characteristic of the insulating semiconductor device. The thermal resistance takes a high value as the energization time increases. The steady-state thermal resistance (energization time: after about 3 seconds) is 0.2 ° C / W, which shows excellent heat dissipation. This value has a small temperature rise of 10 deg. Even when the element substrate 101 consumes 50 W of electric power, and the element substrate 101 operates stably even when the temperature of the Cu support plate 115 reaches 140 ° C. ( It means that the safe operating temperature of the substrate is 150 ° C.). The excellent heat dissipation was as follows: (1) High thermal conductivity (170 W)
/ MK) aluminum nitride plate 110 is used,
(2) A relatively thick wiring metal layer (0.8 mm) 130 and a back surface metal layer (0.35 m) on both sides of the aluminum nitride plate 110.
m) 120 is formed, and (3) the Cu support plate 115 having excellent heat conductivity is arranged in the heat conduction path. By adopting such a structure, the heat flow emitted from the semiconductor substrate 101 is expanded by the thick wiring metal layer 130, and the expanded heat flow is transferred without staying in the aluminum nitride plate 110 having high thermal conductivity, and the transferred heat flow. The back metal layer 1 has a large thickness of 0.35 mm and a relatively large heat capacity.
20 and the Cu support plate 115.

The insulated semiconductor device 900 has -40 to 12
A 5 ° C. temperature cycle test was performed. As a result of measuring the thermal resistance after continuing this test for 1,000 cycles, the initial value of 0.2 ° C./W was maintained. Also, peeling of each laminated interface of the insulating semiconductor device 900 by ultrasonic flaw detection,
The peeling occurrence state of the wiring metal layer 130 and the back surface metal layer 120,
The crack generation state of the aluminum nitride plate 110 was examined. As a result, no fracture was detected on any of the observation interfaces and members. The reason why such excellent reliability is obtained is that the circuit board 125 having the selected thickness is applied to the insulating semiconductor device 900. Since the aluminum nitride plate 110 is sandwiched by the wiring metal layer 130 and the back surface metal layer 120 having the same quality and the same physical properties,
The same interface state is maintained between these layers and the aluminum nitride plate 110. As a result, the fact that excessive stress and strain are prevented from acting unevenly on the interface also contributes to ensuring excellent reliability. Also, the aluminum nitride plate 110
The fact that the wiring metal layer 130 and the back metal layer 120 are bonded to each other with a nitride of a thin, dense and strong Al alloy constituent metal is another reason why the excellent temperature cycle reliability is exhibited.

Table 3 shows the optimum thickness of the constituent members of the circuit board 125 when the aluminum nitride plate is applied. Since the optimum thickness is almost the same as when applying the silicon nitride plate,
Only put together a summary.

[0089]

[Table 3]

The element substrate 101 mounted on the insulation type semiconductor device 900 includes an IGBT, a transistor, a thyristor,
It may have an electric function different from that of the MOS FET element such as a diode. The semiconductor element substrate is made of Si.
(4.2 ppm / ° C.) or a material other than Si (eg Ge:
5.8 ppm / ° C, GaAs: 6.5 ppm / ° C, GaP: 5.
3 ppm / ° C, SiC: 3.7 ppm / ° C, etc.).

FIG. 16 is a block diagram for explaining a power supply circuit device incorporating the insulated semiconductor device of this embodiment. This power supply circuit device rectifies AC power and supplies voltage-controlled power to the load circuit 86. Here, the load circuit 86 in this embodiment is an arithmetic circuit of a computer.

[Embodiment 3] In this embodiment, an insulated semiconductor device 900 for an automobile ignition device to which a circuit board 125 of another form is applied will be described.

FIG. 17 is a plan view and a sectional view for explaining a circuit board for an insulated type semiconductor device of this embodiment. (A) is a plan view of a side on which a semiconductor element substrate is mounted, (b) is a sectional view,
(C) shows the top view of the side joined with a support plate. The aluminum nitride plate as the ceramic plate 110 is a sintered body having a coefficient of thermal expansion of 4.3 ppm / ° C., a coefficient of thermal conductivity of 170 W / m · K, a thickness of 0.3 mm and a size of 10 × 13 mm. A wiring metal layer 130 is formed on one main surface of the aluminum nitride plate 110, and a back surface metal layer 120 is formed on the other main surface. The wiring metal layer 130 and the back surface metal layer 120 have the same quality and the same physical properties as an Al alloy (Al-3 wt% Cu-7.5).
wt% Si-0.3 wt% Mg-1 wt% Zn-0.9w
t% Fe-0.5 wt% Mn-0.5 wt% Ni-0.3
wt% Sn, solid phase point: about 560 ° C)
It is formed by press-fitting a molten metal 125 'made of an alloy in the same manner as in the first embodiment. The wiring metal layer 130 has a thickness of 2.
0 mm, the backside metal layer 120 has a thickness of 0.35 mm. Ni plating (thickness: 5 μm) is provided on the surfaces of the wiring metal layer 130 and the back metal layer 120 (not shown).

Aluminum nitride plate 110 and wiring metal layer 1
30 and the back surface metal layer 120 are components (Al, C) of the Al alloy molten metal 125 ′ during the cooling process of the Al alloy molten metal 125 ′.
u, Si, Mg, Zn, Fe, Mn, Ni, Sn) and the surface of the aluminum nitride plate 110 react with each other, and thereby Al, Cu, Si, Mg, Zn, F generated at the interface.
They are joined by a nitride layer of e, Mn, Ni and Sn. This nitride layer is thin and dense with a thickness of 0.1 μm or less, and is uniformly formed over the entire interface. Aluminum nitride plate 11
The bonding strength between 0 and the wiring metal layer 130 and the back metal layer 120 is as strong as 70 MPa or more. Further, since the wiring metal layer 130 and the back surface metal layer 120 use the same molten metal 125 'as a supply source, and the interfacial nitride layer is also generated under the same condition, they can be regarded as substantially the same ( Composition, physical properties, interface state).

The circuit board 125 is subjected to a temperature cycle test (-5
5 to 150 ° C., the number of samples: 20). The crack generation state of the aluminum nitride plate 110 and the peeling state of the wiring metal layer 130 and the back surface metal layer 120 were observed. None of the above failures were observed by the 10,000 cycle test. The circuit board 125 has an excellent breakdown resistance because the constituent members are adjusted to have an appropriate thickness, the wiring metal layer 130 and the back surface metal layer 120 are made of an Al alloy of the same quality and the same physical properties, and are formed at the interface. It is based on the fact that the nitride layer is thin, dense and strong, and is uniformly formed over the entire interface.

The circuit board 125 was subjected to the following drop test. In this test, the circuit board 125 is 1.
It was dropped (3 times) on the concrete floor from a height of 5 m 2. After this test, the dielectric strength of the circuit board 125 was examined. Dielectric strength is the same as in the initial stage (AC 3000V × 1min without insulation deterioration), and aluminum nitride 110,
Damage to the wiring metal layer 130 and the back surface metal layer 120 was not observed. The circuit board 125 is also excellent in breakage resistance, the constituent members are adjusted to have an appropriate thickness, the wiring metal layer 130 and the back surface metal layer 120 are made of an Al alloy of the same quality and the same physical properties, and the interface nitride layer is thin and dense. The strong and uniform generation contributes.

FIG. 18 is a bird's-eye view and a cross-sectional view illustrating the insulated semiconductor device of this embodiment. Insulated semiconductor device 900
Is mounted with an IGBT element substrate 101 made of Si and a control circuit 10 for controlling its electrical operation. Thickness 1.
The 5 mm Cu support plate 115 has a semiconductor element substrate 101,
The circuit board 125 and the control circuit 10 are mounted. The element substrate 101 (size: 4 × 4 × 0.28 mm) has a composition of Sn-5 wt% Sb− on the wiring metal layer (6 × 9 mm) 130.
It is fixed by a solder material (thickness: 200 μm) 113 made of a 0.6 wt% Ni-0.05 wt% P alloy. The back surface metal layer 120 is a solder material of the same composition (thickness: 200 μ
m) fixed at 114.

On the other hand, an alumina plate forming the control circuit 10
(19 x 10 x 0.8 mm) 5 has a thickness of about 25 μm Cu
Wiring (not shown) 203 is provided. Cu wiring 2
No. 03, Sn-3wt% Ag-0.8wt%
Chip components such as a resistor chip 15, an IC chip substrate 16, a capacitor chip 17, and a glass sleeve type Zener diode chip 18 are mounted by a solder material 24 (not shown) made of Cu alloy. As a result, each chip component 15, 16, 17, 18 is soldered to the solder material 1
The element substrate 1 is electrically connected to the Cu wiring 203 by 24.
A control circuit 10 for controlling the operation 01 is configured.
The emitter electrode and gate electrode of the element substrate 101 have a diameter of 3
It is electrically connected to the control circuit 10 by an Al thin wire 117 of 00 μm. The collector electrode (wiring metal layer 130) of the element substrate 101 is composed of the Cu wiring 203 and the Al thin wire 117.
Is electrically connected to the terminal 30 via. Control circuit 1
0 is also electrically connected to the terminal 30 by an Al thin wire 117 '.

The assembly having the above structure is
As shown in the sectional view of (b), the epoxy resin 22 is transfer-molded so that the mounting portion of the element substrate 101, the control circuit 10, and the Al thin wires 117 and 117 'are completely sealed. Epoxy resin 22 has a thermal expansion coefficient: 16 ppm / ° C., a glass transition point: 155 ° C., a volume resistivity: 9 × 10 ¹⁵ Ω · m (RT), a bending elastic modulus: 15.7 G.
It has a characteristic of Pa (1600 kgf / mm ² ). Transfer mold is performed at 180 ℃, then 150 ℃
Then, heat treatment is performed for 2 hours to accelerate the curing of the resin.

FIG. 19 is a graph showing the transition of the thermal resistance of the insulated semiconductor device of this embodiment in the temperature cycle test.
The thermal resistance is the initial value (about 0.8 ° C /
W) is maintained. Although the mounting portion of the IGBT element substrate 101 was examined after this test, the solder layers 113, 1
14, aluminum nitride plate 110, wiring metal layer 130,
No destruction occurs in any of the interface formed by the back surface metal layer 120, the aluminum nitride plate 110, the wiring metal layer 130, and the back surface metal layer 120. This is the circuit board 125
The components of the wiring metal layer 130 are adjusted to have an appropriate thickness.
And the backside metal layer 120 are made of the same material and have the same physical properties as an Al alloy, and the joint portions of the wiring metal layer 130 and the backside metal layer 120 are uniform and dense Al, Cu, Si, Mg, Zn,
This is because it is composed of a nitride layer (0.1 μm or less) of Fe, Mn, Ni, and Sn and forms a strong interface.

The thermal resistance of the insulating semiconductor device 900 is 0.8.
° C / W. This value is set such that even if the IGBT element base body 101 consumes 50 W of power, the temperature rises only 40 deg, and the circuit board 125 is mounted in a harsh environment (for example, an engine room) where the temperature rises to about 100 ° C. Even in the case, the temperature of the element substrate 101 does not exceed the limit temperature of 150 ° C. for stable operation. This is a particularly preferable point as a semiconductor device for automobiles.

FIG. 20 is a diagram for explaining the circuit of the insulating semiconductor device 900. The emitter and gate of the IGBT element substrate 101 are electrically connected to the control circuit 10, and the element 1
The operation of 01 is controlled by this circuit 10. The control circuit 10 includes a resistor chip 15, an IC chip substrate 16, a capacitor chip 17, and a Zener diode chip 18.
Are mounted, and these elements are connected by Cu wiring 203. A terminal 30 is drawn out from each of the element 101 and the control circuit 10. Insulated semiconductor device 900
Is composed of an element 101 and a circuit 10 for controlling the element 101, and is used for supplying power to a coil of an automobile engine ignition device. The insulated semiconductor device 900 having such a circuit was used to ignite an automobile engine under the environment of the maximum ambient temperature of 80 ° C. It was confirmed that the insulated semiconductor device 900 maintains its circuit function even when the vehicle travels a distance equivalent to 100,000 kilometers.

[Embodiment 4] In this embodiment, an insulated semiconductor device 900 for a 200 A class DC / DC converter to which a circuit board 125 of another form is applied will be described.

FIG. 21 is a schematic plan view for explaining the semiconductor substrate mounting side of the circuit board for insulating type semiconductor device of this embodiment.
The circuit board 125 is an alumina plate (coefficient of thermal expansion: 7.2 ppm /
℃, thermal conductivity: 20 W / m · K, thickness: 0.25 mm, size: 57 × 34 mm) 110 is a wiring metal layer 130 (131, 132) on one main surface and the other is a back surface metal A layer 120 (not shown) is formed. Wiring metal layer 1
30 (131, 132) and the back surface metal layer 120 are Al alloys (Al-28 wt% Ge-1.5w) of the same quality and physical properties.
t% Mg, solid phase point: about 420 ° C.), and is formed by press-fitting casting of an Al alloy molten metal as in the first embodiment. The wiring metal layer 130 (131, 132) has a thickness of 2.2 m.
m, the back metal layer 120 has a thickness of 1.8 mm. Wiring metal layer 130 (131, 132) and back metal layer 12
The surface of 0 is plated with Ni (thickness: 6 μm) (not shown).

The circuit board 125 was manufactured by the basic process described above (FIG. 2). The base material of the circuit board 125 is 0.
A thin alumina plate 110 having a thickness of 25 mm is used, and a thick wiring metal layer 130 (131, 132) and a back surface metal layer 1 are used.
20 are formed. Nevertheless, the circuit board 12
No. 5, which had a warp amount of 30 μm or less, was excellent in flatness, and was manufactured without breaking the alumina plate 110. This is an Al alloy (Al-28 wt% Ge-) in which the metal layers 130 and 120 are solid and have the same physical properties and solid-phase (about 420 ° C.) at a low temperature.
1.5 wt% Mg 3), each member constituting the circuit board 125 is adjusted to an appropriate thickness, and the metal layers 130, 12 are formed.
It is based on the fact that a thin (0.1 μm or less), dense and strong oxide of Al, Ge, Mg is present at the interface between 0 and the alumina plate 110.

A temperature cycle test (-
55 to 150 ° C., the number of samples: 20). Here, the occurrence of cracks in the alumina plate 110 and the peeling of the wiring metal layer 130 and the back metal layer 120 were observed. In the process up to 3000 cycles, none of the above-mentioned fractures was observed. As described above, the circuit board 125 has an excellent breakdown resistance because the metal layers 130 and 120 are solid and have the same physical properties and are solid-phased (about 420 ° C.) at a low temperature.
It is composed of an alloy (Al-28 wt% Ge-1.5 wt% Mg), each member constituting the circuit board 125 is adjusted to have an appropriate thickness, and the interface between the metal layers 130 and 120 and the alumina plate 110 is thin ( 0.1 μm or less), dense and strong A
It is based on the interposition of oxides of 1, Ge and Mg.

FIG. 22 is a plan view, a cross-sectional schematic view and a circuit diagram for explaining the insulated semiconductor device of this embodiment. The insulated semiconductor device (size: 76 × 46 × 15 mm) 900 has the following configuration. MOS FET element substrate 10 made of Si
1 (8 pieces, 9 × 9 × 0.28 mm) is Sn-3 wt% Ag− on the wiring metal layer 131 of the circuit board 125 described above.
Solder material 113 (thickness: 0.8 wt% Cu alloy)
70 μm). The back surface metal layer 120 of the circuit board 125 is an Al support plate (76 × 46 × 1.5 mm).
, 5 μm thick Ni plating) 115 on the solder material 11
4 (thickness: 70 μm). In these soldering processes, the same process as in the first embodiment is performed. On the Al support plate 115, the Cu terminal 3 is previously formed.
Epoxy resin case 2 that integrates 0, 30a and 30c
0 is attached by a silicone resin adhesive (not shown). Al gates (diameter: 300 μm) 117 are provided on the gate, source and drain of the element substrate 101, respectively.
Wire bonding has been applied. Gate terminal 3
0a is dedicated to each element substrate 101, and the auxiliary terminal 30c is 2
Wirings are shared so as to be shared by the block 101A composed of individual element bases 101. The terminal 30 also serves as an input terminal and an output terminal. The mounting portion of the element substrate 101 is filled with the silicone gel resin 22. Case 2
An epoxy resin lid 21 is attached to the substrate 0 by a silicone resin adhesive (not shown) to obtain an insulated semiconductor device 900. Insulated semiconductor device 90 manufactured as described above
0 constitutes the circuit shown in (c).

In this example, for comparison, an insulating semiconductor device (size: 76 × 46) based on the second prior art is used.
× 18 mm) was also produced. This device has a size of 57 x 3
A support plate (Al / A / A) with a porous preform formed of a 4 × 0.25 mm alumina plate and SiC powder.
A circuit board is used in which a SiC composite material, thickness: 3 mm, is joined by an Al layer having a thickness of 0.05 mm, and an Al wiring layer (thickness: 0.4 mm) is formed on the other surface of the alumina plate. On this Al wiring layer, MOS FET element substrates (8 pieces, 9 ×
9 × 0.28 mm) is Sn-3 wt% Ag-0.8 wt% C
It is fixed with a solder material made of u alloy. In addition, this comparative sample constitutes a circuit similar to that of the insulating semiconductor device 900.

The insulated semiconductor device 900 was subjected to the drop test described below. In this test, the insulated semiconductor device 90
0 from a height of 1.5 m onto the concrete floor (3
I made it. After the test, the insulated semiconductor device 900 maintained the same electrical function as in the initial stage, and no mechanical breakdown was observed.

FIG. 23 is a graph showing the transient thermal resistance characteristics of the insulated semiconductor device of this embodiment. Insulated semiconductor device 90
The thermal resistance of 0 (curve A) takes a higher value as the energization time increases. Steady-state thermal resistance (energization time: after about 3 s) is 1.5
° C / W. On the other hand, the comparative sample (curve B) has a temperature of 2 ° C.
/ W is shown. Thus, the insulated semiconductor device 900
Shows better heat dissipation than the comparative sample for the following reason. Such excellent heat dissipation is due to (1)
A thin alumina plate 110 is used. (2) Alumina plate 1
This is because the thick wiring metal layer (4 mm) 130 and the back surface metal layer (3 mm) 120 are formed on both surfaces of 10, and (3) the Al support plate 115 having excellent heat conductivity is arranged in the heat conduction path. With such a structure, the semiconductor substrate 1
The heat flow released from 01 is expanded by the thick wiring metal layer 130, the expanded heat flow is transferred without staying in the high thermal conductivity alumina plate 110, and the transferred heat flow has a large heat capacity, the back metal layer 120 and the Al support plate. Absorbed at 115. On the other hand, in the comparative sample, Al is used in the main heat conduction path.
An Al / SiC composite support plate having a lower thermal conductivity than the plate is arranged. This is the reason why the heat dissipation property is inferior to that of the insulating semiconductor device 900.

The insulating semiconductor device 900 has -40 to 12
A 5 ° C. temperature cycle test was performed. As a result of measuring the thermal resistance after continuing this test for 10,000 cycles, the initial value of 1.5 ° C./W was maintained. Also, peeling of each laminated interface of the insulating semiconductor device 900 by ultrasonic flaw detection,
The peeling occurrence status of the wiring metal layer 130 and the back surface metal layer 120,
The crack generation state of the alumina plate 110 was examined. As a result, no fracture was detected on any of the observation interfaces and members. The reason why such excellent reliability is obtained is that the insulating semiconductor device 900 is applied to the circuit board 125 made of a member having a selected thickness, and the wiring metal layer 130 and the back surface metal layer having the same and same physical properties are used. This is because the alumina plate 110 is sandwiched by 120 and the layers and the alumina plate 110 are kept at the same interface state, so that excessive stress and strain are prevented from acting unevenly on the interface. Also,
The wiring metal layer 130, the back metal layer 120, and the alumina plate 1
The interfaces between 10 are joined by a thin oxide layer of a dense and strong Al alloy constituent. This point also contributes to ensuring excellent reliability.

The insulation type semiconductor device 900 is 200A
It is of a grade, and the allowable thermal resistance is 2 ° C./W or less. The optimum thicknesses of the constituent members of the circuit board 125 selected from such a viewpoint are as shown in Table 4. The optimum thickness is almost the same as in the case of applying the silicon nitride plate, so only the outline will be summarized.

[0113]

[Table 4]

FIG. 24 is a block diagram for explaining a DC / DC converter incorporating an insulating semiconductor device. D
The C / DC converter 90 is an insulating semiconductor device 900, and a control circuit 10 for driving the insulating semiconductor device 900.
a, a transformer 81, a rectifier circuit 82, and a smoothing and control circuit 83 are incorporated to supply the battery 85 with electric power obtained by stepping up or down the voltage of the input power supply 84, and this electric power is finally sent to the load circuit 86. Here, the load circuit refers to, for example, lighting equipment for automobiles, wipers, windows, motors as power sources for air conditioners, ignition devices for engines, sensors and the like. The above DC / DC converter device 90 was attached to an automobile, and its performance was confirmed under operating conditions corresponding to a mileage of 100,000 kilometers. As a result, it was confirmed that the insulation type semiconductor device 900 and the converter device 90 of this example maintained their intended circuit functions even after traveling 100,000 kilometers.

[Embodiment 5] In this embodiment, an insulated semiconductor device 900 using a circuit board 125 of another form will be described.

FIG. 25 is a plan view and a sectional view for explaining the details of the insulating semiconductor device circuit board of this embodiment. The silicon nitride plate 110 as the base material of the circuit board 125 is a sintered body (dimensions: 43 mm × 85 mm × 0.3 mm, coefficient of thermal expansion: 3.4 ppm /
C, thermal conductivity: 90 W / mK), and semiconductor substrate 10
On the main surface on which 1 is mounted, wiring metal layers 131, 132, and 130c (for mounting the thermistor) having a thickness of 0.8 mm are provided, and a peripheral metal layer 133 is provided so as to surround these wirings. These wiring metal layers 131, 132,
130c and the peripheral metal layer 133 are made of Al alloy (Al-0.2
wt% Cu-9 wt% Si-0.45 wt% Mg-0.5
wt% Ni-0.2 wt% Ti-0.45 wt% Mn). A back surface metal layer 120 having a thickness of 0.2 mm is formed on the opposite main surface by wiring metal layers 131, 132, 130.
c and the peripheral metal layer 133 and an Al alloy of the same quality and physical properties (Al-0.2 wt% Cu-9 wt% Si-0.45 wt
% Mg-0.5 wt% Ni-0.2 wt% Ti-0.45
wt% Mn). Peripheral metal layer 13
The wiring metal layers 131, 132, and 130c surrounded by 3 are provided in a substantially central region (30 × 50 mm) of the silicon nitride plate 110 and constitute an electrically active region. Although not shown, eight MOSFET element substrates (7 × 7 × 0.28 mm) 101 are mounted on the wiring metal layer 131. In addition, a hole 1 having a diameter of 5.6 mm is formed in the end area of the circuit board 125.
25G is provided.

The warp amount of the circuit board 125 is ± 20 μm.
(+: Convex on the wiring metal layer side, −: convex on the back metal layer side),
It showed extremely excellent flatness. The reason for this is the circuit board 1
The warp (+) due to the bimetal effect between the silicon nitride plate 110 and the backside metal layer 120 in the peripheral region of 25 is the warp (+) in the opposite direction due to the bimetal effect between the silicon nitride plate 110 and the peripheral metal layer 133. It is because it is compensated in. This point is particularly preferable in the case of an insulating semiconductor device in which the circuit board 125 is screwed as described later.

FIG. 26 is a schematic plan view and a sectional view for explaining the insulated semiconductor device of this embodiment. A MOS F is formed on the circuit board 125 in which the wiring metal layer 131 is provided on the silicon nitride plate 110.
The ET element base 101 is mounted. Circuit board 125
Is attached to the opening of the epoxy resin case 20 in which the main terminal 30 and the auxiliary terminal 31 are provided in advance. Between the element base 101 and the wiring metal layers 131 and 132, the element base 101
The wire bonding of the Al thin wire 117 is performed between the auxiliary terminal 31 and the auxiliary terminal 31, and between the wiring metal layer 131 and the main terminal 30. A silicone gel resin 22 is filled in the case 20, and an epoxy resin lid 21 is provided on the upper portion of the case 20. Here, eight element substrates 101 are fixed by solder (Sn-5 wt% Sb) 113 on the wiring metal layer 131 provided on the silicon nitride plate 110.
Soldering is performed in a low vacuum atmosphere using a flux-containing paste solder material. Further, the temperature detecting thermistor element 34 is brazed between the wiring metal layers 130c by solder (Sn-5 wt% Sb, not shown) 124, and the wiring metal layer 130c is connected to the auxiliary terminal 31 by an Al thin wire 117. There is. Although not shown in the drawing, a silicone adhesive resin 35 is provided between the case 20 and the circuit board 125 and between the case 20 and the lid 21.
It has been fixed using. There is a dent 2 in the thick part of the lid 21.
5. Holes 30 'are provided in the main terminals 30, and screws (not shown) for connecting the insulated semiconductor device 900 to the external circuit wiring are housed therein. The main terminal 30 and the auxiliary terminal 31 are copper plates punched and molded in a predetermined shape in advance and plated with Ni, and are attached to the case 20 by a transfer molding method. The insulated semiconductor device 900 of the present embodiment having the above configuration has a size of 45 mm.
It has outer dimensions of 87 mm x 12 mm. Circuit board 12
Reference numeral 5 designates an insulating semiconductor device 90 together with a case 20 and a lid 21.
The outer metal layer of the backside metal layer 1
20 constitutes the surface of the bottom lid. The case 20 is provided with a hole 125F for tightening a screw when the insulating semiconductor device 900 is attached to the casing.

The insulating semiconductor device 900 constitutes the circuit shown in FIG. In addition, the insulated semiconductor device 9 of this embodiment
00 was finally incorporated into the inverter device for controlling the rotation speed of the electric motor 960 shown in FIG. Since both are the same as those in the first embodiment, the description thereof will be omitted.

The insulation type semiconductor device 900 has a temperature of 0.25 ° C./W.
It showed a steady thermal resistance of. This value is 4 MOS FE
Each of the T-element substrates 101 has a power of 100 W (total 40
(0 W) is consumed, the temperature of the base 101 rises only by 25 deg, which means that the insulated semiconductor device 900 can operate stably even when operating in a harsh environment such as 125 ° C. (the stability of the element base 101). Operating temperature is 150 ℃
in the case of). The reason for such excellent heat dissipation is (1)
The main heat conduction path is composed only of the circuit board 125 having a high heat conductivity, (2) there is no supporting plate or a solder layer for fixing it, and (3) the solder layer 113 is brazed in a low vacuum atmosphere. Since it is void-free, (4) the back surface metal layer 120 is formed by the flow of the Al alloy and is void-free, and (5) the silicon nitride plate 110, the wiring metal layer 130, and the back surface metal layer 120. The joint interface with is A
This is because they are densely joined with a thin nitride layer of 1, Cu, Si, Mg, Fe, Ti, and Mn, and the heat flow is efficiently transmitted.

The insulating semiconductor device 900 has -40 to 12
Although the temperature cycle test was conducted at 5 ° C., no increase in thermal resistance was observed in the insulated semiconductor device 900 in the test up to 10,000 cycles. The insulation type semiconductor device 900 is applied with (1) the circuit board 125 having a selected thickness configuration, and (2) the silicon nitride plate 110 is sandwiched between the wiring metal layer 130 and the back surface metal layer 120 having the same and same physical properties. And the bonding interface between these layers and the silicon nitride plate 110 is kept in the same state (composition and physical properties), and (3) the interface is A
It is firmly and densely bonded by the nitride thin layer of the added metal of the 1 alloy, and (4) As a result, excessive stress or strain does not act unevenly on the bonding interface of the wiring metal layer 130 or the back surface metal layer 120,
(5) Peeling and fatigue damage of the wiring metal layer 130 and the back surface metal layer 120 can be suppressed. This is the reason why the insulating semiconductor device 900 has excellent heat dissipation reliability.

The insulated semiconductor device 900 was subjected to an intermittent energization test (repeated energization so that the temperature of the circuit board 125 changes from 30 to 100 ° C.) and the transition of thermal resistance was traced. As a result, the insulated semiconductor device 900 maintained the same thermal resistance as the initial value (0.25 ° C./W) up to 30,000 cycles. Although the thermal resistance gradually increased after 30,000 cycles, the life is defined as 0.3 in the present invention up to about 100,000 cycles.
It did not exceed 8 ° C / W. In this way, the insulated semiconductor device 900 exhibits excellent intermittent current resistance.
It is based on the reasons (1) to (5) described above.

In the above-mentioned intermittent energization test, the wiring metal layer 13
Evaluation on insulation of the laminated structure from 1 to the back surface metal layer 120 (transition of corona discharge starting voltage at charge amount 100 pC) was also advanced. The insulation type semiconductor device 900 has an initial value of about 8 kV, but it is about 8 kV even after 130,000 cycles.
And hardly changes. From this, it was confirmed that the insulated semiconductor device 900 stably maintains excellent insulating properties. When the silicon nitride plate 110 is mechanically broken or the wiring metal layer 130 and the back surface metal layer 120 are peeled off, the electric field becomes extremely high in these portions and a discharge is generated. However, in the insulating semiconductor device 900, the wiring metal layer 130 and the back surface metal layer 120 are firmly bonded, and excessive stress does not act on the bonding interface. As a result, the silicon nitride plate 110 is not broken and the wiring metal layer 130 and the back surface metal layer 120 are not peeled off, so that excellent insulation is maintained.

The insulating semiconductor device 900 was subjected to the same tightening test as in Example 1 under a screw tightening torque of 50 kgf-cm. Circuit board 125 according to this test
No mechanical damage or deterioration of the electrical function of the insulated semiconductor device 900 was observed in any of the loaded samples (10 pieces). In addition to the above (1) to (5), this is because the back surface metal layer 120 of the circuit board 125 functions as a reinforcing material for the silicon nitride plate 110, and the peripheral metal layer 133 of the circuit board 125 also includes the silicon nitride plate 110. Based on functioning as a reinforcing material.

The insulation type semiconductor device 900 was subjected to the same drop test as in the first embodiment. Test input sample number 10
No mechanical damage to the circuit board 125 or deterioration of the electrical function of the insulated semiconductor device 900 was observed in any of the pieces. This is based on the fact that the back surface metal layer 120 and the peripheral metal layer 133 of the circuit board 125 function as a reinforcing material of the silicon nitride plate 110, in addition to the above (1) to (5).

The insulated semiconductor device 900 was incorporated into various devices similar to those of the first embodiment, and excellent performance and reliability were confirmed.

[Embodiment 6] In this embodiment, an insulation type semiconductor device 900 using a circuit board 125 of another form will be described. The insulated semiconductor device 900 has the same function as that of the fifth embodiment.

FIG. 27 is a plan view and a sectional view for explaining the details of the insulating semiconductor device circuit board of this embodiment. Since the circuit board 125 is basically the same as that of the fifth embodiment, detailed description thereof will be omitted and only different points will be described. Areas of the peripheral metal layer 133 and the back surface metal layer 120 are narrowed so that the silicon nitride plate 110 is exposed in the end region of the silicon nitride plate 110 and the region of the hole 125G.

By adopting such a structure, the silicon nitride plate 110, the peripheral metal layer 133 and the back surface metal layer 120 are formed.
The peel resistance between the two is improved. When the circuit board 125 was subjected to a temperature cycle test (−55 to 150 ° C., 6000 cycles, the number of input samples: 20), no peeling of the peripheral metal layer 133 or the back surface metal layer 120 was observed.

An insulating semiconductor device 900 similar to that in the fifth embodiment was manufactured using the above circuit board 125. As a result, it was confirmed that the performance of the insulated semiconductor device 900 was equivalent to that of the fifth embodiment. Further, although the same temperature cycle test as in Example 5 was applied for 12,000 cycles, it was confirmed that the thermal resistance of the insulating semiconductor device 900 maintained the same value as the initial value. As described above, according to the insulated semiconductor device 900 of the present embodiment, it is possible to secure further excellent reliability. The reason is that the peripheral metal layer 133 and the back surface metal layer 120 are formed so that the areas thereof are narrowed so that the silicon nitride plate 110 is exposed in the end region of the silicon nitride plate 110 and the region of the hole 125G.

[Embodiment 7] In this embodiment, an edge type semiconductor device 900 using a circuit board 125 of another form will be described. The insulated semiconductor device 900 has the same function as that of the fifth embodiment.

FIG. 28 is a schematic sectional view for explaining the details of the insulating type semiconductor device circuit board of this embodiment. Circuit board 12
5 is basically the same as the case of the fifth embodiment, so detailed description will be omitted and only different points will be described. Wiring metal layer 1
The edges of 30, 132 and the backside metal layer 120 have an angle of about 60 °.
Inclination 1 (angle formed with main surface of silicon nitride plate 110)
50 are provided. Due to this inclination, the silicon nitride plate 11
0, the stress concentrated on the junction interface end portion between the wiring metal layers 130 and 132 and the back surface metal layer 120 is reduced.

With such a structure, the silicon nitride plate 110 is cracked and the wiring metal layers 130, 1 are broken.
The peeling resistance of the backside metal layer 32 and the backside metal layer 120 is improved. A temperature cycle test (-55 to 150 ° C, 6
000 cycles, the number of input samples: 20), the silicon nitride plate 110 was cracked and the peripheral metal layer 1
No peeling of 33 or the back surface metal layer 120 was observed at all.

An insulating semiconductor device 900 similar to that of the fifth embodiment was manufactured using the above circuit board 125. As a result, it was confirmed that the performance of the insulated semiconductor device 900 was equivalent to that of the fifth embodiment. Further, although the same temperature cycle test as in Example 5 was applied for 130,000 cycles, it was confirmed that the thermal resistance of the insulated semiconductor device 900 maintained the same value as the initial value. As described above, according to the insulating semiconductor device 900, further excellent heat radiation reliability can be secured. The reason for this is that the area of the peripheral metal layer 133 and the back surface metal layer 120 is reduced, and the slope 150 is provided in addition to the point that the silicon nitride plate 110 is exposed in the end region of the silicon nitride plate 110 and the region of the hole 125G. It depends.

[0135]

According to the present invention, the thermal stress or strain generated during manufacturing or operation is reduced, there is no fear of deformation, modification or destruction of each member, and the heat dissipation and reliability are high and the cost is low. An insulating semiconductor device can be obtained.

[Brief description of drawings]

1A and 1B are a plan view and a schematic sectional view illustrating details of a circuit board for an insulating semiconductor device of the present invention.

FIG. 2 is a comparison of manufacturing processes of a circuit board for an insulating semiconductor device of the present invention and a conventional circuit board.

FIG. 3 is a plan view and a cross-sectional schematic view illustrating the basic structure of the insulated semiconductor device of the present invention.

FIG. 4 is a graph illustrating the dependency of the wiring metal layer thickness on the thermal resistance, stress, and reliability of the insulated semiconductor device.

FIG. 5 is a graph illustrating the backside metal layer thickness dependence of thermal resistance, void ratio, and reliability.

FIG. 6 is a graph illustrating the dependence of the crack destruction rate and the thermal resistance increase rate on the silicon nitride plate thickness.

FIG. 7 is a graph illustrating the transition of thermal resistance of the insulated semiconductor device of the present invention in a temperature cycle test.

FIG. 8 is a schematic sectional view illustrating a method for manufacturing a circuit board for an insulated semiconductor device according to an embodiment.

FIG. 9 is a diagram illustrating a circuit of an insulating semiconductor device.

FIG. 10 is a diagram illustrating a circuit of an inverter device incorporating an insulating semiconductor device.

FIG. 11 is a graph illustrating the transition of thermal resistance due to the intermittent current test.

FIG. 12 is a graph illustrating the transition of the corona discharge inception voltage between the wiring metal layer and the back surface metal layer by the intermittent current test.

13A and 13B are a plan view and a cross-sectional view illustrating a circuit board for an insulated semiconductor device according to another embodiment.

FIG. 14 is a plan view, a cross-sectional view, and a circuit diagram illustrating an insulated semiconductor device according to another embodiment.

FIG. 15 is a graph illustrating transient thermal resistance characteristics of an insulating semiconductor device.

FIG. 16 is a block diagram illustrating a power supply circuit device incorporating an insulated semiconductor device according to another embodiment.

17A and 17B are a plan view and a cross-sectional view illustrating a circuit board for an insulated semiconductor device according to another embodiment.

FIG. 18 is a bird's-eye view and a cross-sectional view illustrating an insulated semiconductor device according to another embodiment.

FIG. 19 is a graph for explaining the transition of thermal resistance of the insulated semiconductor device of another example in a temperature cycle test.

FIG. 20 is a diagram illustrating a circuit of an insulating semiconductor device.

FIG. 21 is a schematic plan view illustrating a semiconductor substrate mounting side of a circuit board for an insulated semiconductor device according to another embodiment.

22A and 22B are a plan view, a cross-sectional schematic view, and a circuit diagram illustrating an insulated semiconductor device according to another embodiment.

FIG. 23 is a graph illustrating transient thermal resistance characteristics of another example insulated semiconductor device.

FIG. 24 is a DC / DC in which an insulating semiconductor device is incorporated.
It is a block diagram explaining a converter.

FIG. 25 is a plan view and a cross-sectional view illustrating details of a circuit board for an insulated semiconductor device according to another embodiment.

FIG. 26 is a plan view and a cross-sectional schematic diagram illustrating an insulated semiconductor device according to another embodiment.

FIG. 27 is a plan view and a cross-sectional view illustrating details of a circuit board for an insulated type semiconductor device according to another embodiment.

FIG. 28 is a schematic sectional view illustrating details of a circuit board for an insulated type semiconductor device according to another embodiment.

[Explanation of symbols]

5 ... Alumina plate, 10, 10a ... Control circuit, 15, 11
2 ... Resistor chip, 16 ... IC chip base, 17 ... Capacitor chip, 18 ... Glass sleeve type Zener diode chip, 20 ... Epoxy resin case, 21 ... Epoxy resin lid, 22 ... Silicone gel resin, Epoxy resin, 2
5 ... dent, 30 ... main terminal, 30 ', 125F, 125G ...
Hole, 30a ... Gate terminal, 30b ... Drain terminal, 30
c ... Source terminal, 30in ... Input main terminal, 30out ... Output main terminal, 31 ... Auxiliary terminal, 34 ... Temperature detecting thermistor element, 35 ... Silicone adhesive resin, 81 ... Transformer, 82
... rectifier circuit, 83 ... smoothing and control circuit, 84 ... input power supply, 85 ... battery, 86 ... load circuit, 90 ... DC / DC converter, 101 ... MOS FET element base, semiconductor base, 110 ... ceramics plate, silicon nitride plate , Aluminum nitride plate, alumina plate, 113, 114, 124 ... Solder, 115 ... Support plate 117, 117 '... Al fine wire, 1
20 ... Back metal layer, 120 ', 130' ... Space, 125
... circuit board, 125 '... molten Al alloy, 125a' ... sprue, 125b '... runner, 125c' ... discharge port, 130,
131, 132, 130c ... Wiring metal layer, 133 ... Peripheral metal layer, 150 ... Inclination, 203 ... Cu wiring, 900 ... Insulating semiconductor device, 910 ... Block, 920 ... Upper mold,
921 ... Lower mold, 960 ... Electric motor.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hironori Kodama             7-1-1, Omika-cho, Hitachi-shi, Ibaraki Prefecture             Inside the Hitachi Research Laboratory, Hitachi Ltd. (72) Inventor Mamoru Iizuka             190 Kashiwagi, Kojiro City, Nagano Prefecture             Hitachi Semiconductor Group (72) Inventor Kenji Koyama             190 Kashiwagi, Kojiro City, Nagano Prefecture             Hitachi Semiconductor Group F term (reference) 5F036 AA01 BA23 BB01 BC06

Claims (10)

[Claims] 1. A semiconductor substrate is fixed on a wiring metal layer provided on one surface of a ceramic plate, and the other surface of the ceramic plate is fixed on a supporting member via a back metal layer, and the wiring metal layer is formed. And the backside metal layer is made of an Al alloy. 2. A semiconductor substrate having a thickness of 0.1 to 1.2 mm provided on one surface of a ceramic plate having a thickness of 0.25 to 1.0 mm.
Of the ceramic plate, and the other surface of the ceramic plate is fixed to a supporting member having a thickness of 1 to 10 mm via a back surface metal layer having a thickness of 0.25 to 0.5 mm. An insulating semiconductor device, wherein the back metal layer is made of aluminum (Al) or an aluminum (Al) alloy. 3. A plurality of semiconductor substrates are fixed to a wiring metal layer provided on one surface of a ceramic plate, and the other surface of the ceramic plate is fixed to a supporting member via a back metal layer, The metal layer and the back metal layer are made of aluminum (Al) or an aluminum (Al) alloy,
An insulating semiconductor device, wherein the semiconductor substrate and the ceramic plate are covered with a resin container. 4. A semiconductor substrate is fixed on a wiring metal layer provided on one surface of a ceramic plate, and the other surface of the ceramic plate is fixed on a supporting member via a back metal layer, and the wiring metal layer is formed. And the back metal layer is aluminum
An insulating semiconductor device, which is made of (Al) or an aluminum (Al) alloy and in which the mounting portion of the ceramic plate is a recess. 5. The insulating semiconductor device according to claim 4, wherein the semiconductor substrate and the ceramic plate are covered with a resin container. 6. The method according to any one of claims 1 to 5,
The insulating semiconductor device, wherein the ceramic plate contains at least one of silicon nitride, aluminum nitride, and alumina. 7. The method according to any one of claims 1 to 5,
The wiring metal layer and the back metal layer are made of aluminum and S
i, Ge, Mn, Mg, Au, Ag, Ca, Cu, N
An insulated semiconductor device comprising at least one metal of i, Pd, Sb, Te, Ti, V, Zn or Zr. 8. The method according to any one of claims 1 to 5,
The surface of at least one of the wiring metal layer and the back metal layer is Au, Ag, Cu, Ni, Pd, Pt, Sn.
Alternatively, the insulating semiconductor device is characterized by being coated with at least one metal of Zn. 9. The method according to any one of claims 1 to 5,
The semiconductor substrate is Sn or Pb, S on the wiring metal layer.
n, Sb, Zn, Cu, Ni, Au, Ag, P, Bi,
In, Mn, Mg, Si, Ge, Ti, Zr, V, Hf
Alternatively, the insulating semiconductor device is fixed by an alloy composed of at least two metals of Pd. 10. An insulating semiconductor device according to claim 1, wherein the semiconductor substrate has at least one of Si, Ge, SiC, GaAs or GaP as a base material.