JP2003258150A - Insulated type semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a low-cost insulated semiconductor device having superior heat dissipation property and high reliability, without the possibility of deformation, denaturation, and destruction of each member, wherein thermal stress or thermal distortion occurring during manufacturing or during operation is reduced. <P>SOLUTION: An outer casing is constructed with a resin case, having an opening provided therein and a ceramics insulating plate mounted on the opening, and the ceramics insulating plate is constructed with a 0.1 to 2.3 mm thickness wiring metal layer provided on one principal surface of a 0.25 to 1.25 mm thickness ceramics plate and a 0.025 to 2.0 mm thickness back surface metal layer provided on the other principal surface. A semiconductor device substrate is fixed onto the wiring metal layer, and the wiring metal layer and the back surface metal layer are made of an Al alloy, having the same quality and physical property as each other, and further, the ceramics insulating plate constitutes a bottom cover of the outer casing. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating semiconductor device,
In particular, the present invention relates to an insulating semiconductor device having a structure in which an insulating member is used as a bottom lid of an envelope.

[0002]

2. Description of the Related Art In an insulated semiconductor device represented by a power module, all electrodes are electrically insulated from a metal supporting member, and these electrodes are insulated from all package members including the metal supporting member by an insulating member. Be pulled out to the outside. Therefore, even in the use example in which the pair of main electrodes are floated from the ground potential on the circuit, the package can be fixed to the ground potential portion regardless of the electrode potential, so that the semiconductor device can be easily mounted.

In the insulated semiconductor device, in order to safely and stably operate the semiconductor element housed in the device, it is necessary to efficiently dissipate the heat generated during the operation of the device to the outside of the package. This heat dissipation is usually achieved by transferring heat from the semiconductor element substrate, which is a heat source, to the air through each member bonded thereto. Insulated semiconductor devices generally include an insulator, an adhesive layer used in a portion for adhering a semiconductor substrate, and a metal supporting member in the heat transfer path.

Further, as the electric power handled by a circuit including a semiconductor device becomes higher or the required reliability (stability over time, moisture resistance, heat resistance, etc.) becomes higher, complete insulation is required. The heat resistance referred to here includes not only the case where the ambient temperature of the semiconductor device rises due to an external cause but also the case where the electric power handled by the semiconductor device is large and the heat generated in the semiconductor substrate is large.

Since an insulated semiconductor device generally incorporates a certain electric circuit including a semiconductor element substrate,
It is necessary to electrically insulate at least a part of the circuit from the support member. For example, as the first prior art, Japanese Unexamined Patent Publication No.
JP-A-289266 discloses forming a circuit pattern for mounting an electronic component from an Al plate joined to one surface of a ceramics plate made of AlN, alumina or the like, and joining an Al plate for forming a heat radiation portion to the other surface. The Al-ceramic composite substrate is disclosed.

As a second prior art, Japanese Patent Laid-Open No. 2000-27
In Japanese Patent Publication No. 7953, a ceramic plate and a porous preform formed of SiC powder are arranged adjacent to each other, and the preform is impregnated with molten Al to manufacture an Al / SiC composite material, and at the same time, an Al / SiC composite material and a ceramic material. A circuit board is disclosed in which plates are integrally joined by molten Al and an Al circuit portion is formed on the surface of a ceramic plate.

Third prior art, Japanese Patent Laid-Open No. 59-4605
No. 1 discloses a functional part in which a semiconductor substrate is bonded to a metal plate provided on an inorganic insulating member with a metal brazing material, and a protective member provided with openings so as to penetrate both main surfaces of a flat plate metal. There is disclosed an insulating semiconductor device in which the functional portion is fixed to the opening, and a space formed by the opening and the functional portion of the protective member is filled with an insulating resin.

Fourth prior art, Japanese Patent Laid-Open No. 6-18836
Japanese Patent Publication No. 3 is a semiconductor module in which a semiconductor element is housed in a box-shaped envelope, and the bottom of the envelope includes a power board main body including a heat-resistant insulating material, and the power board main body of the power board body. A power wiring pattern, which is arranged on the upper main surface and to which semiconductor elements are connected, and a plate material, which is arranged on the lower main surface of the power substrate main body and is substantially the same material as the power wiring pattern, are integrally formed. Disclosed is a semiconductor module including a power substrate formed, wherein the plate material is exposed on the lower back surface of the envelope.

A fifth prior art, Japanese Patent Laid-Open No. 11-3303
No. 11 publication discloses a silicon nitride substrate having a thermal conductivity of 60 w / m · K or more, a semiconductor element mounted on this substrate,
A metal circuit board made of Cu bonded to the semiconductor element mounting surface of the board and a single metal plate made of Cu bonded to the semiconductor element non-mounted surface of the board and integrally bonded to the equipment casing or the mounting board. A semiconductor module provided is disclosed.

Japanese Unexamined Patent Publication No. 7-24973, which is the sixth prior art.
Japanese Patent Publication No. 4 has a board on which a power element is mounted, a terminal holder electrically connected to the power element, and an envelope for casing the power element and the terminal holder. In a high-power semiconductor device in which a resin is filled in a space inside the envelope formed by the resin so that the terminal holder is drawn out to the outside, a substrate mounting groove is provided in the lower portion inside the side wall of the envelope, and the substrate is a substrate. A high-power semiconductor device configured to be mounted in a mounting groove to serve as a bottom lid of an envelope is disclosed.

[0011]

When the amount of heat generated in the semiconductor device is small and the required reliability is not so high, there is no problem in using any material as a member constituting the device. However, when a large amount of heat is generated and high reliability is required, the member to be applied must be selected.

In the conventional insulated semiconductor device, the semiconductor substrate is fixed to the circuit pattern side of the circuit board as disclosed in the first prior art by soldering, and the heat sink side is C-side.
Generally, a metal supporting plate such as u or Mo or a composite supporting plate such as Al / SiC material is integrated by soldering.

In the case of such a structure, the thermal expansion coefficients of the support plate and the insulating member are not completely the same even though they are close to each other. Due to this point, there is a problem that the solder layer is broken, the heat flow path is blocked, and the reliability is lowered due to the breakage of the insulating member. Further, the number of members constituting the insulating semiconductor device and the number of assembling steps are large, and there is a problem in cost.

An object of the present invention is to reduce the thermal stress or thermal strain generated during manufacturing or operation, to prevent the deformation, modification, or destruction of each member, to provide a highly reliable, low-cost insulated semiconductor device. Is to provide.

[0015]

In the insulated semiconductor device of the present invention which achieves the above object, an envelope is constituted by a resin case having an opening and a ceramics insulating plate mounted in the opening. The ceramic insulating plate is composed of a wiring metal layer provided on one main surface of the ceramic plate and a back metal layer provided on the other main surface, and the semiconductor element substrate is fixed on the wiring metal layer. Layer and the back metal layer are Al
It is composed of an alloy, and the ceramic insulating plate constitutes a bottom lid of the envelope.

Based on such a structure, a strong bondability is imparted, excellent heat dissipation and reliability are maintained, and further, it is possible to contribute to obtain an inexpensive insulated semiconductor device.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Here, (1) thermal stress, strain, and damage to an insulating plate in a semiconductor device, (2) thermal engagement and damage to the insulating plate due to warpage, and (3) assembly man-hour / lead-free solder The problem of the complication is described below. (1) Thermal stress, strain, and damage of insulating plate Since the ceramic insulating plate as an insulating member and the supporting plate have different thermal expansion coefficients, residual thermal stress or thermal strain occurs in these integrated products. When the ceramics insulating plate and the supporting plate are integrated, a heat treatment step of heating to above the melting point of the solder material and then cooling to room temperature is performed. In this case, each member contracts in accordance with the coefficient of thermal expansion specific to each member while being fixed to each other at the solidification point of the solder material, and thermal stress or thermal strain remains at the bonded portion and deformation occurs. Generally, a semiconductor substrate for electric power has a large size, and since a plurality of semiconductor substrates and other elements are mounted in an insulating semiconductor device, the area of an insulating substrate and a brazing part also becomes large. Therefore, residual thermal stress and thermal strain are large, and deformation of each member is easily promoted. Thermal stress during operation is repeatedly applied to the insulated semiconductor device, and when this is superimposed on the residual thermal stress or thermal strain,
Fatigue failure of the solder layer (particularly # 2 solder layer described later) interrupts the heat flow path and damages the ceramic insulating plate having mechanically brittle properties. Such a matter not only hinders the normal operation of the insulated semiconductor device, but also leads to a safety problem particularly typified by damage to the insulated substrate. (2) Thermal engagement due to warpage and damage to insulating plate Since the ceramic insulating plate and the supporting plate have different thermal expansion coefficients, warpage occurs in these integrated products. If the insulating semiconductor device is warped, the heat conductive grease is not uniformly loaded when the semiconductor device is mounted on the cooling fin. As a result, the thermal engagement between the support plate and the cooling fin is not good, the heat dissipation of this path is impaired, and normal operation of the insulated semiconductor device becomes difficult. Further, when the insulated semiconductor device is mounted on the cooling fin with screws, damage to the insulating plate is promoted by the application of new external force. (3) Problem of assembly man-hour and difficulty of lead-free soldering Process of brazing semiconductor substrate and ceramic insulating plate with solder material (formation of # 1 solder layer), and ceramic insulating plate and supporting plate by similar brazing Requires an integration step (formation of # 2 solder layer) with, and the number of assembling steps of the insulating semiconductor device is large. Along with this, the number of members also increases.
The above points affect the cost of the insulating semiconductor device. Generally, the temperature hierarchy (solder materials having different melting points) is required in the process of forming the # 1 solder layer and the # 2 solder layer, but sufficient temperature hierarchy can be obtained by the combination of the existing lead-free solder materials. Is difficult.

In the ceramic circuit board according to the second prior art, the Al / SiC base plate and the ceramic insulating plate are directly integrated in advance, so that the subsequent power module assembly process is simplified. Moreover, by pouring the molten Al alloy into a predetermined mold, Al / SiC fabrication and wiring to the ceramic insulating plate are performed in the same step as the integration. For this reason, there is a possibility that the ceramic circuit board can be manufactured at a relatively low cost, and it is expected that the ceramic circuit board will eventually contribute to the cost reduction of the insulating semiconductor device. However, in the case of this structure, since the Al / SiC base plate and the ceramics insulating plate are directly integrated at a relatively high temperature,
Stress, strain, and warp deformation are likely to occur in the integrated product, and the problems (1) and (2) described above remain. The prior art does not disclose a solution to these problems, particularly, an optimal structure for avoiding defects in manufacturing and operating stages of an insulating semiconductor device. Furthermore, when the wiring layer is patterned by chemical etching, the surface of the ceramic insulating plate is also etched, and fine irregularities are formed on the exposed surface. This etching reaction is particularly likely to proceed at the ceramic grain boundaries,
Deep grooves are formed along the grain boundaries. Stress is likely to be concentrated in this groove portion, which promotes crack destruction of the ceramic plate.

In the insulated semiconductor device of the third prior art, since the ceramics insulating plate is not fixed to the support plate, the number of assembling steps and the number of members of the insulated semiconductor device are small, which can contribute to obtaining an inexpensive insulated semiconductor device. But,
Since the metal layer for mounting the semiconductor substrate is formed only on one main surface side of the ceramic insulating plate, imbalance occurs in the built-in stress and deformation of the insulating plate as a whole. Specifically, excessive stress is generated at the end interface between the metal layer and the ceramics plate, or warpage deformation occurs in which the metal layer side is concave. As a result, the same problems as (1) and (2) described above remain.

The power substrate, which is the bottom of the envelope of the semiconductor power module in the fourth prior art, is an alumina or AlN plate, a Cu power wiring pattern provided on its upper main surface, and a lower power surface. It has a Cu plate material. At this time, in order to reduce warpage deformation due to the bimetal effect, the ratio of the area of the power wiring pattern to the area of the alumina or AlN plate is adjusted. However, simply adjusting the occupied area of the power wiring pattern is sufficient to provide a predetermined insulation distance between the power wiring patterns, increase the effective area ratio of the power substrate, and adjust the heat dissipation efficiency. Cannot handle. The Cu power wiring pattern and the Cu plate material are joined to the alumina or AlN plate by the DBC method (copper-oxygen eutectic substance). Although this copper-oxygen eutectic substance serves as a bonding carrier between the ceramic plate and the power wiring pattern and plate material, it has a brittle property and it is difficult to obtain a strong bonding interface. In addition, defects such as voids and portions that are not completely wet with the ceramic plate are usually generated in this bonding carrier. Generally, the amount and type of these defects are different between the power wiring pattern side and the plate material side. Therefore, an imbalance is likely to occur in the stress and deformation built in the entire completed power board. Specifically, excessive stress is generated at the end interface between the power wiring pattern and the ceramic plate, and complicated warp deformation along the pattern occurs. As a result, the same problems as (1) and (2) described above also remain with this prior art.

A semiconductor power module according to the fifth prior art is a silicon nitride plate having high strength and high toughness, a semiconductor element mounted on the silicon nitride plate, and an active metal method or DBC ( Direct Bonded Coppe
The metal circuit board made of Cu bonded by the r) method and the active metal method or DBC on the surface of the silicon nitride plate on which the semiconductor element is not mounted.
A metal plate made of Cu bonded by the (Direct Bonded Copper) method is provided, and the bottom of the envelope of this semiconductor power module is composed of a silicon nitride plate having a metal circuit plate and a metal plate bonded to both sides. The silicon nitride plate is pressed against the case by being pressed by a screw tightening portion attached to the case.

Here, in the case of the active metal method, the metal circuit board and the metal plate are, for example, (a) silver brazing paste is printed on both sides of a silicon nitride plate ⇒ (b) a Cu plate is set in a sandwich form. ⇒ (c) Heat treatment under a vacuum or reducing atmosphere (about 800 ° C) ⇒ (d) Photoresist film formation ⇒
(E) Chemical etching ⇒ (f) Removal of photoresist film ⇒ (g) Ni plating, and a complicated manufacturing process. Also,
In the case of the DBC method, according to one example, (a) a Cu plate is set in a sandwich shape on both sides of a silicon nitride plate ⇒ (b) heat treatment under pressure in an oxidizing atmosphere (about 1000 ° C.) ⇒ (c) photoresist film Formation ⇒ (d) chemical etching ⇒ (e) removal of photoresist film ⇒ (f) Ni plating, which also goes through a complicated manufacturing process. As described above, obtaining a metal circuit plate and a silicon nitride plate on which a metal plate is formed involves a great number of man-hours and economical disadvantages.

Further, the metal circuit board and the carrier for joining the metal plates are
Silver braze in case of active metal method, Cu-O in case of DBC method
Bonded to the silicon nitride plate by the eutectic material. These bonding carriers usually have defects such as voids and parts which are not completely wet with the silicon nitride plate. Generally, the amount and type of these defects differ between the metal circuit board side and the metal plate side. Therefore, an imbalance is likely to occur in the stress and deformation contained in the entire silicon nitride plate obtained by joining the metal circuit plate and the metal plate. Specifically, excessive stress or complicated warp deformation along the pattern occurs at the end interface between the metal circuit board and the metal plate. As a result, the same problems as (1) and (2) described above also remain with this prior art.

Furthermore, the metal circuit board and the silicon nitride plate bonded to the metal plate, which form a part of the envelope, and the case are separate parts, and unless they are integrated with the equipment casing or the mounting board by screwing, the envelope is formed. It does not take the form of a container. Generally, the equipment casing or mounting board is a large component. At this time, it is necessary to proceed with module assembly work for each equipment casing or mounting board in order to perform wire bonding and resin molding for shielding and protecting the semiconductor elements and wirings housed in the envelope from the outside air. is there. That is, it is easy to suffer great disadvantages in terms of workability and economy.

In the high power semiconductor device of the sixth prior art,
A substrate mounting groove is provided in the lower portion inside the side wall of the envelope, and the ceramics substrate is mounted in the substrate mounting groove. At this time, it is necessary to provide a step for mounting on the mounting portion (peripheral portion) of the ceramic substrate. Forming a step on the peripheral edge of the ceramic substrate requires a great number of steps and is economically disadvantageous. Providing a step on the peripheral edge of the ceramic substrate is also disadvantageous from the viewpoint of ensuring mechanical strength. That is, the stress caused by tightening the semiconductor device with screws is concentrated on the step portion, and the ceramic substrate itself is cracked. This has a disadvantage in ensuring the insulation reliability of the semiconductor device.

Next, the present invention will be described.

In the insulated semiconductor device of the present invention, the ceramics insulating plate as a composite member is composed of a ceramics plate, a backside metal layer, and a wiring metal layer, and the backside metal layer and the wiring metal layer are Al alloys of the same quality and the same physical properties. The wiring metal layer is 0.1-2.3 mm, and the back metal layer is 0.025-2.0.
mm, the ceramic plate is adjusted to a thickness of 0.25 to 1.25 mm, and the back metal layer constitutes the bottom lid surface of the envelope.

FIG. 1 is a plan view and a sectional schematic view for explaining the basic structure of the insulated semiconductor device of the present invention. (A) is a plan view, (b) is an AA 'cross section in (a), (c) is a BB' cross section in (a), respectively. The composite member 125 as a ceramic insulating plate is a silicon nitride plate 11
0, the wiring metal layer 131 provided on one of the main surfaces,
132 and 130c, and the back surface metal layer 120 provided on the other main surface. The composite member 125 in which the MOS FET element substrate 101 as a semiconductor substrate is fixed on the wiring metal layer 131 is attached to the opening of the polyphenyl sulfide resin case 20 provided with the main terminal 30 and the auxiliary terminal 31. The wiring metal layer 130 (131, 13) forming the composite member 125 together with the silicon nitride plate 110.
2, 130c) and the back surface metal layer 120 are made of Al alloys of the same quality and physical properties. Wire Al wire 117 is bonded between the element base 101 and the wiring metal layers 131 and 132, between the element base 101 and the auxiliary terminal 31, between the wiring metal layer 131 and the main terminal 30, and between the wiring metal layer 130c and the auxiliary terminal 31. It has been subjected. A silicone gel resin 22 is filled in the case 20, and a polyphenyl sulfide resin lid 21 is provided on the case 20. Here, eight element substrates 1 are provided on the wiring metal layer 131.
01 is fixed by the solder 113. This fixing is performed using a flux-containing paste solder material. A temperature detecting thermistor element 34 is brazed between the wiring metal layers 130c by solder 124 (not shown), and the wiring metal layer 130c is connected to the auxiliary terminal 31 by an Al thin wire 117. Although not shown in the drawing, the silicone adhesive resin 35 is provided between the case 20 and the composite member 125 and between the case 20 and the lid 21.
(Not shown) is used for fixing. A recess 25 is provided in the thick portion of the lid 21, a hole 30 'is provided in the main terminal 30, and a screw (not shown) for connecting the insulated semiconductor device 900 to an external circuit wiring is housed therein. The main terminal 30 and the auxiliary terminal 31 are copper plates punched and molded in a predetermined shape in advance and plated with Ni, and are attached to the polyphenyl sulfide resin case 20 by an injection molding method. In the insulated semiconductor device 900 of the present invention having the above-described configuration, the composite member 125 constitutes the envelope of the insulated semiconductor device together with the case 20 and the polyphenyl sulfide resin lid 21, and plays the role of the bottom lid member of the backside metal. Layer 120 constitutes the surface of the bottom lid. The composite member 125 also serves as a main heat dissipation path for dissipating the heat flow generated in the element substrate 101 to the outside of the envelope. The resin case 20 and the lid 21 can be replaced with polybutylene terephthalate.

FIG. 2 is a schematic cross-sectional view of a composite member for an insulating semiconductor device of the present invention. The composite member 125 is a silicon nitride plate (coefficient of thermal expansion: 3.4 ppm / ° C., thermal conductivity: 90 W / m.
K, thickness: 0.3 mm, size: 30 x 50 mm) 110
And an Al alloy (Al-20 wt% Si-1.5 wt% Mg, solid phase point:
Wiring metal layer 130 (131, 13) made of about 550 ° C.
2, 130c) and the back metal layer 120 made of an Al alloy having the same quality and physical properties as the wiring metal layer 130 provided on the other main surface. Here, the silicon nitride plate 11
0 has a thickness of 0.3 mm, the back metal layer 120 has a thickness of 0.2 mm, and the wiring metal layer 130 (131, 132, 130 c) has a thickness of 0.4 mm.
Each is adjusted to mm. Although not shown, the wiring metal layer 130 (131, 132, 130
A nickel plating layer (thickness: 6 μm) is formed on the surface of the c) and the back surface metal layer 120 to provide solder wettability and wire bonding property.

The Al alloy forming the wiring metal layer 130 and the back metal layer 120 has (a) high thermal conductivity, (b) excellent bondability with the ceramic plate 110, and (c) N.
i, Sn, Ag, Au, Pt, Pd, Zn and the like can be easily formed by a wet method, (d) shows excellent fluidity in a molten state, (e) at a relatively low temperature Since it melts, an alloy containing Al as a main component (for example, in the case of an alloy for casting or die casting, thermal conductivity: about 150 W
/ M · K, coefficient of thermal expansion: 23 ppm / ° C) is selected.
(A) has an important meaning in that the heat flow emitted from the semiconductor substrate is efficiently emitted to the outside. (B) is a matter necessary for firmly bonding to the ceramic plate 110 and suppressing the generation of interfacial voids that obstruct heat transfer. (C) is indispensable for mounting the semiconductor substrate 101 by soldering and wire bonding. (D) is A as described later.
This is an important matter for efficiently flowing the melt of the 1-alloy into the regions of the back surface metal layer 120 and the wiring metal layer 130.
(E) is important for reducing warpage of the composite member 125. From such a viewpoint, an Al alloy is selected as a material for the back surface metal layer 120 and the wiring metal layer 130.

Al alloys satisfying the above requirements (a) to (e) are Si, Ge, Mn, Mg, Au, Ag, Ca, C.
It is preferable that the alloy is made of Al and at least one metal selected from the group consisting of u, Ni, Pd, Sb, Te, Ti, V, Zn and Zr. As a specific representative example, Al
-7wt% Si, Al-5wt% Au, Al-7.6wt
% Ca, Al-33 wt% Cu, Al-28 wt% G
e, Al-35 wt% Mg, Al-1 wt% Mn, Al
-5.7 wt% Ni, Al-3 wt% Pd, Al-2w
t% Sb, Al-11.7 wt% Si, Al-15 wt
% Te, Al-0.5 wt% Ti, Al-0.6 wt%
Binary alloys such as V, Al-30 wt% Zn, and Al-0.1 wt% Zr can be mentioned. Further, a multi-component alloy in which the above alloys are arbitrarily combined can be mentioned.

Further, as a practical Al alloy, the multi-component alloys listed in Table 1 can be listed. The Al-Cu system and the Al-Cu-Si system have high strength, and are excellent in toughness and heat resistance. The Al-Si system (silmin) has excellent castability and corrosion resistance, and has a relatively low coefficient of thermal expansion. Al-Si-Mg
The system (γ-sirmine) has improved mechanical properties and excellent corrosion resistance when Mg is added. The mechanical properties of the Al-Si-Cu system (copper-containing silmine) are improved by adding Cu instead of Mg. The Al-Si-Cu-Mg system has excellent corrosion resistance. Al-Cu-Ni-Mg system (Y alloy) is 200-2
Even in a high temperature range of 50 ° C. or lower, the hardness and strength can be maintained at a value similar to room temperature. Al-Mg (hydronalium) has excellent corrosion resistance. The Al-Si-Cu-Ni-Mg system is Cu or Ni.
The heat resistance strength is improved, the coefficient of thermal expansion is low, and the wear resistance is excellent. Furthermore, Ge, Au, Ag, Ca, Pd, S
It is possible to add a small amount of metals such as b, Te, and V to lower the solidus point of the Al alloy, improve the bondability with ceramics and corrosion resistance, and improve the fluidity of the molten metal. Is.

[0033]

[Table 1]

Si, Ge, M forming an alloy with Al
n, Mg, Au, Ag, Ca, Cu, Ni, Pd, S
b, Te, Ti, V, Zn, and Z play a role of firmly and densely joining the interface between the Al alloy and the ceramic plate 110, in addition to being added for improving the above-mentioned various properties of the Al alloy. These metals are in the form of nitrides and oxides.
It exists at the interface between the 1-alloy and the ceramic plate 110 and serves as a joint carrier for both. The above-mentioned various metals in the Al alloy serve as a supply source of this bonding carrier.

In the present invention, the manufacturing process of the composite member 125 on which the semiconductor substrate 101 is mounted is simplified, the manufacturing process of the insulating semiconductor device 900 and the number of parts are reduced, and finally the cost of the device 900 is reduced. Contribute to.
This point will be described with reference to FIG.

FIG. 3 shows a comparison between the manufacturing process of the composite member applied to the insulated semiconductor device of the present invention and the conventional main member manufacturing process. The starting material in this example is a ceramic plate.
Silicon nitride plate as 110 (Si ₃ N ₄ , thermal conductivity: 90 W
/ MK, thermal expansion coefficient: 3.4 ppm / ° C, thickness: 0.63 m
m) and the above-mentioned Al alloy for molten metal. Silicon nitride plate 1
After 10 is set in a mold made of a metal or an inorganic material, which is molded in a predetermined shape and size in advance, an Al alloy melt is press-fitted into the mold. In this step, the back surface metal layer 120 and the wiring metal layer 130 are simultaneously formed on both surfaces of the silicon nitride plate 110. The back surface metal layer 120, the wiring metal layer 130, and the silicon nitride plate 110 are integrated by flowing an Al alloy molten metal into a space provided between the silicon nitride plate 110 and the mold. Therefore, the back surface metal layer 120 and the wiring metal layer 130 in the composite member 125 finally have substantially the same physical properties because the starting material is made of an Al alloy of the same quality.

The back metal layer 120 and the wiring metal layer 1 described above.
The assembly in which 30 is formed is transferred to an electroless wet plating process, and a Ni plating layer (thickness: 6 μm) is formed on the surfaces of the back surface metal layer 120 and the wiring metal layer 130. Here, the reason for providing the Ni plating layer on the wiring metal layer 130 is to ensure solder wettability when brazing and mounting the semiconductor substrate 101 and to reliably perform wire bonding. When chemical or thermal alteration of the back surface metal layer 120 is allowed, it is not essential to provide the Ni plating layer on this portion. However, if alteration or denaturation is not allowed, N is used in the sense of shutting off from the atmosphere of the outside air and preventing alteration inside.
An i plating layer is provided. Through the above steps, the composite member 125 applied to the insulated semiconductor device 900 of the present invention is completed.

For example, in the case of the conventional process based on the first prior art, first, an aluminum melt having a purity of 3N is brought into contact with both surfaces of a ceramic plate to form an Al layer having a thickness of 0.5 mm. After that, selective etching for forming a wiring metal layer and, if necessary, selective etching for the back surface metal layer are performed, and electroless for imparting solder wettability and wire bonding property to the wiring layer and solder wettability to the backing metal plate. Ni plating is applied. In the selective etching for forming the wiring metal layer, patterning with high dimensional accuracy is possible when the layer is thin, but sufficient accuracy cannot be obtained when the layer is thick or fine patterning is required. Further, a step of forming and removing a resist film is also required for selective etching. The composite member is thus manufactured through complicated steps.

As described above, according to the composite member 125 of the present invention, the manufacturing process of the main members is simplified, which naturally contributes to the cost reduction.

The merit of the composite member 125 is reflected not only in the manufacturing stage but also in the simplification of the subsequent manufacturing process of the insulating type semiconductor device. This point will also be described with reference to FIG. At the stage of manufacturing the insulated semiconductor device 900 of the present invention, it suffices to mount the semiconductor substrate, which is another main member, on the composite member 125 by soldering (formation of # 1 solder layer). In order to complete the insulating semiconductor device, it is necessary to go through steps such as wire bonding, resin case attachment, and resin molding. However, these steps are common to the conventional steps described below.

Composite member and Al / SiC in the conventional process
Each of the support plates is a single piece. In order to complete an insulating semiconductor device using these, the semiconductor substrate is fixed on the composite member (# 1 solder layer is formed), and Al / S is formed.
Fixing of composite member to iC support plate (formation of # 2 solder layer)
2 steps are required at a minimum. As is clear from this comparison, according to the composite member 125, the number of steps and the number of parts can be reduced as compared with the conventional method even at the stage of assembling the insulating semiconductor device 900. This naturally contributes to cost reduction of the insulating semiconductor device 900.

In the conventional process, # 2 soldering is usually performed after # 1 soldering. According to this process, # 1
It is necessary to prevent the solder layer from remelting in the subsequent # 2 soldering heat treatment for quality control. In other words, it is necessary that the # 1 solder material and the # 2 solder material have a temperature hierarchy so that the melting temperatures differ by 40 to 50 ° C. But,
Currently, the only practical lead-free solder material is an alloy having Sn as a base material, and sufficient temperature hierarchy is not provided. This is a major factor hindering lead-free semiconductor device products at present. On the other hand, the composite member 125
According to the above method, the insulated semiconductor device 900 can be manufactured only by the # 1 soldering process, so that the lead-free product can be promoted.

However, the insulated semiconductor device 9 of the present invention
00 can be enjoyed not only by the manufacturing method of the composite member 125, but also by satisfying the following requirements regarding the structure of the composite member 125.

Now, the reason why the optimum structure of the insulating semiconductor device 900 is obtained will be described. (A) The wiring metal layer and the back metal layer are composed of the same Al alloy. When the same 3N-purity Al melt as in the first prior art is used, the wettability of the Al melt to the ceramic plate is not sufficient. , A strong joint strength cannot be obtained. According to the study by the present inventors, the bonding strength between the silicon nitride plate and the Al layer is about 6.9 MPa (broken interface: silicon nitride plate-Al layer).
It's nothing but. Even if the ceramic plate is aluminum nitride or alumina, the obtained bonding strength is about the same. On the other hand, the joining metal layer 120 and the wiring metal layer 130 of the composite member 125 according to the present invention are made of an Al alloy made of the same molten metal. The above-mentioned impurities including Si contained in the Al alloy are chemically bonded to the constituent components of the ceramic plate to form a nitride or oxide of the above-mentioned impurities. Such a nitride or oxide constitutes a joint carrier between the back metal layer 120 or the wiring metal layer 130 and the silicon nitride plate 110. As a result, the bonding strength is 70M.
Higher than P, the fracture due to the test is the back metal layer 120
It does not occur at the bonding interface between the wiring metal layer 130 and the silicon nitride plate 110. Such advantages are brought about by using an Al alloy.

The back metal layer 120 and the wiring metal layer 130 are made of an Al alloy having the same quality and the same physical properties. Bonding metal layer 1
When the layer corresponding to 20 and the layer corresponding to the wiring metal layer 130 have different physical properties (coefficient of thermal expansion, Young's modulus), it hinders the optimum design of the composite member 125. On the other hand, since the insulating semiconductor device 900 of the present invention has the same physical properties, the composite member 125 can be optimally designed as described later. (B) Adjusting Thickness of Members Constituting Composite Member The important point in the insulated semiconductor device 900 of the present invention is that the wiring metal layer 130 has a thickness of 0.1 to 2.3 mm and the back surface metal layer 1 is
The thickness of 20 is adjusted to 0.025 to 2.0 mm, and the thickness of the silicon nitride plate 110 is adjusted to 0.25 to 1.25 mm. -Thickness of wiring metal layer The wiring metal layer 130 serves as a main conductive path of the insulated semiconductor device 900. If the wiring metal layer itself generates heat when a predetermined current is applied, the heat generated by the wiring is superimposed on the heat generated by the wiring in the semiconductor substrate, and the current region that ensures the safe operation of the insulated semiconductor device is narrowed. . Therefore, in order to secure a wide safe operation area, it is necessary to make this portion as thick as possible. Further, it is preferable that the thickness is appropriately thick in terms of smoothly flowing the molten metal for the matrix metal 125A. However, the thickness of the wiring metal layer 130 is limited for the following reason.

FIG. 4 shows the thermal resistance, stress, and
It is a graph which shows the wiring metal layer thickness dependence regarding reliability. First, attention is paid to the relationship between the wiring metal layer thickness and the thermal resistance in (a). The thermal resistance shown here is a value when the four semiconductor substrates 101 in the insulated semiconductor device 900 shown in FIG. 1 operate. In the region where the wiring metal layer 130 is thin, the heat generated in the semiconductor substrate 101 is difficult to spread in the lateral direction, so that the thermal resistance shows a high value. As the wiring metal layer 120 becomes thicker, the lateral spreading effect increases, so that the thermal resistance gradually decreases. When the thickness is further increased, the vertical component of the thermal resistance of the wiring metal layer 130 itself affects, so that the thermal resistance starts to increase again. Here, the insulated semiconductor device 900 has a current capacity of 400 A, and its target thermal resistance is set to 0.25 ° C./W or less in order to realize an electrically stable operation. The thickness of the wiring metal layer 130 that satisfies this is 0.1 to
The range is 7.6 mm.

Next, pay attention to the stress of (b). The vertical axis shown here is the stress of the silicon nitride plate by simulation (temperature load (550 ° C. ⇒ −55 ° C.), and part e in the schematic cross-sectional view of FIG. The stress in the e portion tends to increase as the thickness of the wiring metal layer 130 increases. Here, a general fracture stress of silicon nitride is about 650 MPa, It is necessary that the e-section stress does not exceed this value, and the thickness of the wiring metal layer 130 selected from this point is 2.3 mm or less.

Next, pay attention to the crack occurrence rate of (d). The crack referred to here is the insulated semiconductor device 900.
Temperature cycle test (3000 cycles, -40 to 12
This is mechanical breakdown of the silicon nitride plate 110 that occurs after applying (5 ° C.). As the wiring metal layer 130 becomes thicker, crack breakage is not observed up to a thickness of 2.4 mm, but beyond that, the occurrence rate tends to increase.
The crack observed here starts from the portion corresponding to the e portion. The silicon nitride plate 110 is for maintaining the insulating property of the insulated semiconductor device 900, and if it breaks, the safe operation of the device 900 is hindered. The thickness of the wiring metal layer 130 selected from this viewpoint is 2.4 mm or less.

The wiring metal layer 1 satisfying all the points is obtained by synthesizing the evaluation results of the thermal resistance, stress and reliability described above.
The thickness of 30 is in the range of 0.1 to 2.3 mm. Note that FIG.
Is a silicon nitride plate 110 having a thickness of 0.3 mm and a backside metal layer 12
Although the result is that the thickness of 0 is 0.3 mm, the silicon nitride plate 110 has a thickness of 0.25 to 1.25 mm and the back surface metal layer 120
In the range of 0.025 to 2.0 mm, similar results are obtained. The thickness of the back surface metal layer The bonding metal layer 120 heats the heat generated in the semiconductor substrate to the composite member 1.
It is a main heat conduction path for discharging to the outside via 25, and the thickness must be selected within a range that does not impair the heat dissipation and reliability of the insulating semiconductor device. It is also an important requirement that the composite member 125 can be manufactured stably. FIG. 5 is a graph showing the backside metal layer thickness dependence of thermal resistance, void ratio, and reliability. First, pay attention to the thermal resistance of (a). The thermal resistance shown here is a value obtained by simulation. The thermal resistance tends to increase as the thickness of the back metal layer 120 increases, but the amount of change is extremely small. It is rather strongly related to the thermal resistance that the wiring metal layer 13
The thickness is 0. Interpreting this result, the bonding metal layer 120 has 0-4.
It is judged that an arbitrary thickness can be selected within the range of 9 mm.

Attention is paid to the void ratio of (b). The void mentioned here is the area ratio of the non-bonding region generated in the back surface metal layer 120. If the thickness is 0.025 mm or more, no void is generated in the back surface metal layer 120. This is because the molten Al alloy efficiently flows through the gap between the mold and the silicon nitride plate 110. On the other hand, the void ratio increases in the area thinner than 0.025 mm. This is because the gap is narrow
This is because the flow of the molten 1-alloy is hindered. The above tendency shows that the thickness of the wiring metal layer 130 is in the range of 0.1 to 2.3 mm, and although not shown in the figure, the ceramic plate 110
The same is true when the thickness is in the range of 0.25 to 1.25 mm. As described above, the back surface metal layer 120 is a main conduction path for heat dissipation, and it is necessary to select the thickness of the back surface metal layer 120 to be 0.025 mm or more from the viewpoint of ensuring the heat dissipation path.

Next, pay attention to the rate of increase in thermal resistance in (c). Temperature cycle test (3000 cycles, -40 to 125
If the heat dissipation path in the composite member 125 is cut off due to the temperature rise, the thermal resistance of the insulating semiconductor device 900 increases.
The increase in thermal resistance referred to here is caused by the cutoff of the heat radiation path due to the improper thickness of the back metal layer 120. When the back surface metal layer 120 is thick, the strain acting on the wiring metal layer 130 is not so large that peeling of the wiring metal layer 130 from the silicon nitride plate 110 due to fatigue hardly occurs. As a result, no change in thermal resistance is observed in the region where the thickness of the back metal layer 120 is 2.0 mm or less. On the other hand, in the region where the thickness of the back surface metal layer 120 does not exceed 2.0 mm, the strain acting on the wiring metal layer 130 becomes large, and the wiring metal layer 130 is fatigue fractured and separated from the silicon nitride plate 110. This peeling increases the thermal resistance. The above tendency is the same when the thickness of the wiring metal layer 130 is in the range of 0.1 to 2.3 mm, and when the thickness of the ceramic plate 110 is not shown in the range of 0.25 to 1.25 mm. Therefore, the insulating semiconductor device 9
In order to stably operate 00, the backside metal layer 120 needs to be adjusted to a thickness of 2.3 mm or less.

As described above, the back metal layer 120
The thickness is 0 to 4.9 mm from the viewpoint of thermal resistance, 0.025 mm or more from the viewpoint of void rate, and 2.0 m from the viewpoint of thermal resistance increase rate.
m or less are selected respectively. Overall, the thickness of the back metal layer 120 that satisfies all the points is 0.025.
~ 2.0 mm. In addition, this proper thickness is the wiring metal layer 1
30 is 0.1 to 2.3 mm, and the silicon nitride plate 110 is 0.25 to
The same applies in the range of 1.25 mm. -Thickness of Silicon Nitride Plate The silicon nitride plate 110 is also one of the members constituting the main heat flow path of the insulated semiconductor device 900. In order to keep the thermal resistance low, it is desirable that this member be as thin as possible. However, this performance cannot be impaired as long as it is an insulating carrier.

FIG. 6 is a graph showing the dependency of the crack breakage rate and the thermal resistance increase rate on the thickness of the silicon nitride plate. First (a)
Pay attention to the crack destruction rate of. The crack fracture referred to here is a temperature cycle test (3000 cycles, −40 to −40).
The mechanical breakdown of the silicon nitride plate 110 due to 125 ° C.). In the region where the thickness is 0.25 mm or more, the silicon nitride plate 110 is not broken at all. On the other hand, 0.25m
Crack destruction occurs in the region thinner than m. This destruction starts from the above-mentioned part e. From the viewpoint of safely operating the insulated semiconductor device 900 without any trouble with insulation, the thickness of the silicon nitride plate 110 is selected to be in the range of 0.25 mm or more.

Next, pay attention to the rate of increase in thermal resistance in (b). Temperature cycle test (3000 cycles, -40 to 125
If the fatigue breakdown of the wiring metal layer 130 progresses with the increase of (.degree. The increase in the thermal resistance referred to here occurs due to the blocking of the heat flow path. In the region where the thickness is 1.25 mm or less, the thermal resistance does not change at all, whereas in the region where the thickness is thicker, the thermal resistance increases. This is because the stress in the portion e becomes large and the silicon nitride plate 110 is cracked, and the wiring metal layer 130 and the silicon nitride plate 110 are not thermally engaged. Therefore, the insulating semiconductor device 90
In order to maintain the heat dissipation property of 0, the thickness of the silicon nitride plate 110 needs to be selected within the range of 1.25 mm or less.

The above (a) and (b) are the wiring metal layer 130.
Is 0.6 mm and the back metal layer 120 is 0.3 mm. Wiring metal layer 130 is 0.1 to 2.3 mm, back side metal layer 1
Similar results are obtained when 20 has a thickness of 0.025 to 2.0 mm.

As described above, the silicon nitride plate 110
The preferable thickness of is 0.25m from the viewpoint of crack fracture rate.
m or more and 1.25 mm or less in terms of the rate of increase in thermal resistance.
A more preferable silicon nitride plate 1 inclusive of these evaluation results
The thickness of 10 is in the range of 0.25 to 1.25 mm.

Table 2 shows the wiring metal layer 1 described above.
A summary of appropriate thicknesses of 30, the back surface metal layer 120, and the silicon nitride plate 110 is shown. The wiring metal layer 130 is 0.1-2.
The appropriate thickness is 3 mm, the back metal layer 120 is 0.025 to 2.0 mm, and the silicon nitride plate 110 is 0.25 to 1.25 mm.

[0058]

[Table 2]

The steady-state thermal resistance of the insulated semiconductor device 900 of the present invention was 0.25 ° C./W. On the other hand, the insulated semiconductor device for comparison showed 0.35 ° C./W 2. In this comparative insulated semiconductor device, a composite member in which a wiring metal layer made of high-purity Al and a back surface metal layer are formed on both surfaces of an AlN plate having a thickness of 0.63 mm and an Al / SiC support plate ( Thickness: 3
mm) and the semiconductor substrate is soldered onto the composite member. Insulated semiconductor device 9 of the present invention
00 has significantly better heat dissipation than the comparative sample because the supporting plate and the solder layer are not arranged in the heat dissipation path as in the comparative sample, and the structure is simple. In addition, the fact that the interfaces of the silicon nitride plate 110, the wiring metal layer 130, and the back surface metal layer 120 are closely joined by a nitride or an oxide is also because the insulated semiconductor device 900 of the present invention has excellent heat dissipation. is there. On the other hand, in the comparative sample, the interface between the AlN plate and the wiring metal layer and the back surface metal layer is not closely joined. This is the reason for the poor heat dissipation.

FIG. 7 is a graph for explaining the transition of the thermal resistance of the insulated semiconductor device of the present invention by the temperature cycle test.
The insulated semiconductor device 900 of the present invention (curve A) maintains a thermal resistance value equivalent to the initial value (0.25 ° C./W) even after applying 10,000 cycles. On the other hand, the comparative insulated semiconductor device (curve B) has an initial thermal resistance of 0.35 ° C./W 2, and the thermal resistance increases from 1,000 cycles. The insulating semiconductor device for comparison is of the 400 A class whose dimensions are approximately similar to those of the insulating semiconductor device 900 of this embodiment, and the composite member having the same member configuration as the first prior art is made of an Al-SiC composite material. It is mounted by soldering on a supporting plate (thickness: 3 mm). This composite member is a wiring metal layer (thickness: 0.4 mm) and a back surface metal layer (thickness: 0.05 mm) made of Al using both sides of an AlN plate with a thickness of 0.63 mm and a 3N purity molten aluminum.
Is formed. If the life related to heat dissipation is defined as "the number of temperature cycles when reaching 1.5 times the initial thermal resistance", the life of the comparative sample is about 2,000 cycles, and that of the sample of this example is 10,000 cycles or more. Become. Despite the thickness range of the composite member is adjusted in the proper range,
The reason why the comparative sample reached the end of its life early was that the bonding strength between the wiring metal layer and the back surface metal layer and the AlN plate was not sufficient, the interface was peeled off, and the main heat dissipation path was blocked. The reason why the bonding strength is insufficient is that substances other than Al nitride, for example, nitrides of Si and Mg are not formed at the bonding interface. In the insulated semiconductor device 900 of the present invention, the silicon nitride plate 110, the backside metal layer 120, and the wiring metal layer 130 are adjusted to appropriate thicknesses and bonded so that excessive stress and strain are not concentrated on the local parts of the composite member 125. Al, Si, M at the interface
g nitride is formed. As a result, the heat radiation path is less likely to be blocked. Further, unlike the comparative sample, neither (1) the support plate nor (2) the solder layer connecting the composite member and the support plate is present, and the solder connection portion forming the heat dissipation path is reduced. . This is the reason why the insulated semiconductor device 900 of the present invention exhibits excellent heat radiation reliability.
Further, a thin and dense nitride layer of the metal forming the Al alloy exists at the interface between the silicon nitride plate 110 and the back metal layer 120 and the wiring metal layer 130. The fact that such a nitride layer forms a strong interface also contributes to the excellent reliability.

In the insulated semiconductor device 900 of the present invention,
Although not shown, a Ni plating layer (thickness: 6 μm) is provided on the surface of the wiring metal layer 130. Ni
The plating layer is Sn, Ag, Au, Pt, Pd, Zn, C within a range that can secure solder wettability and wire bonding property.
A metal such as u can be substituted, and its thickness can be selected to an arbitrary value within a range that can secure solder wettability and wire bondability and prevent quality deterioration of the composite member 125. Further, the above Ni plating layer is made of Ni, Sn, Ag, Au, Pt, P.
It may be replaced by a laminated body of a plurality of metals selected from the group of d, Zn and Cu.

If desired, a plurality of ceramic plates 110 constituting the composite member 125 may be mounted. In addition to silicon nitride, aluminum nitride (AlN, thermal conductivity: 19).
0 W / m · K, thermal expansion coefficient: 4.3 ppm / ° C.), alumina (Al ₂ O ₃ , thermal conductivity: 20 W / m · K, thermal expansion coefficient:
It is also possible to apply (7.2 ppm / ° C).

As will be described below, the insulating semiconductor device 900 to which the composite member 125 described above is applied reduces the thermal stress or thermal strain that occurs during manufacturing or operation, and may cause deformation, modification or destruction of each member. In other words, it is effective in providing an insulating semiconductor device which is highly reliable and low in cost.

The present invention will be described in detail below with reference to examples.

[Embodiment 1] In this embodiment, a basic form of an insulating semiconductor device will be described.

FIG. 8 is a bird's-eye view schematic diagram for explaining the main part of the insulated semiconductor device of this embodiment. This figure shows the composite member 12
5 shows a state in which the semiconductor substrate 101 is mounted by brazing.
Al-20 wt% Si-1.5 wt% of the composite member 125
Eight MOS FET element substrates (7 × 7 × 0.28 mm) 101 are mounted on a wiring metal layer 131 (not shown) made of a Mg alloy. Element base 101 and wiring metal layer 13
Solder material 11 made of Sn-5 wt% Sb alloy during 1
It is fixed by 3. The insulated semiconductor device 900 of this embodiment having such a structure is a current of 400 A class, and the composite member 125 has the case 30 as shown in FIG.
Is installed in the opening of the.

FIG. 9 is a plan view and a sectional view for explaining the details of the composite member. The silicon nitride plate 110 has a size of 30 mm × 50
mm × 0.3 mm sintered body (coefficient of thermal expansion: 3.4 ppm /
C, thermal conductivity: 90 W / mK), semiconductor substrate 1
A wiring metal layer 130 (131, 132, 130c (for mounting a thermistor)) having a thickness of 0.4 mm is provided on the main surface on which 01 is mounted. These wiring metal layers 130 are made of Al alloy (Al-20 wt% Si-1.5 wt% Mg).
It is formed by. 0.2mm thick on the opposite main surface
Of the rear surface metal layer 120 of Al having the same quality and physical properties as the wiring metal layer 131 (Al-20 wt% Si-1.5 wt%
It is formed of Mg. The composite member 125 has the above configuration.

The composite member 125 is combined with another member to form a main part of the insulated semiconductor device 900. Hereinafter, the structure of the insulating semiconductor device 900 will be described in detail with reference to FIG. The MOS FET element substrate 101 is mounted on the composite member 125 in which the wiring metal layer 131 is provided on the silicon nitride plate 110. The composite member 125 is the main terminal 3
0 and the auxiliary terminal 31 are attached to the opening of the polyphenylene sulfide resin case 20 which is provided in advance. Between the element base 101 and the wiring metal layers 131 and 132, between the element base 101 and the auxiliary terminal 31, between the wiring metal layer 131 and the main terminal 30, and between the wiring metal layer 130 and the auxiliary terminal 31,
The thin wire 117 is wire-bonded. A silicone gel resin 22 is filled in the case 20, and a polyphenyl sulfide resin lid 2 is provided on the case 20.
1 is provided. Here, eight element substrates 101 are Sn-5 wt% Sb solder (thickness: 100 μm) 113 on the wiring metal layer 131 provided on the silicon nitride plate 110.
It is fixed by. Fixing is performed in a low vacuum atmosphere using a flux-containing paste solder material.
Further, the temperature detecting thermistor element 34 is fixed between the wiring metal layers 130c by Sn-5 wt% Sb solder 124 (not shown), and the wiring metal layer 130c is formed by the Al thin wire 1.
17 is connected to the auxiliary terminal 31. Although not shown in the drawing, the case 20 and the composite member 12
5 and between the case 20 and the lid 21 are fixed with a silicone adhesive resin 35. A recess 25 is provided in the thick portion of the lid 21, a hole 30 'is provided in the main terminal 30, and a screw (not shown) for connecting the insulated semiconductor device 900 to an external circuit wiring is housed therein. Main terminal 3
0 and the auxiliary terminal 31 are copper plates punched and molded in a predetermined shape in advance and plated with Ni, and are attached to the case 20 by an injection molding method. The insulated semiconductor device 900 of the present embodiment having the above-described configuration is 45 mm × 8.
It has outer dimensions of 7 mm x 12 mm. The composite member 125 constitutes an enclosure of the insulated semiconductor device 900 together with the case 20 and the lid 21, and plays a role of a bottom lid. The back surface metal layer 120 provided on the composite member 125 constitutes a surface of the bottom lid. There is. The case 20 and the lid 21 can be replaced with polybutylene terephthalate resin.

FIG. 10 is a diagram for explaining the circuit of the insulating semiconductor device. It has a block 910 of two systems in which MOS FET elements (four pieces) 101 are arranged in parallel, each block 910 is connected in series, and an input main terminal 30in, an output main terminal 30out, and an auxiliary terminal 31 are drawn out from a predetermined portion. And constitutes an essential part of the insulated semiconductor device 900. Also,
The temperature detecting thermistor 34 during operation of this circuit is independently arranged in the insulating semiconductor device 900.
The insulated semiconductor device 900 of this embodiment is finally incorporated in the inverter device for controlling the rotation speed of the electric motor 960 shown in FIG.

In the present embodiment, for comparison, a composite member having the same member configuration as that of the first prior art is used, and a 400A class insulated semiconductor device whose dimensions are approximately similar to those of the insulated semiconductor device 900 of this embodiment is also used. It was made. The composite member used for this comparative sample had a purity of 3 on both sides of an AlN plate with a thickness of 0.63 mm.
A wiring metal layer (thickness: 0.4 mm) and a back surface metal layer (thickness: 0.05 mm) are formed using N Al molten metal. The composite member is mounted on a support plate (thickness: 3 mm) made of an Al-SiC composite material by soldering.

The insulated semiconductor device 900 of this embodiment was fixed by screwing a piano wire having a diameter of 200 μm on a flat Al fin. The tightening torque at this time is 45 kgf-c
m (for each screw). After this tightened state was continued for 30 days, the tightening was released. No mechanical damage to the composite member 125 or deterioration of the electrical function of the insulated semiconductor device 900 due to this test was observed in any of the samples (10 pieces) put in. This is because each member of the composite member 125 is adjusted to have an appropriate thickness, the back surface metal layer 120 of the composite member 125 functions as a reinforcing material of the silicon nitride plate 110, the wiring metal layer 130 and the back surface metal layer 120. And the silicon nitride plate 110 are bonded together by a dense and strong nitride thin layer of Al, Si, and Mg. On the other hand, the same test (the number of samples: 10) was performed on the comparative sample. As a result, 4
In each sample, cracking of the AlN plate and peeling of the wiring metal layer and backside metal layer were observed. Even though each member constituting the composite member is adjusted to have an appropriate thickness, the destruction or peeling of these members is caused by, for example, S other than Al at the bonding interface.
This is due to the fact that the nitrides of i and Mg are not formed, so that the members are not joined closely and firmly.

In this embodiment, the insulating semiconductor device 90 is also used.
0 was dropped onto the concrete floor from a height of 1.5 m. For all 10 test samples, the composite member 1
No mechanical damage to No. 25 or deterioration of the electrical function of the insulated semiconductor device 900 was observed. This is the composite member 125
That each member of is adjusted to an appropriate thickness, the composite member 1
25 of the back metal layer 120 functions as a reinforcing material for the silicon nitride plate 110, the wiring metal layer 130 and the back metal layer 1
20 and the silicon nitride plate 110 are dense and strong Al, Si,
Based on Mg nitride bonded with a thin layer.

FIG. 12 is a graph showing the transient thermal resistance characteristics of the insulated semiconductor device of this embodiment. The thermal resistance takes a high value as the energization time increases, but shows a steady value (0.25 ° C./W) after the energization time of about 3 s. This steady thermal resistance value is 1 for each of the four MOS FET element bases 101.
Even when the electric power of 00 W (400 W in total) is consumed, the temperature of the base 101 rises only by 25 deg.
This means that the insulated semiconductor device 900 can operate stably even if it is mounted in a harsh environment where the temperature of 25 is 125 ° C. (when the stable operating temperature of the element substrate 101 is 150 ° C.). The reason why such excellent heat dissipation is shown is that (1) the main heat conduction path is composed of the composite member 125 having high heat conductivity, and (2) the support plate or the like as in the insulated semiconductor device of the conventional structure. (3) the solder layer 113 is void-free because it is brazed in a low vacuum atmosphere, and (4) the back surface metal layer 120 is formed by the flow of an Al alloy. It is void-free,
(5) This is because the bonding interface between the silicon nitride plate 110 and the wiring metal layer 130 and the back surface metal layer 120 is firmly and densely bonded, and the heat flow is efficiently transmitted.

On the other hand, the thermal resistance of the comparative sample is 0.35 ° C./W.
And a value higher than that of the insulated semiconductor device 900 of this embodiment. The high thermal resistance of the comparative sample is due to the complicated structure in which the support plate and the solder layer are arranged in the heat dissipation path, and since aluminum of high purity is used as the material for the molten metal, the aluminum nitride plate and the wiring metal This is because the heat flow is less likely to be transferred at the bonding interface because the interface between the layer and the back metal layer is not densely bonded.

The insulated semiconductor device 900 of this example and the comparative sample were subjected to a temperature cycle test of −40 to 125 ° C. Since the result is as disclosed in FIG. 7, the details are omitted and only the main points will be described. Example Insulated semiconductor device 9
Since 00 uses the composite member 125 having the selected thickness configuration, it exhibits excellent heat dissipation reliability of 10,000 cycles or more. The following points also contribute to the achievement of excellent reliability. Wiring metal layer 13 of the same material and the same physical properties
0 and the bonding metal layer 120 sandwich the silicon nitride insulating plate 110, so that both bonding interfaces between these layers and the silicon nitride insulating plate 110 are kept in the same state.
Further, the interface is firmly bonded by the nitride of the added metal of the Al alloy. As a result, excessive stress and strain are prevented from acting unevenly on the bonding interface between the wiring metal layer 130 and the back surface metal layer 120, and peeling and fatigue damage of the wiring metal layer 130 and the back surface metal layer 120 are suppressed. On the other hand, although the composite member of the comparative sample also has the wiring metal layer and the back surface metal layer of which the thickness is similar to that of the insulated semiconductor device 900 of this embodiment, the heat radiation reliability is significantly inferior. This is because the support plate and the solder layer connecting it have a complicated structure that exists in the heat radiation path, and the wiring metal layer and the back metal layer are pure A
It is based on the fact that it is composed of 1 and these interfaces are not strongly bonded.

FIG. 13 is a graph showing the transition of thermal resistance due to the intermittent energization test. In this test, the temperature of the composite member 125 was changed to 30 to 100 ° C. so that the MOS F was changed.
The thermal resistance was traced by repeatedly energizing the ET element substrate 101. In the case of the insulated semiconductor device 900 of this embodiment, the value equivalent to the initial value (0.25 ° C./W) is maintained up to 30,000 cycles. Although the thermal resistance gradually increases after 30,000 cycles, it does not exceed 0.38 ° C / W 2, which is defined as the life in the present invention, up to about 100,000 cycles. In this way, the insulated semiconductor device 900 of the present embodiment showed an excellent intermittent current-carrying capacity because the constituent members of the composite member 125 were adjusted to appropriate values, and the wirings were arranged on both sides of the silicon nitride insulating plate 110. The metal layer 130 and the back metal layer 120 have the same physical properties and the same A
In addition to being composed of an alloy material, it is for the same reason as in the case of the temperature cycle test described above. on the other hand,
The initial value of the thermal resistance of the comparative sample was 0.35 ° C / W, but it increased after 5,000 cycles, and the life (0.5
3 ° C / W) is reached in about 10,000 cycles. The reason why the heat dissipation reliability of the comparative sample is not excellent is basically based on the same reason as in the case of the temperature cycle test described above.

In the above intermittent energization test, the wiring metal layer 13
Evaluation of insulation of the laminated structure from 1 to the back metal layer 120 was also advanced. FIG. 14 is a graph showing the result of the transition of the corona discharge starting voltage between the wiring metal layer and the back surface metal layer by the intermittent current test. The corona discharge starting voltage is a value when the charge amount is 100 pC. The insulated semiconductor device 900 of this embodiment has an initial value of about 8 kV, which is about 8 kV even after 130,000 cycles. On the other hand, although the discharge start voltage of the comparative sample is initially equivalent to that of the insulated semiconductor device 900 of this embodiment, it gradually decreases as the number of tests increases, and is about 1 kV after 30,000 cycles.
And shows an almost constant value. As described above, the insulating semiconductor device 900 of this example maintains stable and excellent insulating properties as compared with the comparative sample. The main reason for the insulation deterioration of the comparative sample is that the wiring metal layer was peeled from the AlN plate or the AlN plate in the portion corresponding to the wiring metal layer was mechanically broken. When the insulator is destroyed or the wiring metal layer is peeled off, the electric field becomes extremely high at the broken portion or the peeled portion, and a discharge is generated. In the comparative sample, the wiring metal layer, the back metal layer and the AlN
Peeling occurs at the joint interface of the plates, and with this peeling, the balance of the appropriate thicknesses of the wiring metal layer, the back surface metal layer, and the AlN plate is lost. As a result, crack destruction of the AlN plate is also accelerated. The decrease in the corona discharge voltage is due to the occurrence of discharge at these peeling parts and crack breaking parts. On the other hand, in the insulated semiconductor device 900 of this embodiment, the wiring metal layer 130 and the back surface metal layer 120 are firmly bonded, and no excessive stress acts on this bonded interface. Therefore, the silicon nitride plate 110 is not broken and the wiring metal layer 130 and the back surface metal layer 120 are not peeled off, so that excellent insulating properties are maintained.

The insulated semiconductor device 900 of this embodiment is shown in FIG.
Can be used for controlling the rotation speed of the electric motor 960. Further, the inverter device and the electric motor can be incorporated in an electric vehicle as a power source thereof. In this vehicle, the drive mechanism from the power source to the wheels could be simplified, so compared to a conventional vehicle that was shifting due to the difference in the gear engagement ratio, shock during shifting was reduced and smooth running was possible. Also, in terms of vibration and noise, it can be reduced compared to a car equipped with a conventional cylinder type engine.

Further, the inverter device incorporating the insulated semiconductor device 900 of this embodiment can be incorporated in an air conditioner (power consumption during cooling: 5 kW, power consumption during heating: 3 kW). At this time, it is possible to obtain higher efficiency than in the case of using the conventional AC motor. This helps to reduce the power consumption when using the air conditioner. Further, the time from the start of the operation of the room until it reaches the set temperature can be shortened as compared with the case where the conventional AC motor is used.

The same effect as that of this embodiment can be obtained even when the insulating semiconductor device 900 is incorporated in a device for stirring or flowing another fluid, such as a washing machine or a fluid circulating device.

In the present embodiment, the wiring metal layer 13
0 and the Al alloy forming the back surface metal layer 120 are not limited to the above-mentioned materials. Si, Ge, Mn, M
g, Au, Ag, Ca, Cu, Ni, Pd, Sb, T
It is an alloy composed of at least one metal selected from the group of e, Ti, V, Zn, and Zr and Al, and particularly preferably the alloy materials listed in Table 1. Further, the solder material 113 is not limited to only the material (Sn-5 wt% Sb) disclosed in the embodiment. Depending on the manufacturing process and the required characteristics of the insulation type semiconductor device 900, especially the thermal fatigue resistance reliability, Sn or P
b, Sn, Sb, Zn, Cu, Ni, Au, Ag, P,
Bi, In, Mn, Mg, Si, Ge, Ti, Zr,
An alloy composed of two or more kinds selected from the group of V, Hf and Pd can be selected. For example, Sn-3 wt% Ag-0.5
wt% Cu, Pb-52 wt% Sn-8 wt% Bi,
Au-12 wt% Ge, Au-6 wt% Si, Au-2
0 wt% Si, Al-11.7 wt% Si, Ag-4.5
Si, Au-85 wt% Pb, Au-26 wt% Sb,
Cu-69.3 wt% Mg, Cu-35 wt% Mn, C
u-36 wt% Pb, Cu-76.5 wt% Sb, Cu
-16.5 wt% Si, Cu-28 wt% Ti, Cu-
A solder material such as 10 wt% Zr can be applied.

[Embodiment 2] In this embodiment, an insulating semiconductor device for computer power supply will be described.

FIG. 15 is a plan view, a sectional view and a circuit diagram for explaining the insulated semiconductor device of this embodiment. The insulating semiconductor device 900 has the following configuration. MOS made of Si
The FET element bases 101 (4 pieces, 7 × 7 × 0.28 mm) are mounted on a composite member 125 having an aluminum nitride plate 110 as a base material. The wiring metal layers 130 (131, 132) and the back surface metal layer 12 are formed on both surfaces of the aluminum nitride plate 110.
0 is formed. The element substrate 101 is fixed on the wiring metal layer 131 with a solder material 113 (thickness: 70 μm) made of Sn-3 wt% Ag-0.8 wt% Cu alloy. Further, the chip resistor 112 is fixed to the wiring metal layer 132 with a solder material 124 (not shown) made of Sn-3 wt% Ag-0.8 wt% Cu alloy. In these brazing, the element substrate 101 and the chip resistor 112 are set in a predetermined portion coated with a paste-like solder material and then heated in air, and when the solder material is melted, a vacuum atmosphere is created to discharge flux and bubbles. Take steps. In addition, the composite member 125 is attached to the opening of the polyphenylene sulfide resin case 20 in which the terminal 30 made of Cu is integrated in advance with a silicone resin adhesive (not shown). An Al wire (diameter: 300 μm) is used for each of the gate, source and drain of the element substrate 101.
17 wire bonds are applied. The gate terminal 30a is shared by each element substrate 101, and the source terminal 30
c and the drain terminal 30b are wired so as to be dedicated to each element substrate 101. The mounting portion of the element substrate 101 is filled with the silicone gel resin 22, and the mounting portion of the chip resistor 112 is coated with the epoxy resin 22a (not shown). A polyphenyl sulfide resin lid 21 is attached to the case 20 to obtain an insulated semiconductor device 900. The insulated semiconductor device 9 of this embodiment manufactured as described above.
00 constitutes the circuit shown in (c).

In the insulating semiconductor device 900 described above,
The composite member 125, together with the case 20 and the lid 21, is attached to the device 90.
It constitutes an enclosure of 0 and plays the role of a bottom lid of this enclosure.

The composite member 125 is an aluminum nitride plate (coefficient of thermal expansion: 4.3 ppm / ° C., thermal conductivity: 170 W / m ·
K, thickness: 1.0 mm, size: 21 × 30 mm) 110 on one main surface of the wiring metal layer 130 (131, 132),
A back surface metal layer 120 is formed on the other main surface. The wiring metal layer 130 (131, 132) and the back surface metal layer 120 have the same quality and the same physical properties as an Al alloy (Al-28 wt% Ge-).
1.5 wt% Mg 3, solid phase point: about 420 ° C.), and is formed by press-fit casting of this Al alloy melt. The wiring metal layer 130 (131, 132) has a thickness of 4.0 mm, and the back metal layer 120 has a thickness of 3.0 mm. Ni plating (thickness: 5 μm) and Au plating (thickness: 1 μm) are sequentially applied to the surfaces of the wiring metal layer 130 (131, 132) and the back surface metal layer 120 (not shown).

The composite member 125 applied to the insulating semiconductor device 900 was manufactured by the basic process described above (FIG. 5). A relatively thick aluminum nitride plate 110 of 1.0 mm is used for the composite member 125, and the wiring metal layer 1 is used.
30 (131, 132) and the back surface metal layer 120 are made of an Al alloy (Al-28 wt% Ge-1.5 wt% Mg) which is the same material and has the same physical properties and which is solid-phased at a low temperature of about 420 ° C. The composite member 125 was excellent in flatness with a warp amount of 30 μm or less. Further, a temperature cycle test (-55 to 150 ° C.) of the composite member 125 in this example was carried out (the number of samples: 20), and the aluminum nitride insulating plate 11
0 crack occurrence status, wiring metal layer 130 peeling status,
The fatigue fracture occurrence state of the backside metal layer 120 and the peeling occurrence state between the aluminum nitride plate 110 and the backside metal layer 120 were observed. In the process of applying the temperature cycle for 10,000 cycles, none of the above-mentioned breakdowns was observed. The composite member 125 has an excellent fracture resistance because the constituent members are adjusted to have an appropriate thickness and the molten Al alloy is solidified at a low temperature, so that the composite member 125 is built in each constituent member. Stress and strain are reduced. As a result, the composite member 125 is provided with an excellent fracture resistance.

The insulated semiconductor device 900 was subjected to the drop test described below. In this test, the insulated semiconductor device 90
0 from a height of 1.5 m onto the concrete floor (3
I made it. After this test, the electrical function of the insulated semiconductor device 900 and the influence of mechanical breakdown were examined.
The electrical function was equivalent to the initial stage, and no mechanical breakdown was observed. Particularly, in the insulated semiconductor device 900 of this embodiment, the composite member 1 having the aluminum nitride plate 110 as a base material is used.
Since 25 is the bottom lid of the envelope, the composite member 125
There was concern about the adverse effects of the destruction of. However, such an adverse effect is not observed at all. Since the back surface metal layer 120 of the composite member 125 constitutes the surface of the bottom lid, the back surface metal layer 120 absorbs the impact due to the drop, and the ceramic plate 110 is not subjected to an excessive impact force. This is because

FIG. 16 is a graph for explaining the transient thermal resistance characteristic of the insulated semiconductor device of this embodiment. The thermal resistance takes a high value as the energization time increases. Steady-state thermal resistance (energization time:
After about 3 s), it was 0.2 ° C / W, indicating excellent heat dissipation. Even if the element base body 101 consumes 50 W of electric power, the temperature rise of the base body 101 is 10 de
The element substrate 101 operates stably even when the temperature of the composite member 125 reaches 140 ° C. (when the safe operating temperature of the substrate is 150 ° C.). The reason why such excellent heat dissipation is shown is (1) the aluminum nitride plate 110 is 1.0 mm
And (2) the aluminum nitride plate 110, the wiring metal layer 130, and the back surface metal layer 120 are bonded with a thin and dense nitride of an Al alloy constituent metal.
(3) The heat conduction path is shortened because there is no support plate or solder layer connecting it to the heat conduction road. (4) 4.0 mm
This is based on the fact that the heat flow is expanded by the thick wiring metal layer 130 and (5) the expanded heat flow is absorbed by the back surface metal layer 120 which is as thick as 3.0 mm and has a large heat capacity.

The insulated semiconductor device 900 of this embodiment has -4.
A temperature cycle test of 0 to 125 ° C. was performed. As a result of measuring the thermal resistance after continuing this test for 10,000 cycles, 0.2 ° C./W, which was equal to the initial value, was maintained. Further, the ultrasonic cracking method was used to examine the peeling of each laminated interface of the insulating semiconductor device 900, the peeling occurrence status of the wiring metal layer 130 and the bonding metal layer 120, and the crack occurrence status of the aluminum nitride plate 110. As a result, no fracture was detected on any of the observation interfaces and members. The reason why such excellent reliability is obtained is because the composite member 125 having the selected thickness is applied to the insulated semiconductor device 900 of this embodiment. Wiring metal layer 130 and bonding metal layer 120 having the same quality and the same physical properties
Since the aluminum nitride plate 110 is sandwiched, the layers and the aluminum nitride plate 110 are kept in the same interface state. As a result, the fact that excessive stress and strain are prevented from acting unevenly on the interface also contributes to ensuring excellent reliability. Further, the aluminum nitride plate 110 and the wiring metal layer 130 and the back surface metal layer 120 are bonded with a thin, dense and strong nitride of an Al alloy constituent metal, and a solder layer for connecting the support plate to the heat transfer road. It is also the reason for the excellent temperature cycle reliability.

Table 3 shows the optimum component member thickness of the composite member when an aluminum nitride plate is applied. The optimum thickness is almost the same as in the case of applying the silicon nitride plate, so only the outline will be summarized.

[0091]

[Table 3]

In this embodiment, the element substrate 101 is an IG
BT, transistor, thyristor, diode, etc. MO
It may have an electric function different from that of the SFET element. The semiconductor element substrate is made of Si (4.2ppm / ° C),
Or materials other than Si (Ge: 5.8 ppm / ° C, GaAs:
6.5ppm / ℃, GaP: 5.3ppm / ℃, SiC: 3.7pp
(m / ° C., etc.), the same effect as this example can be obtained.

FIG. 17 is a block diagram for explaining a power supply circuit device incorporating the insulated semiconductor device of this embodiment. This power supply circuit device rectifies AC power and supplies voltage-controlled power to the load circuit 86. Here, the load circuit 86 in this embodiment is an arithmetic circuit of a computer.

[Embodiment 3] In this embodiment, an insulating semiconductor device equipped with a power semiconductor element substrate and a circuit for controlling its electrical operation and an automobile ignition device using this semiconductor device will be described.

FIG. 18 is a bird's-eye view and a cross-sectional view illustrating the insulated semiconductor device of this embodiment. Insulated semiconductor device 900
Is mounted with an IGBT element substrate 101 made of Si and a control circuit 10 for controlling its electrical operation. A glass epoxy plate 20 having a thickness of 1 mm, which also serves as a support plate and a case, has an opening for accommodating a semiconductor element substrate 101, which will be described later, and a Cu wiring region (19 × 10 ×) where the control circuit 10 is formed.
0.8 mm). The element base 101 is mounted on the composite member 125, and is attached to the opening of the glass epoxy plate 20 together with the composite member 125. The size of the glass epoxy plate 20 is approximately 25 × 25 mm. Composite member 1
25 is a silicon nitride plate (size: 7 × 8 × 0.3 mm) 110 having a wiring metal layer 130 on one main surface and a back metal layer 120 on the other main surface, and these surfaces are plated with Ni (thickness: 3 to 7 μm, not shown) 43. The element substrate 101 (chip size: 4 × 4 × 0.28 mm) has a composition of Sn-5 wt% S on the wiring metal layer (6 × 7 mm) 130.
It is fixed by a solder material (thickness: 200 μm) 113 made of b-0.6 wt% Ni-0.05 wt% P alloy.
The surfaces of the wiring metal layer 130 and the back surface metal layer 120 are plated with Ni (thickness: 3 to 7 μm, not shown) 43.

On the other hand, the size of the control circuit 10 is: 1
In the area of 9 × 10 × 0.8 mm, Cu with a thickness of about 25 μm
Wiring (not shown) 203 is provided. At a desired portion of the area, a resistor chip 15, an IC chip substrate 16, a capacitor chip 17, and a glass sleeve type Zener diode chip are formed by a solder material 124 (not shown) made of Sn-3 wt% Ag-0.8 wt% Cu alloy. Chip components such as 18 are mounted. As a result, each of the chip components 15, 16, 17, 18 is C by the solder material 124.
A control circuit 10 that is electrically connected to the u wiring 203 and controls the operation of the element substrate 101 is configured. Element base 10
1 has an emitter electrode and a gate electrode of A having a diameter of 300 μm.
The thin wire 117 is in electrical communication with the control circuit 10. Collector electrode of the element substrate 101 (wiring metal layer 13
0) is electrically connected to the terminal 30 via the Cu wiring 203 and the Al thin wire 117. The control circuit 10 is also electrically connected to the terminal 30 by an Al thin wire 117 '.

The assembly having the above structure is
As shown in the sectional view of (b), the composite member 125 and a part of the terminal 30 are included so that the mounting portion of the element substrate 101, the control circuit portion 10, and the Al thin wires 117 and 117 'are completely sealed. Then, transfer molding with epoxy resin 22 is performed. Epoxy resin 22 has a coefficient of thermal expansion of 1
6 ppm / ° C, glass transition point: 155 ° C, volume resistivity: 9
× 10 ¹⁵ Ω · m (RT), flexural modulus: 15.7 GPa
It has a characteristic of (1600 kgf / mm ² ). Transfer molding is performed at 180 ° C, then 2 minutes at 150 ° C.
Heat treatment of h is applied to accelerate the hardening of the resin.

The wiring metal layer (thickness: 0.5 mm) 130 and the back surface metal layer (thickness: 0.1 mm) 120 formed on both sides of the silicon nitride plate 110 are made of Al having the same quality and the same physical properties.
It is made of an alloy (Al-28 wt% Ge-1.5 wt% Mg, solid phase point: about 420 ° C.), and these form the main part of the composite member 125. The composite member 125 includes the glass epoxy plate 20 and the mold resin 22 together with the insulating semiconductor device 9
It constitutes the enclosure of No. 00 and plays the role of the bottom lid.

FIG. 19 is a graph showing the transition of the thermal resistance of the insulated semiconductor device of this embodiment in the temperature cycle test.
In the figure, a curve A is an insulated semiconductor device 900 of the present embodiment, and a curve B is a comparative insulated semiconductor device of the same size (Cu
Structure in which an IGBT element substrate is soldered and mounted on a support plate made of aluminum via an aluminum nitride plate brazed with silver. The thermal resistance of the insulated semiconductor device 900 of this embodiment is the initial value in the test up to the temperature cycle number: 5,000 cycles.
(About 0.8 ° C / W) is maintained. As described above, it is confirmed that the insulating semiconductor device 900 has excellent reliability. Although the mounting portion of the IGBT element substrate 101 was examined after the test of 5,000 cycles, the solder layer 11
3. No breakage occurred in any of the silicon nitride plate 110, the wiring metal layer 130, the back surface metal layer 120, and the interface formed by the silicon nitride plate 110 and the wiring metal layer 130 and the back surface metal layer 120. This is because the constituent members of the composite member 125 are adjusted to have an appropriate thickness, and the wiring metal layer 130 and the back surface metal layer 1 are formed.
This is because 20 is composed of an Al alloy having the same material and the same physical properties, and the joint portion of the wiring metal layer 130 and the back surface metal layer 120 constitutes a strong interface. On the other hand, in the case of the comparative semiconductor device, the thermal resistance increases after 100 cycles. This means that the soldering portion of the IGBT element base body is broken to prevent thermal conductivity. As a result of disassembling and investigating the comparative semiconductor device after the test, it was confirmed that the solder layer was broken by thermal fatigue.

The thermal resistance of the insulated semiconductor device 900 of this embodiment is 0.8 ° C./W. This value is 40 deg even when the IGBT element base body 101 consumes 50 W of power.
And the composite member 125 is 100
This means that the temperature of the element substrate 101 does not exceed the limit temperature of 150 ° C. for stable operation even if it is mounted in an engine room that heats up to about 0 ° C. and operates in such a severe environment. This is a particularly preferable point as a semiconductor device for automobiles.

FIG. 20 shows an insulated semiconductor device 900 of this embodiment.
3 is a diagram illustrating the circuit of FIG. The emitter and gate of the IGBT element substrate 101 are electrically connected to the control circuit 10, and the operation of the element 101 is controlled by this circuit 10. A resistor chip 15, an IC chip substrate 16, a capacitor chip 17, and a zener diode chip 18 are mounted on the control circuit 10, and these elements are connected by a Cu wiring 203. A terminal 30 is drawn out from each of the element 101 and the control circuit 10. Insulated semiconductor device 9
00 is composed of an element 101 and a circuit 10 for controlling the element 101, and is used for supplying power to a coil of an automobile engine ignition device. The insulated semiconductor device 900 composed of these circuits was used to ignite an automobile engine under an environment of a maximum ambient temperature of 80 ° C. Even in the operation equivalent to 100,000 kilometers of automobiles,
It was confirmed that the insulated semiconductor device 900 maintains its circuit function.

[Embodiment 4] In this embodiment, D of 200A class is used.
An insulating semiconductor device for a C / DC converter will be described.

FIG. 21 is a plan view, a schematic sectional view and a circuit diagram for explaining a composite member of the insulated semiconductor device of this embodiment. Insulated semiconductor device (size: 76 x 46 x 15 mm) 900
Has the following configuration. MOS FET element bases 101 (8 pieces, 9 × 9 × 0.28 mm) made of Si are mounted on a composite member 125 having an alumina plate 110 as a base material. A wiring metal layer 130 is formed on both sides of the alumina plate 110.
(131, 132) and the back surface metal layer 120 are formed. The element substrate 101 is Sn-3 on the wiring metal layer 131.
Solder material 1 consisting of wt% Ag-0.8 wt% Cu alloy
13 (thickness: 70 μm). To fix them, a step of setting the element substrate 101 on a predetermined portion coated with a paste-like solder material, heating it in air, and making a vacuum atmosphere when the solder material is melted to discharge flux and bubbles is taken. Further, the composite member 125 is attached to the opening of the polyphenyl sulfide resin case 20 in which the terminals 30, 30a, 30c made of Cu are previously integrated, and these are made of a silicone resin adhesive (not shown).
It is installed by. An Al wire (diameter: 300 μm) is used for the gate, the source and the drain of the element substrate 101.
m) 117 has been wire-bonded. The gate terminal 30a is dedicated to each element substrate 101, and the auxiliary terminal 30c is a block 1 composed of two element substrates 101.
It is wired so as to be shared by 01A. Also, terminal 3
0 doubles as an input terminal and a main visual acuity terminal. Element base 10
The mounting portion of No. 1 is filled with the silicone gel resin 22. The case 20 has a polyphenyl sulfide resin lid 2
1 is attached to obtain an insulated semiconductor device 900. The isolated semiconductor device 900 of this embodiment manufactured as described above.
Form the circuit shown in (c).

In the insulating semiconductor device 900 described above,
The composite member 125, together with the case 20 and the lid 21, is attached to the device 90.
It constitutes an enclosure of 0 and plays the role of a bottom lid of this enclosure.

The composite member 125 is an alumina plate (coefficient of thermal expansion: 7.2 ppm / ° C., thermal conductivity: 20 W / m · K, thickness:
A wiring metal layer 130 (131, 132) is formed on one main surface of a 0.25 mm, size: 57 × 34 mm) 110, and a back surface metal layer 120 is formed on the other main surface. Wiring metal layer 1
30 (131, 132) and the back surface metal layer 120 are Al alloys (Al-28 wt% Ge-1.5w) of the same quality and physical properties.
t% Mg, solid phase point: about 420 ° C)
It is formed by press fitting casting of molten alloy. The wiring metal layer 130 (131, 132) has a thickness of 0.3 mm and the back surface metal layer 1
20 has a thickness of 0.25 mm. Wiring metal layer 130
(131, 132) and the front surface of the back metal layer 120,
Ni plating (thickness: 6 μm) is applied (not shown).

The composite member 125 applied to the insulating semiconductor device 900 was manufactured by the basic process described above (FIG. 5). The composite member 125 is made of a thin alumina plate 110 having a thickness of 0.25 mm, and the wiring metal layer 130 (13
1, 132) and the back surface metal layer 120 are made of the same material and have the same physical properties, and an Al alloy (Al-2
8 wt% Ge-1.5 wt% Mg), the composite member 125 was excellent in flatness with a warpage amount of 30 μm or less. In addition, a temperature cycle test (-55 to 150 ° C.) of the composite member 125 in this example was carried out (the number of samples: 20), and the occurrence of cracks in the alumina plate 110, the state of peeling of the wiring metal layer 130, and the back metal. Fatigue Fracture Occurrence of Layer 120, Alumina Plate 110 and Bonding Metal Layer 12
The peeling occurrence state between 0 was observed. In the process of applying the temperature cycle for 10,000 cycles, none of the above-mentioned breakdowns was observed. The composite member 125 has an excellent fracture resistance because the constituent members are adjusted to have an appropriate thickness.
Since the molten Al alloy is solidified at a low temperature, the stress and strain contained in each component of the composite member 125 is reduced, and Al existing at the interface between the alumina plate 110 and the wiring metal layer 130 and the bonding metal layer 120 is reduced. It is based on the fact that they are densely and strongly bonded by the oxides of the alloy constituent metals.

In this example, for comparison, an insulating semiconductor device (size: 76 × 46) based on the second prior art is used.
× 18 mm) was also produced. This device has a size of 57 x 3
A 4 × 0.25 mm alumina plate and a base plate (support plate, thickness: 3 mm) in which a porous preform made of SiC powder is impregnated with Al are joined by an Al layer having a thickness of 50 μm to form an alumina plate. A circuit board having an Al wiring layer formed on the other surface is used. MOS FE is formed on this Al wiring layer.
T element substrates (8 pieces, 9 × 9 × 0.28 mm) are fixed. The insulated semiconductor device has the same circuit as the insulated semiconductor device 900 of this embodiment.

The insulated semiconductor device 900 was subjected to the drop test described below. In this test, the insulated semiconductor device 90
0 from a height of 1.5 m onto the concrete floor (3
I made it. After this test, the electrical function of the insulated semiconductor device 900 and the influence of mechanical breakdown were examined.
The electrical function was equivalent to the initial stage, and no mechanical breakdown was observed. Particularly, in the insulated semiconductor device 900 of this embodiment, since the composite member 125 including the thin alumina plate 110 as a base material serves as the bottom lid of the envelope, there is a concern that the composite member 125 may be damaged. However, such an adverse effect is not observed at all. This is because the back surface metal layer 120 of the composite member 125 constitutes the surface of the bottom lid, and therefore the back surface metal layer 120 absorbs the impact due to the drop, and the alumina plate 110
This is because the structure is such that an excessive impact force does not reach.

FIG. 22 is a graph showing the transient thermal resistance characteristics of the insulated semiconductor device of this embodiment. The thermal resistance (curve A) of the insulated semiconductor device 900 of this embodiment takes a high value as the energization time increases. Steady-state thermal resistance (energization time: about 3 s or more)
Is 1.5 ° C./W. On the other hand, the comparative insulated semiconductor device (curve B) exhibits a steady thermal resistance of 2 ° C./W. The insulating semiconductor device 900 of this embodiment exhibits excellent heat dissipation as described above for the following reason. That is,
Since the composite member 125 serves as the bottom cover of the envelope, the heat dissipation path is simplified, and the heat generated in the semiconductor element substrate 101 is efficiently dissipated to the outside. On the other hand, in the comparative sample, since the heat dissipation path includes the support plate and the solder layer for connecting the support plate, it is difficult to efficiently transfer the heat flow. In addition, the excellent heat dissipation of the insulated semiconductor device 900 of this embodiment is 0.3 mm.
Since the relatively thick wiring metal layer 131 is formed, the lateral spread of heat is effectively performed.
The thickness is as thin as 25 mm, so that the shared heat resistance in the insulating region is reduced, and the fact that the alumina plate 110 and the wiring metal layer 131 and the joining metal layer 120 are closely joined by the oxide of the Al alloy constituent component also contributes. is doing.

The insulating semiconductor device 900 of this embodiment has -4.
A temperature cycle test of 0 to 125 ° C. was performed. As a result of measuring the thermal resistance after continuing this test for 10,000 cycles, the initial value of 1.5 ° C./W was maintained. Further, the ultrasonic cracking method was used to examine the peeling of each laminated interface of the insulating semiconductor device 900, the peeling occurrence state of the wiring metal layer 130 and the back surface metal layer 120, and the crack occurrence situation of the alumina plate 110. As a result, no fracture was detected on any of the observation interfaces and members. The reason why such excellent reliability is obtained is because the composite member 125 having the selected thickness is applied to the insulated semiconductor device 900 of this embodiment. Since the alumina plate 110 is sandwiched between the wiring metal layer 130 and the back surface metal layer 120 having the same quality and the same physical properties, the same interface state is maintained between these layers and the alumina plate 110, resulting in excessive stress at the interface. It is possible to avoid bias and distortion. In addition, the wiring metal layer 130 and the back surface metal layer 12
The interface between 0 and the alumina plate 110 is a dense and strong A
L-alloy constituents are joined by oxides. These points also contribute to ensuring excellent reliability.

The insulated semiconductor device 900 of this embodiment is of the 200 A class, and the allowable thermal resistance is 2 ° C./W.
It is the following. The optimum thickness of the composite member selected from this point of view is as follows. Table 4 shows the component member optimum thickness of the composite member when the alumina plate is applied. The optimum thickness is almost the same as in the case of applying the silicon nitride insulating plate, so only the outline will be summarized.

[0112]

[Table 4]

FIG. 23 is a block diagram for explaining a DC / DC converter incorporating the insulated semiconductor device of this embodiment. The DC / DC converter 90 is an isolated semiconductor device 9
00, a control circuit 10a for driving the isolated semiconductor device 900, a transformer 81, a rectifying circuit 82, and a smoothing and control circuit 83 are incorporated to supply the battery 85 with power obtained by stepping up or down the voltage of the input power supply 84. , This power is finally sent to the load circuit 86. Here, the load circuit refers to, for example, lighting equipment for automobiles, wipers, windows, motors as power sources for air conditioners, ignition devices for engines, sensors and the like. The above DC / DC converter device 90 was attached to an automobile, and its performance was confirmed under operating conditions corresponding to a mileage of 100,000 kilometers. As a result, the insulated semiconductor device 900 and the converter device 90 of this embodiment are 1
It was confirmed that the expected circuit function was maintained even after traveling for 0,000 kilometers.

[Embodiment 5] In this embodiment, another form insulating semiconductor device will be described. This insulating semiconductor device 90
0 basically has the same function as in the first embodiment.

FIG. 24 is a plan view and a sectional view for explaining the details of the composite member used in this embodiment. The silicon nitride plate 110 as the base material of the composite member 125 has a size of 43 mm × 85 mm.
It is a sintered body (coefficient of thermal expansion: 3.4 ppm / ° C, thermal conductivity: 90 W / mK) having a size of 0.3 mm, and a thickness of 0.4 mm on the main surface on which the semiconductor substrate is mounted. Wiring metal layers 131, 1
32, 130c (for mounting the thermistor), a peripheral metal layer 133 is provided so as to surround these wirings. The wiring metal layers 131, 132, 130c and the peripheral metal layer 133 are made of Al alloy (Al-20 wt% Si).
-1.5 wt% Mg). On the opposite main surface, a backside metal layer 120 having a thickness of 0.2 mm is formed on the wiring metal layer 1.
Al alloys (Al-20 wt% Si-1.5w) of the same quality and physical properties as 31, 132, 130c and the peripheral metal layer 133.
t% Mg). The wiring metal layers 131, 132, and 130c surrounded by the peripheral metal layer 133 have the same area as the composite member 125 of the first embodiment (30 ×).
50 mm) and constitutes an electrically active area.
Although not shown, M is formed on the wiring metal layer 131.
OS FET element substrate (7 × 7 × 0.28 mm) 101 is 8
It is installed individually. Further, a hole 125G having a diameter of 5.6 mm is provided in the end region of the composite member 125.

The insulated semiconductor device 900 of the present embodiment having the above-mentioned main structure is further combined with other members. FIG. 25 is a plan view and a cross-sectional schematic view illustrating the insulated semiconductor device of the present embodiment. The MOS FET element substrate 101 is mounted on the composite member 125 in which the wiring metal layer 131 is provided on the silicon nitride plate 110. The composite member 125 is the main terminal 3
0 and the auxiliary terminal 31 are mounted in the opening of the polyphenyl sulfide resin case 20 in which the 0 and the auxiliary terminal 31 are provided in advance. Between the element base 101 and the wiring metal layers 131 and 132, between the element base 101 and the auxiliary terminal 31, the wiring metal layer 131 and the main terminal 3
Between 0, Al thin wire 117 is wire-bonded. A silicone gel resin 22 is filled in the case 20, and a polyphenyl sulfide resin lid 21 is provided on the case 20. Here, eight element bases 101 are fixed to the wiring metal layer 131 provided on the silicon nitride plate 110 with Sn-5 wt% Sb solder 113. Sn-5 wt% Sb solder 113
Is fixed in a low vacuum atmosphere using a paste solder material containing flux. Further, the temperature detecting thermistor element 34 is Sn− between the wiring metal layers 130c.
5 wt% Sb solder 124 (not shown) is brazed, and the wiring metal layer 130 c is connected to the auxiliary terminal 31 by the Al thin wire 117. Although not shown in the drawing, the case 20 and the composite member 125, and the case 20 and the lid 21 are fixed with a silicone adhesive resin 35. The thick portion of the lid 21 has a recess 25,
Each main terminal 30 is provided with a hole 30 ', and a screw (not shown) for connecting the insulated semiconductor device 900 to an external circuit wiring is housed therein. The main terminal 30 and the auxiliary terminal 31 are copper plates punched and molded in a predetermined shape in advance and plated with Ni, and are attached to the case 20 by an injection molding method. The insulated semiconductor device 900 of the present embodiment having the above configuration is 45 mm × 87 mm × 12.
It has an outer dimension of mm. The composite member 125 is the case 2
0 and the lid 21 constitute an envelope of the insulating semiconductor device 900 and play the role of a bottom lid, and the back surface metal layer 120 provided on the composite member 125 constitutes the surface of the bottom lid. In addition,
The case 20 is provided with a hole 125F for tightening a screw when the insulating semiconductor device 900 is attached to the casing.

The insulating semiconductor device 900 constitutes the circuit shown in FIG. In addition, the insulated semiconductor device 900 of this embodiment was finally incorporated into the inverter device for controlling the rotation speed of the electric motor 960 shown in FIG. Since both are the same as those in the first embodiment, the description thereof will be omitted.

In this example, for comparison, a composite member having the same member configuration as that of the first prior art is used, and a 400A class insulated semiconductor device whose dimensions are approximately similar to those of the insulated semiconductor device 900 of this embodiment is also used. It was made. The composite member used in this comparative insulated semiconductor device was manufactured by using an AlN plate having a thickness of 0.63 mm and a 3N-purity molten Al on both sides of a wiring metal layer (thickness: 0.4 mm) and a back metal layer (thickness: 0.4 mm). S: 0.05 mm). The composite member is mounted on a support plate (thickness: 3 mm) made of an Al-SiC composite material by soldering.

The insulated semiconductor device 900 of this embodiment is shown in FIG.
It showed the same transient thermal resistance characteristics as. Steady-state thermal resistance is 0.3
It is 5 ° C / W. This steady thermal resistance value is 4 MOS
Each of the FET element bases 101 has a power of 100 W (total 4
00W), the temperature of the base 101 rises by only 35 deg.
It means that the insulated semiconductor device 900 can operate stably even when mounted in a harsh environment (element base 10
1 when the stable operating temperature is 150 ° C). The reason for exhibiting such excellent heat dissipation is that (1) the main heat conduction path is composed only of the composite member 125 having a high heat conductivity, and (2) the insulated semiconductor of the conventional structure, as in the first embodiment. There is no support plate or a solder layer for fixing it like the device, and (3) the solder layer 113 is brazed in a low vacuum atmosphere so that it is void-free, and (4) the back surface metal layer 120 is Al. It is formed by the flow of the alloy and is made void-free. (5) The bonding interface between the silicon nitride plate 110 and the wiring metal layer 130 and the back surface metal layer 120 is firmly and densely bonded, and the heat flow is efficiently transmitted. Because it is done.

On the other hand, the thermal resistance of the comparative insulating semiconductor device was 0.35 ° C./W, which was higher than that of the insulating semiconductor device 900 of this embodiment. Since the wiring metal layer and the back metal layer of the comparative insulated semiconductor device are made of high-purity Al as the material for the molten metal, the wettability to the aluminum nitride plate is not sufficient and a strong and dense bonding interface is formed. Absent. As a result, it becomes difficult for the heat flow to be transferred at the bonding interface. It is for this reason that the comparative sample showed high thermal resistance.

The insulated semiconductor device 900 of this example and the comparative sample were subjected to a temperature cycle test of −40 to 125 ° C. As a result, the insulated semiconductor device 900 of the present embodiment is 1
No increase in thermal resistance was observed in the test up to 10,000 cycles, whereas the comparative sample showed an increase in thermal resistance from about 1,000 cycles. The insulated semiconductor device 900 of the present embodiment is applied with (1) the composite member 125 having the selected thickness configuration, and (2)
The silicon nitride insulating plate 110 is sandwiched between the wiring metal layer 130 and the bonding metal layer 120 having the same material and the same physical properties, and both bonding interfaces between these layers and the silicon nitride insulating plate 110 are kept in the same state. (3) The interface is strongly bonded by the nitride of the added metal of the Al alloy, and (4) As a result, excessive stress and strain do not act unevenly on the bonding interface of the wiring metal layer 130 and the back surface metal layer 120, ( 5) The peeling and fatigue damage of the wiring metal layer 130 and the back surface metal layer 120 can be suppressed. This is the reason why the insulated semiconductor device 900 of this embodiment has excellent reliability. On the other hand, even in the composite member of the comparative sample, although the wiring metal layer and the back surface metal layer having almost the same thickness as that of the insulated semiconductor device 900 of this embodiment are formed, the heat radiation reliability is significantly inferior. This is based on the fact that the wiring metal layer and the back surface metal layer are made of pure Al, and their interfaces are not firmly joined to each other, resulting in an unbalanced stress at the joint interface.

The insulated semiconductor device 900 of this example was subjected to an intermittent current test (current is repeatedly applied so that the temperature of the composite member 125 changes from 30 to 100 ° C.), and the transition of thermal resistance was traced. As a result, the insulated semiconductor device 90 of this embodiment is obtained.
In 0, the thermal resistance equivalent to the initial value (0.35 ° C / W) was maintained up to 30,000 cycles. Although the thermal resistance gradually increased after 30,000 cycles, it did not exceed 0.38 ° C / W, which is defined as the life in the present invention, up to about 100,000 cycles. As described above, the insulated semiconductor device 900 according to the present embodiment exhibits excellent intermittent current withstand capability based on the reasons (1) to (5) described above. On the other hand, the thermal resistance of the comparative sample has an initial value of 0.35.
Although it was ℃ / W, it increased after 5,000 cycles and reached the life (0.53 ℃ / W) in about 10,000 cycles. The reason why the comparative sample showed inferior reliability to the insulated semiconductor device 900 of this example is the same as in the case of the above-mentioned temperature cycle test.

In the above-mentioned intermittent energization test, the wiring metal layer 13
Evaluation on insulation of the laminated structure from 1 to the back surface metal layer 120 (transition of corona discharge starting voltage at charge amount 100 pC) was also advanced. The insulated semiconductor device 900 of this embodiment has an initial value of about 8 kV, which is about 8 kV even after 130,000 cycles. On the other hand, although the discharge start voltage of the comparative sample is initially equivalent to that of the insulated semiconductor device 900 of this embodiment, it gradually decreases as the number of tests increases, and becomes a constant value of about 1 kV after 30,000 cycles. Was shown. From the above, it was confirmed that the insulated semiconductor device 900 of this example maintained stable and excellent insulating properties as compared with the comparative sample. The main reason for the deterioration of the insulating property of the comparative sample is that the AlN plate was mechanically broken at the portion corresponding to the wiring metal layer 131. When the insulator mechanically breaks down, the electric field becomes extremely high at the broken part and a discharge occurs. In the comparative sample, peeling occurred at the joint interface between the wiring metal layer or the back surface metal layer and the AlN plate, and the wiring metal layer,
The balance between the appropriate thickness of the back metal layer and the AlN plate is lost.
As a result, the AlN plate also cracks. The decrease in the corona discharge voltage is due to the occurrence of discharge at these peeling parts and crack breaking parts. On the other hand, in the insulated semiconductor device 900 of this embodiment, the wiring metal layer 130 and the back metal layer 12 are formed.
0 is strongly bonded, and no excessive stress acts on this bonding interface. Therefore, the silicon nitride plate 110 is not broken and the wiring metal layer 130 and the back surface metal layer 120 are not peeled off.
Excellent insulation is maintained.

Further, the warpage amount of the composite member of the insulated semiconductor device 900 of the present embodiment was ± 20 μm (+: convex on the wiring metal layer side, −: convex on the back metal layer side), showing extremely excellent flatness. The reason is that the warp (+) due to the bimetal effect between the silicon nitride plate 110 and the back surface metal layer 120 in the peripheral region of the composite member 125 is opposite to the warp due to the bimetal effect between the silicon nitride plate 110 and the peripheral metal layer 133. This is because the warp (-) in the direction is compensated. This point is particularly preferable in the case of an insulating semiconductor device in which the composite member 125 is screwed.

The insulation type semiconductor device 900 of this embodiment was subjected to the same tightening test as that of the first embodiment under a screw tightening torque of 50 kgf-cm. Composite parts from this test
No mechanical damage to 125 or deterioration of the electrical function of the insulated semiconductor device 900 was observed in any of the samples (10 pieces) put in. In addition to the above (1) to (5), this is because the back surface metal layer 120 of the composite member 125 functions as a reinforcing material for the silicon nitride plate 110, and the peripheral metal layer 133 of the composite member 125 also includes the silicon nitride plate 110. Based on functioning as a reinforcing material. From the above, it was confirmed that the tightening fracture resistance is higher than that of the insulated semiconductor device of the first embodiment.

The insulation type semiconductor device 900 was subjected to the same drop test as in the first embodiment. Test input sample number 10
No mechanical damage to the composite member 125 or deterioration of the electrical function of the insulating semiconductor device 900 was observed in any of the individual pieces. In addition to the above (1) to (5), this is because the back surface metal layer 120 of the composite member 125 functions as a reinforcing material for the silicon nitride plate 110, and the peripheral metal layer 13 of the composite member 125.
3 is also based on the fact that it also functions as a reinforcing material for the silicon nitride plate 110.

The insulated semiconductor device 900 of this embodiment was incorporated into various devices similar to those of the first embodiment, and excellent performance and reliability were confirmed.

[Embodiment 6] In this embodiment, another form insulating semiconductor device will be described. This insulating semiconductor device 90
0 has the same function as that in the fifth embodiment.

FIG. 26 is a plan view and a sectional view for explaining the details of the composite member used in this embodiment. Since the composite member 125 is basically the same as that of the fifth embodiment, detailed description thereof will be omitted and only different points will be described. Peripheral metal layer 133
And the area of the back surface metal layer 120 is narrowed to reduce the silicon nitride plate 110.
Is formed so that the silicon nitride plate 110 is exposed in the end region and the region of the hole 125G.

With such a structure, the silicon nitride plate 110, the peripheral metal layer 133, and the back surface metal layer 133 are formed.
The peel resistance between the two is improved. When the composite member 125 was subjected to a temperature cycle test (−55 to 150 ° C., 6000 cycles, the number of input samples: 20), no peeling of the peripheral metal layer 133 or the back surface metal layer 120 was observed.

An insulating semiconductor device 900 similar to that of the fifth embodiment was manufactured using the above composite member 125. As a result, it was confirmed that the performance of the insulated semiconductor device 900 was equivalent to that of the fifth embodiment. Further, although the same temperature cycle test as in Example 5 was applied for 12,000 cycles, it was confirmed that the thermal resistance of the insulating semiconductor device 900 maintained the same value as the initial value. As described above, according to the insulated semiconductor device 900 of the present embodiment, further excellent reliability can be secured. The reason is that the peripheral metal layer 133 and the back surface metal layer 120 are formed so that the areas thereof are narrowed so that the silicon nitride plate 110 is exposed in the end region of the silicon nitride plate 110 and the region of the hole 125G.

[Embodiment 7] In this embodiment, another form insulating semiconductor device will be described. This insulating semiconductor device 90
0 has the same function as in the first embodiment.

FIG. 27 is a schematic sectional view for explaining the details of the composite member used in this example. Since the composite member 125 is basically the same as that of the first embodiment, detailed description thereof will be omitted and only different points will be described. Wiring metal layers 130, 13
2 and an end of the back metal layer 133 is provided with an inclination 150 of about 60 ° (an angle formed with the main surface of the silicon nitride plate 110). Due to this inclination, stress concentrated on the end portion of the bonding interface between the silicon nitride plate 110, the wiring metal layers 130 and 132, and the back surface metal layer 120 is reduced.

By adopting such a structure, the silicon nitride plate 110 is cracked and the wiring metal layers 130, 1 are formed.
The peeling resistance of the backside metal layer 32 and the backside metal layer 120 is improved. A temperature cycle test (-55 to 150 ° C, 6
000 cycles, the number of input samples: 20), the silicon nitride plate 110 was cracked and the peripheral metal layer 1
No peeling of 33 or the back surface metal layer 120 was observed at all.

An insulating semiconductor device 900 similar to that of the fifth embodiment was manufactured by using the above composite member 125. As a result, it was confirmed that the performance of the insulated semiconductor device 900 was equivalent to that of the first embodiment. Further, although the same temperature cycle test as in Example 5 was applied for 130,000 cycles, it was confirmed that the thermal resistance of the insulated semiconductor device 900 maintained the same value as the initial value. As described above, according to the insulated semiconductor device 900 of the present embodiment, further excellent reliability can be secured. The reason for this is that the area of the peripheral metal layer 133 and the back surface metal layer 120 is reduced, and the slope 150 is provided in addition to the point that the silicon nitride plate 110 is exposed in the end region of the silicon nitride plate 110 and the region of the hole 125G. It depends.

[0136]

According to the present invention, the thermal stress or strain generated during manufacturing or operation is reduced, and the deformation of each member,
It is possible to provide a low-cost insulated semiconductor device that is free from denaturation and destruction, has excellent heat dissipation, is highly reliable, and is low cost.

[Brief description of drawings]

1A and 1B are a plan view and a schematic sectional view illustrating a basic structure of an insulating semiconductor device of the present invention.

FIG. 2 is a schematic cross-sectional view of a composite member for an insulating semiconductor device of the present invention.

FIG. 3 is a diagram showing a comparison between a manufacturing process of a composite member applied to the insulated semiconductor device of the present invention and a conventional main member manufacturing process.

FIG. 4 is a graph illustrating the dependency of the wiring metal layer thickness on the thermal resistance, stress, and reliability of the insulated semiconductor device.

FIG. 5 is a graph illustrating the backside metal layer thickness dependence of thermal resistance, void ratio, and reliability.

FIG. 6 is a graph illustrating the dependence of the crack destruction rate and the thermal resistance increase rate on the silicon nitride plate thickness.

FIG. 7 is a graph illustrating the transition of thermal resistance of the insulated semiconductor device of the present invention in a temperature cycle test.

FIG. 8 is a schematic bird's-eye view illustrating a main part of an insulated semiconductor device according to an embodiment.

9A and 9B are a plan view and a cross-sectional view illustrating details of a composite member.

FIG. 10 is a diagram illustrating a circuit of an insulating semiconductor device.

FIG. 11 is a diagram illustrating a circuit of an inverter device incorporating an insulating semiconductor device.

FIG. 12 is a graph showing transient thermal resistance characteristics of an insulated semiconductor device according to an example.

FIG. 13 is a graph illustrating the transition of thermal resistance due to the intermittent energization test.

FIG. 14 is a graph illustrating the transition of the corona discharge inception voltage between the wiring metal layer and the back surface metal layer by the intermittent current test.

FIG. 15 is a plan view, a cross-sectional view, and a circuit diagram illustrating an insulated semiconductor device of another embodiment.

FIG. 16 is a graph illustrating transient thermal resistance characteristics of another example insulated semiconductor device.

FIG. 17 is a block diagram illustrating a power supply circuit device in which an insulated semiconductor device according to another embodiment is incorporated.

FIG. 18 is a bird's-eye view and a cross-sectional view illustrating an insulated semiconductor device according to another embodiment.

FIG. 19 is a graph for explaining the transition of thermal resistance of the insulated semiconductor device of another example in a temperature cycle test.

FIG. 20 is a diagram illustrating a circuit of an insulated semiconductor device according to another embodiment.

21A and 21B are a plan view, a cross-sectional schematic diagram, and a circuit diagram illustrating a composite member of an insulated semiconductor device of another embodiment.

FIG. 22 is a graph illustrating transient thermal resistance characteristics of another example insulated semiconductor device.

FIG. 23 is a diagram showing a D in which an insulated semiconductor device according to another embodiment is incorporated.
It is a block diagram explaining a C / DC converter.

FIG. 24 is a plan view and a cross-sectional view illustrating details of a composite member used in another example.

FIG. 25 is a schematic plan view and cross-sectional view illustrating an insulated semiconductor device according to another embodiment.

FIG. 26 is a plan view and a cross-sectional view illustrating details of a composite member used in another example.

FIG. 27 is a schematic sectional view illustrating details of a composite member used in another example.

[Explanation of symbols]

10, 10a ... Control circuit, 11 ... Chip parts, 15, 1
12 ... Chip resistor, 16 ... IC chip base, 17 ... Capacitor chip, 18 ... Glass sleeve type Zener diode chip, 20 ... Polyphenyl sulfide resin case, glass epoxy plate, 21 ... Polyphenyl sulfide resin lid, 22 ... Silicone gel resin ,Epoxy resin,
22a ... Epoxy resin, 25 ... Recess, 30 ... Main terminal, 3
0 ', 125F, 125G ... hole, 30a ... gate terminal,
30b ... Drain terminal, 30c ... Source terminal, 30in ...
Input main terminal, 30out ... Output main terminal, 31 ... Auxiliary terminal,
33 ... Electrical relay member, 34 ... Temperature detecting thermistor element, 35 ... Silicone adhesive resin, 81 ... Transformer, 82 ...
Rectifier circuit, 83 ... Smoothing and control circuit, 84 ... Input power supply,
85 ... Battery, 86 ... Load circuit, 90 ... DC / DC converter, 101 ... MOS FET element base, semiconductor base,
101A ... Block, 110 ... Ceramics plate, silicon nitride plate, aluminum nitride plate, alumina plate, 113, 12
4 ... Solder 117, 117 '... Al fine wire, 120 ... Back side metal layer, 125, 125a, 125b ... Composite member, support member, 130, 131, 132, 130c ... Wiring metal layer, 133 ... Peripheral metal layer, 150 ... Inclination, 203 ... Cu
Wiring, 900 ... Insulated semiconductor device, 910 ... Block,
960 ... Electric motor.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hironori Kodama             7-1-1, Omika-cho, Hitachi-shi, Ibaraki Prefecture             Inside the Hitachi Research Laboratory, Hitachi Ltd. (72) Inventor Mamoru Iizuka             190 Kashiwagi, Kojiro City, Nagano Prefecture             Hitachi Semiconductor Group (72) Inventor Kenji Koyama             190 Kashiwagi, Kojiro City, Nagano Prefecture             Hitachi Semiconductor Group

Claims (10)

[Claims] 1. A semiconductor substrate and a composite substrate on which the semiconductor substrate is mounted, wherein a wiring metal layer provided on one surface of a ceramic plate and the other surface of the ceramic plate are made of aluminum (Al). ) A composite base material made of an alloy, and an envelope having an opening for holding the composite base material,
On at least one surface of the envelope, a resin portion including the semiconductor base and sealing with a resin is provided, the semiconductor base is fixed to the wiring metal layer, and the back surface metal layer is the outer surface. An insulated semiconductor device, which is a bottom cover of an enclosure. 2. A semiconductor substrate and a composite substrate on which the semiconductor substrate is mounted, having a thickness of 0.1 to 1.2 mm provided on one surface of a ceramic plate having a thickness of 0.25 to 1.0 mm. The other surface of the wiring metal layer and the ceramic plate has a thickness of 0.25 to 0.2.
The backside metal layer of 5 mm is a composite base material made of an aluminum (Al) alloy, an envelope having an opening for holding the composite base material, and at least one surface of the envelope. An insulating type, comprising: a resin portion including a semiconductor substrate for resin sealing, the semiconductor substrate being fixed to the wiring metal layer, and the back surface metal layer serving as a bottom lid of the envelope. Semiconductor device. 3. A semiconductor substrate and a composite substrate on which the semiconductor substrate is mounted, wherein a wiring metal layer provided on one side of a ceramic plate and the other side of the ceramic plate are made of aluminum (Al). ) A composite base material made of an alloy, and an envelope having an opening for holding the composite base material,
The wiring metal has a circuit portion formed of a semiconductor element that performs a predetermined control, and a resin portion that is at least one surface of the envelope and is resin-sealed including the semiconductor substrate and the circuit portion. The semiconductor substrate and the circuit portion are fixed to a layer, and the back surface metal layer serves as a bottom lid of the envelope. 4. A semiconductor substrate and a composite substrate on which the semiconductor substrate is mounted, wherein a wiring metal layer provided on one side of the ceramic plate and the other side of the ceramic plate are made of aluminum (Al). ) A composite base material made of an alloy, and an envelope having an opening for holding the composite base material,
A circuit section including a semiconductor element that performs predetermined control, a first wiring section that electrically connects the semiconductor substrate and the circuit section, and a second wiring that electrically connects the circuit section and the outside. And a resin portion which is at least one surface of the envelope and is resin-sealed including the semiconductor substrate and the circuit portion, and the wiring metal layer includes the semiconductor substrate and the circuit portion. And the back metal layer serves as a bottom lid of the envelope. 5. The second wiring portion according to claim 4,
An insulating semiconductor device, comprising: a terminal portion connected to the outside, a third wiring portion connecting the circuit portion and the terminal portion. 6. A semiconductor substrate and a composite substrate on which the semiconductor substrate is mounted, wherein a wiring metal layer provided on one surface of a ceramic plate and the other surface of the ceramic plate are made of aluminum (Al). ) A composite base material made of an alloy, and an envelope having an opening for holding the composite base material,
A resin portion including the semiconductor substrate mounted on at least one surface of the envelope for resin-sealing, and an upper lid portion for closing the opening of the envelope, and the wiring metal layer has the An insulating semiconductor device, wherein a semiconductor substrate is fixed, and the back metal layer serves as a bottom cover of the envelope. 7. The method according to any one of claims 1 to 6,
The insulating semiconductor device, wherein the ceramic plate contains at least one of silicon nitride, aluminum nitride, and alumina. 8. The method according to any one of claims 1 to 6,
The molten metal for forming the wiring metal layer and the back surface metal layer includes aluminum containing Si, Ge, Mn, Mg, Au, and A.
g, Ca, Cu, Ni, Pd, Sb, Te, Ti, V,
An insulating semiconductor device comprising at least one of Zn and Zr metals. 9. The method according to any one of claims 1 to 6,
The surface of at least one of the wiring metal layer and the back metal layer is Au, Ag, Cu, Ni, Pd, Pt, Sn.
Alternatively, the insulating semiconductor device is characterized by being coated with at least one metal of Zn. 10. The S according to claim 1, which is provided on the wiring metal layer for fixing a semiconductor substrate.
n or Pb, Sn, Sb, Zn, Cu, Ni, Au, A
g, P, Bi, In, Mn, Mg, Si, Ge, Ti,
An insulating semiconductor device comprising an alloy composed of at least two metals of Zr, V, Hf or Pd.