JP2008283059A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture all the semiconductor devices of a common anode type, a common cathode type and a doubler type by just changing the design of an inner lead connecting process without changing the design to dispose a semiconductor element upside down. <P>SOLUTION: In the manufacturing method of the semiconductor device for which a lead terminal L3 is disposed between a lead terminal L1 and a lead terminal L2, the semiconductor elements C1 and C2 are loaded on a semiconductor element loading part L3A extending from the lead terminal L3 and the semiconductor elements C1 and C2 are sealed with a resin 2 so that the lead terminals L1, L2 and L3 and a part of the semiconductor element loading part L3A are projected from the resin 2, an insulating layer 1A is disposed between electrodes C1K and C2K on the lower side of the semiconductor elements C1 and C2 and the semiconductor element loading part L3A, a conductor pattern 1B1 formed on the upper surface of the insulating layer 1A and the electrode C1K on the lower side of the semiconductor element C1 are bonded, and a conductor pattern 1B2 and the electrode C2K on the lower side of the semiconductor element C2 are bonded. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  In the present invention, a third lead terminal is disposed between the first lead terminal and the second lead terminal, and the first semiconductor element and the second semiconductor element are mounted on the semiconductor element mounting portion extending from the third lead terminal. Manufacturing of a semiconductor device in which the first semiconductor element and the second semiconductor element are sealed with resin so that the first lead terminal, second lead terminal, third lead terminal, and part of the semiconductor element mounting portion protrude from the resin. Regarding the method.

  In particular, the present invention eliminates the need to change the design in which the semiconductor elements are arranged upside down, and only changes the design of the connection process of the internal leads, so that all common anode type, common cathode type and doubler type semiconductors can be obtained. The present invention relates to a semiconductor device manufacturing method capable of manufacturing a device.

  Conventionally, a third lead terminal is disposed between the first lead terminal and the second lead terminal, and the first semiconductor element and the second semiconductor element are mounted on the semiconductor element mounting portion extending from the third lead terminal, 2. Description of the Related Art A semiconductor device in which a first semiconductor element and a second semiconductor element are sealed with a resin so that a part of the first lead terminal, the second lead terminal, the third lead terminal, and the semiconductor element mounting portion protrudes from the resin is known. ing. An example of this type of semiconductor device is, for example, that shown in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976.

  In the semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, the anode electrode of the first semiconductor element (the lower electrode of the left semiconductor element in FIG. 3) is connected to the third lead through the metal base. It is electrically connected to a semiconductor element mounting portion extending from a terminal (the central lead terminal in FIG. 3). In addition, the cathode electrode of the first semiconductor element (the upper electrode of the left semiconductor element in FIG. 3) is connected to the first lead terminal (the left lead terminal in FIG. 3) via an internal lead. Further, the semiconductor element in which the anode electrode of the second semiconductor element (the lower electrode of the right semiconductor element in FIG. 3) extends from the third lead terminal (the central lead terminal in FIG. 3) through the metal base. It is electrically connected to the mounting part. Also, the cathode electrode of the second semiconductor element (the upper electrode of the right semiconductor element in FIG. 3) is connected to the second lead terminal (the right lead terminal in FIG. 3) via an internal lead.

  As a result, in the semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, the third lead terminal (the central lead terminal in FIG. 3) is a common anode terminal. The semiconductor device shown in FIG. 3 is configured as a common anode type.

  Incidentally, in the semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, the lower electrode of the first semiconductor element (the semiconductor element on the left side of FIG. 3) and the third lead terminal (the center of FIG. 3). A semiconductor element mounting portion extending from a lead terminal is not connected via an internal lead, but is electrically connected via a metal base. Also, the lower electrode of the second semiconductor element (the semiconductor element on the right side of FIG. 3) and the semiconductor element mounting portion extending from the third lead terminal (the central lead terminal in FIG. 3) are connected via the internal leads. Rather than being connected to each other, they are electrically connected via a metal base.

  Therefore, when a doubler type semiconductor device is manufactured by changing the design of the manufacturing method of the semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, the first semiconductor element (the semiconductor element on the left side of FIG. 3) ) And the second semiconductor element (the semiconductor element on the right side of FIG. 3) are required to be changed in design. That is, in the method for manufacturing a semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, a doubler type semiconductor device cannot be manufactured only by changing the design of the internal lead connection process.

  When a common cathode type semiconductor device is manufactured by changing the design of the manufacturing method of the semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, the first semiconductor element (the semiconductor on the left side of FIG. 3) is used. It is necessary to change the design in which both the device and the second semiconductor device (the semiconductor device on the right side in FIG. 3) are arranged upside down. That is, in the method for manufacturing a semiconductor device described in FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976, a common cathode type semiconductor device cannot be manufactured only by changing the design of the internal lead connection process.

FIG. 3 of Japanese Utility Model Laid-Open No. 5-66976.

  In view of the above problems, the present invention eliminates the need to make a design change in which the semiconductor elements are arranged upside down, and only changes the design of the wiring process of the internal leads, so that the common anode type, the common cathode type, and the doubler type An object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing all the semiconductor devices.

  According to the first aspect of the present invention, the third lead terminal is disposed between the first lead terminal and the second lead terminal, and the first semiconductor element and the semiconductor element mounting portion extending from the third lead terminal The second semiconductor element is mounted, and the first semiconductor element and the second semiconductor element are made of resin so that the first lead terminal, the second lead terminal, the third lead terminal, and a part of the semiconductor element mounting portion protrude from the resin. In the method for manufacturing a sealed semiconductor device, an insulating layer is disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, and the first semiconductor element conductor formed on the upper surface of the insulating layer The pattern and the lower electrode of the first semiconductor element are joined, the first semiconductor element conductor pattern and the first lead terminal, the third lead terminal, or the semiconductor element mounting portion are connected via the internal lead, 2 semiconductors An insulating layer is disposed between the lower electrode of the element and the semiconductor element mounting portion, and a second semiconductor element conductor pattern formed on the upper surface of the insulating layer and a lower electrode of the second semiconductor element A method of manufacturing a semiconductor device is provided, wherein the second semiconductor element conductor pattern and the second lead terminal, the third lead terminal, or the semiconductor element mounting portion are connected via an internal lead.

  According to the second aspect of the present invention, the insulating layer disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, the lower electrode of the second semiconductor element and the semiconductor element mounting portion. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating layer disposed between the two is formed by one member.

  According to the invention of claim 3, the insulation is performed such that the distance between the side surface of the insulating layer and the third lead terminal is wider than the distance between the side surface of the insulating layer and the first lead terminal or the second lead terminal. The method for manufacturing a semiconductor device according to claim 2, wherein the side surface of the layer is formed in a concave shape.

  According to the fourth aspect of the present invention, the first lead terminal and the second lead are arranged so that the lower surface of the first lead terminal, the lower surface of the second lead terminal, and the lower surface of the semiconductor element mounting portion are located on the same plane. The method of manufacturing a semiconductor device according to claim 1, wherein the terminal is bent.

  In the method of manufacturing a semiconductor device according to the first aspect, the third lead terminal is disposed between the first lead terminal and the second lead terminal. Further, the first semiconductor element and the second semiconductor element are mounted on the semiconductor element mounting portion extending from the third lead terminal. Further, the first semiconductor element and the second semiconductor element are sealed with the resin so that the first lead terminal, the second lead terminal, the third lead terminal, and a part of the semiconductor element mounting portion protrude from the resin.

  Furthermore, in the method for manufacturing a semiconductor device according to claim 1, an insulating layer is disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, and the first formed on the upper surface of the insulating layer. The conductor pattern for a semiconductor element and the lower electrode of the first semiconductor element are joined. The first semiconductor element conductor pattern is connected to the first lead terminal, the third lead terminal, or the semiconductor element mounting portion via an internal lead.

  In the method for manufacturing a semiconductor device according to claim 1, an insulating layer is disposed between the lower electrode of the second semiconductor element and the semiconductor element mounting portion, and the second is formed on the upper surface of the insulating layer. The conductor pattern for a semiconductor element and the lower electrode of the second semiconductor element are joined. Further, the second semiconductor element conductive pattern and the second lead terminal, the third lead terminal, or the semiconductor element mounting portion are connected via the internal lead.

  Specifically, in the method for manufacturing a semiconductor device according to claim 1, when a common anode type semiconductor device is manufactured, the conductor pattern for the first semiconductor element and the first lead terminal are connected via the internal lead. Is done. Furthermore, the conductor pattern for the second semiconductor element and the second lead terminal are connected via the internal lead. The upper electrode of the first semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected via an internal lead, and the upper electrode of the second semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected. Connected via internal leads.

  In the method of manufacturing a semiconductor device according to the first aspect, when a common cathode type semiconductor device is manufactured, only the design change of the connection process of the internal leads is performed. Specifically, the conductor pattern for the first semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected via the internal lead. Furthermore, the conductor pattern for the second semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected via the internal lead. The upper electrode of the first semiconductor element and the first lead terminal are connected via an internal lead, and the upper electrode of the second semiconductor element and the second lead terminal are connected via an internal lead.

  Furthermore, in the method of manufacturing a semiconductor device according to the first aspect, when a doubler type semiconductor device is manufactured, only the design change of the connection process of the internal leads is performed. Specifically, the first semiconductor element conductor pattern and the first lead terminal are connected via the internal lead. Furthermore, the conductor pattern for the second semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected via the internal lead. Further, the upper electrode of the first semiconductor element and the third lead terminal or the semiconductor element mounting portion are connected via an internal lead, and the upper electrode of the second semiconductor element and the second lead terminal are connected via an internal lead. Connected.

  Therefore, according to the method for manufacturing a semiconductor device according to claim 1, it is not necessary to change the design for arranging the semiconductor elements in the upside down direction, and only by changing the design of the connection process of the internal leads, the common anode type All semiconductor devices of the common cathode type and the doubler type can be manufactured.

  3. The method of manufacturing a semiconductor device according to claim 2, wherein an insulating layer is disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, and the lower electrode of the second semiconductor element and the semiconductor element. The insulating layer disposed between the mounting portion and the mounting portion is formed by one member. Preferably, an insulating layer disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, and an insulating layer disposed between the lower electrode of the second semiconductor element and the semiconductor element mounting portion. The layer is constituted by one insulating substrate.

  That is, in the method for manufacturing a semiconductor device according to claim 2, the insulating layer is disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion in one process, and the second semiconductor element is provided. An insulating layer is disposed between the lower electrode and the semiconductor element mounting portion.

  Therefore, according to the method for manufacturing a semiconductor device according to claim 2, the step of disposing the insulating layer between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, The number of steps can be reduced as compared with the case where the step of disposing the insulating layer is provided separately between the side electrode and the semiconductor element mounting portion.

  In the semiconductor device manufacturing method according to claim 3, the distance between the side surface of the insulating layer and the third lead terminal is larger than the distance between the side surface of the insulating layer and the first lead terminal or the second lead terminal. The side surface of the insulating layer is formed in a concave shape.

  Therefore, according to the method for manufacturing a semiconductor device according to claim 3, the distance between the side surface of the insulating layer and the third lead terminal is wider than the distance between the side surface of the insulating layer and the first lead terminal or the second lead terminal. Thus, the internal lead for connecting the upper electrode of the first semiconductor element and the semiconductor element mounting portion can be made shorter than the case where the side surface of the insulating layer is not formed in a concave shape, and the upper side of the second semiconductor element can be shortened. The internal lead for connecting the electrode and the semiconductor element mounting portion can be shortened.

  The method of manufacturing a semiconductor device according to claim 4, wherein the first lead terminal and the first lead terminal are arranged so that the lower surface of the first lead terminal, the lower surface of the second lead terminal, and the lower surface of the semiconductor element mounting portion are located on the same plane. Two lead terminals are bent. Therefore, according to the semiconductor device manufacturing method of the fourth aspect, a surface-mountable semiconductor device can be manufactured.

A semiconductor device manufacturing method according to a first embodiment of the present invention will be described below. FIG. 1 is a view showing an insulating substrate 1 used in the semiconductor device of the first embodiment. Specifically, FIG. 1A is a plan view of the insulating substrate 1, FIG. 1B is a front view of the insulating substrate 1, and FIG. 1C is a bottom view of the insulating substrate 1. In FIG. 1, 1A indicates an insulating layer constituting a part of the insulating substrate 1, and 1A1, 1A2, and 1A3 indicate front side surfaces of the insulating layer 1A. In the method for manufacturing the semiconductor device of the first embodiment, the insulating layer 1A is formed of an electrically insulating material such as Al ₂ O ₃ , AlN, or epoxy resin.

  In FIG. 1, 1B1 and 1B2 indicate conductor patterns formed on the upper surface of the insulating layer 1A, and 1C indicates a conductor pattern formed on the lower surface of the insulating layer 1A. In the semiconductor device manufacturing method of the first embodiment, the conductor patterns 1B1, 1B2, and 1C are formed of a conductive material such as Cu, for example. In the semiconductor device manufacturing method of the first embodiment, as shown in FIG. 1, the conductor pattern 1B1 and the conductor pattern 1B2 are formed apart from each other.

  FIG. 2 is a view showing a state in which the semiconductor element C1 is mounted on the conductor pattern 1B1 of the insulating substrate 1 shown in FIG. 1, and the semiconductor element C2 is mounted on the conductor pattern 1B2. Specifically, FIG. 2A is a plan view of the insulating substrate 1 and the semiconductor elements C1 and C2, and FIG. 2B is a front view of the insulating substrate 1 and the semiconductor elements C1 and C2. In FIG. 2, C1A represents the upper anode electrode of the semiconductor element C1, and C1K represents the lower cathode electrode of the semiconductor element C1. C2A indicates the upper anode electrode of the semiconductor element C2, and C2K indicates the lower cathode electrode of the semiconductor element C2.

  In the semiconductor device manufacturing method of the first embodiment, as shown in FIG. 2, the semiconductor element C1 is mounted on the conductor pattern 1B1 of the insulating substrate 1, and the semiconductor element C2 is mounted on the conductor pattern 1B2. Specifically, the conductor pattern 1B1 formed on the upper surface of the insulating layer 1A and the cathode electrode C1K on the lower side of the semiconductor element C1 are joined via solder, and the conductor pattern 1B2 formed on the upper surface of the insulating layer 1A and the semiconductor The cathode electrode C2K on the lower side of the element C2 is joined via solder.

  In the semiconductor device manufacturing method of the first embodiment, a PN junction diode having a planar structure as described in FIG. 2B of Japanese Utility Model Publication No. 5-66976 is used as the semiconductor elements C1 and C2. However, in the semiconductor device manufacturing method of the second embodiment, instead of the semiconductor elements C1 and C2, for example, a Schottky barrier having a planar structure as described in FIG. 2C of Japanese Utility Model Laid-Open No. 5-66976 is used. It is also possible to use a junction diode.

  FIG. 3 is a view showing a part of the lead frame LF used in the method for manufacturing the semiconductor device of the first embodiment. Specifically, FIG. 3A is a plan view of the lead frame LF, and FIG. 3B is a cross-sectional view taken along line AA in FIG. In FIG. 3, L1, L2, and L3 indicate portions that become lead terminals of the semiconductor device. L3A indicates a semiconductor element mounting portion extending from the lead terminal L3, and L3A1 indicates a hole formed in the semiconductor element mounting portion L3A. In the semiconductor device manufacturing method of the first embodiment, the lead frame LF is formed by, for example, applying Ni plating to a Cu material.

  4 is a view showing a state in which the assembly of the insulating substrate 1 and the semiconductor elements C1 and C2 shown in FIG. 2 is mounted on the semiconductor element mounting portion L3A shown in FIG. Specifically, FIG. 4A is a plan view of the insulating substrate 1, the semiconductor elements C1 and C2, the semiconductor element mounting portion L3A, and the like, and FIG. 4B is a cross section taken along line BB in FIG. FIG. 4C is a cross-sectional view taken along the line CC of FIG. In the method of manufacturing the semiconductor device according to the first embodiment, as shown in FIG. 4, the assembly of the insulating substrate 1 and the semiconductor elements C1 and C2 is mounted on the semiconductor element mounting portion L3A. Specifically, the conductor pattern 1C of the insulating substrate 1 and the semiconductor element mounting portion L3A extending from the lead terminal L3 are joined via solder.

  That is, in the semiconductor device manufacturing method of the first embodiment, as shown in FIG. 4B, the insulating layer 1A is disposed between the lower cathode electrode C1K of the semiconductor element C1 and the semiconductor element mounting portion L3A. Is done. Further, as shown in FIG. 4C, the insulating layer 1A is disposed between the lower cathode electrode C2K of the semiconductor element C2 and the semiconductor element mounting portion L3A.

  Furthermore, in the method of manufacturing the semiconductor device according to the first embodiment, as shown in FIG. 4A, the lead terminal L3 is disposed between the lead terminal L1 and the lead terminal L2, and extends from the lead terminal L3. Semiconductor elements C1 and C2 are mounted on the semiconductor element mounting portion L3A.

  In the method of manufacturing the semiconductor device of the first embodiment, the conductor pattern 1C is formed on the insulating substrate 1, and the conductor pattern 1C and the semiconductor element mounting portion L3A are joined via solder. In the manufacturing method of the semiconductor device, instead, the conductor pattern 1C can be omitted, and the insulating layer 1A of the insulating substrate 1 and the semiconductor element mounting portion L3A can be bonded with an adhesive.

  In FIG. 5, wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a common anode type semiconductor device. It is the figure which showed the state. Specifically, FIG. 5A is a plan view of the insulating substrate 1, the semiconductor elements C1 and C2, the lead terminals L1, L2, and L3, the semiconductor element mounting portion L3A, and the bonding wire BW, and FIG. It is an equivalent circuit diagram of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW shown in A).

  In the semiconductor device manufacturing method according to the first embodiment, when a common anode type semiconductor device as shown in FIG. 5B is manufactured, as shown in FIG. 1B1 is connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the upper anode electrode C1A of the semiconductor element C1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the upper anode electrode C2A of the semiconductor element C2 are connected by an Al bonding wire BW as an internal lead. The lead terminal L2 and the conductor pattern 1B2 are connected by an Al bonding wire BW as an internal lead.

  FIG. 6 shows an insulating substrate 1, semiconductor elements C1, C2, lead terminals L1, L2, L3 and a semiconductor shown in FIG. 4 for manufacturing a common anode type semiconductor device in the method for manufacturing a semiconductor device according to the fourth embodiment. It is the figure which showed the state by which wire bonding was performed with respect to element mounting part L3A.

  In the semiconductor device manufacturing method of the first embodiment, as shown in FIG. 5A, in order to manufacture a common anode type semiconductor device, the semiconductor element mounting portion L3A and the anode electrode C1A on the upper side of the semiconductor element C1 Is connected by the bonding wire BW, and the semiconductor element mounting portion L3A and the anode electrode C2A on the upper side of the semiconductor element C2 are connected by the bonding wire BW. In the semiconductor device manufacturing method of the fourth embodiment, FIG. Instead, in order to manufacture a common anode type semiconductor device, the lead terminal L3 and the anode electrode C1A on the upper side of the semiconductor element C1 are connected by a bonding wire BW, and the lead terminal L3 and the upper side of the semiconductor element C2 are connected. It is also possible to connect the anode electrode C2A with a bonding wire BW.

  FIG. 7 is a view showing a state where the semiconductor elements C1 and C2 shown in FIG. In the manufacturing method of the semiconductor device of the first embodiment, the semiconductor elements C1 and C2 shown in FIG. 5 are sealed with the resin 2 as shown in FIG. Specifically, the semiconductor elements C1 and C2 are sealed with the resin 2 so that the lead terminals L1, L2 and L3 and a part of the semiconductor element mounting portion L3A protrude from the resin 2.

  FIG. 8 is a view showing a state in which the lead terminals L1, L2, and L3 are separated from the lead frame LF shown in FIG. 7 and the semiconductor device of the first embodiment is completed. Specifically, FIG. 8A is a plan view of the semiconductor device of the first embodiment, FIG. 8B is a right side view of the semiconductor device of the first embodiment, and FIG. It is a bottom view of the semiconductor device of an embodiment. In the method for manufacturing the semiconductor device of the first embodiment, as shown in FIG. 8A, a part of the upper surface of the semiconductor element mounting portion L3A is exposed to the outside of the resin 2, and shown in FIG. As described above, the entire lower surface of the semiconductor element mounting portion L3A is exposed to the outside of the resin 2.

  In FIG. 9, wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a common cathode type semiconductor device. It is the figure which showed the state. Specifically, FIG. 9A is a plan view of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW, and FIG. It is an equivalent circuit diagram of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW shown in A).

  In the manufacturing method of the semiconductor device of the first embodiment, when a common cathode type semiconductor device as shown in FIG. 9B is manufactured, only the design change of the connection process of the Al bonding wire BW as the internal lead is performed. Is done. Specifically, as shown in FIG. 9A, the lead terminal L1 and the anode electrode C1A on the upper side of the semiconductor element C1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the conductor pattern 1B1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the conductor pattern 1B2 are connected by an Al bonding wire BW as an internal lead. The lead terminal L2 and the anode electrode C2A on the upper side of the semiconductor element C2 are connected by an Al bonding wire BW as an internal lead.

  FIG. 10 shows the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor shown in FIG. 4 for manufacturing a common cathode type semiconductor device in the semiconductor device manufacturing method of the fifth embodiment. It is the figure which showed the state by which wire bonding was performed with respect to element mounting part L3A.

  In the manufacturing method of the semiconductor device of the first embodiment, as shown in FIG. 9A, in order to manufacture a common cathode type semiconductor device, the semiconductor element mounting portion L3A and the conductor pattern 1B1 are connected by the bonding wire BW. The semiconductor element mounting portion L3A and the conductor pattern 1B2 are connected by the bonding wire BW. However, in the method of manufacturing the semiconductor device of the fifth embodiment, instead of the common cathode type semiconductor device, as shown in FIG. In this case, the lead terminal L3 and the conductor pattern 1B1 can be connected by the bonding wire BW, and the lead terminal L3 and the conductor pattern 1B2 can be connected by the bonding wire BW.

  FIG. 11 shows that the wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a doubler type semiconductor device. It is the figure which showed the state. More specifically, FIG. 11A is a plan view of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW, and FIG. It is an equivalent circuit diagram of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW shown in A).

  In the method of manufacturing a semiconductor device according to the first embodiment, when a doubler type semiconductor device as shown in FIG. 11B is manufactured, only the design change of the connection process of the Al bonding wire BW as an internal lead is performed. Done. Specifically, as shown in FIG. 11A, the lead terminal L1 and the conductor pattern 1B1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the upper anode electrode C1A of the semiconductor element C1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the conductor pattern 1B2 are connected by an Al bonding wire BW as an internal lead. The lead terminal L2 and the anode electrode C2A on the upper side of the semiconductor element C2 are connected by an Al bonding wire BW as an internal lead.

  FIG. 12 shows an insulating substrate 1, semiconductor elements C1, C2, lead terminals L1, L2, L3 and semiconductor elements shown in FIG. 4 for manufacturing a doubler type semiconductor device in the semiconductor device manufacturing method of the sixth embodiment. It is the figure which showed the state in which wire bonding was performed with respect to mounting part L3A.

  In the method for manufacturing a semiconductor device of the first embodiment, as shown in FIG. 11A, in order to manufacture a doubler type semiconductor device, a semiconductor element mounting portion L3A and an anode electrode C1A on the upper side of the semiconductor element C1 are provided. The semiconductor element mounting portion L3A and the conductor pattern 1B2 are connected by the bonding wire BW and are connected by the bonding wire BW. In the semiconductor device manufacturing method of the sixth embodiment, instead, as shown in FIG. In order to manufacture a doubler type semiconductor device, the lead terminal L3 and the anode electrode C1A on the upper side of the semiconductor element C1 can be connected by the bonding wire BW, and the lead terminal L3 and the conductor pattern 1B2 can be connected by the bonding wire BW. It is.

  FIG. 13 shows that the wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a doubler type semiconductor device. It is the figure which showed the state. Specifically, FIG. 13A is a plan view of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW, and FIG. It is an equivalent circuit diagram of the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3, the semiconductor element mounting portion L3A, and the bonding wire BW shown in A).

  In the method of manufacturing the semiconductor device according to the first embodiment, when a doubler type semiconductor device as shown in FIG. 13B is manufactured, only the design change of the connection process of the Al bonding wire BW as the internal lead is performed. Done. Specifically, as shown in FIG. 13A, the lead terminal L1 and the anode electrode C1A on the upper side of the semiconductor element C1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the conductor pattern 1B1 are connected by an Al bonding wire BW as an internal lead. Further, the semiconductor element mounting portion L3A and the upper anode electrode C2A of the semiconductor element C2 are connected by an Al bonding wire BW as an internal lead. The lead terminal L2 and the conductor pattern 1B2 are connected by an Al bonding wire BW as an internal lead.

  FIG. 14 shows an insulating substrate 1, semiconductor elements C1, C2, lead terminals L1, L2, L3 and semiconductor elements shown in FIG. 4 for manufacturing a doubler type semiconductor device in the semiconductor device manufacturing method of the seventh embodiment. It is the figure which showed the state in which wire bonding was performed with respect to mounting part L3A.

  In the semiconductor device manufacturing method of the first embodiment, as shown in FIG. 13A, in order to manufacture a doubler type semiconductor device, the semiconductor element mounting portion L3A and the conductor pattern 1B1 are connected by the bonding wire BW. The semiconductor element mounting portion L3A and the anode electrode C2A on the upper side of the semiconductor element C2 are connected by the bonding wire BW. In the semiconductor device manufacturing method of the seventh embodiment, instead, as shown in FIG. In order to manufacture a doubler type semiconductor device, it is also possible to connect the lead terminal L3 and the conductor pattern 1B1 by the bonding wire BW, and connect the lead terminal L3 and the anode electrode C2A on the upper side of the semiconductor element C2 by the bonding wire BW. It is.

  That is, in the manufacturing method of the semiconductor device of the first embodiment, as shown in FIG. 5A, when the common anode type semiconductor device is manufactured, the conductor pattern 1B1 and the lead terminal L1 are bonded to the bonding wire BW. The conductor pattern 1B2 and the lead terminal L2 are connected via the bonding wire BW, the anode electrode C1A on the upper side of the semiconductor element C1 and the semiconductor element mounting portion L3A are connected via the bonding wire BW, The anode electrode C2A on the upper side of the semiconductor element C2 and the semiconductor element mounting portion L3A are connected via a bonding wire BW.

  Furthermore, in the method for manufacturing the semiconductor device of the first embodiment, as shown in FIG. 9A, when a common cathode type semiconductor device is manufactured, only the design change of the bonding wire BW connection process is performed. In other words, the design change for arranging the semiconductor elements C1 and C2 in the upside down direction is not performed. Further, in the method of manufacturing a semiconductor device according to the first embodiment, as shown in FIGS. 11A and 13A, when a doubler type semiconductor device is manufactured, a bonding wire BW connection process is performed. Only the design change is performed, and the design change in which the semiconductor elements C1 and C2 are arranged upside down is not performed. Therefore, according to the manufacturing method of the semiconductor device of the first embodiment, it is not necessary to change the design of arranging the semiconductor elements C1 and C2 in the upside down direction, and only by changing the design of the bonding wire BW connection process. All semiconductor devices of common anode type, common cathode type and doubler type can be manufactured.

  Furthermore, in the method of manufacturing the semiconductor device of the first embodiment, as shown in FIG. 4, the insulating layer 1A disposed between the cathode electrode C1K on the lower side of the semiconductor element C1 and the semiconductor element mounting portion L3A, The insulating layer 1A disposed between the lower cathode electrode C2K of the semiconductor element C2 and the semiconductor element mounting portion L3A is formed by one member. Specifically, the insulating layer 1A disposed between the lower cathode electrode C1K of the semiconductor element C1 and the semiconductor element mounting portion L3A, and the lower cathode electrode C2K of the semiconductor element C2 and the semiconductor element mounting portion L3A. The insulating layer 1 </ b> A disposed therebetween is constituted by one insulating substrate 1.

  That is, in the method for manufacturing the semiconductor device of the first embodiment, as shown in FIG. 4, the cathode electrode on the lower side of the semiconductor element C1 is formed by one step of bonding the insulating substrate 1 to the semiconductor element mounting portion L3A. An insulating layer 1A is disposed between C1K and the semiconductor element mounting portion L3A, and an insulating layer 1A is disposed between the lower cathode electrode C2K of the semiconductor element C2 and the semiconductor element mounting portion L3A. Therefore, according to the semiconductor device manufacturing method of the first embodiment, two insulating substrates 1 are provided, and the insulating layer 1A is provided between the cathode electrode C1K on the lower side of the semiconductor element C1 and the semiconductor element mounting portion L3A. The number of processes is reduced as compared with the case where the process of arranging and the process of arranging the insulating layer 1A between the cathode electrode C2K on the lower side of the semiconductor element C2 and the semiconductor element mounting portion L3A are provided separately. can do.

  In the method for manufacturing the semiconductor device of the first embodiment, as shown in FIG. 5A, the distance between the front side surface 1A3 of the insulating layer 1A and the lead terminal L3 is such that the front side surface 1A1 of the insulating layer 1A and the lead The front side surfaces 1A1, 1A2, and 1A3 of the insulating layer 1A are formed in a concave shape so as to be wider than the distance from the terminal L1 and wider than the distance between the front side surface 1A2 of the insulating layer 1A and the lead terminal L2. Therefore, according to the manufacturing method of the semiconductor device of the first embodiment, the distance between the front side surface 1A3 of the insulating layer 1A and the lead terminal L3 is wider than the distance between the front side surface 1A1 of the insulating layer 1A and the lead terminal L1. Therefore, the anode on the upper side of the semiconductor element C1 is larger than the case where the front side surfaces 1A1, 1A2, 1A3 of the insulating layer 1A are not formed in a concave shape so as to be wider than the distance between the front side surface 1A2 of the insulating layer 1A and the lead terminal L2. The bonding wire BW for connecting the electrode C1A and the semiconductor element mounting portion L3A can be shortened, and the bonding wire BW for connecting the anode electrode C2A above the semiconductor element C2 and the semiconductor element mounting portion L3A can be shortened. can do.

  FIG. 15 is a view showing insulating substrates 11 and 11 ′ used in the semiconductor device of the eighth embodiment. In the semiconductor device manufacturing method of the first embodiment, the insulating substrate 1 shown in FIG. 1 is used. In the semiconductor device manufacturing method of the eighth embodiment, instead, the insulating substrates 11 and 11 shown in FIG. 'Is used. Specifically, FIG. 15A is a plan view of the insulating substrates 11 and 11 ′, FIG. 15B is a front view of the insulating substrates 11 and 11 ′, and FIG. 15C is a bottom surface of the insulating substrates 11 and 11 ′. FIG. In FIG. 15, 11A and 11A ′ indicate insulating layers constituting part of the insulating substrates 11 and 11 ′, 11A1 and 11A3 indicate front side surfaces of the insulating layer 11A, and 11A2 and 11A3 ′ indicate insulating layers. The front side surface of 11A 'is shown.

  In FIG. 15, 11B1 indicates a conductor pattern formed on the upper surface of the insulating layer 11A, 11B2 indicates a conductor pattern formed on the upper surface of the insulating layer 11A ′, and 11C indicates a lower surface of the insulating layer 11A. 11C ′ indicates a conductor pattern formed on the lower surface of the insulating layer 11A ′. In the method of manufacturing a semiconductor device according to the first embodiment, as shown in FIG. 1, the conductor pattern 1B1 and the conductor pattern 1B2 are arranged separately on the single insulating layer 1A. In the semiconductor device manufacturing method shown in FIG. 15, the insulating substrate 11 and the insulating substrate 11 ′ shown in FIG. 15 are spaced apart from each other on the semiconductor element mounting portion L3A. As a result, the conductor pattern 11B1 and the conductor pattern 11B2 are separated from each other. Be placed.

  FIG. 16 is a view showing insulating substrates 21 and 21 ′ used in the semiconductor device of the ninth embodiment. In the semiconductor device manufacturing method of the first embodiment, the insulating substrate 1 shown in FIG. 1 is used. Instead, in the semiconductor device manufacturing method of the ninth embodiment, the insulating substrates 21 and 21 shown in FIG. 'Is used. Specifically, FIG. 16A is a plan view of the insulating substrates 21 and 21 ′, FIG. 16B is a front view of the insulating substrates 21 and 21 ′, and FIG. 16C is a bottom surface of the insulating substrates 21 and 21 ′. FIG. In FIG. 16, reference numerals 21A and 21A 'denote insulating layers constituting a part of the insulating substrates 21 and 21'.

  In FIG. 16, 21B1 indicates a conductor pattern formed on the upper surface of the insulating layer 21A, 21B2 indicates a conductor pattern formed on the upper surface of the insulating layer 21A ′, and 21C indicates a lower surface of the insulating layer 21A. A conductor pattern formed on the lower surface of the insulating layer 21A ′ is indicated by 21C ′. In the method for manufacturing a semiconductor device according to the first embodiment, as shown in FIG. 1, the conductor pattern 1B1 and the conductor pattern 1B2 are spaced apart from each other on the single insulating layer 1A. In this semiconductor device manufacturing method, the insulating substrate 21 and the insulating substrate 21 ′ shown in FIG. 16 are spaced apart from each other on the semiconductor element mounting portion L3A. As a result, the conductor pattern 21B1 and the conductor pattern 21B2 are separated from each other. Be placed.

  FIG. 17 is a view showing a state where the lead terminals L1, L2, and L3 are separated from the lead frame LF shown in FIG. 7 and the semiconductor device of the tenth embodiment is completed. Specifically, FIG. 17A is a plan view of the semiconductor device of the tenth embodiment, FIG. 17B is a right side view of the semiconductor device of the tenth embodiment, and FIG. It is a bottom view of the semiconductor device of an embodiment. In the manufacturing method of the semiconductor device of the first embodiment, as shown in FIG. 8A, only a part of the upper surface of the semiconductor element mounting portion L3A is covered with the resin 2, but the semiconductor device of the tenth embodiment In the manufacturing method, instead, the entire upper surface of the semiconductor element mounting portion L3A is covered with the resin 2 as shown in FIG.

  FIG. 18 is a view showing a state where the lead terminals L1, L2, and L3 are separated from the lead frame LF shown in FIG. 7 and the semiconductor device of the eleventh embodiment is completed. Specifically, FIG. 18A is a plan view of the semiconductor device of the eleventh embodiment, FIG. 18B is a right side view of the semiconductor device of the eleventh embodiment, and FIG. FIG. 18D is a left side view of the semiconductor device according to the eleventh embodiment.

  In the method of manufacturing the semiconductor device according to the first embodiment, as shown in FIGS. 3 and 8, the bending process is not performed on the portions of the lead frame LF that become the lead terminals L1, L2, and L3. In the semiconductor device manufacturing method of the embodiment, instead, as shown in FIG. 3 and FIG. 18, bending processing is performed on portions of the lead frame LF that become the lead terminals L <b> 1 and L <b> 2.

  Specifically, in the semiconductor device manufacturing method according to the eleventh embodiment, as shown in FIGS. 18B and 18D, the lower surface of the lead terminal L1, the lower surface of the lead terminal L2, and the semiconductor element mounting portion L3A. The lead terminals L1 and L2 are bent so that their lower surfaces are located on the same plane. Therefore, according to the semiconductor device manufacturing method of the eleventh embodiment, a surface-mountable semiconductor device can be manufactured.

  In the twelfth embodiment, the above-described first to eleventh embodiments can be appropriately combined.

It is the figure which showed the insulating substrate 1 used for the semiconductor device of 1st Embodiment. It is the figure which showed the state by which the semiconductor element C1 was mounted on conductor pattern 1B1 of the insulated substrate shown in FIG. 1, and the semiconductor element C2 was mounted on conductor pattern 1B2. FIG. 3 is a diagram showing a part of a lead frame LF used in the method for manufacturing a semiconductor device according to the first embodiment. FIG. 4 is a view showing a state where the assembly of the insulating substrate 1 and the semiconductor elements C1 and C2 shown in FIG. 2 is mounted on the semiconductor element mounting portion L3A shown in FIG. In order to manufacture the common anode type semiconductor device, a state where wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. FIG. In order to manufacture the common anode type semiconductor device in the manufacturing method of the semiconductor device of the fourth embodiment, the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion shown in FIG. It is the figure which showed the state by which wire bonding was performed with respect to L3A. FIG. 6 is a view showing a state where the semiconductor elements C1 and C2 shown in FIG. FIG. 8 is a view showing a state where the lead terminals L1, L2, and L3 are separated from the lead frame LF shown in FIG. 7 and the semiconductor device of the first embodiment is completed. In order to manufacture the common cathode type semiconductor device, a state where wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. FIG. In order to manufacture the common cathode type semiconductor device in the manufacturing method of the semiconductor device of the fifth embodiment, the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion shown in FIG. It is the figure which showed the state by which wire bonding was performed with respect to L3A. 4 shows a state where wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a doubler type semiconductor device. It is a figure. In order to manufacture a doubler type semiconductor device in the semiconductor device manufacturing method of the sixth embodiment, the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. It is the figure which showed the state by which wire bonding was performed with respect to. 4 shows a state where wire bonding is performed on the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. 4 in order to manufacture a doubler type semiconductor device. It is a figure. In order to manufacture a doubler type semiconductor device in the semiconductor device manufacturing method of the seventh embodiment, the insulating substrate 1, the semiconductor elements C1, C2, the lead terminals L1, L2, L3 and the semiconductor element mounting portion L3A shown in FIG. It is the figure which showed the state by which wire bonding was performed with respect to. It is the figure which showed the insulating substrates 11 and 11 'used for the semiconductor device of 8th Embodiment. It is the figure which showed the insulating substrates 21 and 21 'used for the semiconductor device of 9th Embodiment. FIG. 8 is a diagram illustrating a state where the lead terminals L1, L2, and L3 are separated from the lead frame LF illustrated in FIG. 7 and the semiconductor device of the tenth embodiment is completed. FIG. 10 is a diagram showing a state where the lead terminals L1, L2, and L3 are separated from the lead frame LF shown in FIG. 7 and the semiconductor device of the eleventh embodiment is completed.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1A Insulation layer 1A1, 1A2, 1A3 Front side surface 1B1, 1B2, 1C Conductor pattern LF Lead frame L1, L2, L3 Lead terminal L3A Semiconductor element mounting part L3A1 Hole C1, C2 Semiconductor element C1A, C2A Anode electrode C1K, C2K Cathode electrode BW Bonding wire 2 Resin

Claims (4)

A third lead terminal is disposed between the first lead terminal and the second lead terminal, the first semiconductor element and the second semiconductor element are mounted on the semiconductor element mounting portion extending from the third lead terminal, and the first lead In the method of manufacturing a semiconductor device in which the first semiconductor element and the second semiconductor element are sealed with resin so that a part of the terminal, the second lead terminal, the third lead terminal, and the semiconductor element mounting portion protrude from the resin,
An insulating layer is disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion, and the conductor pattern for the first semiconductor element formed on the upper surface of the insulating layer and the lower side of the first semiconductor element Join the electrode,
Connecting the conductor pattern for the first semiconductor element and the first lead terminal, the third lead terminal or the semiconductor element mounting portion via the internal lead;
An insulating layer is disposed between the lower electrode of the second semiconductor element and the semiconductor element mounting portion, and the second semiconductor element conductor pattern formed on the upper surface of the insulating layer and the lower side of the second semiconductor element Join the electrode,
A method for manufacturing a semiconductor device, comprising: connecting a conductor pattern for a second semiconductor element and a second lead terminal, a third lead terminal, or a semiconductor element mounting portion via an internal lead.   An insulating layer disposed between the lower electrode of the first semiconductor element and the semiconductor element mounting portion; and an insulating layer disposed between the lower electrode of the second semiconductor element and the semiconductor element mounting portion. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed by one member.   The side surface of the insulating layer is formed in a concave shape so that the distance between the side surface of the insulating layer and the third lead terminal is wider than the distance between the side surface of the insulating layer and the first lead terminal or the second lead terminal. A method for manufacturing a semiconductor device according to claim 2.   The first lead terminal and the second lead terminal are bent so that the lower surface of the first lead terminal, the lower surface of the second lead terminal, and the lower surface of the semiconductor element mounting portion are located on the same plane. Item 4. The method for manufacturing a semiconductor device according to any one of Items 1 to 3.

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