JP2003086919A - Pattern inspection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To inspect a pattern on a printed board, etc., when the pattern, a solder resist and silk print are overprinted on the board. SOLUTION: The printed board 1 is read by a camera 3 and the image thereof is stored in an image memory 5. Images of the silk print, the solder resist, and the wiring pattern are extracted respectively at binarization circuits 6A-6C by binarizing with different threshold values, respectively. Then, detected patterns are aligned by aligning circuits 9A-9C respectively. Then, defects are detected in the regions held in region memories 10A-10C. Thus, defects of the pattern can be detected with accuracy in accordance with the type of printing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern inspection device for precisely inspecting wiring patterns and wiring pads of IC packages, printed circuit boards and the like.

[0002]

2. Description of the Related Art In IC packages and printed circuit boards,
Various wiring patterns are formed by methods such as print plating,
An insulation protection solder resist, and silk printing or the like indicating the arrangement of parts and the like are superimposed and printed on the upper part thereof. Wiring and printing are also becoming finer with the miniaturization of electronic components. It is necessary to inspect whether or not these patterns are accurately formed and printed by some method after manufacturing the product.

However, the wiring patterns, the solder resist, and the silk printing have different inspection tolerances.
With regard to silk printing, the parts and shapes are displayed, and some deviation is allowed as long as the exposed parts (pads) of the wiring pattern are not covered. Also for the solder resist, it is sufficient if the copper foil pattern is exposed from the opening,
Some deviation will be allowed. However, with regard to the wiring pattern, a part of the pattern is missing,
If a part of the pattern bulges excessively, it may not operate accurately or may become unstable, so that a precise inspection of the pattern is required. Normally, in the inspection of the wiring pattern of the printed circuit board, a short circuit or a disconnection of the wiring pattern is inspected by a continuity check called a continuity checker. In addition, defects such as large protrusions due to manufacturing defects and insufficient insulation spacing, and defects in which the wiring part of the pattern is thinner than the design value and lacking strength cannot be inspected by the continuity inspection, but have a serious impact on quality. It is a defect. Therefore, it is necessary to optically detect these defects although they are not short-circuited or disconnected.

The following conventional inspection methods have been proposed. First, there is an inspection method called a complete comparison method in which an inspection pattern is read, and the position and width of the area are compared with a reference pattern without indiscriminating the area.

A method called cluster comparison for checking the number of inspection patterns and the area and position of each inspection pattern has been proposed. In the cluster comparison, it is possible to increase the detection sensitivity for short-circuiting or disconnection of long wiring.

Further, the detected inspection pattern is binarized,
A feature extraction method is known in which a defective region is calculated by operating a binary image with an operator for feature extraction.
The operator for feature extraction is an image pattern of a predetermined size smaller than the detected image, and is a predetermined pattern such that a predetermined pixel has a detection or non-detection level so as to have a defect feature. . This operator is scanned over the entire surface of the inspection pattern, and a defect such as a protrusion or a protrusion in the width direction is detected depending on whether or not it coincides with the feature extraction operator. According to this method, the defect can be effectively detected even if there is a relative displacement due to the positional displacement of the pattern or the contraction of the base material forming the pattern.

[0007]

When applying such an inspection method to a printed circuit board on which a solder resist is formed on a wiring pattern and further silk-printed, it is possible to apply the inspection method according to each pattern, silk and resist. The allowable range cannot be set.

The position of the silk may be largely displaced from the wiring pattern. Since the silk printing has a wide tolerance, when the silk printing and the wiring pattern are inspected at the same time, the tolerance of defects is too strict for the silk printing.
There was a problem that the inspection was too unsatisfactory for the wiring pattern. Further, since the respective patterns are shifted independently, it is difficult to inspect them at the same time. In the conventional appearance inspection device, the inspection is performed uniformly with the maximum allowable error. There is a drawback that defects in the wiring pattern are overlooked.

The present invention has been made in view of the problems caused by the conventional pattern inspection, and causes an independent displacement of the wiring pattern, the wiring pad, the solder resist, the silk-printed printed circuit board, or the like. An object of the present invention is to detect a defect by reducing an erroneous false alarm by independently inspecting an easily inspected object with an accuracy suitable for each pattern.

[0010]

According to a first aspect of the present invention, there is provided a pattern inspection apparatus for a printed circuit board, wherein a solder resist and silk printing are formed on a wiring pattern of the printed circuit board. An apparatus, a first, a second and a third binarization unit for extracting a silk pattern, a solder resist and a wiring pattern by binarizing the images picked up by the image pickup apparatus with thresholds of different levels; A first area memory that holds an inspection area for printing, a second area memory that holds an inspection area for solder resist, a third area memory that holds an inspection area for a wiring pattern, and a first area memory The first expansion for expanding the pixels detected by the first binarization unit by the first predetermined number of pixels and then contracting the image expanded by the second number of pixels. A contraction section and a second area memory that expands the pixels detected by the second binarization section by a first predetermined number of pixels and then contracts the image expanded by the second number of pixels. In the expansion / contraction part and the area shown in the third area memory, a predetermined feature extraction pattern is scanned with respect to the binarized image of the wiring pattern obtained by the third binarization portion, and the matching image The area of the silk-printing pattern and the solder resist pattern obtained from the first and second expansion / contraction parts by detecting the defective pixel by detecting the position of the first and second area memories. First to collect by cluster inspection in the inspection area of
A second tallying unit, a third tallying unit that tallies the defective pixels obtained by the feature extracting unit in an inspection region in the third region memory, and tallies of the first to third tallying units. A discriminating unit for discriminating the quality of the pattern on the printed circuit board based on the result,
It is characterized by including.

According to a second aspect of the present invention, in the pattern inspection apparatus according to the first aspect, the defect detected by the feature extracting unit is expanded by a first predetermined number of pixels and then expanded by a second number of pixels. Is further provided with a third expansion / contraction part for reducing.

The invention of claim 3 of the present application is the same as claim 1 or 2.
In the pattern inspection apparatus described above, an inspection information memory that holds defect detection information including a feature extraction pattern different for each inspection position or area set in the third area memory,
Further, the present invention is characterized by detecting defective pixels by scanning the feature extraction pattern set in each inspection region.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a block diagram showing the structure of a pattern inspection apparatus according to a first embodiment of the present invention. In the figure, when the printed circuit board 1 is an inspection target, the inspection pattern is imaged by the camera 3 while being illuminated by the illumination 2. Camera 3
Is a camera capable of capturing image data with high resolution, such as a two-dimensional CCD camera or a line drive type CCD camera, and has a resolution of 4000 × 4000 or 7500 × 7500, for example. The signal from the camera 3 is temporarily held in the image memory 5 via the preprocessing circuit 4. Binarization circuits 6A, 6B, 6C are connected to the image memory 5, and expansion / contraction circuits 7A, 7B and a feature extraction circuit 8 are respectively provided.
Are cascaded. Binarization circuits 6A, 6B, 6C
Is a binarization circuit that extracts only the silk printing pattern, the solder resist pattern, and the wiring pattern from the image stored in the image memory 5 and binarizes them.
Further, the alignment circuits 9A to 9C are circuits that perform alignment based on a template region for alignment from binarized output image data and a reference pattern as described later. An area memory 10A for holding an area for detecting silk, an area memory 10B for holding an area of solder resist, and an area memory 10C for holding an inspection area of a wiring pattern are connected to each of the alignment circuits 9A to 9C. The expansion / contraction circuits 7A and 7B are for expanding the silk printing pattern and the solder resist pattern separated by the binarizing circuits 6A and 6B, respectively, and then contracting them. The aggregating circuits 11A to 11C create a table of the number of clusters and the area. The determination circuits 12A to 12C thus determine the quality of the pattern based on the data. The outputs of the determination circuits 12A to 12C are output to the output unit 1 via the control CPU 13 as signals indicating the quality determination.
4 is output to the outside. The control CPU 13 is a CPU for performing each of these processes, and is connected with an operation unit 15 for setting necessary areas and advancing operations.

Next, each block will be described in more detail. The binarization circuits 6A, 6B, and 6C binarize the image data of the inspection pattern with respect to the image data of one screen held in the image memory 5 with different threshold values. For example, since the silk pattern is drawn in white on the printed circuit board, only the silk pattern can be extracted by increasing the threshold level. Even with a wiring pattern having a solder resist and a copper foil, the frequency of the brightness level varies depending on the presence or absence of the wiring pattern. Therefore, by setting a threshold value in the middle, the respective patterns can be detected separately. The expansion / contraction circuits 7A and 7B expand the pixels obtained here by, for example, 3 pixels in all directions. In this way, for example, a square image of 7 pixels is obtained for both the X axis and the Y axis for an isolated image of 1 pixel. At the time of contraction, the expanded pixel is contracted inward by a predetermined number, for example, four pixels. In this way, when a plurality of images are united by expansion, the images do not disappear even if they contract, so that the image portion can be extracted. The number of reduced pixels may be greater than or equal to the number of expanded pixels or less than or equal to the number of expanded pixels.

FIG. 2A is a diagram showing a reference pattern of silk and a template region for alignment. As shown in the figure, the regions indicated by broken lines in the upper left and lower right of FIG. 2A are templates, and the images are aligned so as to match them. FIG. 2B shows the reference pattern for resist, and the broken line shows the alignment template region. Similarly, FIG. 3C shows a wiring reference pattern and an alignment template.

The alignment circuits 9A to 9C are designed to match the alignment template with the maximum value of the correlation function between the reference pattern registered in advance in the circuit and the pattern extracted by the binarization circuit. Is extracted and alignment is performed.

The area memory 10A is a memory for setting an inspection area to be inspected in advance for a silk pattern. FIG. 3A shows the inspection area of the silk pattern held in this memory. Similarly, the area memory 10B holds an area for inspecting the solder resist shown in FIG. 3B, and an outside portion of an area slightly larger than the resist pattern shown in FIG. 2B is an inspection target. . The area memory 10C holds an area for inspecting the wiring pattern shown in FIG. 3C, and an area obtained by enlarging the reference pattern in FIG. 2C is the inspection area.

The summing circuit 11A performs a cluster inspection on the image expanded and contracted by the expansion and contraction circuit 7A for the area held in the area memory 10A, and calculates the area of each cluster. For example, the number of pixels that are actually silk within the inspection area of the substantially rectangular silk pattern S1 shown in FIG. 3A is counted. If the number of pixels is within ± 10% with reference to a predetermined value, it is considered normal, and if the silk screen is faint, the number of pixels in the white area is reduced and it can be determined as a defective product. In this way, the totaling circuit 11A totals the areas of the silk print pattern. Similarly, in the totaling circuit 11B, the cluster inspection is performed on the image expanded and contracted by the expansion / contraction circuit 7B in the detection area of the area memory 11B, and the area of each cluster is calculated. In this way, if there is a defect in the solder resist, the area and number of clusters will change, so defective products can be identified.

The feature extraction circuit 8 extracts a defective portion of the inspection pattern from the thus binarized wiring pattern by a feature extraction operator. Assuming that the terminal portion of the copper foil pattern of the wiring board of the printed circuit board 1 is detected, the characteristic extraction operator used in the characteristic extraction circuit 8 has a characteristic extraction pattern that matches the defect of the inspection pattern. FIG. 4A shows an example thereof, which is composed of 33 × 33 pixels, of which a copper foil pattern is detected at a predetermined pixel position indicated by a white circle and a copper foil pattern is detected at a predetermined pixel position indicated by a black circle. This is to extract the pattern that matches the one that is not executed. It is assumed that a desired number of such characteristic operators are preset based on various patterns formed on the printed board 1. For example, for a wiring pattern composed of only horizontal and vertical patterns, it is only necessary to rotate the wiring pattern by 90 °, 180 °, 270 ° based on the one shown in FIG.

Next, the operation of the present embodiment will be described with reference to the inspection pattern and flow chart. Figure 5
Is a flowchart showing this operation. First, in step 21, the printed board 1 is illuminated by the illumination 2 and the printed board 1 is imaged using the camera 3. The captured image is pre-processed by the pre-processing circuit 4, and the image memory 5
(Step 22). Binarization circuits 6A to 6C
Then, the binarization process is performed according to the threshold value of brightness determined in advance (steps 23 to 25).

Next, in the expansion processing steps 26 and 27,
This pixel is expanded by, for example, 3 pixels by the expansion / contraction circuits 7A and 7B. The expansion is performed by sequentially expanding 3 pixels one pixel at a time in the vertical and horizontal directions at the same time, so that even if there is a pattern of 1 pixel, the shape becomes 7 × 7 pixels at the end of the expansion. If there are adjacent pixels within 6 pixels, the detected pixels are united due to expansion. The expanded image is then contracted inward. Here, the contraction is equal to or larger than the expanded pixel, and when the expansion is 3 pixels, the contraction is contracted by, for example, 4 pixels or 5 pixels. In this way, even if the original detection points for one pixel are merged by expansion, the detection points remain due to contraction. On the other hand, in the case of an isolated image of only one pixel, even if the image is once expanded by a predetermined number of pixels, it is contracted by more pixels than the expanded pixel, so that the detection points disappear if they are not connected. . By eliminating the isolated detection points in this way, false alarms can be prevented and the overall shape can be grasped.

For the images detected in this way, cluster comparison is simultaneously performed by the summing circuits 11A and 11B (steps 28 and 29). In the cluster comparison, defects are detected by performing the number of inspection patterns and the area of each pattern for silk and solder resist, respectively. Then, the defect areas are independently aggregated and the judgment circuits 12A, 1
Output to 2B.

On the other hand, in step 30, feature extraction processing is performed. In this feature extraction processing, feature extraction is performed using different feature extraction patterns for each part of the wiring pattern. For example, the feature extraction operator having the pattern shown in FIG. If any one of the 33 × 33 pixel feature extraction patterns is missing, it is output as shown in FIG.
It is aligned with one end of the inspection area A as shown in (b). Then, all the regions of necessary pixels are continuously scanned by shifting the pixels one by one in the X-axis direction and the Y-axis direction. Then, at the position where the inspection image matches this feature extraction pattern, an output indicating the matching pixel is obtained. This is newly held as a defect image.

In step 31, the defect images detected by the totalizing circuit 11C are totaled and a table corresponding to the area is created. Then, the totalized result is output to the determination circuit 12C.

Next, in steps 32 and 33, the decision circuits 12A and 12B detect defects according to the number of obtained clusters and the area thereof. If the number of clusters is larger than the predetermined number, one shape is originally divided into some shape, so that the area is greatly reduced, and such a defect can be easily detected. The determination circuit 12C detects only large defects having a predetermined number of pixels or more from the area of the remaining defects. In this way, the expansion rate, the contraction rate, and the number of pixels for quality judgment can be arbitrarily selected, so that flexible detection sensitivity can be set according to the intended use.

As described above, the determination circuit can select different pass / fail cluster numbers and area change rates for each pattern. Therefore, by making the quality judgment of silk printing loose and making the quality judgment of the wiring pattern the strictest, the quality judgment suitable for the pattern can be performed, and the presence or absence of a defect can be collectively judged. In this way, flexible detection sensitivity can be set according to the intended use.

In this embodiment, the output of the feature extraction circuit 8 is given to the totalizing circuit 11C to perform totalization.
Small defects may be erased by expanding and then shrinking the extracted defects, and adjacent small defects may be combined so that they can be easily detected as defects.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIG. 6, the same parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, the inspection information memory 16 is added to the second embodiment. Further, even for the same search item, a feature extraction circuit 17 is provided for extracting features by changing inspection criteria such as feature extraction patterns. The inspection information memory 16 changes the inspection condition and the feature extraction circuit to be used for each inspection region to be detected or each pixel in the region in the binarized image detected from the image memory 5. Thereby, even for the same inspection item, the degree can be changed in different areas. For example, regarding the detection of a chipping defect, the feature extraction pattern is changed so as to detect a shallow chipping defect in a certain region and a deep chipping defect in another region. Further, a pattern such as a space between lines designated by each feature extraction circuit 17 or a designated pattern missing, disconnection pattern, short circuit or the like is detected for each detection region. In this way, the rule serving as the inspection standard can be changed according to the location of the wiring pattern to be detected.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIG. In FIG. 7, the same parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, the output of the image memory 5 is connected to each of the area memories 10A to 10C, and further connected to the CPU 13. A memory 18 and an operation unit 15 are connected to the CPU 13. Memory 18
Is a memory for holding the operation program of the CPU 13. In this embodiment, the flowchart shown in FIG. 5 described above is executed by software, and its operation is the same as that of the first embodiment described above.

[0030]

As described in detail above, according to the present invention, a wiring pattern, a wiring pad, a solder resist, and a printed circuit board on which silk printing is performed can be printed accurately according to the characteristics of each pattern. The effect that it can be inspected after the product is manufactured is obtained. Further, since these patterns are independently aligned and the accuracy can be set respectively, the tolerance of the wiring pattern can be optimally set, and the inspection can be performed without overlooking the defects of the wiring pattern. The effect is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a pattern inspection apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a reference pattern and an alignment template region according to the present embodiment.

FIG. 3 is a diagram showing inspection areas held in each area memory according to the present embodiment.

FIG. 4 is a diagram showing an example of a feature extraction operator used in a feature extraction circuit.

FIG. 5 is a flowchart showing the operation of the pattern inspection apparatus according to the present embodiment.

FIG. 6 is a block diagram showing a configuration of a pattern inspection apparatus according to a second embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a pattern inspection apparatus according to a third embodiment of the present invention.

[Explanation of symbols]

1 printed circuit board 2 lighting 3 cameras 4 Pre-processing circuit 5 image memory 6A, 6B, 6C binarization circuit 7A, 7B expansion and contraction circuit 8,17 Feature extraction circuit 9A, 9B, 9C alignment circuit 10A, 10B, 10C area memory 11A, 11B, 11C Totaling circuit 12A, 12B, 12C determination circuit 13 CPU 14 Output section 15 Operation part 16 Inspection information memory 18 memory

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 2F065 AA49 BB02 CC01 FF04 JJ03                       JJ26 QQ04 QQ24 QQ31 QQ39                       SS04                 2G051 AA65 AB02 CA04 EA11 EA14                       ED05 ED15 ED21                 5B057 AA03 BA02 BA29 BA30 CA02                       CA08 CA12 CA16 CB02 CB06                       CB12 CB16 CC01 CE12 CE20                       CH01 CH11 DA03 DB02 DB05                       DB09 DC01 DC32 DC36

Claims (3)

[Claims] 1. A pattern inspection device for a printed circuit board, wherein a solder resist and silk printing are formed on a wiring pattern of the printed circuit board, wherein an image pickup device for picking up the inspection pattern and an image picked up by the image pickup device are different from each other. First, second, and third binarization units that extract silk printing, solder resist, and wiring patterns by binarizing with a level threshold, and a first region memory that holds an inspection region for silk printing A second area memory holding an inspection area for the solder resist; a third area memory holding an inspection area for the wiring pattern; and a first binarization unit detected in the first area memory. A first expansion / contraction unit for expanding the pixels by a first predetermined number of pixels and then contracting the image expanded by the second number of pixels; A second expansion / contraction unit that expands the pixels detected by the second binarization unit by a first predetermined number of pixels and then contracts the image expanded by the second number of pixels; and the third region memory. In the indicated area, the binary image of the wiring pattern obtained by the third binarization unit is scanned with a predetermined feature extraction pattern, and the defective pixel is detected by detecting the position of the matching image. The area of the feature extraction unit, the silk printing pattern and the solder resist pattern obtained from the first and second expansion / contraction units is defined as the first and second areas.
The first and second totaling units that perform cluster inspection within the inspection region of the second region memory, and the defective pixels obtained by the feature extraction unit are aggregated within the inspection region of the third region memory. A pattern inspection apparatus comprising: a third totaling unit; and a determination unit that determines whether the pattern of the printed circuit board is good or bad based on the totaling results of the first to third totaling units. 2. A third expansion / contraction unit for expanding the defect detected by the feature extraction unit by a first predetermined number of pixels and then reducing the image expanded by the second number of pixels. The pattern inspection apparatus according to claim 1. 3. An inspection information memory that holds defect detection information including a feature extraction pattern that is different for each inspection position or area set in the third area memory, and the area is provided for each inspection area. The pattern inspection apparatus according to claim 1 or 2, wherein the defective pixel is detected by scanning the feature extraction pattern set in (4).