JP2002534891A - １ビットフォーマットのデータを処理するための回路、装置および方法 - Google Patents

１ビットフォーマットのデータを処理するための回路、装置および方法

Info

Publication number
JP2002534891A
JP2002534891A JP2000592946A JP2000592946A JP2002534891A JP 2002534891 A JP2002534891 A JP 2002534891A JP 2000592946 A JP2000592946 A JP 2000592946A JP 2000592946 A JP2000592946 A JP 2000592946A JP 2002534891 A JP2002534891 A JP 2002534891A
Authority
JP
Japan
Prior art keywords
digital
filter
data
bit
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000592946A
Other languages
English (en)
Japanese (ja)
Inventor
− メイ ゴン、スー
アレグザンダー、マーク
パウロス、ジョン、ジェームズ
ガーラス、エリック
ヘスター、ダイラン
Original Assignee
シラス ロジック、インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22840465&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JP2002534891(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by シラス ロジック、インコーポレイテッド filed Critical シラス ロジック、インコーポレイテッド
Publication of JP2002534891A publication Critical patent/JP2002534891A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation
    • H03M3/504—Details of the final digital/analogue conversion following the digital delta-sigma modulation the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
    • H03M1/066—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/324—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement
    • H03M3/346—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/392—Arrangements for selecting among plural operation modes, e.g. for multi-standard operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Communication Control (AREA)
  • Filters That Use Time-Delay Elements (AREA)
JP2000592946A 1998-12-31 1999-12-29 １ビットフォーマットのデータを処理するための回路、装置および方法 Pending JP2002534891A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/224,389 US6011501A (en) 1998-12-31 1998-12-31 Circuits, systems and methods for processing data in a one-bit format
US09/224,389 1998-12-31
PCT/US1999/030005 WO2000041311A1 (en) 1998-12-31 1999-12-29 Circuits, systems and methods for processing data in a one-bit format

Publications (1)

Publication Number Publication Date
JP2002534891A true JP2002534891A (ja) 2002-10-15

Family

ID=22840465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000592946A Pending JP2002534891A (ja) 1998-12-31 1999-12-29 １ビットフォーマットのデータを処理するための回路、装置および方法

Country Status (7)

Country Link
US (1) US6011501A (de)
EP (1) EP1142127B1 (de)
JP (1) JP2002534891A (de)
AT (1) ATE264573T1 (de)
AU (1) AU2366100A (de)
DE (1) DE69907741D1 (de)
WO (1) WO2000041311A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014017550A (ja) * 2012-07-05 2014-01-30 Asahi Kasei Electronics Co Ltd フィルタ回路

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EP0933870B1 (de) * 1998-02-03 2007-01-24 Texas Instruments Incorporated Hybrides FIR/IIR-Analogfilter
JP2001352247A (ja) * 2000-06-09 2001-12-21 Burr-Brown Japan Ltd 周波数領域において変調された信号をデジタル−アナログ変換する方法および装置
US6340940B1 (en) * 2000-07-18 2002-01-22 Cirrus Logic, Inc. Digital to analog conversion circuits and methods utilizing single-bit delta-SIGMA modulators and multiple-bit digital to analog converters
US6466087B2 (en) 2000-12-28 2002-10-15 Nokia Mobile Phones, Ltd. Method and apparatus providing digital error correction for a class D power stage
US7058463B1 (en) * 2000-12-29 2006-06-06 Nokia Corporation Method and apparatus for implementing a class D driver and speaker system
US6462685B1 (en) 2001-04-05 2002-10-08 Nokia Corporation Dither signal insertion inversely proportional to signal level in delta-sigma modulators
US6445318B1 (en) 2001-04-05 2002-09-03 Nokia Mobile Phones, Ltd. Method and apparatus for providing signal dependent dither generator for sigma-delta modulator
US6473019B1 (en) * 2001-06-21 2002-10-29 Nokia Corporation Low capacitance, low kickback noise input stage of a multi-level quantizer with dithering and multi-threshold generation for a multi-bit sigma-delta modulator
US6426714B1 (en) 2001-06-26 2002-07-30 Nokia Corporation Multi-level quantizer with current mode DEM switch matrices and separate DEM decision logic for a multibit sigma delta modulator
US6535155B2 (en) 2001-06-27 2003-03-18 Nokia Corporation Method and apparatus for suppressing tones induced by cyclic dynamic element matching (DEM) algorithms
US7173550B1 (en) * 2001-07-13 2007-02-06 Cirrus Logic, Inc. Circuits, systems and methods for volume control in low noise 1-bit digital audio systems
EP1573420A4 (de) * 2001-07-13 2006-11-15 Cirrus Logic Inc Schaltungen, systeme und verfahren zur lautstärkeregelung in 1-bit-digital-audiosystemen
US7183954B1 (en) * 2001-07-13 2007-02-27 Cirrus Logic, Inc. Circuits, systems and methods for volume control in low noise 1-bit digital audio systems
US6933871B2 (en) * 2001-09-17 2005-08-23 Cirrus Logic, Inc. Feedback steering delta-sigma modulators and systems using the same
US6556159B1 (en) * 2001-09-17 2003-04-29 Cirrus Logic, Inc. Variable order modulator
US6577258B2 (en) 2001-10-01 2003-06-10 Nokia Corporation Adaptive sigma-delta data converter for mobile terminals
IL165336A0 (en) * 2002-06-27 2006-01-15 Qualcomm Inc Filtering applicable to digital to analog converter systems
DE10236328A1 (de) * 2002-08-08 2004-02-19 Koninklijke Philips Electronics N.V. Schieberegister-Schaltungsanordnung mit verbesserter elektromagnetischer Verträglichkeit und Verfahren zum Betreiben derselben
US6727749B1 (en) * 2002-08-29 2004-04-27 Xilinx, Inc. Switched capacitor summing system and method
US6768437B1 (en) 2003-06-24 2004-07-27 Nokia Corporation Switched voltage-mode dither signal generation for a sigma-delta modulator
US6930624B2 (en) * 2003-10-31 2005-08-16 Texas Instruments Incorporated Continuous time fourth order delta sigma analog-to-digital converter
US8949120B1 (en) 2006-05-25 2015-02-03 Audience, Inc. Adaptive noise cancelation
US7633417B1 (en) * 2006-06-03 2009-12-15 Alcatel Lucent Device and method for enhancing the human perceptual quality of a multimedia signal
US7358884B1 (en) * 2006-10-05 2008-04-15 Apple Inc. Methods and systems for implementing a Digital-to-Analog Converter
US8526628B1 (en) * 2009-12-14 2013-09-03 Audience, Inc. Low latency active noise cancellation system
US8718290B2 (en) 2010-01-26 2014-05-06 Audience, Inc. Adaptive noise reduction using level cues
US8538035B2 (en) 2010-04-29 2013-09-17 Audience, Inc. Multi-microphone robust noise suppression
US8473287B2 (en) 2010-04-19 2013-06-25 Audience, Inc. Method for jointly optimizing noise reduction and voice quality in a mono or multi-microphone system
US8781137B1 (en) 2010-04-27 2014-07-15 Audience, Inc. Wind noise detection and suppression
US8447596B2 (en) 2010-07-12 2013-05-21 Audience, Inc. Monaural noise suppression based on computational auditory scene analysis
US8970416B2 (en) * 2013-03-11 2015-03-03 Microchip Technology Incorporated 4N+1 level capacitive DAC using N capacitors
US8970415B2 (en) * 2013-03-11 2015-03-03 Microchip Technology Incorporated Multi-level capacitive DAC
JP5938704B1 (ja) * 2014-09-30 2016-06-22 パナソニックＩｐマネジメント株式会社 モータ制御装置およびモータ制御方法
US10200053B2 (en) * 2016-04-14 2019-02-05 Cirrus Logic, Inc. Magnitude compensation technique for processing single-bit wide data
US20180076820A1 (en) * 2016-09-12 2018-03-15 California Institute Of Technology Accurate, finely tunable electronic delay generation with high process variation tolerance
US9900017B1 (en) * 2017-04-12 2018-02-20 Apple Inc. Digital to analog conversion using semi-digital FIR filter
US11356404B2 (en) * 2020-03-04 2022-06-07 Qualcomm Incorporated Domain name system (DNS) override for edge computing

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GB8813162D0 (en) * 1988-06-03 1988-07-06 British Telecomm Digital-to-analogue conversion
US5012245A (en) * 1989-10-04 1991-04-30 At&T Bell Laboratories Integral switched capacitor FIR filter/digital-to-analog converter for sigma-delta encoded digital audio
US5821892A (en) * 1996-11-20 1998-10-13 Texas Instruments Incorporated Digital to analog conversion system
DE69723073D1 (de) * 1997-09-19 2003-07-31 St Microelectronics Srl Tiefpassfilter mit mehreren Übertragungsraten mit geschalteten Kondensatoren und doppelter Signalabtastung für sigma-delta Digital-/Analog-Wandler

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014017550A (ja) * 2012-07-05 2014-01-30 Asahi Kasei Electronics Co Ltd フィルタ回路

Also Published As

Publication number Publication date
AU2366100A (en) 2000-07-24
EP1142127B1 (de) 2004-04-14
US6011501A (en) 2000-01-04
DE69907741D1 (de) 2003-06-12
ATE264573T1 (de) 2004-04-15
WO2000041311A1 (en) 2000-07-13
EP1142127A1 (de) 2001-10-10

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