JP2002299203A - Method for fabricating semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that an interlayer insulation film at the opening of a hole-type mask dimension inspection mark is susceptible to cracking and a conductive film enters the crack to cause a leak between lines. SOLUTION: A hole-type mark being used for alignment of a mask pattern is provided on a solid pattern formed on a semiconductor substrate and the solid pattern is formed to cover a region including the opening of the mark after it is used.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which the structure of a hole-type mask size inspection mark used for mask pattern alignment, overlay inspection, and the like in a semiconductor device manufacturing process is improved.

[0002]

2. Description of the Related Art In a manufacturing process of a semiconductor device, a complicated circuit pattern is formed by overlapping a large number of masks. Therefore, the smaller the processing accuracy, the more
The relative displacement with respect to the mask to be overlapped affects the product yield. In order to perform this relative positioning, a positioning mark is provided on the substrate, which serves as a reference for mask overlay. FIG. 3 is a top view of the mask size inspection mark used for the alignment of the mask pattern as described above. In the figure, 100 is a silicon substrate as a semiconductor substrate, 110 is a silicon substrate 100
It is a silicon oxide film formed thereon and forms a mask size inspection mark. As shown in FIG. 3, the mask size inspection mark is shaped like a cross when viewed from the top of the semiconductor device.
In an exposure step or the like, the mask is aligned with the cross-sectional shape of the mask dimension inspection mark on the semiconductor substrate to align the mask pattern.

Next, the production of the mask size inspection mark will be described with reference to a DRAM manufacturing process (from the field separation process to the storage node process) as an example. FIG.
It is a figure which shows the mask dimension inspection mark created for every manufacturing process of RAM, and a manufacturing process advances from (a) to (g). In the figure, reference numeral 120 denotes a transfer gate step (hereinafter abbreviated as a TG step) in the silicon substrate 1.
A W-Si film layer 130 is formed on the W-Si film layer 130, and a doped amorphous silicon film 130 is formed on the W-Si film layer in a TG process. The W-Si film layer 120 and the doped amorphous silicon film 130 form a polycide film. Reference numeral 130a denotes a mask size inspection mark in a TG process, which is formed at the same position as a mask size inspection mark formed by performing anisotropic polycide etching on a polycide film and forming a field separation process (hereinafter abbreviated as FL process). . Reference numeral 140 denotes a silicon oxide film formed on the substrate after the TG step in a lightly doped drain step (hereinafter abbreviated as 2N step), and 140a denotes a mask size inspection mark in the 2N step, which is oxidized to the silicon oxide film 140. This is a hole-type mark formed at the same position as the mask size inspection mark 130a by performing film dry etching.

Reference numeral 150 denotes a silicon oxide film formed on the substrate after a 2N process in a bit line direct contact process (hereinafter abbreviated as a BC process). Reference numeral 150a denotes a mask size inspection mark in the BC process. Is a hole-type mark formed by subjecting an oxide film to dry etching. 160 denotes a W-Si formed on the substrate after the BC process in a bit line process (hereinafter abbreviated as a BL process).
Reference numeral 170 denotes a doped amorphous silicon film formed on the W-Si film 160. The W-Si film layer 160 and the doped amorphous silicon film 170 form a polycide film. Reference numeral 170a denotes a mask size inspection mark in the BL process, which is formed at the same position as the mask size inspection mark 150a formed in the BC process by performing anisotropic polycide etching on the polycide film. 18
0 is a storage node direct contact process (hereinafter referred to as SC
A silicon oxide film formed on the substrate after the BL process in step SC), a mask size inspection mark 180a is a mask size inspection mark in the SC process. It is formed at the same position. 190 is a storage node process (hereinafter referred to as S
N), an amorphous silicon film formed on the substrate after the SC process in the SC process, and 190a is a mask size inspection mark in the SN process, which is a mask size inspection formed in the SN process by performing anisotropic polycide etching. It is formed at the same position as the mark 180a. Note that the same components as those in FIG.

FIG. 5 is a sectional view of the mask size inspection mark shown in FIG. In FIG.
The dimension of the mask size inspection mark made of the polycide film in the TG process shown in (b), and b is the BC shown in FIG.
Hole type mask size inspection mark 150a in process
, C is the size of the opening of the hole-type mask size inspection mark 170a in the BL process shown in FIG. 4E, and d is the hole-type mask in the SC process shown in FIG. Dimensions of the opening of the inspection mark 180a,
“e” is the dimension of the opening of the hole-type mask inspection mark 190a in the SN process shown in FIG.

Next, the outline will be described. First, in the FL process, the silicon substrate 100 is subjected to etching, thermal oxidation, or the like, so that the silicon oxide film 1 shown in FIG.
A mask size inspection mark consisting of 10 is formed. FIG. 4 (a)
4 shows a cross-sectional view along the line AA in FIG. 3, and FIG.
4B to 4G also show cross-sectional views along the line AA.

Next, the process proceeds to a TG process shown in FIG.
On the substrate after the FL process, the W-Si film 120 and the amorphous silicon film 130 are stacked to form a polycide film.
Thereafter, a mask dimension inspection mark 130a made of a polycide layer is formed on the mask dimension inspection mark made of the silicon oxide film 110 in the FL process by photolithography and anisotropic polycide etching.

When the TG process is completed, the process proceeds to the 2N process shown in FIG. 4C, where BP TEOS (Boron Pho
sphorus Tetra Ethyl Oltho
A silicon oxide film 140 is formed by forming a (Silicate) film, a nitride film, or the like. Thereafter, a photolithography process and an oxide film dry etching are performed to form a hole-type mask size inspection mark 140a on the mask size inspection mark 130a of the polycide film in the TG process.

In the 2N process, LDD (Lightly Do
When the Ped Drain (Ped Drain) structure is formed, the process proceeds to a BC process, in which a BPTEOS film, a nitride film, and the like are formed again to form a silicon oxide film 150. Thereafter, photolithography and oxide film dry etching are performed to form a hole-type mask inspection mark 150a as shown in FIG. 4D on the mask inspection mark 140a in the 2N step. At this time, if the fine design rule of the 0.25 μm class is used, the dimension a of the mask dimension inspection mark 130a formed by the polycide film in the TG step and the dimension b of the opening of the hole type mask dimension inspection mark 150a in the BC step are obtained. Is only 1 μm or less, which is necessary for the overlay margin in the photolithography process in the 2N step and the BC step. Therefore, the underlay of the hole type mask size inspection mark 140a in the BC process by the mask size inspection mark 130a made of the polycide film in the TG process is insufficient (ie,
Since the contact area of the silicon oxide film 140 layer of the mask size inspection mark 140a on the upper surface portion of the mask size inspection mark 130a is small), the stress generated in the mask size inspection mark 140a made of the silicon oxide film 140 is sufficiently suppressed. Can not do.

When the BC process is completed, the process proceeds to the BL process,
A W-Si film 160 and an amorphous silicon film 170 are stacked on the substrate after the BC process to form a polycide film.
Then, by photolithography and anisotropic polycide etching, the mask dimension inspection mark made of the polycide film as shown in FIG. 170
a is formed. At this time, the dimension difference between the dimension b of the opening of the mask dimension inspection mark 150a in the BC step and the dimension c of the mask dimension inspection mark 170a in the BL step is BL
There is only 1 μm or less, which is necessary for the overlay margin in the photolithography process in the process. Therefore, BC due to the mask size inspection mark 170a made of a polycide film in the BL process
Since the hole-type mask size inspection mark 150a in the process is not sufficiently covered with the mask size inspection mark 150a (that is, the contact area of the polycide film layer of the mask size inspection mark 170a around the opening of the mask size inspection mark 150a is small), the silicon oxide film is formed. Fifteen
The stress generated in the mask inspection mark 150a consisting of 0 cannot be sufficiently suppressed.

Next, proceeding to the SC process, BP TEOS
A silicon oxide film 180 is formed on the substrate after the BL process by forming a film, a nitride film, and the like. Thereafter, photolithography and oxide film dry etching are performed to form a hole-type mask inspection mark 180a as shown in FIG. 4F on the mask inspection mark 170a in the BL process.
At this time, the mask size inspection mark 180a in the SC process is used.
The dimension difference between the dimension d of the opening and the dimension c of the mask dimension inspection mark 170a in the BL process is only 1 μm or less, which is necessary for the overlay margin in the photolithography process in the SC process. Therefore, the underlay of the hole-type mask size inspection mark 180a in the SC process by the mask size inspection mark 170a made of the polycide film in the BL process is insufficient (that is, the silicon of the mask size inspection mark 180a on the upper surface portion of the mask size inspection mark 170a). Since the contact area of the oxide film 180 is small), the stress generated in the mask size inspection mark 180a made of the silicon oxide film 180 cannot be sufficiently suppressed.

When the SC process is completed, the process proceeds to the SN process,
An amorphous silicon film 190 is laminated on the substrate after the SC process. Thereafter, by photolithography and anisotropic polycide etching, the mask size inspection mark 180a made of the silicon oxide film 180 in the SC process is put on FIG.
A mask size inspection mark 190a as shown in FIG. At this time, the mask size inspection mark 18 in the SC process is used.
The dimensional difference between the dimension d of the opening 0a and the dimension e of the mask size inspection mark 190a in the SN process is only 1 μm or less, which is necessary for the overlay margin in the photolithography process in the SN process. Therefore, the hole-type mask inspection mark 180a of the SC process is formed by the mask inspection mark 190a of the amorphous silicon film 190 in the SN process.
Is insufficient (namely, the contact area of the amorphous silicon film 190 layer of the mask size inspection mark 190a around the opening of the mask size inspection mark 180a is small), so that the mask size inspection mark 1 composed of the silicon oxide film 190 is formed.
The stress generated at 80a cannot be sufficiently suppressed.

[0013]

Since the conventional method of manufacturing a semiconductor device is performed as described above, cracks such as cracks are liable to be formed in the interlayer insulating film at the opening of the hole type mask size inspection mark. There is a problem in that a conductive film may enter a crack, causing a leak between wirings.

The above problem will be described in detail.
The silicon oxide film between the layers made of EOS has good coverage, but large stress easily accumulates in the film. Further, the hole-type mask inspection mark is formed of a hole formed in a silicon oxide film according to a design rule of several μm. For this reason, the stress from the silicon oxide film forming the mask size inspection mark is larger than the allowable stress value at other locations created using the minimum design rule. For this reason, cracks such as cracks are likely to occur in the interlayer insulating film at the openings of the mask size inspection marks 150a and 180a indicated by the positions X and Y with circles in FIG. Furthermore, since marks of the same shape (hole type) are stacked at the same position in each step, stress generated at the time of forming the marks is easily concentrated, and the contact area between the upper and lower layers in the opening is also reduced, thereby suppressing the stress. Becomes insufficient.

In this manner, the mask size inspection mark 150
In a crack such as a crack generated in the interlayer insulating film in the openings a and 180a, there is a possibility that a conductive material, such as tungsten, to be laminated by sputtering or the like in a later process may be embedded. Therefore, if an aluminum wiring or the like is provided in this upper layer, a problem such as a short circuit between wirings occurs, and the yield during manufacturing is reduced, and
This can also be a factor in reducing product reliability.

The present invention has been made to solve the above-mentioned problems, and has a sandwich structure in which a hole-type mask inspection mark is sandwiched by a solid pattern in each step, or a sandwich of the mask inspection mark in each step. By forming a structure in another place, it is possible to obtain a method of manufacturing a semiconductor device in which stress generated in each layer is suppressed to prevent generation of cracks such as cracks in an interlayer insulating film in an opening of a mask inspection mark. Aim.

[0017]

According to a method of manufacturing a semiconductor device according to the present invention, a hole-type mark used for alignment of a mask pattern is provided on a solid pattern formed on a semiconductor substrate. The solid pattern is formed so as to cover a region including an opening of a mark.

A method for manufacturing a semiconductor device according to the present invention comprises:
When a plurality of hole-type marks are provided, each is arranged in a separate area.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 2 is a top view of a mask dimension inspection mark used for positioning a mask pattern and a solid pattern covering the mask dimension alignment mark in the method of manufacturing a semiconductor device according to the first embodiment of the present invention.
(B) shows a solid pattern. In the figure, reference numeral 1 denotes a silicon substrate as a semiconductor substrate, and 2 denotes a silicon oxide film formed on the silicon substrate 1 and constitutes a mask size inspection mark. Numeral 4 denotes a solid pattern, which is composed of a polycide film composed of a W-Si film and a doped amorphous silicon film.

FIG. 2 shows a method of manufacturing a semiconductor device according to the first embodiment of the present invention.
Taking a RAM as an example, the process proceeds as going from (a) to (g). In the figure, 3 is a W-Si film layer formed on the silicon substrate 1 in the TG process, and 4 is
This is a doubt amorphous silicon film formed on the W-Si film layer in the G step. The W-Si film layer 3 and the doped amorphous silicon film 4 form a polycide film. Reference numeral 4a denotes a mask size inspection mark in the TG process, which is formed at the same position A as the mask size inspection mark formed in the FL process by performing anisotropic polycide etching on the polycide film. 5 is a silicon oxide film formed on the substrate after the TG process in the 2N process, 5a is a mask size inspection mark (hole type mark) in the 2N process, and the silicon oxide film 5 is subjected to an oxide film dry etching. This is a hole type mark formed at a position B different from the mask size inspection mark 4a.

Reference numeral 6 denotes a silicon oxide film formed on the substrate after the 2N process in the BC process. Reference numeral 6a denotes a mask size inspection mark (hole type mark) in the BC process. This is a hole-type mark formed by applying. Reference numeral 7 denotes a W-Si film formed on the substrate after the BC process in the BL process, and reference numeral 8 denotes a doped amorphous silicon film formed on the W-Si film 7. The W-Si film layer 7 and the doped amorphous silicon film 8 form a polycide film. 8a is a mask size inspection mark (hole type mark) in the BL process, which is a mask size inspection mark 6 formed in the BC process by performing anisotropic polycide etching on the polycide film.
It is formed at a position A different from a. 9 is an SC process in BL
9a is a silicon oxide film formed on the substrate after the process.
This is a mask size inspection mark (hole type mark) in the step C, and is formed at a position C different from the mask size inspection mark 8a by performing an oxide film dry etching on the silicon oxide film 9. Reference numeral 10 denotes an amorphous silicon film formed on the substrate after the SC process in the SN process, and 10a denotes a mask size inspection mark (a hole type mark) in the SN process. It is formed at a position A different from the formed mask inspection mark 9a.

Next, the outline will be described. First, in the FL process, the silicon substrate 1 is subjected to etching, thermal oxidation, or the like, so that a silicon oxide film 2 as shown in FIG.
Is formed at a position A on the semiconductor substrate 1. FIG. 2A is a cross-sectional view taken along the line BB of FIG. 1, and each of the positions A, B, and C from FIG. 2B to FIG. FIG.

Next, the process proceeds to the TG process shown in FIG.
The W-Si film 3 and the amorphous silicon film 4 are laminated at the positions A and B of the substrate after the FL process to form a polycide film. Thereafter, a mask dimension inspection mark 4a composed of a polycide layer is formed at a position A on the mask dimension inspection mark composed of the silicon oxide film 2 in the FL process by photolithography and anisotropic polycide etching. At the position B, a solid pattern of a polycide film as shown in FIG. 1B is provided. The area of the solid pattern provided at the position B only needs to have an area sufficient to suppress the stress of the silicon oxide film forming the hole-type mark formed in the subsequent BC process, and it is not necessarily required that the area shown in FIG. (B)
However, the pattern is not limited to the pattern shown in FIG. 1 (for example, the pattern may cover the concave portion (opening) in the mask inspection mark in FIG. 1A).

When the TG process is completed, the process proceeds to the 2N process shown in FIG. 2C, where BP TEOS (Boron Pho
sphorus Tetra Ethyl Oltho
A silicon oxide film 5 is formed at positions A, B, and C by forming a film (Silicate), a nitride film, and the like. after this,
Photolithography process and dry etching of oxide film
In the process, a hole-type mask size inspection mark 5a is formed on the solid pattern of the polycide film provided at the position B. At positions A and B, a solid pattern of the silicon oxide film 5 is provided. These solid patterns are
It constitutes the bottom area of the hole type mark created in the subsequent steps.

In the 2N step, LDD (Lightly Do
When the Ped Drain (ped drain) structure is formed, the process proceeds to the BC process, and a BPTEOS film, a nitride film, and the like are formed again to form the silicon oxide film 6. Thereafter, a photolithography process and an oxide film dry etching are performed to form a hole type mask size inspection mark 6a as shown in FIG. 2D on the mask size inspection mark 5a provided at the position B in the 2N step. I do. At this time, since the solid pattern of the polycide film is formed at the position B in the TG process, the underlay of the hole-type mask size inspection mark 5a of the BC process by the solid pattern of the polycide film is sufficient (that is, TG).
(The contact area between the solid pattern formed by the polycide film provided in the process and the silicon oxide film 5 layer of the mask size inspection mark 5a is large.) Therefore, the stress generated in the mask size inspection mark 5a made of the silicon oxide film 5 is sufficiently suppressed. can do.

When the BC process is completed, the process proceeds to the BL process,
The W-Si film 7 and the amorphous silicon film 8 are stacked at positions A, B, and C on the substrate after the BC process to form a polycide film. Thereafter, by photolithography and anisotropic polycide etching, a mask size inspection mark made of a polycide film as shown in FIG. 2E is formed on the solid pattern made of the silicon oxide film 6 provided in the BC process. 8a is formed. At this time, as shown in FIG. 2E, a region including the opening of the mask size inspection mark 6a provided at the position B in the BC step is covered with the solid pattern of the polycide film. As described above, the solid pattern formed by the polycide film and the B
By forming a sandwich type structure sandwiched by the solid pattern of the polycide film provided at the position B in the step C, it is possible to suppress the stress generated around the opening of the mask size inspection mark 6a. In addition, a solid pattern of a polycide film is also formed at position C in order to provide a hole-type mark in a later step.

Next, proceeding to the SC process, BP TEOS
A silicon oxide film 9 is formed at positions A, B, and C on the substrate after the BL process by forming a film, a nitride film, and the like. Thereafter, a photolithography process and an oxide film dry etching are performed to form a hole type mask size inspection mark 9a as shown in FIG. 2F on the solid pattern of the polycide film provided at the position C in the BL process. I do. At this time, since the contact area between the silicon oxide film 9 layer of the mask size inspection mark 9a provided at the position C in the SC process and the solid pattern made of the polycide film provided at the position C in the BL process is large, the silicon oxide film 9 The stress generated in the mask size inspection mark 9a can be sufficiently suppressed. Further, a solid pattern made of a silicon oxide film 9 is formed at positions A and B in order to provide a hole-type mark in a later step.

When the SC process is completed, the process proceeds to the SN process,
The amorphous silicon film 10 is stacked at the positions A and C on the substrate after the SC process. Thereafter, by photolithography and anisotropic polycide etching, a mask size inspection mark 10a as shown in FIG. 2G is formed on the solid pattern made of the silicon oxide film 9 in the SC process. At this time, as shown in FIG.
Is covered with a solid pattern of the amorphous silicon film 10. As described above, the mask size inspection mark 9a is sandwiched between the solid pattern of the polycide film provided at the position C in the BL process and the solid pattern of the amorphous silicon film 10 provided at the position C in the SC process, so that the mask is formed. Stress generated around the opening of the dimension inspection mark 9a can be suppressed.

As described above, according to the first embodiment, the hole-type marks 6a and 9a used for the alignment of the mask pattern are provided on the solid pattern formed on the semiconductor substrate. Marks 6a, 9a
Since the solid pattern is formed so as to cover the area including the opening of the hole type, the stress generated from the hole type marks 6a and 9a can be suppressed.
The occurrence of cracks such as cracks in the interlayer insulating film outside the openings a and 9a can be prevented. Thereby, it is possible to suppress a decrease in yield due to these cracks, and it is also possible to improve the reliability of the product.

Further, according to the first embodiment, when a plurality of hole-type marks are provided, each of them is arranged in a separate region, so that accumulation of stress generated from the hole-type marks 6a and 9a is prevented. be able to.

In the first embodiment, the process of manufacturing a DRAM as a semiconductor device has been described.
The present invention can be applied to all devices that use an insulating film that accumulates a large stress such as EOS as an interlayer film of a hole-type mark.

In the first embodiment, BP TE
Although the example in which the silicon oxide film made of the OS is used as the interlayer film of the hole type mark has been described, the present invention can be applied to all interlayer films that generate stress when the device is used.

[0033]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a hole-type mark used for alignment of a mask pattern is provided on a solid pattern formed on a semiconductor substrate, and the use of the mark is improved. Later, since a solid pattern is formed so as to cover the area including the mark opening, the stress generated from the hole-type mark can be suppressed. There is an effect that generation of cracks such as cracks in the insulating film can be prevented. As a result, it is possible to suppress a decrease in yield due to these cracks and to improve the reliability of the product.

According to the method of manufacturing a semiconductor device of the present invention, when a plurality of hole-type marks are provided, they are arranged in different regions, so that stress generated from the hole-type marks accumulates. This has the effect that it can be prevented.

[Brief description of the drawings]

FIG. 1 is a top view of a mask dimension inspection mark used for alignment of a mask pattern and a solid pattern covering the mark in a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a view illustrating a method of manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a top view of a mask size inspection mark.

FIG. 4 is a diagram showing a mask size inspection mark created for each DRAM manufacturing process.

FIG. 5 is a diagram showing a cross-sectional view of the mask size inspection mark shown in FIG. 4 (g).

[Explanation of symbols]

1 silicon substrate (semiconductor substrate), 2 silicon oxide film, 3 W-Si film layer, 4 doubt amorphous silicon film, 4a mask size inspection mark, 5 silicon oxide film, 5a mask size inspection mark (hole type mark), 6 silicon oxide film, 6a mask size inspection mark (hole type mark), 7 W-Si film, 8 dopto amorphous silicon film, 8a mask size inspection mark (hole type mark), 9 silicon oxide film, 9a
Mask size inspection mark (Hall type mark), 10
Amorphous silicon film, 10a Mask size inspection mark (hole type mark).

Claims (2)

[Claims] 1. A solid pattern provided on a solid pattern formed on a semiconductor substrate and having a hole type mark used for alignment of a mask pattern, the solid pattern covering an area including an opening of the mark after use of the mark. Forming a semiconductor device. 2. When providing a plurality of hole-type marks,
2. The method according to claim 1, wherein each of the plurality of areas is arranged in a separate area.
The manufacturing method of the semiconductor device described in the above.