JP2002289911A - Device for optical communication - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device for optical communication which is composed of a board for IC chip mounting, where a light-receiving element and a light- emitting element are mounted in specified positions and a multilayer printed wiring board, where an optical waveguide path is formed at a specified position, and is low in connection loss between mounted optical parts, and is superior in reliability on connection. SOLUTION: In this device for optical communication, consisting of the board 120 for IC mounting and the multilayer printed wiring board 100, the board 120 for IC chip-mounting includes a conductor circuit 129, an interlayer insulating layer 122, and a via hole 127 connecting the conductor circuits catching the interlayer insulating layer, and a light-receiving element 138 and a light- emitting element 139 are mounted on the board 120 for IC chip mounting.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a device for optical communication.

In recent years, attention has been focused on optical fibers mainly in the field of communications. In particular, in the field of IT (information technology), communication technology using optical fibers is required for maintenance of a high-speed Internet network. Optical fiber has low loss,
It has features such as high bandwidth, small diameter and light weight, no induction, and resource saving.A communication system using optical fibers with this feature has a higher number of repeaters than a communication system using a conventional metallic cable. Can be greatly reduced, construction and maintenance become easier, economical communication system,
High reliability can be achieved.

In addition, since an optical fiber can simultaneously multiplex not only light of one wavelength but also light of many different wavelengths through one optical fiber, a large-capacity optical fiber can be used for various applications. A transmission path can be realized, and it is possible to support video services and the like.

[0004] In such network communication such as the Internet, optical communication using an optical fiber is used not only for communication on the backbone network but also for communication between the backbone network and terminal equipment (PC, mobile, game, etc.). It has also been proposed to use it for communication between terminal devices. In the case where optical communication is used for communication between the backbone network and the terminal equipment, it is necessary to attach an optical communication device to the terminal equipment. The optical communication device includes an optical waveguide for transmitting an optical signal to a substrate, an optical waveguide, and the like. There has been proposed one provided with optical components such as a light receiving element and a light emitting element for processing a signal.

[0005]

However, the conventional optical communication device has not been sufficiently satisfactory in connection reliability. This is a factor for achieving optical communication with excellent connection reliability, that is, in connection between optical components (for example, connection between an optical fiber and an optical waveguide or connection between an optical waveguide and a light receiving element or a light emitting element). This is considered to be because the low connection loss could not be sufficiently ensured.

Specifically, in a conventional optical communication device, an area for mounting an optical element such as a light receiving element or a light emitting element is formed on a substrate in advance, and the optical element is mounted on the substrate and then embedded. The optical element has been mounted by filling and curing a resin. However, when the optical element is mounted by such a method, the optical element is subjected to heat received during curing processing of an interlayer insulating layer or a solder resist layer, reflow processing of a solder paste, warpage of a substrate, and plating processing. A positional shift is likely to occur due to the influence of stress or the like caused by the swing, and when the positional shift occurs, the reliability of connection with other optical components (optical waveguides and optical fibers) is reduced. Furthermore, when the optical element is mounted (attached) using an adhesive or solder, the adhesive or solder is softened due to the heat history of the subsequent process, and the displacement of the optical element is accordingly reduced. Occurred.

[0007]

Means for Solving the Problems Accordingly, the present inventors have:
As a result of intensive studies to ensure a low connection loss in the connection between the optical components, when mounting the optical components on the substrate and / or in the substrate, each optical component is mounted at a predetermined position, By conceiving that a low connection loss can be ensured by eliminating the displacement of the optical components, the optical communication device of the present invention having the following configuration has been completed.

That is, the optical communication device according to the present invention comprises an IC
An optical communication device comprising a chip mounting substrate and a multilayer printed wiring board, wherein the IC chip mounting substrate is
A conductor circuit, an interlayer insulating layer, and a via hole connecting between the conductor circuits sandwiching the interlayer insulating layer. The light receiving element and the light emitting element are mounted on the IC chip mounting substrate. It is characterized by.

In the optical communication device of the present invention, it is preferable that the light receiving element and the light emitting element are mounted on a surface facing the multilayer printed wiring board.

In the above-mentioned optical communication device,
Either the light receiving element and the light emitting element are mounted on a surface opposite to the surface facing the multilayer printed wiring board, or one of the light receiving element and the light emitting element is the multilayer printed wiring board. It is also preferable that it is mounted on the surface on the opposite side, and the other is mounted on the surface on the opposite side to the surface on the side facing the multilayer printed wiring board. Further, in this case, it is desirable to form an optical path for transmitting an optical signal that penetrates the IC chip mounting substrate.

In the above-mentioned multilayer printed wiring board,
It is preferable that the conductor circuit and the interlayer insulating layer are sequentially formed on both surfaces or one surface of the substrate.

In the optical communication device of the present invention, it is desirable that an optical waveguide is formed on the multilayer printed wiring board. In this case, the light receiving element and the light emitting element are provided on the multilayer printed wiring board. It is preferable that an optical path for transmitting an optical signal is formed between the optical waveguide and the optical waveguide.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an optical communication device according to the present invention will be described. The optical communication device according to the present invention comprises an IC
An optical communication device comprising a chip mounting substrate and a multilayer printed wiring board, wherein the IC chip mounting substrate is
A conductor circuit, an interlayer insulating layer, and a via hole connecting between the conductor circuits sandwiching the interlayer insulating layer. The light receiving element and the light emitting element are mounted on the IC chip mounting substrate. It is characterized by.

The optical communication device of the present invention comprises an IC chip mounting substrate having a light receiving element and a light emitting element mounted at predetermined positions, and a multilayer printed wiring board having an optical waveguide formed at a predetermined position. Therefore, the connection loss between the mounted optical components is low, and the connection reliability is excellent as an optical communication device.

In particular, when the light receiving element and the light emitting element are mounted on the surface of an IC chip mounting substrate, a via hole for connecting a conductor circuit, an interlayer insulating layer, and a conductor circuit sandwiching the interlayer insulating layer is formed. After that, the light-receiving element and the light-emitting element may be finally mounted, so that there is no heat or stress when the conductor circuit or the interlayer insulating layer is formed after the mounting. Therefore, the light emitting element and the light receiving element can be surely mounted at a desired position without causing a positional shift due to the heat and the stress. Further, when an optical element such as a light-emitting element or a light-receiving element is mounted on the surface of the IC chip mounting substrate, it is preferable that the flip-chip type is used. This is because displacement of an optical element such as a light emitting element or a light receiving element is unlikely to occur, and the optical element can be easily repaired.

In the optical communication device according to the present invention, when the IC chip mounting board and the multilayer printed wiring board are connected via solder bumps, the two are connected by a self-alignment action of the solder. It can be more reliably arranged at a predetermined position. Note that the self-alignment action refers to an action in which the solder resist layer repels the solder so that the solder tends to exist in a more stable shape near the center of the solder bump forming opening due to its own fluidity during the reflow process. When this self-alignment action is used, when connecting the IC chip mounting substrate to the multilayer printed wiring board via the solder bumps, it is assumed that a positional shift has occurred between the two before the reflow. Also, at the time of reflow, the IC chip mounting substrate moves, and the IC chip mounting substrate can be mounted at an accurate position on the multilayer printed wiring board.
Therefore, if optical components such as a light receiving element, a light emitting element, and an optical waveguide are mounted at precise positions on the IC chip mounting substrate and the multilayer printed wiring board, respectively, the multilayer printed wiring is formed via solder bumps. By connecting the substrate for mounting an IC chip on a board, an optical communication device having excellent connection reliability can be manufactured. Also, B
The same effect can be obtained even when both are connected via GA or PGA.

A light receiving element and a light emitting element are mounted on an IC chip mounting substrate constituting the optical communication device. Here, the mounting position of the light receiving element and the light emitting element is not particularly limited, but is preferably on the surface of the IC chip mounting substrate as described above. In that case, both the light receiving element and the light emitting element may be mounted on the surface of the IC chip mounting board opposite to the multilayer printed wiring board, or may be mounted on the IC chip mounting board. The light receiving element and the light emitting element may be mounted on a surface opposite to the surface on the opposite side.
The IC chip mounting substrate may be mounted on the surface opposite to the multilayer printed wiring board, and the other may be mounted on the IC chip mounting substrate opposite the surface opposite to the multilayer printed wiring board. When the light receiving element and the light emitting element are mounted on the surface of the IC chip mounting board opposite to the surface facing the multilayer printed wiring board, the light receiving element and the light emitting element are usually It will be mounted on the same side surface of the IC chip mounting substrate.

As described above, by appropriately selecting the mounting position of the light receiving element and the light emitting element according to the design of the optical communication device, the degree of freedom of the design of the optical communication device is further improved, and the light receiving element is further improved. In addition, displacement between the light emitting element and the optical waveguide formed on the multilayer printed wiring board is less likely to occur, and the connection reliability of the optical signal is further improved. Further, by determining the mounting position of the light receiving element and the light emitting element according to the design of the optical communication device, stress is less likely to be generated on the IC chip mounting substrate. Specifically, for example, the generation of stress due to the difference in thermal expansion coefficient between the light receiving element, the light emitting element, the IC chip, the substrate, the interlayer insulating layer, the conductor circuit, etc., which constitute the IC chip mounting board, It can be suppressed by appropriately selecting the position or the formation position. Also, I
The strength of the C chip mounting substrate can also be ensured.

Further, the light receiving element and the light emitting element are I
When mounted on the surface of the C chip mounting substrate opposite to the surface opposite to the multilayer printed wiring board, and one of the light receiving element and the light emitting element is the multilayer printed wiring of the IC chip mounting substrate. If the IC chip mounting substrate is mounted on the surface opposite to the board and the other is mounted on the surface of the IC chip mounting substrate opposite to the surface opposite to the multilayer printed wiring board, the IC chip mounting substrate is mounted. It is desirable that a penetrating optical path for transmitting an optical signal is formed. This is because an optical signal can be transmitted to and from the optical waveguide formed on the multilayer printed wiring board via the optical signal transmission optical path. In addition, by appropriately selecting the mounting position of the light receiving element and the light emitting element, and whether or not to form an optical path for transmitting an optical signal, the mounting position of the light receiving element and the light emitting element can be selected more freely. As a result, free space is widened in designing the IC chip mounting substrate, and high-density wiring and the like can be achieved. Note that the free space refers to a region where a conductive circuit is formed or an electronic component such as a capacitor is mounted.

Examples of the light receiving element include a PD (photodiode) and an APD (avalanche photodiode). These may be appropriately used in consideration of the configuration of the optical communication device, required characteristics, and the like. As the material of the light receiving element, Si, Ge, InG
aAs and the like. Among these, InGaAs is desirable because of its excellent light receiving sensitivity.

Examples of the light emitting element include an LD (semiconductor laser), a DFB-LD (distributed feedback semiconductor laser), and an LED (light emitting diode). These may be appropriately used in consideration of the configuration, required characteristics, and the like of the optical communication device.

Gallium,
Arsenic and phosphorus compounds (GaAsP), gallium, aluminum and arsenic compounds (GaAlAs), gallium and arsenic compounds (GaAs), indium, gallium and arsenic compounds (InGaAs), indium, gallium, arsenic and phosphorus compounds ( InGaAs
P) and the like. These may be used properly in consideration of the communication wavelength. For example, when the communication wavelength is in the 0.85 μm band, GaAlAs can be used, and when the communication wavelength is in the 1.3 μm band or 1.55 μm band. Is InGa
As or InGaAsP can be used.

The light receiving element and the light emitting element may be of a wire bonding type, but are preferably of a flip chip type. This is because a flip-chip type light receiving element or light emitting element is unlikely to cause a positional shift due to a self-alignment effect at the time of mounting, and is easily repaired when mounted on a surface.

When an optical path for transmitting an optical signal is formed on the substrate for mounting an IC chip, the interior of the optical path for transmitting an optical signal may be an air gap, but may be provided on a wall surface of the optical path for transmitting an optical signal. May have a conductor layer formed thereon, and an optical path resin layer may be formed inside the optical path for transmitting an optical signal. The conductor layer and the resin layer for an optical path are
Each of them may be formed in a part of the optical path for transmitting an optical signal. When a conductor layer is formed on the wall surface of the optical path for transmitting an optical signal, the conductor layer is preferably formed of a glossy metal, and specific examples of the glossy metal include, for example, Ni, Au, Ag and the like can be mentioned.
When a resin layer for an optical path is formed inside the optical path for transmitting an optical signal, the material of the resin layer for the optical path is not particularly limited, but the transmittance of the communication wavelength light is 70% or more. Is desirable.

The transmittance of the optical path resin layer for communication wavelength light refers to the transmittance of communication wavelength light per 1 mm length. Specifically, when light having an intensity of I ₁ is incident on the resin layer for an optical path and passes through the resin layer for an optical path by 1 mm, the intensity of the emitted light is I ₂ . In this case, the value is calculated by the following equation (1).

Transmittance (%) = (I ₂ / I ₁ ) × 100 (1)

Preferably, the substrate for mounting an IC chip is formed by sequentially laminating a conductor circuit and an interlayer insulating layer on both surfaces or one surface of the substrate. Specifically, for example, a conductor circuit and an interlayer insulating layer are formed on both surfaces or one surface of a substrate made of a resin substrate or the like impregnated with a core material by a build-up method. It is desirable that via holes for connecting circuits be formed. With such a configuration, the light receiving element and the light emitting element, and further, the IC chip mounting substrate is unlikely to be warped or stressed even when the IC chip is mounted, and the light receiving element and the light emitting element due to these are hardly generated. Is less likely to be misaligned. Further, by forming a conductor circuit, an interlayer insulating layer, and a via hole by a build-up method, the wiring of the IC chip mounting substrate can be made finer, and the density of the IC chip mounting substrate can be increased. it can. Further, the light receiving element and the light emitting element can be reliably electrically connected to the IC chip.

It is desirable that the IC chip mounting substrate has solder bumps for transmitting electric signals. Thereby, electric signals can be transmitted to and from the external electronic component.

An optical waveguide is formed on the multilayer printed wiring board constituting the optical communication device, and an optical signal can be transmitted through the optical waveguide.
Further, in the multilayer printed wiring board, it is desirable that an optical path for transmitting an optical signal for transmitting an optical signal between the light receiving element and the light emitting element and the optical waveguide is formed. This is because an optical signal can be transmitted between the light receiving element and the light emitting element formed on the IC chip mounting substrate via the optical path for transmitting an optical signal.

By appropriately forming the optical path for transmitting an optical signal on the multilayer printed wiring board, the degree of freedom in designing the multilayer printed wiring board is further improved, thereby increasing the density of the multilayer printed wiring board. Thus, the density of the optical communication device can be increased. This is because the dead space in the multilayer printed wiring board can be reduced by freely selecting the formation position of the optical waveguide in accordance with the design of the multilayer printed wiring board. The dead space refers to a region where formation of a conductor circuit and mounting of electronic components such as a capacitor are restricted. Usually, the optical waveguide is formed so as to cross the entire surface or a part of the substrate or the interlayer insulating layer, so that formation of a conductor circuit or the like is restricted in a region near the optical waveguide.

Examples of the material of the optical waveguide include quartz glass, a compound semiconductor, and a polymer material. Among these, polymers are desirable because they are excellent in workability, are excellent in adhesion to an interlayer insulating layer of a multilayer printed wiring board, and are low in cost.

As the polymer material, conventionally known materials can be used, and specifically, for example, PMMA
(Polymethyl methacrylate), acrylic resin such as deuterated PMMA, deuterated fluorinated PMMA, etc .; polyimide resin such as fluorinated polyimide; epoxy resin; UV-curable epoxy resin; silicone resin such as deuterated silicone resin; And polymers produced from butene.

The thickness of the optical waveguide is 1 to 50 μm.
And its width is preferably 1 to 50 μm. In the multilayer printed wiring board, the optical waveguide formed at a position facing the light receiving element of the IC chip mounting substrate and the optical waveguide formed at a position facing the light emitting element of the IC chip mounting substrate are made of the same material. Desirably, it consists of Preferably, an optical path conversion mirror is formed in the optical waveguide. This is because the optical path can be changed to a desired angle by forming the optical path conversion mirror. The formation of the optical path conversion mirror can be performed, for example, by grinding one end of the optical waveguide, as described later. It is preferable that the multilayer printed wiring board has solder bumps for transmitting electric signals. Thereby, electric signals can be transmitted to and from the external electronic component.

More specifically, for example, by connecting them via solder bumps, the light receiving element and the light emitting element can be arranged at predetermined positions facing the optical waveguide. This is because the self-alignment action of the solder can be used. The IC chip mounting substrate and the multilayer printed wiring board are made of PGA or BGA.
A similar effect can be obtained also when the connection is made via the.

As described above, in the optical communication device according to the present invention, light is transmitted between the light receiving element and the light emitting element mounted on the IC chip mounting substrate and the optical waveguide formed on the multilayer printed wiring board. A signal can be transmitted, and an optical path for transmitting an optical signal is formed on the IC chip mounting substrate and / or the multilayer printed wiring board as needed. Further, in the optical communication device of the present invention having the above-described configuration, the light receiving element and the light emitting element mounted on the IC chip mounting substrate, and
Since the optical waveguide formed on the multilayer printed wiring board is less likely to be displaced, the connection reliability of the optical signal is excellent.

Hereinafter, embodiments of the optical communication device having the above-described configuration will be described with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing one embodiment of the optical communication device of the present invention. FIG. 1 shows an optical communication device in which an IC chip is mounted.

As shown in FIG. 1, the optical communication device 150 of the present invention comprises an IC chip mounting substrate 120 on which an IC chip 140 is mounted and a multilayer printed wiring board 100. The multilayer printed wiring board 100 is electrically connected to the multilayer printed wiring board 100 via a solder connection portion 141.

The IC chip mounting substrate 120 is a substrate 12
The conductor circuits 124 (124a, 124b) and the interlayer insulating layer 122 are formed on both surfaces of the substrate 1 and the conductor circuits sandwiching the substrate 121 and the conductor circuits sandwiching the interlayer insulating layer 122 respectively have through holes. 129 (129
a, 129b) and via holes 127 (127a,
127b, 127c, and 127d). In addition, a solder resist layer 134 having solder bumps is formed on the outermost layer of the mounting substrate 120 for the IC chip. In addition, the outermost layer on the side facing the multilayer printed wiring board 100 includes a light receiving portion 138a and a light receiving portion 138a. Light emitting unit 1
A light receiving element 138 and a light emitting element 139 are provided so that 39a is exposed.

The multilayer printed wiring board 100 includes a substrate 101
A conductor circuit 104 and an interlayer insulating layer 102 are laminated on both surfaces of the substrate, and the conductor circuits sandwiching the substrate 101 and the conductor circuits sandwiching the interlayer insulating layer 102 are separated by through holes 109 and via holes 107, respectively. It is electrically connected. In addition, the multilayer printed wiring board 100
A solder resist layer 114 having an optical path opening 111 and a solder bump is formed in the outermost layer on the side facing the IC chip mounting substrate 120, and the optical path opening 1 is formed.
11 (111a, 111b), a light conversion mirror 119 immediately below.
(119a, 119b) and the optical waveguide 118 (11
8a, 118b) are formed.

In the optical communication device 150 having such a configuration, an optical signal sent from the outside via an optical fiber (not shown) is introduced into the optical waveguide 118a.
After being sent to the light receiving element 138 (light receiving section 138a) via the optical path conversion mirror 119a and the optical path opening 111a,
The light receiving element 138 converts the electric signal into an electric signal.
It is sent to the IC chip 140 via the through hole 129a, the via hole 127b, and the solder connection part 143a.

The electric signal sent from the IC chip 140 is supplied to the solder connection portion 143 b and the via hole 127.
c-through hole 129b-via hole 127d-conductor circuit 124b-light emitting element 13 via conductive layer 142b
9, is converted to an optical signal by the light emitting element 139,
This optical signal is introduced from the light emitting element 139 (light emitting portion 139a) into the optical waveguide 118b via the optical path opening 111b and the optical conversion mirror 119b, and further sent out as an optical signal via an optical fiber (not shown). Will be done.

In the optical communication device of the present invention, the optical / optical device is mounted on the substrate for mounting the IC chip, that is, at a position close to the IC chip.
The transmission distance of the electric signal is short because it performs electric signal conversion,
Higher speed communication can be supported. Further, the electric signal sent from the IC chip is converted into an optical signal as described above, and then sent not only to the outside via an optical fiber but also to a multilayer printed wiring board via a solder bump. Then, it is sent to another electronic component such as an IC chip mounted on the multilayer printed wiring board via a conductor circuit (including a via hole and a through hole) of the multilayer printed wiring board. In the optical communication device 150 of the present invention as shown in FIG. 1, the light receiving element and the light emitting element are mounted on the surface facing the multilayer printed wiring board.

An embodiment of the optical communication device of the present invention is as follows.
The configuration is not limited to the configuration shown in FIG. 1, and may be, for example, a configuration as shown in FIGS. Figures 2-6
It is sectional drawing which shows another example of the device for optical communication of this invention typically, respectively. 2 to 6 show an optical communication device in which an IC chip is mounted. The configuration of each optical communication device shown in FIGS.
Basically, the optical communication device is substantially the same as the embodiment of the optical communication device shown in FIG. 1, and therefore, only the differences from the optical communication device 150 shown in FIG. 1 will be described here.

In the optical communication device 250 shown in FIG.
An optical path 251 for transmitting an optical signal is formed on the substrate 220 for mounting an IC chip. The optical path 251 for transmitting an optical signal has a conductor layer 251b formed on a part of a wall surface thereof. Are filled with an optical path resin 251a. In the IC chip mounting substrate 220, the light receiving element 2 is provided on the surface on which the IC chip 240 is mounted.
38 and the light emitting element 239 are mounted, and an optical signal can be transmitted between the light receiving element 238 or the light emitting element 239 and the optical waveguide 219 (219a, 219b) via the optical path 251 for transmitting an optical signal. Have been. In this optical communication device 250, the light receiving element 238 and the light emitting element 239 are mounted on the same side of the IC chip mounting substrate 220 as the surface on which the IC chip 240 is mounted. An optical signal can be transmitted to the wave path 219 via the optical path 251 for transmitting an optical signal.

In the optical communication device 350 shown in FIG.
An optical path 361 for transmitting an optical signal that penetrates the substrate 301, the interlayer insulating layer 302, and the solder resist layer 314 is formed on the multilayer printed wiring board 300, and the optical waveguide 319 (through the optical path 361 for transmitting an optical signal). 319a, 31
9b) and an optical signal can be transmitted between the light receiving element 338 and the light emitting element 339. Further, in the optical path for transmitting an optical signal 361, a conductor layer 361b is formed on a part of the wall surface, and a part of the inside is filled with an optical path resin 361a. Further, in the multilayer printed wiring board 300, the formation position of the optical waveguide 319 is different from that of the multilayer printed wiring board 100 shown in FIG.
It is formed on the outermost interlayer insulating layer 302 on the opposite side of the IC chip mounting substrate 320 with respect to "01". In the optical communication device 350, the light receiving element 338 and the light emitting element 3
39 and the optical waveguide 319 are connected to the multilayer printed wiring board 300.
Signal transmission optical path 361 penetrating through substrate 301, interlayer insulating layer 302 and solder resist layer 314 formed in
The transmission of the optical signal can be performed via the.

In the optical communication device 450 shown in FIG.
An optical path 451 for transmitting an optical signal penetrating therethrough is formed on the substrate 420 for mounting an IC chip. The optical path 451 for transmitting an optical signal has a conductor layer 451b formed on a part of a wall surface thereof. Part of the inside is resin 4 for optical path.
51a are filled. This IC chip mounting substrate 4
The configuration of 20 is the same as that of the IC chip mounting substrate 22 shown in FIG.
0.

The multilayer printed wiring board 400 has a substrate 401, an interlayer insulating layer 402, and a solder resist layer 414.
An optical signal transmission optical path 461 penetrating the optical waveguide 4 is formed through the optical signal transmission optical path 461.
An optical signal can be transmitted between the light-emitting element 19 and the light-receiving element 438 or the light-emitting element 439. The configuration of the multilayer printed wiring board 400 is the same as the configuration of the multilayer printed wiring board 300 shown in FIG. In the optical communication device 450, the light receiving element 438 and the light emitting element 43
9 and the optical waveguide 419 are connected to the IC chip mounting substrate 420.
Optical path 451 for transmitting an optical signal formed therethrough
And a substrate 401 formed on the multilayer printed wiring board 400
An optical signal can be transmitted through an optical path for transmitting an optical signal 461 that penetrates through the interlayer insulating layer 402 and the solder resist layer 414.

In the IC chip mounting board shown in FIG. 5, the light receiving element 538 is mounted on the surface of the IC chip mounting board 520 on the side facing the multilayer printed wiring board 500, and the light emitting element 539 is mounted on the multilayer printed wiring board 500. It is mounted on a surface opposite to the surface facing the wiring board 500. Also, an optical signal transmission optical path 551 penetrating the IC chip mounting substrate 520 is formed so that the light emitting element 539 can transmit an optical signal to and from the optical waveguide formed on the multilayer printed wiring board 500. Have been. Optical path for optical signal transmission 55
In No. 1, a conductor layer 551b is formed on a part of the wall surface, and an optical path resin layer 551a is formed on a part of the inside thereof.

An optical waveguide is formed on the multilayer printed wiring board 500, and an optical waveguide 518 a for transmitting an optical signal to the light receiving element 538 is provided on a substrate for mounting an IC chip with the substrate 501 interposed therebetween. The light emitting element 539 is formed on the outermost interlayer insulating layer 502 on the side close to 520.
An optical waveguide 518b for transmitting an optical signal between
It is formed on the outermost interlayer insulating layer 502 opposite to the IC chip mounting substrate 520 with the substrate 501 interposed therebetween. Further, the multilayer printed wiring board 500 includes a light emitting element 539.
An optical path 561 for transmitting an optical signal is formed between the optical waveguide 618b and the optical waveguide 618b. The optical path 561 for transmitting an optical signal is formed so as to penetrate the substrate 501, the interlayer insulating layer 502, and the solder resist layer 514. A conductor layer 561b is formed on a part of the wall surface, and a part of the inside thereof is formed. Is formed with an optical path resin layer 561a.

In this optical communication device 550, the light emitting element 539 and the optical waveguide 519 b are formed on the IC chip mounting substrate 520, the optical signal transmission optical path 551 penetrating therethrough, and the multilayer printed wiring board 500. The formed substrate 501, the interlayer insulating layer 502, and the solder resist layer 51
4 can be transmitted through the optical path 561 for transmitting an optical signal that passes through the optical path 4. The light receiving element 538 and the optical waveguide 519a can transmit an optical signal through the optical path opening 511a formed in the solder resist layer of the multilayer printed wiring board 500.

The optical communication device 650 shown in FIG.
The light receiving element 63 is provided on the surface of the IC chip mounting substrate 620 opposite to the surface facing the multilayer printed wiring board 600.
8 is mounted, and the light emitting element 639 is mounted on the surface facing the multilayer printed wiring board 600. Also,
An optical signal transmission optical path 651 penetrating the IC chip mounting substrate 620 is formed so that the light receiving element 638 can transmit an optical signal to and from the optical waveguide 618a formed on the multilayer printed wiring board 600. ing. This optical path for transmitting an optical signal 651 has a conductor layer 651 a
Is formed, and a resin layer for an optical path is formed in a part of the inside.

An optical waveguide 619 is formed on the multilayer printed wiring board 600, and an optical waveguide 618 a for transmitting an optical signal with the light receiving element 638 is provided on the substrate 6.
01 is formed on the outermost interlayer insulating layer on the side near the IC chip mounting substrate 620 with the light emitting element 639 interposed therebetween.
An optical waveguide 618b for transmitting an optical signal between
It is formed on the outermost interlayer insulating layer on the side opposite to the IC chip mounting substrate 620 with the substrate 601 interposed therebetween. further,
An optical path for transmitting an optical signal 651 for transmitting an optical signal between the light emitting element 639 and the optical waveguide 618b is formed in the multilayer printed wiring board 600. Optical path for optical signal transmission 6
61 is formed so as to penetrate through the substrate 601, the interlayer insulating layer 602, and the solder resist layer 614, a conductor layer 661b is formed on a part of the wall surface, and an optical path resin is formed on a part of the inside thereof. A layer 661a is formed.

In the optical communication device 650, the light emitting element 639 and the optical waveguide 619b are formed by the optical path for transmitting an optical signal passing through the substrate 601 formed on the multilayer printed wiring board 600, the interlayer insulating layer 602, and the solder resist layer 614. 6
Transmission of an optical signal can be performed via 61. Also,
The light receiving element 638 and the optical waveguide 619a can transmit an optical signal via an optical signal transmission optical path 651 formed on the IC chip mounting substrate 620 and penetrating therethrough. The optical path for transmitting an optical signal formed in the optical communication device shown in FIGS. 1 to 6 has a conductor layer formed on a wall surface thereof and a resin layer for an optical path formed therein. The optical path resin layer may be formed as needed.

As described above, the embodiment of the substrate for mounting an IC chip according to the present invention is not limited to the embodiment shown in FIGS. It is sufficient if the formation position and whether or not to form an optical path for transmitting an optical signal are appropriately selected and combined.
The IC chip mounted on the optical communication device of the present invention may be mounted by wire bonding or may be mounted by flip chip connection. It is desirable to be mounted by chip connection.

Next, a method for manufacturing the optical communication device of the present invention will be described. In the optical communication device, for example, after separately manufacturing an IC chip mounting substrate and a multilayer printed wiring board, a light receiving element and a light emitting element of the IC chip mounting substrate are opposed to a conductor circuit of the multilayer printed wiring board. Then, the solder bumps are connected to each other while adjusting the positions of the two by reflow processing to form a solder connection portion. Therefore, here, first, a method for manufacturing an IC chip mounting substrate and a method for manufacturing a multilayer printed wiring board will be separately described.
After that, a method of connecting both will be described.

First, a method for manufacturing an IC chip mounting substrate will be described. As described above, since the substrate for mounting an IC chip is desirably formed using a build-up method, here, the IC chip mounting method is used.
The description will focus on the C chip mounting substrate.

(1) Starting from an insulating substrate,
A conductor circuit is formed on the insulating substrate. Examples of the insulating substrate include a glass epoxy substrate, a polyester substrate, a polyimide substrate, a bismaleimide-triazine (BT) resin substrate, a thermosetting polyphenylene ether substrate, a copper-clad laminate, and an RCC substrate. Further, a ceramic substrate such as an aluminum nitride substrate or a silicon substrate may be used. The conductor circuit can be formed, for example, by forming a solid conductor layer on the surface of the insulating substrate by electroless plating or the like and then performing an etching process. Further, it may be formed by performing an etching process on a copper-clad laminate or an RCC substrate.

In the case where the connection between the conductor circuits sandwiching the insulating substrate is made by a through hole, for example, a through hole is formed in the insulating substrate using a drill or a laser, and then the electroless plating is performed. Through-holes are formed by performing processing or the like. In addition, the diameter of the said through-hole is 100-300 micrometers normally. When a through hole is formed, it is desirable to fill the through hole with a resin filler.

In this step, if necessary, a through hole for a through hole and a through hole for forming an optical path for transmitting an optical signal (hereinafter also referred to as a through hole for an optical path) are formed. You may. A conductor layer may be formed on the wall surface of the through hole for an optical path as needed. The conductor layer is desirably formed using a glossy metal, specifically, for example, desirably formed using Ni, Au, Ag, or the like. Further, a resin composition for forming a resin layer for an optical path may be filled in the through hole for an optical path. In addition, the filling of the resin composition is performed in a later step,
This may be performed after forming an interlayer insulating layer having an opening communicating with the through hole for an optical path.

(2) Next, if necessary, the surface of the conductor circuit is subjected to a roughening process. As the roughening forming process,
For example, a blackening (oxidation) -reduction treatment, an etching treatment using an etching solution containing a cupric complex and an organic acid salt, and the like;
A treatment by u-Ni-P needle-like alloy plating can be exemplified. Here, when the roughened surface is formed, the average roughness of the roughened surface is usually desirably 0.1 to 5 μm. Considering the influence and the like, 2 to 4 μm is more desirable. The roughening process may be performed before filling the through-hole with the resin filler, and a roughened surface may be formed on the wall surface of the through-hole. This is because the adhesion between the through hole and the resin filler is improved.

(3) Next, a thermosetting resin, a photosensitive resin, a resin in which a part of the thermosetting resin is acrylated, or a resin containing these and a thermoplastic resin is formed on the substrate on which the conductive circuit is formed. An uncured resin layer made of a composite is formed, or a resin layer made of a thermoplastic resin is formed. The uncured resin layer can be formed by applying the uncured resin with a roll coater, a curtain coater, or the like, or by thermocompression bonding an uncured (semi-cured) resin film. Further, the resin layer made of the thermoplastic resin,
It can be formed by thermocompression bonding a resin molded body molded on a film.

Among these, a method of thermocompression bonding of an uncured (semi-cured) resin film is desirable, and the compression of the resin film can be performed using, for example, a vacuum laminator. The pressure-bonding conditions are not particularly limited, and may be appropriately selected in consideration of the composition of the resin film and the like. Usually, the pressure is 0.25 to 1.0 MPa, the temperature is 40 to 70 ° C,
It is desirable to perform the process under the conditions of a degree of vacuum of 13 to 1300 Pa and a time of about 10 to 120 seconds.

Examples of the thermosetting resin include epoxy resin, phenol resin, polyimide resin, polyester resin, bismaleimide resin, polyolefin resin, polyphenylene ether resin, polyphenylene resin, and fluorine resin. Specific examples of the epoxy resin, for example, phenol novolak type, novolak type epoxy resin such as cresol novolak type,
An alicyclic epoxy resin modified with dicyclopentadiene is exemplified.

The photosensitive resin includes, for example, acrylic resin. Examples of the resin obtained by partially acrylifying the thermosetting resin include those obtained by subjecting the thermosetting group of the thermosetting resin to methacrylic acid or acrylic acid to undergo an acrylation reaction.

Examples of the thermoplastic resin include phenoxy resin, polyether sulfone (PES), polysulfone (PSF), and polyphenylene sulfone (P
PS) polyphenylene sulfide (PPES), polyphenylene ether (PPE) polyetherimide (P
I) and the like.

The resin composite is not particularly limited as long as it contains a thermosetting resin or a photosensitive resin (including a resin obtained by partially acrylizing the thermosetting resin) and a thermoplastic resin. Examples of specific combinations of a thermosetting resin and a thermoplastic resin include, for example, phenol resin / polyethersulfone, polyimide resin / polysulfone,
Epoxy resin / polyether sulfone, epoxy resin / phenoxy resin, and the like. Specific combinations of the photosensitive resin and the thermoplastic resin include, for example, an acrylic resin / phenoxy resin, an epoxy resin in which a part of an epoxy group is acrylated, and polyether sulfone.

The mixing ratio of the thermosetting resin or the photosensitive resin to the thermoplastic resin in the resin composite is as follows: thermosetting resin or photosensitive resin / thermoplastic resin = 95/5 to 5
0/50 is desirable. This is because a high toughness value can be secured without impairing the heat resistance.

The resin layer may be composed of two or more different resin layers. Specifically, for example,
Lower layer is thermosetting resin or photosensitive resin / thermoplastic resin =
For example, the upper layer is formed of a thermosetting resin or a photosensitive resin / thermoplastic resin = 90/10 resin composite, and the like. With such a configuration, excellent adhesion to the insulating substrate can be ensured, and ease of formation in forming a via hole opening or the like in a later step can be ensured. Further, instead of the above-mentioned resin layer, a layer made of a core material-containing base material or a glass epoxy-containing resin base material may be formed.

The resin layer may be formed by using a resin composition for forming a roughened surface. The resin composition for forming a roughened surface includes, for example, an acid, an alkali, and the like in an uncured heat-resistant resin matrix that is hardly soluble in a roughening liquid composed of at least one selected from acids, alkalis, and oxidizing agents. And a substance that is soluble in a roughened liquid comprising at least one selected from oxidants. Note that the terms "sparingly soluble" and "soluble" are referred to as "soluble" for convenience when a substance having a relatively high dissolution rate is immersed in the same roughening solution for the same time, and the relative dissolution rate is relatively low. The slower one is called "poorly soluble" for convenience.

As the heat resistant resin matrix, when a roughened surface is formed on the interlayer insulating layer by using the roughening solution,
What can maintain the shape of the roughened surface is preferable,
For example, a thermosetting resin, a thermoplastic resin, a composite thereof, and the like can be given. Further, by using a photosensitive resin, an opening for a via hole may be formed in the interlayer insulating layer by using exposure and development processes.

The thermosetting resin includes, for example, epoxy resin, phenol resin, polyimide resin, polyolefin resin, fluorine resin and the like. When the thermosetting resin is photosensitized, the thermosetting group is subjected to a (meth) acrylation reaction using methacrylic acid, acrylic acid, or the like.

Examples of the epoxy resin include cresol novolak type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolak type epoxy resin, alkylphenol novolak type epoxy resin, biphenol F type epoxy resin, and naphthalene type epoxy resin. Resin, dicyclopentadiene type epoxy resin, epoxidized product of condensate of phenols and aromatic aldehyde having phenolic hydroxyl group,
Triglycidyl isocyanurate, alicyclic epoxy resin and the like. These may be used alone or in combination of two or more. Thereby, it becomes excellent in heat resistance and the like.

Examples of the thermoplastic resin include phenoxy resin, polyether sulfone, polysulfone, polyphenylene sulfone, polyphenylene sulfide, polyphenyl ether, polyether imide and the like. These may be used alone or in combination of two or more.

The substance soluble in the roughening liquid comprising at least one selected from the above-mentioned acids, alkalis and oxidizing agents is desirably at least one selected from inorganic particles, resin particles and metal particles.

Examples of the inorganic particles include aluminum compounds, calcium compounds, potassium compounds, magnesium compounds, silicon compounds and the like. These may be used alone or in combination of two or more.

Examples of the aluminum compound include alumina and aluminum hydroxide. Examples of the calcium compound include calcium carbonate and
Calcium hydroxide and the like, as the potassium compound, for example, potassium carbonate and the like, as the magnesium compound, for example, magnesia, dolomite, basic magnesium carbonate, talc and the like,
Examples of the silicon compound include silica and zeolite. These may be used alone or 2
More than one species may be used in combination.

The alumina particles can be dissolved and removed with hydrofluoric acid, and calcium carbonate can be dissolved and removed with hydrochloric acid. Further, sodium-containing silica and dolomite can be dissolved and removed with an alkaline aqueous solution.

Examples of the resin particles include those made of a thermosetting resin, a thermoplastic resin and the like. When immersed in a roughening liquid comprising at least one selected from acids, alkalis and oxidizing agents, There is no particular limitation as long as the dissolution rate is faster than the heat-resistant resin matrix,
Specifically, for example, amino resin (melamine resin, urea resin, guanamine resin, etc.), epoxy resin, phenol resin, phenoxy resin, polyimide resin, polyphenylene resin, polyolefin resin, fluororesin, bismaleimide-triazine resin and the like can be mentioned. . These may be used alone or in combination of two or more. It is necessary that the resin particles have been previously cured. If not cured, the resin particles will be dissolved in a solvent that dissolves the resin matrix.

As the resin particles, rubber particles, liquid resin, liquid rubber or the like may be used. As the rubber particles, for example, acrylonitrile-butadiene rubber,
Examples include polychloroprene rubber, polyisoprene rubber, acrylic rubber, polysulfur-based rigid rubber, fluorine rubber, urethane rubber, silicone rubber, and ABS resin. Further, for example, various modified polybutadiene rubbers such as polybutadiene rubber, epoxy-modified, urethane-modified, (meth) acrylonitrile-modified, and (meth) acrylonitrile-butadiene rubber containing a carboxyl group may be used.

As the liquid phase resin, an uncured solution of the thermosetting resin can be used. Specific examples of such a liquid phase resin include, for example, an uncured epoxy oligomer and an amine-based curing agent. And the like. Examples of the liquid phase rubber include the above-mentioned polybutadiene rubber, various modified polybutadiene rubbers such as epoxy-modified, urethane-modified, (meth) acrylonitrile-modified, and uncured solutions such as (meth) acrylonitrile-butadiene rubber containing a carboxyl group. Can be used.

When the photosensitive resin composition is prepared using the liquid resin or the liquid rubber, the heat-resistant resin matrix and the soluble substance are not uniformly compatible (that is, so as to separate phases). As such, these materials need to be selected. By mixing a heat-resistant resin matrix and a soluble substance selected according to the above criteria, a state in which "islands" of liquid-phase resin or liquid-phase rubber are dispersed in the "sea" of the heat-resistant resin matrix Alternatively, a photosensitive resin composition in which "islands" of a heat-resistant resin matrix are dispersed in a "sea" of a liquid phase resin or a liquid phase rubber can be prepared. Then, after the photosensitive resin composition in such a state is cured, the roughened surface can be formed by removing the liquid phase resin or liquid phase rubber of "sea" or "island".

The metal particles include, for example, gold, silver,
Examples include copper, tin, zinc, stainless steel, aluminum, nickel, iron, lead, and the like. These may be used alone or in combination of two or more. The metal particles may have a surface layer coated with a resin or the like in order to ensure insulation.

When two or more of the above-mentioned soluble substances are used in combination, the combination of the two soluble substances to be mixed is preferably a combination of resin particles and inorganic particles. Since both have low conductivity, the insulating property of the interlayer insulating layer can be ensured, the thermal expansion can be easily adjusted with the poorly soluble resin, and the interlayer insulating layer made of the resin composition for forming a roughened surface can be easily obtained. This is because cracks do not occur and no peeling occurs between the interlayer insulating layer and the conductor circuit.

Examples of the acid used as the roughening solution include phosphoric acid, hydrochloric acid, sulfuric acid, nitric acid, and organic acids such as formic acid and acetic acid. Among these, it is preferable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. As the oxidizing agent, it is desirable to use, for example, an aqueous solution of chromic acid, chromic sulfuric acid, or an alkaline permanganate (such as potassium permanganate). As the alkali, an aqueous solution of sodium hydroxide, potassium hydroxide or the like is desirable.

The average particle size of the soluble substance is 10 μm
The following is desirable. Further, coarse particles having a relatively large average particle diameter of 2 μm or less and fine particles having a relatively small average particle diameter may be used in combination. That is, a soluble substance having an average particle size of 0.1 to 0.5 μm and an average particle size of 1
Combination with a soluble substance of ２2 μm, and the like.

As described above, the combination of the coarse particles having a relatively large average particle size and the fine particles having a relatively small average particle size eliminates the dissolution residue of the electroless plating film and reduces the amount of the palladium catalyst under the plating resist. In addition, a shallow and complicated roughened surface can be formed. Further, by forming a complicated roughened surface, a practical peel strength can be maintained even if the unevenness of the roughened surface is small. The coarse particles have an average particle size of more than 0.8 μm and 2.0 μm.
m, the fine particles have an average particle size of 0.1 to 0.8 μm
It is desirable that

(4) Next, when forming an interlayer insulating layer using a thermosetting resin or a resin composite as the material,
The uncured resin insulating layer is subjected to a curing treatment, and a via hole opening is formed to form an interlayer insulating layer. In this step, a through hole (a through hole for forming a through hole or a through hole for forming an optical path for transmitting an optical signal) may be formed as necessary. The via hole opening is desirably formed by laser processing. In the case where a photosensitive resin is used as a material of the interlayer insulating layer, it may be formed by exposure and development processing.

When forming an interlayer insulating layer using a thermoplastic resin as the material, an opening for a via hole is formed in a resin layer made of the thermoplastic resin to form an interlayer insulating layer. In this case, the via hole opening can be formed by performing laser processing. When a through hole is formed in this step, the through hole may be formed by drilling, laser processing, or the like. In the case where the optical path through hole is formed in the step (1), it is preferable that the via hole opening and the optical path opening communicating with the optical path through hole are formed here. This optical path opening also becomes a part of the optical path for transmitting an optical signal through a post-process.

As the laser used for the laser processing, for example, a carbon dioxide laser, an ultraviolet laser, an excimer laser and the like can be mentioned. Of these, excimer lasers and short-pulse carbon dioxide lasers are desirable.

It is desirable to use a hologram type excimer laser among the excimer lasers. The hologram method is a method of irradiating a laser beam to a target object through a hologram, a condensing lens, a laser mask, a transfer lens, and the like. Can be formed efficiently.

When a carbon dioxide laser is used, the pulse interval is desirably 10 ⁻⁴ to 10 ⁻⁸ seconds. The time for irradiating the laser for forming the opening is preferably 10 to 500 μsec. Further, by irradiating a laser beam through an optical lens and a mask, a large number of via hole openings can be formed at once. This is because a plurality of portions can be irradiated with laser light having the same intensity and the same irradiation intensity through the optical lens and the mask. After forming the via hole openings in this manner, desmearing may be performed as necessary.

(5) Next, a conductor circuit is formed on the surface of the interlayer insulating layer including the inner wall of the via hole opening. In forming a conductor circuit, first, a thin-film conductor layer is formed on the surface of the interlayer insulating layer. The thin film conductor layer can be formed by a method such as electroless plating and sputtering.

As the material of the thin film conductor layer, for example,
Examples include copper, nickel, tin, zinc, cobalt, thallium, lead and the like. Among these, those made of copper, copper and nickel are desirable from the viewpoint of excellent electrical characteristics, economic efficiency and the like. When the thin film conductor layer is formed by electroless plating, the thickness of the thin film conductor layer is 0.3 to
2.0 μm is desirable, and 0.6 to 1.2 μm is more desirable. Also, when formed by sputtering,
0.1 to 1.0 μm is desirable.

Before forming the thin film conductor layer, if necessary, a roughened surface may be formed on the surface of the interlayer insulating layer. By forming the roughened surface, the adhesion between the interlayer insulating layer and the thin film conductor layer can be improved. In particular, when the interlayer insulating layer is formed using the resin composition for forming a roughened surface, it is desirable to form the roughened surface using an acid, an oxidizing agent, or the like.

When a through hole for forming a through hole is formed in the step (4), when the thin film conductor layer is formed on the interlayer insulating layer, the thin film conductor layer is also formed on the wall surface of the through hole. May be formed as through holes. When the through hole for an optical path is formed in the step (4), a conductor layer may be formed on the wall surface of the through hole for an optical path. It is desirable to form a conductive layer having such a thickness.

(6) Next, a plating resist is formed on the substrate having the thin film conductor layer formed on the surface thereof. The plating resist can be formed, for example, by adhering a photosensitive dry film, placing a photomask composed of a glass substrate or the like on which a plating resist pattern is drawn, in close contact, and performing exposure and development processing.

(7) Thereafter, electroplating is performed using the thin-film conductor layer as a plating lead, and an electroplating layer is formed on the portion where the plating resist is not formed. As the electroplating,
Copper plating is preferred. Further, the thickness of the electroplating layer,
5 to 20 μm is desirable.

Thereafter, by removing the plating resist and the electroless plating film and the thin film conductor layer under the plating resist, a conductor circuit (including a via hole) can be formed. The removal of the plating resist may be performed using, for example, an alkaline aqueous solution, and the removal of the thin film conductor layer may be performed using a mixed solution of sulfuric acid and hydrogen peroxide, sodium persulfate, ammonium persulfate, ferric chloride, and chloride. It may be performed using an etching solution such as cupric copper. After the formation of the conductor circuit, the catalyst on the interlayer insulating layer may be removed using an acid or an oxidizing agent, if necessary. This is because a decrease in electrical characteristics can be prevented. After forming the plating resist, instead of the method of forming an electroplating layer (steps (6) and (7)), an etching process is performed after the electroplating layer is formed on the entire surface of the thin film conductor layer. The conductor circuit may be formed using a method.

When a through hole is formed in the steps (4) and (5), a resin filler may be filled in the through hole. When a resin filler is filled in the through hole, a cover plating layer covering the surface layer of the resin filler layer may be formed by performing electroless plating, if necessary. Further, when the through hole for an optical path is formed in the step (4), a resin composition for forming a resin layer for an optical path may be separately filled in this step.

(8) Next, when a cover plating layer is formed, the surface of the cover plating layer is subjected to a roughening treatment, if necessary, and further, if necessary, (3) to (7). By repeating the step of (1), an interlayer insulating layer and a conductor circuit are formed on both surfaces thereof. In this step, a through hole may or may not be formed. In some cases, a through hole for an optical path may be formed in this step.

(9) Next, a solder resist layer is formed on the outermost layer of the substrate on which the conductor circuit and the interlayer insulating layer have been formed.
The solder resist layer can be formed using, for example, a solder resist composition comprising a polyphenylene ether resin, a polyolefin resin, a fluororesin, a thermoplastic elastomer, an epoxy resin, a polyimide resin, or the like.

Examples of the solder resist composition other than the above include, for example, a (meth) acrylate of a novolak type epoxy resin, an imidazole curing agent, a bifunctional (meth) acrylate monomer, and a molecular weight of 500 to 50.
A paste-like fluid containing a polymer of about 00 (meth) acrylate, a thermosetting resin such as a bisphenol-type epoxy resin, a photosensitive monomer such as a polyvalent acrylic monomer, a glycol ether-based solvent, and the like. It is desirable that the viscosity is adjusted to 1 to 10 Pa · s at 25 ° C.

(10) Next, an opening for forming a solder bump and an opening for mounting an optical element are formed in the solder resist layer. The formation of the openings for forming the solder bumps and the openings for mounting the optical elements can be performed by the same method as the method of forming the openings for the via holes, that is, by using exposure and development processing or laser processing. In addition, when forming a solder resist layer, a resin film having an opening at a desired position is prepared in advance, and the resin film is attached to form a solder film having an opening for forming a solder bump and an opening for mounting an optical element. A resist layer may be formed. When the through hole for an optical path is formed in the above-described step, an opening communicating with the through hole for an optical path is formed in the solder resist layer. This opening also becomes a part of the optical path for transmitting an optical signal. In some cases, after the above-described conductor circuit, interlayer insulating layer, and solder resist layer are formed on the substrate, a through hole for an optical path penetrating these may be formed at a time.

(11) Next, the conductor circuit portion exposed by forming the opening for forming the solder bump is covered with a corrosion-resistant metal such as nickel, tin, palladium, gold, silver, platinum or the like, if necessary. , Solder pads. Among these, nickel-gold, nickel-silver, nickel-
It is desirable to form the coating layer with a metal such as palladium or nickel-palladium-gold. The coating layer can be formed, for example, by plating, vapor deposition, electrodeposition, or the like. Among these, it is preferable to form the coating layer by plating because of excellent uniformity of the coating layer. In this step, it is desirable to form a covering layer also on the conductor circuit portion exposed by forming the optical element mounting opening.

(12) Next, the solder pad is filled with a solder paste through a mask having an opening formed in a portion corresponding to the solder pad, and then reflowed to form a solder bump.

(13) Further, optical elements (light receiving elements and light emitting elements) are mounted on the solder resist layer. The optical element is mounted by, for example, filling the optical element mounting opening with a solder paste in the above step (12) and further attaching the optical element when performing reflow to form a solder (conductive layer). What is necessary is just to implement via. Further, the optical element may be mounted using a conductive adhesive or the like instead of the solder paste. When these methods are used, the light receiving element and the light emitting element are mounted on the surface of the solder resist layer. Also, when an optical path for transmitting an optical signal that penetrates a substrate for mounting an IC chip is formed, it is desirable that the light receiving element and the light emitting element are mounted on the surface of the solder resist layer. The reason is as described above. Also, the optical element (light receiving element or light emitting element) mounted in this step is preferably of a flip chip type.

Instead of the surface mounting method described above, when forming the optical element mounting opening in the step (10), the opening is formed in a size that can accommodate the optical element. The mounting may be performed by housing the optical element in the opening via a conductive adhesive. In this case, the light receiving element and the light emitting element are built in the solder resist layer. Through these steps, an IC chip mounting substrate constituting the optical communication device of the present invention can be manufactured.

Next, a method of manufacturing a multilayer printed wiring board will be described. (1) First, the same steps as (1) to (8) of the method of manufacturing a substrate for mounting an IC chip are performed to manufacture a substrate in which conductor circuits and interlayer insulating layers are repeatedly formed on both surfaces. Note that, also in this step, through holes are appropriately formed. In this step, a through hole for an optical path for forming an optical path for transmitting an optical signal is formed, if necessary, similarly to the manufacturing step of the substrate for mounting an IC chip. Whether or not to form a through hole for an optical path may be appropriately determined in consideration of the design of the multilayer printed wiring board such as the position where the optical waveguide is formed. When the through hole for an optical path is formed, a conductor layer made of a glossy metal or the like may be formed on the wall surface of the through hole for an optical path. Further, a resin composition for forming a resin layer for an optical path may be filled in the through hole for an optical path.

(2) Next, an optical waveguide is formed in the portion where the conductor circuit is not formed on the interlayer insulating layer on the side facing the IC chip mounting substrate. When the optical waveguide is formed using an inorganic material such as quartz glass as the material, the optical waveguide can be formed by attaching an optical waveguide formed in a predetermined shape in advance via an adhesive. In the case where an optical path penetrating the substrate and the interlayer insulating layer is formed in the step (1), an optical waveguide is formed on the interlayer insulating layer opposite to the IC chip mounting substrate with the substrate interposed therebetween. It will be. In addition,
The formation position of the optical waveguide is not limited to the outermost interlayer insulating layer, but may be between the interlayer insulating layers. Further, the optical waveguide made of the inorganic material, for example,
It can be formed by forming an inorganic material such as LiNbO ₃ or LiTaO ₃ by a liquid phase epitaxy method, a chemical deposition method (CVD), a molecular beam epitaxy method, or the like.

When the optical waveguide is formed using a polymer material, an optical waveguide forming film previously formed into a film on a substrate or a release film may be attached to the interlayer insulating layer, or the like. An optical waveguide can be formed by forming the optical waveguide directly on the interlayer insulating layer. Specifically, it can be formed by using a selective polymerization method, a method using reactive ion etching and photolithography, a direct exposure method, a method using injection molding, a photobleaching method, a method combining these, and the like. . Note that these methods can be used when the optical waveguide is formed on a substrate or a release film, or when the optical waveguide is formed directly on an interlayer insulating layer.

An optical path conversion mirror is formed in the optical waveguide. The optical path conversion mirror may be formed before mounting on the interlayer insulating layer, or may be formed after mounting on the interlayer insulating layer, but when the optical waveguide is formed directly on the interlayer insulating layer. It is desirable to form an optical path conversion mirror in advance except for the above. The work can be performed easily, and there is no risk of damaging or damaging other members constituting the multilayer printed wiring board during the work, for example, a conductive circuit or an interlayer insulating layer. is there.

The method for forming the optical path conversion mirror is not particularly limited, and a conventionally known forming method can be used. Specifically, machining with a diamond saw having a V-shaped tip of 90 ° or a blade, machining with reactive ion etching, laser ablation, or the like can be used.

(3) Next, a solder resist layer is formed on the outermost layer of the substrate on which the optical waveguide has been formed. The solder resist layer can be formed, for example, using the same resin composition as that used when forming the solder resist layer of the IC chip mounting substrate.

(4) Next, an opening for forming a solder bump and an opening for an optical path are formed in the solder resist layer on the side facing the IC chip mounting substrate. The formation of the opening for forming the solder bump and the opening for the optical path can be performed by the same method as the method for forming the opening for forming the solder bump on the IC chip mounting substrate, that is, by using exposure and development processing, laser processing, or the like. it can.
The formation of the openings for forming the solder bumps and the formation of the openings for the optical path may be performed simultaneously or separately. When an optical path penetrating the substrate and the interlayer insulating layer is formed in the steps (1) to (3), an optical path opening communicating with the opening is formed in the solder resist layer. By forming the optical path opening that communicates in this way, the optical path opening becomes a part of the optical path for transmitting an optical signal. After the formation of the solder resist layer, an optical path penetrating the substrate, the interlayer insulating layer, and the solder resist layer may be formed at one time.

Among these, when forming a solder resist layer, a resin composition containing a photosensitive resin is applied as a material for the solder resist layer, and the solder resist layer is exposed and developed to make the solder bump forming opening and the optical path opening. It is desirable to select the method of formation. This is because, when the opening for the optical path is formed by the exposure and development processing, there is no possibility that the optical waveguide existing under the opening for the optical path is damaged when the opening is formed. Further, when forming the solder resist layer, a resin film having an opening at a desired position is prepared in advance, and the resin film is adhered to form a solder resist layer having an opening for forming a solder bump and an opening for an optical path. May be formed.

If necessary, an opening for forming a solder bump may be formed in the solder resist layer on the side opposite to the surface facing the IC chip mounting substrate. This is because external connection terminals can be formed on the solder resist layer on the side opposite to the surface facing the IC chip mounting substrate by performing the post-process.

(5) Next, the conductor circuit portion exposed by forming the above-mentioned opening for forming a solder bump is covered with a corrosion-resistant metal such as nickel, tin, palladium, gold, silver or platinum, if necessary. , Solder pads. Specifically, the method may be performed using the same method as the method of forming the solder pads on the IC chip mounting substrate.

(6) Next, the solder pad is filled with a solder paste through a mask having an opening formed in a portion corresponding to the solder pad, and then reflowed to form a solder bump. In some cases, PG
A or BGA may be formed. In the solder resist layer on the side opposite to the surface facing the IC chip mounting substrate,
A PGA (Pin Grid Array) or BGA (Ball Grid Array) may be formed by disposing pins or forming solder balls on the external substrate connection surface. Through these steps, a multilayer printed wiring board constituting the optical communication device of the present invention can be manufactured.

Next, a method for manufacturing an optical communication device using the IC chip mounting substrate and the multilayer printed wiring board manufactured by the above-described method will be described. First, I
A solder connection portion is formed by the solder bump of the C chip mounting substrate and the solder bump of the multilayer printed wiring board, and the two are electrically connected. That is, the IC chip mounting board and the multilayer printed wiring board are respectively disposed at predetermined positions in a predetermined direction so as to face each other, and are connected by reflow.

In this step, since the IC chip mounting board and the multilayer printed wiring board are connected to each other by using the solder bumps of the two, there is a slight displacement between the two when they are opposed to each other. However, both can be arranged at predetermined positions by the self-alignment effect of the solder during reflow.

Next, an IC chip is mounted on the substrate for mounting an IC chip, and then, if necessary, is sealed with a resin to obtain an optical communication device. The mounting of the IC chip can be performed by a conventionally known method. In addition, IC
As described above, the chip is desirably one that can be mounted by flip-chip connection. In addition, the IC chip is mounted before connecting the IC chip mounting substrate and the multilayer printed wiring board, and the IC chip mounting substrate mounting the IC chip is connected to the multilayer printed wiring board, so that the optical communication It may be a device.

[0122]

The present invention will be described in more detail below. Example 1 A. Production of IC chip mounting substrate A-1. Preparation of Resin Film for Interlayer Insulation Layer Bisphenol A type epoxy resin (Epoxy equivalent 46
9. Yuka Shell Epoxy Epicoat 1001) 30
Parts by weight, 40 parts by weight of a cresol novolak type epoxy resin (epoxy equivalent: 215, Epicron N-673 manufactured by Dainippon Ink and Chemicals, Inc.) Light KA-705
2) 30 parts by weight were dissolved by heating in 20 parts by weight of ethyl diglycol acetate and 20 parts by weight of solvent naphtha while stirring, and epoxidized polybutadiene rubber (Denalex R-45EPT manufactured by Nagase Kasei Kogyo Co., Ltd.) was added thereto.
15 parts by weight, 1.5 parts by weight of a crushed product of 2-phenyl-4,5-bis (hydroxymethyl) imidazole, 2 parts by weight of finely divided silica, and 0.5 part by weight of a silicon-based antifoaming agent are added, and an epoxy resin composition is added. Was prepared. The obtained epoxy resin composition is applied on a 38 μm-thick PET film using a roll coater so that the thickness after drying becomes 50 μm, and then dried at 80 to 120 ° C. for 10 minutes to obtain interlayer insulation. A resin film for a layer was produced.

A-2. Preparation of Resin Composition for Filling Through Holes 100 parts by weight of a bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., Ltd., molecular weight: 310, YL983U), the average particle size of which surface is coated with a silane coupling agent is 1.6 μm, S whose maximum particle diameter is 15 μm or less
iO ₂ spherical particles (CRS 1101- manufactured by Adtech Co., Ltd.)
CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco Co.) are placed in a container, and the mixture is stirred and mixed to have a viscosity of 45-4 at 23 ± 1 ° C.
A 9 Pa · s resin filler was prepared. In addition, as a curing agent, an imidazole curing agent (2E4MZ- manufactured by Shikoku Chemicals Co., Ltd.)
6.5 parts by weight (CN).

A-3. Manufacture of IC chip mounting substrate (1) 0.8 mm thick glass epoxy resin or BT
A starting material was a copper-clad laminate in which an 18 μm copper foil 28 was laminated on both sides of an insulating substrate 21 made of (bismaleimide triazine) resin (see FIG. 7A). First, the copper clad laminate was drilled, subjected to an electroless plating treatment, and etched in a pattern to form conductor circuits 24 and through holes 29 on both surfaces of the substrate 21.

(2) The substrate on which the through holes 29 and the conductor circuits 24 are formed is washed with water and dried, and then the NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment using an aqueous solution containing (6 g / l) as a reduction bath was performed to form roughened surfaces 24a and 29a on the surface of the conductor circuit 24 including the through holes 29 (see FIG. 7B).

(3) After preparing the resin filler described in the above A-2, within 24 hours after preparation by the following method,
A layer of a resin filler 30 ′ was formed in the through-hole 29, on a portion of the substrate 21 where no conductor circuit was formed, and on the outer edge of the conductor circuit 24. That is, first, the resin filler is pushed into the through hole using a squeegee,
It was dried under the condition of 0 minutes. Next, a mask having an opening corresponding to the conductive circuit non-forming portion is placed on the substrate, and the resin filling material is also filled in the conductive circuit non-forming portion which is a concave portion using a squeegee. By drying under the condition of 20 minutes, a layer of the resin filler 30 'was formed (FIG. 7).
(C)).

(4) One surface of the substrate after the processing of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to form the surface of the conductive circuit 24 and the Polishing was performed so that the resin filler 30 'did not remain on the land surface, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, at 100 ° C for 1 hour, at 120 ° C for 3 hours,
Heat treatment was performed at 50 ° C. for 1 hour and at 180 ° C. for 7 hours to form the resin filler layer 30.

As described above, the surface layer of the resin filler 30 and the surface of the conductor circuit 24 formed in the through hole 29 and the portion where the conductor circuit is not formed are flattened, and the resin filler 30 and the side surface 24a of the conductor circuit 24 are flattened. Was firmly adhered through the roughened surface, and an insulating substrate in which the inner wall surface 29a of the through hole 29 and the resin filler 30 were firmly adhered through the roughened surface was obtained (FIG. 7D). reference). By this step, the surface of the resin filler layer 30 and the surface of the conductor circuit 24 become flush with each other.

(5) After the above substrate was washed with water and acid degreased,
The surface of the conductor circuit 24, the land surface of the through hole 29, and the inner wall are etched by spraying an etching solution onto both surfaces of the substrate by spraying, so that the entire surface of the conductor circuit 24 is roughened. , 29
a was formed (see FIG. 8A). As an etching solution, an etching solution (Mec etch bond, manufactured by Mec Co.) containing 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride was used.

(6) Next, a resin film for an interlayer insulating layer slightly larger than the substrate prepared in the above A-1 was placed on the substrate, and the conditions were as follows: pressure 0.4 MPa, temperature 80 ° C., pressure bonding time 10 seconds. Then, the resultant was preliminarily pressed and cut, and then the film was attached using a vacuum laminator by the following method to form an interlayer insulating layer 22 (see FIG. 8B). That is, a resin film for an interlayer insulating layer is placed on a substrate at a degree of vacuum of 65
The main bonding was performed under the conditions of Pa, a pressure of 0.4 MPa, a temperature of 80, and a time of 60 seconds, and thereafter, thermosetting was performed at 170 ° C. for 30 minutes.

(7) Next, through a mask having a through hole having a thickness of 1.2 mm formed on the interlayer insulating layer 22, a CO ₂ gas laser having a wavelength of 10.4 μm is used.
8 mm, a top hat mode, a pulse width of 8.0 μsec, a diameter of a through hole of the mask of 1.0 mm, and a one-shot condition, a via hole opening 26 having a diameter of 80 μm was formed in the interlayer insulating layer 22 (FIG. )reference).

(8) The substrate in which the via hole opening 26 is formed is immersed in a solution containing 60 g / l of permanganic acid at 80 ° C. for 10 minutes to dissolve the epoxy resin particles present on the surface of the interlayer insulating layer 22. By the removal, a roughened surface was formed on the surface including the inner wall surface of the via hole opening 26 (see FIG. 8D).

(9) Next, the substrate after the above treatment was immersed in a neutralizing solution (manufactured by Shipley) and washed with water. Further, by applying a palladium catalyst to the surface of the substrate subjected to the surface roughening treatment (roughening depth: 3 μm), the surface of the interlayer insulating layer 22 (including the inner wall surface of the via hole opening 26)
A catalyst nucleus was attached to the sample (not shown). That is, palladium chloride (PdCl ₂ ) and stannous chloride (SnC)
l ₂ ) to give a catalyst by precipitating palladium metal.

(10) Next, the substrate is immersed in an electroless copper plating aqueous solution having the following composition, and the surface of the interlayer insulating layer 22 (including the inner wall surface of the via hole opening 26) and
An electroless copper plating film 32 having a thickness of 0.6 to 3.0 μm was formed on the wall surface of the through hole 29 (see FIG. 9A).

[Electroless plating aqueous solution] NiSO ₄ 0.003 mol / l tartaric acid 0.200 mol / l copper sulfate 0.030 mol / l HCHO 0.050 mol / l NaOH 0.100 mol / l α, α ' -Bipyridyl 100 mg / l Polyethylene glycol (PEG) 0.10 g / l [Electroless plating conditions] 40 minutes at a liquid temperature of 30 ° C

(11) Next, a commercially available photosensitive dry film is attached to the substrate on which the electroless copper plating film 32 has been formed, a mask is placed, and exposure is performed at 100 mJ / cm ² .
By developing with an aqueous 0.8% sodium carbonate solution, a plating resist 23 having a thickness of 20 μm was provided (FIG. 9).
(B)).

(12) Then, the substrate was washed with water at 50 ° C., degreased, washed with water at 25 ° C., further washed with sulfuric acid, and then subjected to electrolytic plating under the following conditions to obtain plating resist 23. In the forming part, a 20 μm thick electrolytic copper plating film 33
Was formed (see FIG. 9C).

[Electrolytic plating solution] Sulfuric acid 2.24 mol / l Copper sulfate 0.26 mol / l Additive 19.5 ml / l (Atotech Japan, Capparaside GL) [Electroplating conditions] Current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(13) Further, the plating resist 23 is
% NaOH, the plating resist 23
The lower electroless plating film is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide, and a 18 μm thick conductor circuit 25 (via hole) composed of an electroless copper plating film 32 and an electrolytic copper plating film 33 is formed. 27 (FIG. 9).
(D)). Further, the same etchant (mech etch bond) as the etchant used in the above step (5).
, A roughened surface was formed on the surface of the conductor circuit 25 (including the via hole 27).

(14) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) so as to have a concentration of 60% by weight was used. Oligomer for imparting properties (molecular weight: 4000) 46.6
7 parts by weight, 80% by weight dissolved in methyl ethyl ketone
Of bisphenol A type epoxy resin (manufactured by Yuka Shell Co., Ltd.
Trade name: Epicoat 1001) 15.0 parts by weight, imidazole hardener (manufactured by Shikoku Chemicals, trade name: 2E4MZ-C)
N) 1.6 parts by weight, a bifunctional acrylic monomer which is a photosensitive monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.) 4.5
Parts by weight, also polyvalent acrylic monomer (manufactured by Kyoei Chemical Co.,
A trade name: 1.5 parts by weight of DPE6A) and 0.71 parts by weight of a dispersion defoaming agent (manufactured by San Nopco, S-65) are placed in a container, stirred and mixed to prepare a mixed composition, and the mixed composition is prepared. Of benzophenone (manufactured by Kanto Chemical Co., Ltd.) as a photopolymerization initiator and 0.2 part by weight of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer at 25 ° C. A solder resist composition adjusted to 2.0 Pa · s was obtained. The viscosity was measured using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) for 60 min ^-1 (rpm).
m), the rotor No. 4.6 min ^-1 (rpm)
In the case of the rotor No. According to 3.

(15) Next, the solder resist composition is applied in a thickness of 30 μm on both sides of the substrate on which the interlayer insulating layer 22 and the conductor circuit 25 (including the via hole 27) are formed, A drying treatment was performed for 20 minutes at 70 ° C. for 30 minutes to form a solder resist composition layer 34 ′ (see FIG. 10A).

(16) Next, a 5 mm-thick photomask on which patterns of the openings for forming the solder bumps and the openings for the optical elements (light-receiving elements and light-emitting elements) are drawn is brought into close contact with the solder resist layer so as to be 1000 mJ / cm ² . It was exposed to ultraviolet light and developed with a DMTG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour,
Heat treatment is performed at 00 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours to cure the solder resist layer, and has a solder bump forming opening 35 and an optical element opening 31; A solder resist layer 34 having a thickness of 20 μm was formed (see FIG. 10B). In addition, a commercially available solder resist composition can also be used as the solder resist composition.

(17) Next, the substrate on which the solder resist layer 34 has been formed is coated with nickel chloride (2.3 × 10 ^-1 mol).
/ L), sodium hypophosphite (2.8 × 10 ^-1 mol)
/ L), sodium citrate (1.6 × 10 ^-1 mol /
2) in the electroless nickel plating solution having pH = 4.5 containing l)
By immersing for 0 minutes, a nickel plating layer having a thickness of 5 μm was formed in the openings 35 for forming solder bumps and the openings 31 for optical elements. Further, the substrate was placed on potassium potassium cyanide (7.6 ×
10 ⁻³ mol / l), ammonium chloride (1.9 × 10
^-1 mol / l), sodium citrate (1.2 × 10 ^-1
mol / l), sodium hypophosphite (1.7 × 10 ⁻¹⁾
(mol / l) and immersed in an electroless gold plating solution containing 80 mol / l for 7.5 minutes at a temperature of 80 ° C. to form a film having a thickness of 0.1 mm on the nickel plating layer.
A gold plating layer having a thickness of 03 μm was formed to form a solder pad 36.

(18) Next, the opening 35 for forming the solder bump and the opening 3 for the optical element formed in the solder resist layer 34
1 is printed with a solder paste.
Attach the light receiving element 38 and the light emitting element 39 to the solder paste printed thereon while aligning the light receiving section 38a and the light emitting section 39a of the light receiving element 38, and reflow at 200 ° C. to mount the light receiving element 38 and the light emitting element 39. Then, the solder bumps 37 were formed in the solder bump formation openings 35 to obtain an IC chip mounting substrate. The light receiving element 38 was made of InGaAs, and the light emitting element 39 was made of InGaAsP (see FIG. 10C).

B. Production of multilayer printed wiring board B-1. Production of Resin Film for Interlayer Insulation Layer A resin film for interlayer insulation layer was produced using the same method as that used in A-1. B-2. Preparation of Resin Composition for Filling Through Holes A resin composition for filling through holes was prepared using the same method as that used in A-2.

B-3. Manufacture of multilayer printed wiring boards (1) 0.6 mm thick glass epoxy resin or BT
A copper-clad laminate having 18 μm copper foils 8 laminated on both surfaces of an insulating substrate 1 made of resin was used as a starting material (see FIG. 11A). First, the copper-clad laminate was drilled, subjected to an electroless plating treatment, and etched in a pattern to form conductor circuits 4 and through holes 9 on both surfaces of the substrate 1.

(2) The substrate on which the through holes 29 and the conductor circuits 24 are formed is washed with water, dried, and then sprayed with an etchant (Mec etch bond, manufactured by Mec Co.) to spray the conductor circuits 4 including the through holes 9. The roughened surfaces 4a and 9a were formed on the surface of (see FIG. 11B).

(3) After preparing the resin filler described in the above B-2, within 24 hours after preparation by the following method,
A layer of a resin filler 10 ′ was formed in the through-hole 9, on a portion of the substrate 1 where no conductive circuit was formed, and on the outer edge of the conductive circuit 4. That is, first, the resin filler was pushed into the through holes using a squeegee, and then dried at 100 ° C. for 20 minutes. Next, a mask having an opening corresponding to the conductive circuit non-forming portion is placed on the substrate, and the resin filling material is also filled in the conductive circuit non-forming portion which is a concave portion using a squeegee. By drying under the condition of 20 minutes, a layer of the resin filler 10 'was formed (see FIG. 11C).

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to form the surface of the conductive circuit 4 and the through holes 9. Polishing was performed so that the resin filler 10 'did not remain on the land surface, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, at 100 ° C for 1 hour, at 120 ° C for 3 hours, at 150 ° C
For 1 hour and at 180 ° C. for 7 hours to form a resin filler layer 10.

In this manner, the surface layer of the resin filler 10 and the surface of the conductor circuit 4 formed in the through hole 9 and the portion where the conductor circuit is not formed are flattened, and the resin filler 10 and the side surface 4a of the conductor circuit 4 are Was firmly adhered via the roughened surface, and an insulating substrate in which the inner wall surface 9a of the through hole 9 and the resin filler 10 were firmly adhered via the roughened surface was obtained (FIG. 1).
1 (d)). By this step, the surface of the resin filler layer 10 and the surface of the conductor circuit 4 become flush with each other.

(5) After the above substrate was washed with water and acid degreased,
The surface of the conductive circuit 4 and the land surface and the inner wall of the through hole 9 are etched by spraying an etching solution onto both surfaces of the substrate by spraying, so that the entire surface of the conductive circuit 4 is roughened 4a. , 9a (see FIG. 12A). As an etching solution, Mech etch bond manufactured by Mec Co. was used.

(6) Next, a resin film for an interlayer insulating layer slightly larger than the substrate prepared in B-1 was placed on the substrate, and the conditions were as follows: pressure 0.4 MPa, temperature 80 ° C., pressure bonding time 10 seconds. Then, the resultant was preliminarily press-bonded and cut, and then attached by using a vacuum laminator by the following method to form an interlayer insulating layer 2 (see FIG. 12B). That is, a resin film for an interlayer insulating layer is placed on a substrate at a degree of vacuum of 65
The main bonding was performed under the conditions of Pa, a pressure of 0.4 MPa, a temperature of 80, and a time of 60 seconds.

(7) Next, on the interlayer insulating layer 2, a thickness of 1.
Through a mask having a through-hole of 2 mm, a wavelength of 1
With a CO ₂ gas laser of 0.4 μm, the beam diameter is 4.0 m
m, a top hat mode, a pulse width of 8.0 μsec, a mask through-hole diameter of 1.0 mm, and a one-shot condition, a via hole opening 6 having a diameter of 80 μm was formed in the interlayer insulating layer 2 (FIG. 12 (c)). )reference).

(8) Next, SV-4 manufactured by Nippon Vacuum Engineering Co., Ltd.
Plasma treatment was performed using 540 to roughen the surface of the interlayer insulating layer 2 (see FIG. 12D). Here, argon gas was used as an inert gas, and plasma treatment was performed for 2 minutes at a power of 200 W, a gas pressure of 0.6 Pa, and a temperature of 70 ° C. Next, after replacing the argon gas inside using the same apparatus, sputtering using Ni target was performed using SV-4540 at a pressure of 0.6 Pa and a temperature of 80 Pa.
C., a power of 200 W, and a time of 5 minutes, and a metal layer made of Ni was formed on the surface of the interlayer insulating layer 2. Note that Ni
The thickness of the layer is 0.1 μm.

(9) Next, the substrate on which the Ni layer was formed was immersed in an electroless copper plating aqueous solution having the following composition, and an electroless copper plating film having a thickness of 0.6 to 3.0 μm was formed on the Ni layer. Was formed (see FIG. 13A). In FIG. 13, N
The layer composed of the i-layer and the electroless copper plating film is
It is shown. [Electroless plating aqueous solution] NiSO ₄ 0.003 mol / l tartaric acid 0.200 mol / l copper sulfate 0.030 mol / l HCHO 0.050 mol / l NaOH 0.100 mol / l α, α'-bipyridyl 100 mg / l Polyethylene glycol (PEG) 0.10 g / l [Electroless plating conditions] 40 minutes at a liquid temperature of 30 ° C

(10) Next, a commercially available photosensitive dry film is adhered to the substrate on which the thin film conductor layer 12 is formed, a mask is placed, and exposure is performed at 100 mJ / cm ² ,
By performing development processing with an aqueous solution of sodium carbonate, a plating resist 3 having a thickness of 20 μm was provided (see FIG. 13B).

(11) Next, the substrate was washed with water at 50 ° C., degreased, washed with water at 25 ° C., further washed with sulfuric acid, and then subjected to electrolytic plating under the following conditions. An electrolytic copper plating film 3 having a thickness of 20 μm was formed on the formation portion (see FIG. 13C). [Electroplating solution] Sulfuric acid 2.24 mol / l Copper sulfate 0.26 mol / l Additive 19.5 ml / l (Atotech Japan, Capparaside GL) [Electroplating conditions] Current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(12) Further, the plating resist 23 is
% NaOH, the thin film conductor layer under the plating resist 3 is etched and dissolved and removed with a mixed solution of nitric acid, sulfuric acid and hydrogen peroxide to remove the thin film conductor layer from the thin film conductor layer 12 and the electrolytic copper plating film 13. 18 μm thick conductor circuit 5
(Including via holes 7) were formed (see FIG. 13D).

(13) Next, by repeating the above steps (5) to (12), an upper interlayer insulating layer and a conductor circuit are laminated (FIGS. 14 (a) to 15 (a)). )
reference). Further, a roughened surface was formed on the outermost conductive circuit by using the same method as the method used in the step (5).

(14) Next, an optical waveguide 18 having an optical path conversion mirror 19 was formed at a predetermined position on the surface of the outermost interlayer insulating layer 2 by using the following method (see FIG. 15B). . That is, a film-shaped optical waveguide made of PMMA (manufactured by Microparts: 1 mm wide, 1 mm thick) having a 45 ° optical path conversion mirror 19 formed at one end thereof with a V-shaped diamond saw having a V-shaped end of 90 ° in advance. 20 μm)
It was affixed so that the side surface of the other end where the light conversion mirror was not formed and the side surface of the interlayer insulating layer were aligned. Note that the optical waveguide is attached by applying an adhesive made of a thermosetting resin to a thickness of 10 μm on the surface of the optical waveguide to be bonded to the interlayer insulating layer, and after pressing, curing at 60 ° C. for 1 hour. went. In the present embodiment, the curing is performed under the condition of 60 ° C./1 hour, but step curing may be performed in some cases. This is because stress is not easily generated by the optical waveguide at the time of sticking.

(15) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) so as to have a concentration of 60% by weight was used. Oligomer for imparting properties (molecular weight: 4000) 46.6
7 parts by weight, 80% by weight dissolved in methyl ethyl ketone
Of bisphenol A type epoxy resin (manufactured by Yuka Shell Co., Ltd.
Trade name: Epicoat 1001) 15.0 parts by weight, imidazole hardener (manufactured by Shikoku Chemicals, trade name: 2E4MZ-C)
N) 1.6 parts by weight, bifunctional acrylic monomer as photosensitive monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.) 3.0
Parts by weight, also polyvalent acrylic monomer (manufactured by Kyoei Chemical Co.,
A trade name: 1.5 parts by weight of DPE6A) and 0.71 parts by weight of a dispersion defoaming agent (manufactured by San Nopco, S-65) are placed in a container, stirred and mixed to prepare a mixed composition, and the mixed composition is prepared. Of benzophenone (Kanto Chemical Co., Ltd.) as a photopolymerization initiator and 0.2 part by weight of Michler's ketone (Kanto Chemical Co., Ltd.) as a photosensitizer at 25 ° C. A solder resist composition adjusted to 2.0 Pa · s was prepared, and the above solder resist composition was applied to both sides of the substrate on which the optical waveguide 18 was formed.
μm thickness, 70 ° C for 20 minutes, 70 ° C for 30 minutes
A drying process was performed under the conditions of minutes to form a layer 14 ′ of the solder resist composition (see FIG. 15C).

(16) Next, a 5 mm-thick photomask on which a pattern of openings for forming solder bumps and openings for optical paths is drawn on one side of the substrate is adhered to the solder resist layer and exposed to ultraviolet light of 1000 mJ / cm ² . Exposure, DMTG
The solution was developed to form an opening having a diameter of 200 μm. Then, the solder resist layer is further heated at 80 ° C. for 1 hour, at 100 ° C. for 1 hour, at 120 ° C. for 1 hour, and at 150 ° C. for 3 hours to cure the solder resist layer.
A solder resist layer 14 having a solder bump formation opening 15 and an optical element opening 11 and having a thickness of 20 μm was formed (see FIG. 16A).

(17) Next, the substrate on which the solder resist layer 14 is formed is coated with nickel chloride (2.3 × 10 ^-1 mol).
/ L), sodium hypophosphite (2.8 × 10 ^-1 mol)
/ L), sodium citrate (1.6 × 10 ^-1 mol /
2) in the electroless nickel plating solution having pH = 4.5 containing l)
After immersion for 0 minutes, a thickness of 5 μm
m of nickel plating layer was formed. Furthermore, the substrate gold potassium cyanide ^{(7.6 × 10 -3 mol / l} ), ammonium chloride ^{(1.9 × 10 -1 mol / l} ), sodium citrate (1.2 × 10 ^-1 mol / l), immersed in an electroless gold plating solution containing sodium hypophosphite (1.7 × 10 ^-1 mol / l) at 80 ° C. for 7.5 minutes to form a layer having a thickness of 0 on the nickel plating layer. A gold plating layer of 0.03 μm was formed to form a solder pad 16.

(18) Next, a solder paste is printed in the solder bump forming openings 15 formed in the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17 in the solder bump forming openings 15. This was a multilayer printed wiring board (see FIG. 16B).

C. Manufacture of IC mounting optical communication device First, an IC chip is mounted on the IC chip mounting substrate manufactured through the above step A, and then resin sealing is performed.
An IC mounting substrate was obtained. . Next, this IC chip mounting board and the multilayer printed wiring board manufactured through the above-mentioned step B are arranged at predetermined positions so as to face each other, and are reflowed at 200 ° C. to connect the solder bumps of both boards to each other to perform solder connection. Part was formed, and an IC-mounted optical communication device was manufactured (FIG. 1).
reference).

[0166] In the IC mounted optical communication device thus obtained, an optical fiber is attached to the exposed surface of the optical waveguide facing the light receiving element from the multilayer printed wiring board.
After attaching a detector to the exposed surface of the optical waveguide facing the light receiving element from the multilayer printed wiring board, an optical signal was sent through an optical fiber and operated by an IC chip, and then the optical signal was detected by the detector. However, it was found that a desired optical signal could be detected, and that the IC-mounted optical communication device manufactured in this example had sufficiently satisfactory performance as an optical communication device.

An optical path for transmitting an optical signal is appropriately formed,
Accordingly, except that the mounting position of the light receiving element and the light emitting element and the forming position of the optical waveguide are changed, the IC of the embodiment shown in FIGS.
A device for optical communication was manufactured, and the optical signal transmission performance of the device for IC mounted optical communication was evaluated by the method described above. As a result, it was found that the device had sufficiently satisfactory performance as an optical communication device. became.

[0168]

As described above, the optical communication device of the present invention comprises an IC chip mounting substrate on which a light receiving element and a light emitting element are mounted on a predetermined position, and a multilayer having an optical waveguide formed on a predetermined position. Since it is composed of a printed wiring board, the connection loss between the mounted optical components is low, and the connection reliability is excellent as an optical communication device.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view schematically showing one embodiment of an optical communication device according to the present invention.

FIG. 2 is a cross-sectional view schematically showing another embodiment of the optical communication device of the present invention.

FIG. 3 is a cross-sectional view schematically showing another embodiment of the optical communication device according to the present invention.

FIG. 4 is a cross-sectional view schematically showing another embodiment of the optical communication device of the present invention.

FIG. 5 is a cross-sectional view schematically showing another embodiment of the optical communication device of the present invention.

FIG. 6 is a cross-sectional view schematically showing another embodiment of the optical communication device of the present invention.

FIG. 7 is a cross-sectional view schematically showing a part of a process of manufacturing an IC chip mounting substrate constituting the optical communication device of the present invention.

FIG. 8 is a cross-sectional view schematically showing a part of a process of manufacturing an IC chip mounting substrate constituting the optical communication device of the present invention.

FIG. 9 is a cross-sectional view schematically showing a part of a process of manufacturing an IC chip mounting substrate constituting the optical communication device of the present invention.

FIG. 10 is a cross-sectional view schematically showing a part of a step of manufacturing an IC chip mounting substrate constituting the optical communication device of the present invention.

FIG. 11 is a cross-sectional view schematically showing a part of a process of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

FIG. 12 is a cross-sectional view schematically showing a part of a process of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

FIG. 13 is a cross-sectional view schematically showing a part of a process of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

FIG. 14 is a cross-sectional view schematically showing a part of a step of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

FIG. 15 is a cross-sectional view schematically showing a part of a step of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

FIG. 16 is a cross-sectional view schematically showing a part of a step of manufacturing a multilayer printed wiring board constituting the optical communication device of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 multilayer printed wiring board 101 substrate 102 interlayer insulating layer 104 conductive circuit 107 via hole 109 through hole 111 optical path opening 114 solder resist layer 118 optical waveguide 119 optical conversion mirror 120 IC chip mounting substrate 121 substrate 122 interlayer insulating layer 124 conductor Circuit 127 Via hole 129 Through hole 131 Opening for optical element 134 Solder resist layer 138 Light receiving element 139 Light emitting element 140 IC chip 141, 143 Solder joint 142 Conductive layer 150 Optical communication device

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 33/00 H05K 1/14 A 5F041 H01S 5/022 3/46 Q 5F073 H05K 1/02 H01L 31/02 B 5F088 1/14 23/12 F 5F089 3/46 G02B 6/12 A F-term (reference) 2H037 AA01 BA02 BA11 2H047 KA03 KA15 MA07 PA05 PA21 PA24 QA03 QA05 5E338 AA03 AA16 BB80 EE60 5E344 A0201 AA12 AA43 CC04 CC09 CC32.

Claims (8)

[Claims] 1. An optical communication device comprising an IC chip mounting substrate and a multilayer printed wiring board, wherein the IC chip mounting substrate comprises a conductor circuit, an interlayer insulating layer, and a conductor circuit sandwiching the interlayer insulating layer. An optical communication device, comprising a via hole for connecting between them, wherein a light receiving element and a light emitting element are mounted on the IC chip mounting substrate. 2. The optical communication device according to claim 1, wherein the light receiving element and the light emitting element are mounted on a surface facing the multilayer printed wiring board. 3. The optical communication device according to claim 1, wherein the light receiving element and the light emitting element are mounted on a surface opposite to a surface facing the multilayer printed wiring board. 4. One of the light-receiving element and the light-emitting element is mounted on a surface facing the multilayer printed wiring board, and the other is a surface opposite to the surface facing the multilayer printed wiring board. The optical communication device according to claim 1, wherein the device is mounted on a device. 5. The optical communication device according to claim 3, wherein an optical path for transmitting an optical signal penetrating the IC chip mounting substrate is formed. 6. The conductive circuit and the interlayer insulating layer,
The optical communication device according to any one of claims 1 to 5, wherein the device is sequentially formed on both surfaces or one surface of a substrate. 7. The optical communication device according to claim 1, wherein an optical waveguide is formed on the multilayer printed wiring board. 8. The optical signal transmission optical path for transmitting an optical signal between the light receiving element and the light emitting element and the optical waveguide is formed in the multilayer printed wiring board. The optical communication device according to any one of the preceding claims.