JP2002280261A - Thin-film capacitor, electronic membrane component and producing method therefor - Google Patents

Thin-film capacitor, electronic membrane component and producing method therefor

Info

Publication number
JP2002280261A
JP2002280261A JP2001076998A JP2001076998A JP2002280261A JP 2002280261 A JP2002280261 A JP 2002280261A JP 2001076998 A JP2001076998 A JP 2001076998A JP 2001076998 A JP2001076998 A JP 2001076998A JP 2002280261 A JP2002280261 A JP 2002280261A
Authority
JP
Japan
Prior art keywords
dielectric layer
film capacitor
lower electrode
thin film
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001076998A
Other languages
Japanese (ja)
Other versions
JP4177560B2 (en
Inventor
Toshihide Namatame
俊秀 生田目
Masahiko Ogino
雅彦 荻野
Narihisa Motowaki
成久 元脇
Seiji Watabiki
誠次 綿引
Toshiya Sato
俊也 佐藤
Hitoshi Akamine
均 赤嶺
Eiji Fukumoto
英士 福本
Yoko Furukawa
陽子 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001076998A priority Critical patent/JP4177560B2/en
Priority to PCT/JP2002/001674 priority patent/WO2002078024A1/en
Priority to MYPI20020666 priority patent/MY128174A/en
Priority to TW91103655A priority patent/TW594812B/en
Publication of JP2002280261A publication Critical patent/JP2002280261A/en
Application granted granted Critical
Publication of JP4177560B2 publication Critical patent/JP4177560B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors

Abstract

PROBLEM TO BE SOLVED: To provide a miniaturized high-capacitance thin film capacitor, an electronic component with built-in passive element such as an LCR filter of low loss and a miniaturized low-cost module, in which the LCR filter is packaged, for coping with high frequency. SOLUTION: In the thin-film capacitor, the electronic membrane component and a production method therefor, a plurality of dielectric layers are formed on an insulated substrate, while holding both the sides of a dielectric layer in the direction of laminating between electrodes, and each of dielectric layers is composed of an inorganic dielectric layer and an organic dielectric layer.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、携帯電話等の各種
無線通信機器、或いは、その他各種電子機器等に利用可
能な薄膜コンデンサおよび受動素子内蔵電子部品とその
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film capacitor and a passive element built-in electronic component which can be used for various wireless communication devices such as a portable telephone or other various electronic devices, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】近年の携帯型通信機器の小型化・高性能
化へのニーズの高まりから、コンデンサも更なる小型化
が求められている。
2. Description of the Related Art In recent years, there has been an increasing need for miniaturization and high performance of portable communication devices, and further miniaturization of capacitors has been demanded.

【0003】従来のコンデンサは、複数の電極層と無機
誘電体層を積層した10〜100μm厚の積層形態で構
成されている。しかし、高誘電率材料を用いた無機誘電
体は、結晶化・結晶粒成長・焼結に必要な温度が100
0℃前後と非常に高い。このために一般に数十μm以上
の厚膜で作製しなければ耐圧が取れなかった。
[0003] A conventional capacitor is formed in a laminated form having a thickness of 10 to 100 µm in which a plurality of electrode layers and an inorganic dielectric layer are laminated. However, an inorganic dielectric using a high dielectric constant material has a temperature required for crystallization, crystal grain growth, and sintering of 100.
Very high, around 0 ° C. For this reason, a withstand voltage cannot be obtained unless a film having a thickness of several tens μm or more is generally formed.

【0004】特開平11−97287号には、薄膜化の
ために有機誘電体を用いた割れのない柔軟性のあるコン
デンサが開示されている。
Japanese Unexamined Patent Application Publication No. 11-97287 discloses a crack-free flexible capacitor using an organic dielectric for thinning.

【0005】また、従来の受動素子内蔵電子部品である
ノイズフィルタとしては、別部品としてのコンデンサと
インダクタとをモジュール基板上に配設し、これらを配
線で結ぶことにより、LCR共振回路を形成したものが
用いられている。ところが、携帯機器の軽量化・低部品
化によりLCR共振回路も更なる小型化が求められてい
る。そこで、コンデンサ部については、薄膜コンデンサ
化して薄膜多層基板内に内装し高集積化する方向へ開発
が進んでいる。Bell Labs Technical
Journal July‐September P.1
16(1998)にはコンデンサ、インダクタ、抵抗を
多層基板内に構成した例の開示がある。
Further, as a conventional noise filter which is a passive element built-in electronic component, an LCR resonance circuit is formed by disposing a capacitor and an inductor as separate components on a module substrate and connecting these by wiring. Things are used. However, further reduction in the size of the LCR resonance circuit has been demanded due to the reduction in the weight and the number of parts of portable devices. Therefore, the development of the capacitor portion is proceeding in the direction of forming a thin film capacitor, mounting it inside a thin film multilayer substrate, and increasing the degree of integration. Bell Labs Technical
Journal July-Septmber P.1
16 (1998) discloses an example in which a capacitor, an inductor, and a resistor are formed in a multilayer substrate.

【0006】特開平4−302117号公報には、基板
/下部電極/誘電体薄膜/上部電極からなる薄膜コンデ
ンサにおいて、誘電体薄膜を形成後、300‐1000
℃の酸化雰囲気中で熱処理することの開示がある。
Japanese Patent Application Laid-Open No. 4-302117 discloses a thin film capacitor comprising a substrate, a lower electrode, a dielectric thin film, and an upper electrode, which is formed after forming a dielectric thin film and then forming a thin film capacitor having a thickness of 300-1000.
There is a disclosure of performing heat treatment in an oxidizing atmosphere at a temperature of ° C.

【0007】[0007]

【発明が解決しようとする課題】上述の様にコンデンサ
の小型化・高容量化のためには、誘電体層の上部電極の
大面積化、高誘電体材料の利用、誘電体の薄膜化が必須
となる。
As described above, in order to reduce the size and increase the capacitance of the capacitor, it is necessary to increase the area of the upper electrode of the dielectric layer, use a high dielectric material, and reduce the thickness of the dielectric. Required.

【0008】コンデンサの容量Cは、次式、 C=εr×ε0×A/d (式中の、εr:誘電体の比誘電率、ε0:真空の誘電
率、A:上部電極の面積、d:誘電体の厚み、であ
る。)で表される。
The capacitance C of the capacitor is expressed by the following equation: C = εr × ε0 × A / d (where, εr: relative permittivity of dielectric, ε0: permittivity of vacuum, A: area of upper electrode, d : The thickness of the dielectric).

【0009】ところが、特開平11−97287号で開
示されている厚みが10μm以下の有機誘電体を有機フ
ィルム又は樹脂基板に形成することで0.4mm以下の
割れないコンデンサを作製できる反面、有機誘電体の比
誘電率が3〜4と非常に小さなために高容量化が図れな
い問題点があった。
However, by forming an organic dielectric having a thickness of 10 μm or less on an organic film or a resin substrate disclosed in Japanese Patent Application Laid-Open No. 11-97287, a capacitor having a thickness of 0.4 mm or less can be manufactured without cracking. Since the relative dielectric constant of the body is very small, 3 to 4, there is a problem that the capacity cannot be increased.

【0010】また、Bell Labs. Techn
ical Journal July‐Septembe
r P.116(1998)に記載の構造は、比誘電率が
約7のSi3N4の誘電体を用いているために高容量な
コンデンサを小型化して形成するには問題があった。さ
らに、絶縁基板に抵抗率が小さいSiを用いているため
に高周波領域でのノイズ発生源となり、低損失のLCR
フィルタが得られない問題があった。
[0010] Also, Bell Labs. Techn.
ical Journal July-Septembe
The structure described in r. P. 116 (1998) has a problem in forming a high-capacity capacitor by miniaturization because it uses a dielectric material of Si3N4 having a relative dielectric constant of about 7. Furthermore, since Si having a low resistivity is used for the insulating substrate, it becomes a noise source in a high frequency region, and has a low loss LCR.
There was a problem that a filter could not be obtained.

【0011】本発明では、小型・高容量な薄膜コンデン
サ及び低損失なLCRフィルタである受動素子内蔵電子
部品、及び前記LCRフィルタを搭載した小型・低コス
トの高周波対応モジュールを提供することを目的とす
る。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a small-sized and high-capacity thin-film capacitor and an electronic component with a built-in passive element which is a low-loss LCR filter, and a small-sized and low-cost high-frequency module equipped with the LCR filter. I do.

【0012】[0012]

【課題を解決するための手段】発明の要旨は以下のとお
りである。 [1] 絶縁基板上に、誘電体膜の積層方向の両面を電極
で挟んだ誘電体層を、複数層形成した薄膜コンデンサで
あって、前記誘電体層が無機誘電体層と有機誘電体層で
構成されている薄膜コンデンサである。 [2] 絶縁基板上に、誘電体膜の積層方向の両面を電極
で挟んだ誘電体層を、複数層設定した薄膜コンデンサで
あって、無機誘電体層の上面に主上部電極が形成され、
有機誘電体層の上面に副上部電極が並列して形成されて
いる薄膜コンデンサである。 [3] 絶縁基板上に、誘電体膜の積層方向の両面を電極
で挟んだ誘電体層を、複数層設定した薄膜コンデンサで
あって、無機誘電体層の上面に主上部電極が形成され、
無機誘電体層と有機誘電体層の積層誘電体層の上面に副
上部電極が並列して形成されている薄膜コンデンサであ
る。 [4] 絶縁基板上に、誘電体膜の積層方向の両面を、電
極で挟んだ誘電体層を、複数層設定した薄膜コンデンサ
であって、絶縁基板上に主下部電極と副下部電極が並列
して形成され、前記主下部電極の上面に無機誘電体層が
形成され、前記副下部電極の上面に有機誘電体層が形成
されている薄膜コンデンサである。 [5] 絶縁基板上に、誘電体膜の積層方向の両面を、電
極で挟んだ誘電体層を、複数層設定した薄膜コンデンサ
であって、絶縁基板上に主下部電極と副下部電極が並列
して形成され、前記主下部電極の上面に無機誘電体層が
形成され、前記副下部電極の上面に無機誘電体層と有機
誘電体層の積層誘電体層が形成されている薄膜コンサで
あって、無機誘電体層の上面に主上部電極が形成され、
無機誘電体層と有機誘電体層の積層誘電体層の上面に副
上部電極が並列して形成することで達成される。この場
合、無機誘電体層を副上部電極の投影方向にまで広く形
成できるために、加工寸法を大きく取れる効果がある。
The gist of the invention is as follows. [1] A thin-film capacitor in which a plurality of dielectric layers having both sides in the stacking direction of a dielectric film sandwiched between electrodes are formed on an insulating substrate, wherein the dielectric layers are an inorganic dielectric layer and an organic dielectric layer. This is a thin film capacitor composed of: [2] A thin-film capacitor in which a plurality of dielectric layers having both sides in the stacking direction of a dielectric film sandwiched between electrodes are set on an insulating substrate, and a main upper electrode is formed on an upper surface of the inorganic dielectric layer,
This is a thin film capacitor in which sub upper electrodes are formed in parallel on the upper surface of an organic dielectric layer. [3] A thin-film capacitor in which a plurality of dielectric layers sandwiching both sides of a dielectric film in a stacking direction between electrodes are set on an insulating substrate, and a main upper electrode is formed on an upper surface of the inorganic dielectric layer,
This is a thin film capacitor in which a sub-upper electrode is formed in parallel on the upper surface of a laminated dielectric layer of an inorganic dielectric layer and an organic dielectric layer. [4] A thin film capacitor in which dielectric layers sandwiching electrodes on both sides in the direction of lamination of a dielectric film on an insulating substrate are set in a plurality of layers, and the main lower electrode and the sub lower electrode are arranged in parallel on the insulating substrate. A thin film capacitor in which an inorganic dielectric layer is formed on an upper surface of the main lower electrode and an organic dielectric layer is formed on an upper surface of the sub lower electrode. [5] A thin-film capacitor in which a dielectric layer sandwiching electrodes on both sides in the direction of lamination of a dielectric film is formed on an insulating substrate in a plurality of layers, and a main lower electrode and a sub-lower electrode are arranged in parallel on the insulating substrate. A thin film capacitor in which an inorganic dielectric layer is formed on the upper surface of the main lower electrode, and a laminated dielectric layer of an inorganic dielectric layer and an organic dielectric layer is formed on the upper surface of the sub lower electrode. A main upper electrode is formed on the upper surface of the inorganic dielectric layer,
This is achieved by forming sub-upper electrodes in parallel on the upper surface of the laminated dielectric layer of the inorganic dielectric layer and the organic dielectric layer. In this case, since the inorganic dielectric layer can be formed wide in the projection direction of the sub upper electrode, there is an effect that a processing size can be made large.

【0013】また、別な本発明は、絶縁基板上に、誘電
体膜の積層方向の両面を、電極で挟んだ誘電体層を、複
数層設定した薄膜コンデンサであって、絶縁基板上に主
下部電極と副下部電極が並列して形成され、前記主下部
電極の上面に無機誘電体層が形成され、前記副下部電極
の上面に有機誘電体層が形成することで達成される。こ
の形態によれば、最上層の上部電極の加工寸法を大きく
できるために加工制御性に優れる特徴を有する。
Another aspect of the present invention is a thin-film capacitor in which a plurality of dielectric layers are provided on both sides of an insulating substrate in the direction of lamination of a dielectric film and sandwiched between electrodes. This is achieved by forming a lower electrode and a sub lower electrode in parallel, forming an inorganic dielectric layer on the upper surface of the main lower electrode, and forming an organic dielectric layer on the upper surface of the sub lower electrode. According to this embodiment, since the processing size of the upper electrode of the uppermost layer can be increased, it has a feature of excellent processing controllability.

【0014】さらに、絶縁基板上に、誘電体膜の積層方
向の両面を、電極で挟んだ誘電体層を、複数層設定した
薄膜コンデンサであって、絶縁基板上に主下部電極と副
下部電極が並列して形成され、前記主下部電極の上面に
無機誘電体層が形成され、前記副下部電極の上面に無機
誘電体層と有機誘電体層の積層誘電体層が形成されるこ
とが好ましい。
Further, a thin-film capacitor comprising a plurality of dielectric layers sandwiched between electrodes on both sides of a dielectric film in the direction of lamination on an insulating substrate, wherein a main lower electrode and a sub-lower electrode are provided on the insulating substrate. Are preferably formed in parallel, an inorganic dielectric layer is formed on the upper surface of the main lower electrode, and a laminated dielectric layer of an inorganic dielectric layer and an organic dielectric layer is formed on the upper surface of the sub lower electrode. .

【0015】なお、前記下部電極は絶縁基板上に一層目
として形成した場合を説明したが、何らこれにとらわれ
ることはなく絶縁基板上に有機誘電体層或いは無機誘電
体層を形成した後に下部電極を構成しても良い。
Although the case where the lower electrode is formed as a first layer on an insulating substrate has been described, the present invention is not limited to this and the lower electrode is formed after forming an organic dielectric layer or an inorganic dielectric layer on the insulating substrate. May be configured.

【0016】また、下部電極の一部から積層方向の最上
面に電極形成できれば、それ以外の全面を無機誘電体層
で覆っても良い。
Further, as long as an electrode can be formed on the uppermost surface in the laminating direction from a part of the lower electrode, the entire other surface may be covered with an inorganic dielectric layer.

【0017】また、絶縁基板として、ステアタイト(M
gO―SiO2)、フォルステライト(MgO−Si
2)、アルミナ、マグネシア、SiO2、Si、ガラ
ス、ガラスエポキシ、有機フィルム、樹脂基板を用いて
も作製が可能である。
As an insulating substrate, steatite (M
gO-SiO 2 ), forsterite (MgO-Si)
O 2 ), alumina, magnesia, SiO 2 , Si, glass, glass epoxy, an organic film, and a resin substrate can also be used.

【0018】また、前記有機誘電体は使用温度が180
℃以上の耐熱性に優れた材料が好ましく、特にポリイミ
ド、ポリビスマレイド、ポリエステルイミド、ポリアミ
ドイミド、ベンゾシクロブテンやそれらを多孔質化した
ものを用いても良い。
The organic dielectric has a working temperature of 180.
A material having excellent heat resistance of not less than ° C. is preferable. In particular, polyimide, polybismaleide, polyesterimide, polyamideimide, benzocyclobutene, or a porous material thereof may be used.

【0019】さらに、前記無機誘電体は有機誘電体の比
誘電率より数倍以上大きい材料が好ましく、特にTaO
x,TiOx,SrTiO3,CaTiO3,MgTi
O3,BaTiO3,(Ba,Sr)TiO3,PbT
iO3,Pb(Zr,Ti)O3,(Pb,La)(Z
r,Ti)O3,Pb(Mg,Nb)O3やそれらを組
合せたものを用いても良い。
Further, the inorganic dielectric is preferably made of a material several times larger than the relative dielectric constant of the organic dielectric, particularly TaO.
x, TiOx, SrTiO3, CaTiO3, MgTi
O3, BaTiO3, (Ba, Sr) TiO3, PbT
iO3, Pb (Zr, Ti) O3, (Pb, La) (Z
r, Ti) O3, Pb (Mg, Nb) O3 or a combination thereof may be used.

【0020】上部、下部電極については、Ag、Au、
Pt、Ag−Pd、Alを用いてもよく、下部電極と絶
縁基板との間に接着力を上げるために、Cr、Ti、M
o、TiN、Ti/W、Ta,TaNなどをはさんでも
構わない。別な上記目的を達成する本発明の特徴は、絶
縁基板上に、上記の薄膜コンデンサとインダクタと抵抗
が複数個設けられていることで達成される。
For the upper and lower electrodes, Ag, Au,
Pt, Ag-Pd, or Al may be used. In order to increase the adhesive force between the lower electrode and the insulating substrate, Cr, Ti, M
o, TiN, Ti / W, Ta, TaN, etc. may be interposed. Another feature of the present invention to achieve the above object is achieved by providing a plurality of the above thin film capacitors, inductors, and resistors on an insulating substrate.

【0021】また、絶縁基板にSi基板を用いてもよい
が、高周波数帯域でより低損失化が可能なガラス基板を
用いても良い。この特徴によれば、抵抗率の小さなSi
基板が導体損失の成分として働くために低損失な薄膜コ
ンデンサ及びインダクタの作製が難しかったのに対して
高抵抗なガラスを絶縁基板に用いることで低損失な薄膜
コンデンサ及びインダクタを提供できる。
Although an Si substrate may be used as the insulating substrate, a glass substrate capable of lowering loss in a high frequency band may be used. According to this feature, low resistivity Si
Although the production of low-loss thin-film capacitors and inductors is difficult because the substrate acts as a component of conductor loss, low-loss thin-film capacitors and inductors can be provided by using high-resistance glass for the insulating substrate.

【0022】別な上記目的を達成する本発明の特徴は、
上記小型・高容量な薄膜コンデンサとインダクタと抵抗
を同一絶縁基板上に構成することで、小型・低損失な受
動素子内蔵電子部品のLCRフィルタを作製することが
できる。
Another feature of the present invention that achieves the above object is that
By configuring the small-sized and high-capacity thin-film capacitor, the inductor and the resistor on the same insulating substrate, a small-sized and low-loss LCR filter of an electronic component with a built-in passive element can be manufactured.

【0023】また、 上記薄膜コンデンサおよび受動素
子内蔵電子部品を250℃以下の温度で製造することに
より、小型化した高容量な薄膜コンデンサを安定して作
製できる。従来の無機誘電体からなるコンデンサは、熱
処理温度が1000℃と非常に高温度なために上部電極
及び下部電極と無機誘電体との界面に低誘電率な反応層
を生成しやすかった。このために目的とする容量が小さ
くなる課題があった。本発明の特徴によれば、250℃
以下の低温度で作製するために上部電極及び下部電極と
誘電体の界面における反応層の生成を抑制でき、目的と
する高容量な薄膜コンデンサを作製できる。
Further, by manufacturing the above-described thin film capacitor and the electronic component with a built-in passive element at a temperature of 250 ° C. or less, a small-sized high-capacity thin film capacitor can be stably manufactured. A conventional capacitor made of an inorganic dielectric has a very high heat treatment temperature of 1000 ° C., so that it is easy to form a reaction layer having a low dielectric constant at the interface between the upper and lower electrodes and the inorganic dielectric. For this reason, there was a problem that the intended capacity was reduced. According to a feature of the present invention,
Since it is manufactured at the following low temperature, formation of a reaction layer at the interface between the upper electrode and the lower electrode and the dielectric can be suppressed, and a desired high-capacity thin film capacitor can be manufactured.

【0024】以上に記載した上記受動素子内蔵電子部品
に外部端子を設ければ、小型・低損失のLCRフィルタ
のチップ型素子を作製することが可能であり、さらに、
前記チップ型素子を搭載した高周波対応モジュールはフ
ィルタ部の実装面積が低減できて小型化できる上、部品
点数の減少により低コスト化が可能である。
If external terminals are provided on the above-described electronic component with a built-in passive element, a chip type element of a small and low-loss LCR filter can be manufactured.
The high-frequency compatible module on which the chip-type element is mounted can reduce the mounting area of the filter unit and reduce the size, and can reduce the cost by reducing the number of components.

【0025】以下、本発明を実施例を用いて詳しく説明
する。
Hereinafter, the present invention will be described in detail with reference to examples.

【0026】(実施例1)図1は、本発明の薄膜コンデ
ンサの層構成の一例を模式的に示す。図1において、1
は絶縁基板、2は下部電極、3は無機誘電体層、4は有
機誘電体層、5aは主上部電極、5bは副上部電極を表
す。
Embodiment 1 FIG. 1 schematically shows an example of a layer structure of a thin film capacitor of the present invention. In FIG. 1, 1
Denotes an insulating substrate, 2 denotes a lower electrode, 3 denotes an inorganic dielectric layer, 4 denotes an organic dielectric layer, 5a denotes a main upper electrode, and 5b denotes a sub upper electrode.

【0027】図1、図2で2下部電極の構造を説明する
と、下部電極2の一端を、有機誘電体層4上の上部電極
5と同一平面までコンタクトホールを引き出している。
The structure of the two lower electrodes will be described with reference to FIGS. 1 and 2. A contact hole is drawn from one end of the lower electrode 2 to the same plane as the upper electrode 5 on the organic dielectric layer 4.

【0028】次に図1に示した薄膜コンデンサの代表的
な製造方法を説明する。絶縁基板1としては、アルミノ
ボロシリケートガラス基板の肉厚0.5mmのものを用
いた。歪点は650℃である。下部電極2はまずCr/
Cuをスパッタ法により各々50nm/1μm作製した
後にレジスト形成、エッチング、レジスト剥離の順に処
理し、パターニングを行った。次にCuメッキ法によっ
て10μm厚のCuを形成した後にCrを50nm保護
膜して形成することで、パターニングされた下部電極2
を作製した。
Next, a typical method of manufacturing the thin film capacitor shown in FIG. 1 will be described. As the insulating substrate 1, an aluminoborosilicate glass substrate having a thickness of 0.5 mm was used. The strain point is 650 ° C. The lower electrode 2 is first made of Cr /
After Cu was formed at a thickness of 50 nm / 1 μm by sputtering, resist formation, etching, and resist peeling were performed in this order, and patterning was performed. Next, by forming Cu with a thickness of 10 μm by Cu plating and then forming a protective film of Cr with a thickness of 50 nm, the patterned lower electrode 2 is formed.
Was prepared.

【0029】次にCuメッキ法によって10μm厚のC
uを形成した後にCrを50nm保護膜して形成するこ
とで、パターニングされた下部電極2を作製した。次に
無機誘電体層3としてTaOxをスパッタ法により基板
加熱をせずに0.5μm厚で形成した。そしてレジスト
形成、エッチング、レジスト剥離の順に処理し、パター
ニングを行って、無機誘電体層3を作製した。
Next, a 10 μm thick C
The patterned lower electrode 2 was formed by forming a protective film of 50 nm of Cr after forming u. Next, TaOx was formed as the inorganic dielectric layer 3 by a sputtering method to a thickness of 0.5 μm without heating the substrate. Then, processing was performed in the order of resist formation, etching, and resist stripping, and patterning was performed, thereby forming an inorganic dielectric layer 3.

【0030】次に有機誘電体層4の形成を行った。有機
誘電体層4はポリイミド系樹脂PIQ(polyimide iso-
indoloquinazolinedione)の低熱膨張率(5×10-6
℃)タイプのものを用いた。本樹脂層は、N−メチル−
2−ピロリドンを溶媒とするPIQ溶液をスピンコート
により塗布し、110℃、3分でプリベーク後、露光、
現像(現像液:テトラメチルアンモニウムハイドライ
ド)してパターンニングした後、250℃で熱硬化させ
て形成した。有機誘電体層4の膜厚は、最終的に10μ
mとした。このとき、後で下部電極2のコンタクトホー
ルと主上部電極5aのコンタクトホールを埋めるための
空間をパターニングにより設けた。
Next, an organic dielectric layer 4 was formed. The organic dielectric layer 4 is made of polyimide resin PIQ (polyimide iso-
low thermal expansion coefficient of indoloquinazolinedione (5 × 10 -6 /
° C) type. This resin layer is made of N-methyl-
A PIQ solution using 2-pyrrolidone as a solvent is applied by spin coating, prebaked at 110 ° C. for 3 minutes, and then exposed,
After patterning by development (developer: tetramethylammonium hydride), it was formed by heat curing at 250 ° C. The thickness of the organic dielectric layer 4 is finally 10 μm.
m. At this time, a space for filling the contact hole of the lower electrode 2 and the contact hole of the main upper electrode 5a later was provided by patterning.

【0031】次に、レジスト形成した後に、下部電極2
と同一の形成方法でCr/Cu/Cr(50nm/10
μm/50nm)の下部電極2のコンタクトホール、主
上部電極5a、副上部電極5bを作製した。
Next, after forming a resist, the lower electrode 2
Cr / Cu / Cr (50 nm / 10
(μm / 50 nm), a contact hole for the lower electrode 2, a main upper electrode 5a, and a sub upper electrode 5b.

【0032】以上の方法で作製した薄膜コンデンサの外
観図を図2に示す。最上層の電極形態は、上部電極5a
と副上部電極5bが繋がっており、無機誘電体3からな
るコンデンサ(これをC1とする)と有機誘電体4から
なるコンデンサ(これをC2とする)は並列接続され、
一つのコンデンサ(これをCとする)として機能する。
FIG. 2 shows an external view of the thin film capacitor manufactured by the above method. The electrode configuration of the uppermost layer is the upper electrode 5a
And the sub upper electrode 5b are connected to each other, and a capacitor made of the inorganic dielectric material 3 (hereinafter C1) and a capacitor made of the organic dielectric material 4 (this is C2) are connected in parallel,
It functions as one capacitor (referred to as C).

【0033】合成静電容量は、C=C1+C2となる。
この場合、比誘電率はTaOxが24であり、ポリイミ
ド系樹脂PIQの3.5に比べて約7倍大きい。また両
者の膜厚は、TaOxが0.5μm、ポリイミド系樹脂
PIQが10μmである。静電容量がC=εr×ε0×
A/dで表されることより、Aを同一とするとC1>C
2の関係となる。C2はC1の1/140と小容量のた
めにC2に比べて、1%以下での微小な範囲での容量調
整も容易であり、上部電極5bの面積を制御することで
調整できる。
The combined capacitance is C = C1 + C2.
In this case, the relative dielectric constant of TaOx is 24, which is about 7 times larger than 3.5 of the polyimide resin PIQ. The film thickness of both is 0.5 μm for TaOx and 10 μm for polyimide resin PIQ. The capacitance is C = εr × ε0 ×
From the expression of A / d, if A is the same, C1> C
2 is obtained. Since C2 has a small capacity of 1/140 of C1, the capacitance can be easily adjusted in a minute range of 1% or less as compared with C2, and can be adjusted by controlling the area of the upper electrode 5b.

【0034】上記方法で作製された薄膜コンデンサは、
コンデンサ部分の割れ、膜剥離も認められず、水に対す
る保護耐性も優れていた。
The thin film capacitor manufactured by the above method is
No cracking or film peeling of the capacitor part was observed, and the protection resistance to water was excellent.

【0035】以上の結果は、少なくとも250℃の低温
度で1%以下での微少な範囲での容量調整が可能な薄膜
コンデンサを作製できることを示している。
The above results show that a thin film capacitor capable of adjusting the capacitance in a minute range of 1% or less at a low temperature of at least 250 ° C. can be manufactured.

【0036】これより、絶縁基板は250℃の温度にお
ける熱歪みが小さな材料であれば、高容量・小型化・容量
調整を兼ね備えた薄膜コンデンサの作製が可能である。
Thus, as long as the insulating substrate is made of a material having a small thermal strain at a temperature of 250 ° C., a thin film capacitor having high capacity, miniaturization, and capacity adjustment can be manufactured.

【0037】(実施例2)次に、図3に示すように、実
施の形態1と同様の手法でパターニングされた2下部電
極を作製した後に、無機誘電体層3としてTaOxをス
パッタ法により基板加熱をせずに0.5μm厚で形成し
た。そしてレジスト形成、エッチング、レジスト剥離の
順に処理、パターニングを行って、副上部5b面積の投
影方向で副上部5b面積以上の面積を有する無機誘電体
層13を作製した。次に有機誘電体層14、主上部電極
5a、副上部電極5bは実施の形態1と同様の方法で作
製した。
(Example 2) Next, as shown in FIG. 3, after forming two lower electrodes patterned by the same method as in the first embodiment, TaOx was used as the inorganic dielectric layer 3 by sputtering. It was formed in a thickness of 0.5 μm without heating. Then, processing and patterning were performed in the order of resist formation, etching, and resist stripping, thereby producing an inorganic dielectric layer 13 having an area equal to or larger than the sub-upper 5b area in the projection direction of the sub-upper 5b area. Next, the organic dielectric layer 14, the main upper electrode 5a, and the sub upper electrode 5b were manufactured in the same manner as in the first embodiment.

【0038】無機誘電体3からなるコンデンサ(これを
C1とする)と無機誘電体3と有機誘電体4からなるコ
ンデンサ(これをC2とする)は並列接続され、一つの
コンデンサ(これをCとする)として機能する。合成静
電容量は、C=C1+C2となる。C2は無機誘電体3
からなるコンデンサ(これをC2aとする)と有機誘電
体4からなるコンデンサ(これをC2bとする)の直列
接続のために、1/C2=1/C2a+1/C2bとな
る。C2は低誘電率な有機誘電体4からなるC2bに律
速されるために、実施の形態1と同様にC1と比べて1
%以下の微小な容量調整ができる。
A capacitor made of an inorganic dielectric 3 (this is C1) and a capacitor made of an inorganic dielectric 3 and an organic dielectric 4 (C2) are connected in parallel, and one capacitor (C and C2) is connected. Function). The combined capacitance is C = C1 + C2. C2 is an inorganic dielectric 3
/ C2 = 1 / C2a + 1 / C2b because of the series connection of the capacitor made of (C2a) and the capacitor made of the organic dielectric material 4 (C2b). Since C2 is rate-determined by C2b made of the organic dielectric material 4 having a low dielectric constant, as compared with the first embodiment, C2 is 1% lower than C1.
% Can be finely adjusted.

【0039】上記方法で作製された薄膜コンデンサは、
コンデンサ部分の割れ、膜剥離も認められず、水に対す
る保護耐性も優れていた。
The thin film capacitor produced by the above method is
No cracking or film peeling of the capacitor part was observed, and the protection resistance to water was excellent.

【0040】また、上記方法で作製した薄膜コンデンサ
は、無機誘電体3の加工寸法の精度がゆるやかなため
に、製品の歩留まり等の向上に効果があった。
Further, the thin film capacitor manufactured by the above method has an effect on improvement of the product yield and the like because the processing accuracy of the inorganic dielectric 3 is gradual.

【0041】(実施例3)次に下部電極2を二つに分離
した薄膜コンデンサについて、図4、図5に断面図と模
式図を示す。絶縁基板1としては、アルミノボロシリケ
ートガラス基板の肉厚0.5mmのものを用いた。歪点
は650℃である。下部電極2はまずCr/Cuをスパ
ッタ法により各々50nm/1μm作製した後にレジス
ト形成、エッチング、レジスト剥離の順に処理し、パタ
ーニングを行った。パターニング構造は図5に示すよう
に、主下部電極2aと副下部電極2bで構成されてい
る。次にCuメッキによって10μm厚形成した後にC
rを50nm保護膜してパターニングされた主下部電極
2a、副下部電極2bを作製した。次に、無機誘電体層
3としてTaOxをスパッタ法により基板加熱をせずに
0.5μm厚で形成した。そしてレジスト形成、エッチ
ング、レジスト剥離の順に処理、パターニングを行っ
て、主下部電極2aにのみ無機誘電体層3を作製した。
次に有機誘電体層4、上部電極5は実施の形態1と同様
の方法で作製した。
(Embodiment 3) FIGS. 4 and 5 show a sectional view and a schematic view of a thin film capacitor in which the lower electrode 2 is separated into two parts. As the insulating substrate 1, an aluminoborosilicate glass substrate having a thickness of 0.5 mm was used. The strain point is 650 ° C. First, the lower electrode 2 was formed by forming 50 nm / 1 μm of Cr / Cu by sputtering, and then processed by resist forming, etching, and resist peeling in this order, and was patterned. As shown in FIG. 5, the patterning structure includes a main lower electrode 2a and a sub lower electrode 2b. Next, after forming a thickness of 10 μm by Cu plating,
A main lower electrode 2a and a sub-lower electrode 2b were patterned by using a protective film of 50 nm for r. Next, TaOx was formed as the inorganic dielectric layer 3 to a thickness of 0.5 μm by sputtering without heating the substrate. Then, processing and patterning were performed in the order of resist formation, etching, and resist peeling, and the inorganic dielectric layer 3 was formed only on the main lower electrode 2a.
Next, the organic dielectric layer 4 and the upper electrode 5 were manufactured in the same manner as in the first embodiment.

【0042】上記方法で作製した薄膜コンデンサも実施
例1と同様に、合成静電容量がC=C1+C2で表され
る。
The thin film capacitor manufactured by the above method has a combined capacitance represented by C = C1 + C2 as in the first embodiment.

【0043】電極の分離パターニングを初期作製工程で
行うために、製品歩留まりも大きく向上できることが分
かった。また、上記薄膜コンデンサは、コンデンサ部分
の割れ、膜剥離も認められず、水に対する保護耐性も優
れていた。
Since the separation and patterning of the electrodes is performed in the initial manufacturing process, it has been found that the product yield can be greatly improved. In addition, the thin film capacitor did not crack or peel off the capacitor portion, and was excellent in protection resistance to water.

【0044】上記作製方法で、図6に示すように、無機
誘電体3を主下部電極2a上にだけでなく、副下部電極
2b上にも形成した薄膜コンデンサも、コンデンサ部分
の割れ、膜剥離も認められず、水に対する保護耐性も優
れていた。合成静電容量は実施例2と同様で、C2に3
無機誘電体層からなるコンデンサと有機誘電体層4から
なるコンデンサで構成されている。
As shown in FIG. 6, in the above-described manufacturing method, the thin film capacitor in which the inorganic dielectric 3 is formed not only on the main lower electrode 2a but also on the sub lower electrode 2b can be broken or peeled at the capacitor portion. No protection was observed, and the water resistance was excellent. The combined capacitance was the same as in Example 2, and 3
It is composed of a capacitor made of an inorganic dielectric layer and a capacitor made of an organic dielectric layer 4.

【0045】(実施例4)1絶縁基板上に複数個のコン
デンサを設けた構造を有する複合薄膜コンデンサについ
て、図7に模式的に示す。電極、有機誘電体、無機誘電
体材料、製造方法は実施例1と同じである。図7は3個
の薄膜コンデンサの集合体を示してあり、小型化した高
容量な薄膜コンデンサである。個々の薄膜コンデンサの
場合と同様に、複合集合体においてもコンデンサ部分の
割れ、膜剥離も認められず、水に対する保護耐性も優れ
ていた。
Embodiment 4 FIG. 7 schematically shows a composite thin film capacitor having a structure in which a plurality of capacitors are provided on one insulating substrate. The electrodes, organic dielectric, inorganic dielectric material, and manufacturing method are the same as those in the first embodiment. FIG. 7 shows an aggregate of three thin-film capacitors, which is a miniaturized high-capacity thin-film capacitor. As in the case of the individual thin film capacitors, no cracks or film peeling were observed in the capacitor portion in the composite assembly, and the protection resistance to water was excellent.

【0046】また、実施例2、3の方法で作製して得ら
れた複合薄膜コンデンサも、コンデンサ部分の割れ、膜
剥離も認められず、水に対する保護耐性も優れていた。
Also, the composite thin film capacitors produced by the methods of Examples 2 and 3 did not show any cracking or peeling of the capacitor portion, and also had excellent protection resistance to water.

【0047】(実施例5)基板上に複数個のコンデンサ
と複数個のインダクタと複数個の抵抗を設けた構造を有
するLCRフィルタの断面構成を、図8に示す。薄膜コ
ンデンサ6は実施例1〜4の方法を用いて形成された。
ちなみに、有機誘電体層4aを形成した後、インダクタ
8は、めっきで形成した10μm厚のCuを用いた。ま
た、抵抗7は、10μm厚のTaNをスパッタ法で作製
した。次に、有機誘電体層4bを作製した後に各々の薄
膜コンデンサ6、抵抗7、インダクタ8の電極を最上面
層まで、実施例1と同じ方法で引き出した。
Embodiment 5 FIG. 8 shows a cross-sectional structure of an LCR filter having a structure in which a plurality of capacitors, a plurality of inductors, and a plurality of resistors are provided on a substrate. The thin film capacitor 6 was formed by using the method of Examples 1 to 4.
Incidentally, after the formation of the organic dielectric layer 4a, the inductor 8 was made of Cu having a thickness of 10 μm formed by plating. The resistor 7 was formed by sputtering TaN having a thickness of 10 μm. Next, after forming the organic dielectric layer 4b, the electrodes of the thin film capacitor 6, the resistor 7, and the inductor 8 were pulled out to the uppermost layer in the same manner as in Example 1.

【0048】図8では、単体の薄膜コンデンサ6、抵抗
7、インダクタ8を示してあるが、複数個を設けてLC
Rフィルタについて、Q(1/tanδ)値の高周波特
性を調べたところ、Q>100@1GHzの低損失な特
性を示した。
FIG. 8 shows a single thin film capacitor 6, a resistor 7, and an inductor 8, but a plurality of thin film capacitors 6,
When the high frequency characteristics of the Q (1 / tan δ) value of the R filter were examined, it showed a low loss characteristic of Q> 100 @ 1 GHz.

【0049】なお、抵抗の材料がCuの場合について記
述したが、比抵抗が<50μΩ・cmの材料であれば良
く、特にAg,Al,Ag−Pd,Ptが好ましい。
Although the case where the material of the resistor is Cu has been described, a material having a specific resistance of <50 μΩ · cm may be used, and Ag, Al, Ag-Pd, and Pt are particularly preferable.

【0050】また、抵抗の材料がTaNについて記述し
たが、抵抗値が数Ωから数MΩまでの広範囲を取れる材
料であれば良く、特にNi−Cr,Ni−Pが好まし
い。
Although TaN has been described as the material of the resistor, any material having a resistance value in a wide range from several Ω to several MΩ may be used, and Ni—Cr and Ni—P are particularly preferable.

【0051】(実施例6)図9にLCRフィルタのチッ
プ型素子の模式図を示す。実施例5で作製した複数個の
薄膜コンデンサ6、抵抗7、インダクタ8からなるLC
Rフィルタを作製した後に、引き続いて、有機誘電体層
4cと配線9の形成を行い、更に有機誘電体層4dの保
護層を形成した。最後にPb−Snはんだを用いたバン
プとして外部端子10を形成して、チップ型素子11を
作製した。
(Embodiment 6) FIG. 9 is a schematic view of a chip type element of an LCR filter. LC composed of a plurality of thin film capacitors 6, resistors 7, and inductors 8 manufactured in Example 5.
After fabricating the R filter, subsequently, the organic dielectric layer 4c and the wiring 9 were formed, and further, a protective layer of the organic dielectric layer 4d was formed. Finally, the external terminals 10 were formed as bumps using Pb-Sn solder, and the chip-type element 11 was manufactured.

【0052】図10に11チップ型素子が電極配線12
上に搭載された高周波モジュール13を示す。チップ型
素子11は、2×1×0.8mm厚(バンプ厚み除く)
と別部品としてコンデンサ、インダクタを面実装した場
合に比べ、面積で約1/8にできた。LCRフィルタと
しての損失も3%以上向上した。また、250℃の低温
度作製工程のために生産安定性も高く、チップ型素子1
1を95%を超える歩留まりで作製できた。そして、小
型化ができ、かつその性能も電源ノイズの影響を受けに
くい低ノイズの良好なものであった。また、高周波対応
モジュール13は小型のチップ型素子11としてLCR
フィルタを実装した結果、小型化できたのに加え、実装
にかかる手間も1回で済むため、スループットが上がっ
て、低コスト化が実現できた。
FIG. 10 shows that the 11-chip type element has the electrode wiring 12.
The high frequency module 13 mounted thereon is shown. The chip type element 11 is 2 × 1 × 0.8 mm thick (excluding bump thickness)
The area can be reduced to about 1/8 of the case where capacitors and inductors are surface-mounted as separate components. The loss as an LCR filter was improved by 3% or more. In addition, the production stability is high due to the low temperature manufacturing process of 250 ° C.
No. 1 was produced with a yield exceeding 95%. In addition, the size can be reduced, and the performance thereof is low and favorable, which is hardly affected by power supply noise. The high-frequency module 13 is a small chip type device 11 which is an LCR.
As a result of mounting the filter, it was possible to reduce the size and to perform mounting only once, thereby increasing the throughput and reducing the cost.

【0053】[0053]

【発明の効果】本発明によれば、延性、展性、保護耐性
に優れている有機誘電体からなるコンデンサに高い比誘
電率を有する無機誘電体からなるコンデンサを内蔵する
ことが、250℃の低温度作製工程で可能なために、高
容量・小型化した薄膜コンデンサを作製可能である。ま
た、複数個の前記薄膜コンデンサと抵抗、インダクタか
らなるLCRフィルタを用いて、高歩留まり・小型・低
ノイズのチップ型素子、さらに、前記チップを搭載した
小型・低コストの高周波対応モジュールを提供できる。
According to the present invention, it is possible to incorporate a capacitor made of an inorganic dielectric having a high relative dielectric constant into a capacitor made of an organic dielectric excellent in ductility, malleability and protection resistance at a temperature of 250 ° C. Because of the low-temperature fabrication process, it is possible to fabricate high-capacity, miniaturized thin-film capacitors. Further, by using an LCR filter including a plurality of the thin film capacitors, a resistor, and an inductor, it is possible to provide a high-yield, small-size, low-noise chip-type element and a small-size, low-cost, high-frequency-compatible module equipped with the chip. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の薄膜コンデンサの層構成の一例を示す
模式図である。
FIG. 1 is a schematic diagram showing an example of a layer configuration of a thin film capacitor of the present invention.

【図2】本発明の薄膜コンデンサの模式図である。FIG. 2 is a schematic view of a thin film capacitor of the present invention.

【図3】本発明の薄膜コンデンサの層構成の一例を示す
模式図である。
FIG. 3 is a schematic diagram showing an example of a layer configuration of the thin film capacitor of the present invention.

【図4】本発明の薄膜コンデンサの層構成の一例を示す
模式図である。
FIG. 4 is a schematic diagram showing an example of a layer configuration of the thin film capacitor of the present invention.

【図5】本発明の下部電極の模式図である。FIG. 5 is a schematic diagram of a lower electrode of the present invention.

【図6】本発明の薄膜コンデンサの層構成の一例を示す
模式図である。
FIG. 6 is a schematic diagram showing an example of a layer configuration of the thin film capacitor of the present invention.

【図7】本発明の複合薄膜コンデンサの層構成の一例を
示す模式図である。
FIG. 7 is a schematic diagram showing an example of a layer configuration of the composite thin film capacitor of the present invention.

【図8】本発明のLCRフィルタの層構成の一例を示す
模式図である。
FIG. 8 is a schematic diagram illustrating an example of a layer configuration of the LCR filter of the present invention.

【図9】本発明のLCRフィルタとしてのチップ型素子
の一例を示す模式図である。
FIG. 9 is a schematic diagram showing an example of a chip-type element as an LCR filter of the present invention.

【図10】本発明の高周波対応モジュールを示す模式図
である。
FIG. 10 is a schematic diagram showing a high-frequency module according to the present invention.

【符号の説明】[Explanation of symbols]

1…絶縁基板、2…下部電極、2a…主下部電極、2b
…副下部電極、3…無機誘電体層、4、4a、4b、4
c、4d…有機誘電体層、5…上部電極、5a…主上部
電極、5b…副上部電極、6…薄膜コンデンサ、7…抵
抗、8…インダクタ、9…配線、10…外部端子、11
…チップ型素子、12…電極配線、13…高周波対応モ
ジュール。
DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 2 ... Lower electrode, 2a ... Main lower electrode, 2b
... sub lower electrode, 3 ... inorganic dielectric layer, 4, 4a, 4b, 4
c, 4d: organic dielectric layer, 5: upper electrode, 5a: main upper electrode, 5b: sub upper electrode, 6: thin film capacitor, 7: resistor, 8: inductor, 9: wiring, 10: external terminal, 11
... chip type element, 12 ... electrode wiring, 13 ... high frequency compatible module.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 元脇 成久 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 綿引 誠次 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 佐藤 俊也 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 赤嶺 均 東京都小平市上水本町五丁目20番1号 株 式会社日立製作所半導体グループ内 (72)発明者 福本 英士 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 古川 陽子 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 Fターム(参考) 5E082 AB03 CC03 CC13 DD02 DD07 EE23 EE37 FF05 FG03 FG42 LL15  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Naruhisa Motowaki 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Seiji Watahiki Omika-cho, Hitachi City, Ibaraki Prefecture 7-1-1, Hitachi, Ltd., Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Toshiya Sato 7-1-1, Omika-cho, Hitachi, Ibaraki Pref. Hitachi, Ltd. Semiconductor Group, Inc. 5-2-1, Kamizuhoncho, Kodaira City (72) Inventor Eiji Fukumoto 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Hitachi, Ltd. Hitachi Research Laboratory (72) Invention Person Yoko Furukawa 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture F-term in Hitachi Research Laboratory, Hitachi, Ltd. F-term (reference) 5E082 AB03 CC03 CC13 DD02 DD07 EE23 EE37 FF05 FG03 FG42 LL15

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】絶縁基板上に、誘電体膜の積層方向の両面
を電極で挟んだ誘電体層を、複数層形成した薄膜コンデ
ンサであって、前記誘電体層が無機誘電体層と有機誘電
体層で構成されていることを特徴とする薄膜コンデン
サ。
1. A thin film capacitor comprising: a plurality of dielectric layers having both sides in the stacking direction of a dielectric film sandwiched between electrodes formed on an insulating substrate, wherein the dielectric layers are composed of an inorganic dielectric layer and an organic dielectric layer. A thin-film capacitor comprising a body layer.
【請求項2】絶縁基板上に、誘電体膜の積層方向の両面
を電極で挟んだ誘電体層を、複数層設定した薄膜コンデ
ンサであって、無機誘電体層の上面に主上部電極が形成
され、有機誘電体層の上面に副上部電極が並列して形成
されていることを特徴とする薄膜コンデンサ。
2. A thin film capacitor in which a plurality of dielectric layers having both sides in the stacking direction of a dielectric film sandwiched between electrodes are set on an insulating substrate, wherein a main upper electrode is formed on an upper surface of the inorganic dielectric layer. And a sub-upper electrode formed in parallel on the upper surface of the organic dielectric layer.
【請求項3】絶縁基板上に、誘電体膜の積層方向の両面
を電極で挟んだ誘電体層を、複数層設定した薄膜コンデ
ンサであって、無機誘電体層の上面に主上部電極が形成
され、無機誘電体層と有機誘電体層の積層誘電体層の上
面に副上部電極が並列して形成されていることを特徴と
する薄膜コンデンサ。
3. A thin-film capacitor in which a plurality of dielectric layers having both surfaces in a stacking direction of a dielectric film sandwiched between electrodes are set on an insulating substrate, and a main upper electrode is formed on an upper surface of the inorganic dielectric layer. And a sub-upper electrode formed in parallel on an upper surface of a laminated dielectric layer of an inorganic dielectric layer and an organic dielectric layer.
【請求項4】絶縁基板上に、誘電体膜の積層方向の両面
を、電極で挟んだ誘電体層を、複数層設定した薄膜コン
デンサであって、絶縁基板上に主下部電極と副下部電極
が並列して形成され、前記主下部電極の上面に無機誘電
体層が形成され、前記副下部電極の上面に有機誘電体層
が形成されていることを特徴とする薄膜コンデンサ。
4. A thin film capacitor comprising a plurality of dielectric layers sandwiched between electrodes on both sides of a dielectric film in a laminating direction on an insulating substrate, wherein a main lower electrode and a sub lower electrode are provided on the insulating substrate. Are formed in parallel, an inorganic dielectric layer is formed on the upper surface of the main lower electrode, and an organic dielectric layer is formed on the upper surface of the sub lower electrode.
【請求項5】絶縁基板上に、誘電体膜の積層方向の両面
を、電極で挟んだ誘電体層を、複数層設定した薄膜コン
デンサであって、絶縁基板上に主下部電極と副下部電極
が並列して形成され、前記主下部電極の上面に無機誘電
体層が形成され、前記副下部電極の上面に無機誘電体層
と有機誘電体層の積層誘電体層が形成されていることを
特徴とする薄膜コンデンサ。
5. A thin-film capacitor comprising a plurality of dielectric layers sandwiched between electrodes on both sides of a dielectric film in a laminating direction on an insulating substrate, wherein a main lower electrode and a sub-lower electrode are provided on the insulating substrate. Are formed in parallel, an inorganic dielectric layer is formed on the upper surface of the main lower electrode, and a laminated dielectric layer of an inorganic dielectric layer and an organic dielectric layer is formed on the upper surface of the sub lower electrode. Characteristic thin film capacitor.
【請求項6】請求項1〜5のいずれかにおいて、上記絶
縁基板がガラスであることを特徴とする薄膜コンデン
サ。
6. A thin film capacitor according to claim 1, wherein said insulating substrate is glass.
【請求項7】請求項1〜5のいずれかにおいて、上記誘
電体膜が有機絶縁膜であることを特徴とする薄膜コンデ
ンサ。
7. A thin film capacitor according to claim 1, wherein said dielectric film is an organic insulating film.
【請求項8】絶縁基板上に、請求項1〜7のいずれかに
記載の薄膜コンデンサとインダクタと抵抗が複数個搭載
されていることを特徴とする受動素子内蔵電子部品。
8. An electronic component with a built-in passive element, comprising a plurality of thin-film capacitors, inductors and resistors according to claim 1 mounted on an insulating substrate.
【請求項9】請求項8記載の絶縁基板がガラスであるこ
とを特徴とする受動素子内蔵電子部品。
9. An electronic component with a built-in passive element, wherein the insulating substrate according to claim 8 is glass.
【請求項10】請求項1〜9のいずれかに記載の薄膜コ
ンデンサおよび受動素子内蔵電子部品を250℃以下の
温度で製造することを特徴とする薄膜コンデンサおよび
受動素子内蔵電子部品の製造方法。
10. A method for manufacturing a thin film capacitor and a passive element built-in electronic component, wherein the thin film capacitor and the passive element built-in electronic part according to claim 1 are manufactured at a temperature of 250 ° C. or less.
【請求項11】請求項8又は9に記載の受動素子内蔵電
子部品に外部端子を備えたチップ型素子および該チップ
を搭載したことを特徴とする高周波対応モジュール。
11. A high-frequency compatible module, comprising: a chip-type element having an external terminal on the electronic component with a built-in passive element according to claim 8;
【請求項12】請求項1〜11のいずれかにおいて、絶
縁基板上に主下部電極と副下部電極が並列して形成さ
れ、前記主下部電極の上面に形成された誘電体層が、前
記副下部電極の上面に形成された誘電体層より高い誘電
率を有することを特徴とする薄膜コンデンサ。
12. The sub-electrode according to claim 1, wherein a main lower electrode and a sub-lower electrode are formed in parallel on an insulating substrate, and the dielectric layer formed on the upper surface of the main lower electrode comprises A thin film capacitor having a higher dielectric constant than a dielectric layer formed on an upper surface of a lower electrode.
JP2001076998A 2001-03-16 2001-03-16 Thin film capacitors, electronic components with built-in passive elements, and high frequency compatible modules Expired - Fee Related JP4177560B2 (en)

Priority Applications (4)

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JP2001076998A JP4177560B2 (en) 2001-03-16 2001-03-16 Thin film capacitors, electronic components with built-in passive elements, and high frequency compatible modules
PCT/JP2002/001674 WO2002078024A1 (en) 2001-03-16 2002-02-25 Thin film capacitor and thin film electronic component and method for fabricating the same
MYPI20020666 MY128174A (en) 2001-03-16 2002-02-26 Thin film capacitor and thin film electronic component and method for manufacturing the same.
TW91103655A TW594812B (en) 2001-03-16 2002-02-27 Thin film capacitor and thin film electronic component and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001076998A JP4177560B2 (en) 2001-03-16 2001-03-16 Thin film capacitors, electronic components with built-in passive elements, and high frequency compatible modules

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MY (1) MY128174A (en)
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MY128174A (en) 2007-01-31

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