JP4447881B2 - Manufacturing method of interposer - Google Patents

Description

  The present invention relates to an interposer, a manufacturing method thereof, and an electronic apparatus using the interposer.

  Recently, in a digital LSI (Large Scale Integrated circuit) including a microprocessor, the operation speed is increased and the power consumption is reduced.

  In order to operate the LSI stably in the high frequency region of the GHz band at a low voltage, the power supply voltage fluctuation caused by a sudden fluctuation of the load impedance of the LSI is suppressed and the high frequency noise of the power supply is removed. It is extremely important to do.

  Conventionally, by mounting a decoupling capacitor in the vicinity of an LSI or the like mounted on a circuit wiring board, power supply voltage fluctuations have been suppressed and high-frequency noise has been removed. The decoupling capacitor is configured using a substrate separate from the circuit wiring board, and is appropriately mounted on the circuit wiring board.

  However, when the decoupling capacitor is mounted in the vicinity of the LSI mounted on the circuit wiring board, the LSI and the decoupling capacitor are electrically connected via the wiring formed on the circuit wiring board. There is a large inductance due to wiring routing. If a large inductance exists between the LSI and the decoupling capacitor, the power supply voltage fluctuation cannot be sufficiently suppressed, and high frequency noise cannot be sufficiently removed. In order to sufficiently suppress power supply voltage fluctuations and sufficiently remove high-frequency noise, it is required to reduce equivalent series resistance (ESR) and equivalent series inductance (ESL).

In view of this, a technique for providing an interposer with a built-in capacitor between an LSI and a circuit wiring board has attracted attention (Patent Documents 1 to 6).
Japanese Patent Laid-Open No. 4-211191 Japanese Patent Laid-Open No. 7-176453 JP 2001-68583 A JP 2001-35990 A JP 2000-216051 A JP 2002-124771 A

  However, in the techniques described in Patent Documents 1 to 5, in order to embed the through electrode in the substrate, a through hole must be formed in the substrate. Forming the through hole in the substrate is not easy and takes a long time. In the technique described in Patent Document 6, since the green sheet and the conductor are stacked and formed by firing, the manufacturing process is extremely complicated. For this reason, it has been extremely difficult to reduce the cost with these proposed technologies.

  An object of the present invention is to provide an interposer capable of realizing cost reduction, a manufacturing method thereof, and an electronic device using the interposer.

Upper Symbol object includes the steps of forming a first metal layer on a substrate, the first metal layer, forming a second metal layer having an opening, a third in the opening Forming a metal layer; forming a resin film on the second metal layer and the third metal layer; forming a first electrode on the resin film; and on the first electrode Forming a capacitor having the formed dielectric film and a second electrode formed on the dielectric film; forming an insulating film on the resin film and the capacitor; and A first opening that exposes the first electrode in the film and the resin film and reaches the lower surface of the resin film; and a second opening that exposes the second electrode and reaches the lower surface of the resin film. A first through electrode connected to the first electrode is embedded in the first opening. Both the step of embedding a second through electrode connected to the second electrode in the second opening, the step of removing the substrate and the first metal layer, And a step of forming an electrode pad by removing the metal layer to expose the third metal layer.

  As described above, according to the present invention, a support base made of a resin film is formed on a substrate, a capacitor is formed on the support base, and the through electrode is embedded in the support base, and then the substrate is removed. It is not necessary to form a through hole in the substrate. Moreover, since the interposer according to the present invention can be manufactured using a general semiconductor device manufacturing process, the interposer can be easily manufactured. Therefore, according to the present invention, an interposer can be provided at low cost.

  Further, according to the present invention, since an inexpensive interposer can be used, the cost of the electronic device can be reduced.

[First Embodiment]
The interposer and the manufacturing method thereof according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing the interposer according to the present embodiment.

(Interposer)
First, an interposer according to a first embodiment of the present invention will be described with reference to FIG.

  As shown in FIG. 1, a lower electrode 12 is formed by sequentially laminating, for example, a Cr film having a thickness of 300 nm and an Au film having a thickness of 700 nm on a support base material 10 made of a polyimide resin film having a thickness of 5 μm, for example. Is formed.

On the lower electrode 12, for example, a dielectric film 14 made of Ba _X Sr _1-X TiO ₃ (hereinafter referred to as “BST”) having a film thickness of 100 nm is formed.

  On the dielectric film 14, an upper electrode 16 made of, for example, an Au film having a thickness of 100 nm is formed.

  A capacitor 18 having a lower electrode 12, a dielectric film 14, and an upper electrode 16 is formed.

  A protective film 20 made of polyimide having a film thickness of 3 μm, for example, is formed on the entire surface of the support substrate 10 and the capacitor 18.

  In the protective film 20 and the support base material 10, through holes 22 a to 22 c penetrating the protective film 20 and the support base material 10 are formed. The through hole 22 a is formed so as to expose a part of the upper electrode 16. The through hole 22b is formed so that a part of the lower electrode 12 is exposed.

  Embedded in the through holes 22a to 22c are through electrodes 24a to 24c formed by sequentially stacking an Au film, a Ni film, a Ti film, a Cu film, and a Cr film.

  Solder bumps 26 made of, for example, Sn—Ag are formed on the through electrodes 24a to 24c.

  An electrode pad 28 is formed on the lower surface side of the through electrodes 24a to 24c.

  Thus, the interposer 8 according to the present embodiment is configured.

(Interposer manufacturing method)
Next, the method for manufacturing the interposer according to the present embodiment will be described with reference to FIGS. 2 to 5 are process cross-sectional views illustrating the method of manufacturing the interposer according to the present embodiment.

  First, as shown in FIG. 2A, a 200 nm-thick Ti film and a 300 nm-thickness Cu film are stacked on the entire surface of the silicon substrate 30 by, for example, sputtering. Thereby, the adhesion layer 32 composed of the Ti film and the Cu film is formed.

  Next, a photoresist film (not shown) is formed on the entire surface by, eg, spin coating. Thereafter, using a photolithography technique, the photoresist film is patterned into a predetermined shape.

Next, for example, a 1 μm-thick Cu film 34 is formed on the adhesion layer 32 by electroplating using the photoresist film as a mask. When forming the Cu film 34, the adhesion layer 3 2 functions as a seed layer. Thereafter, the photoresist film is peeled off (see FIG. 2B).

  Next, a 200 nm-thickness Ni film and a 500 nm-thickness Au film are sequentially stacked by, for example, sputtering. Thereby, a laminated film composed of the Ni film and the Au film is formed.

  Note that the configuration of the laminated film is not limited to this, and for example, the laminated film may be formed by sequentially laminating a Ti film, a Ni film, and an Au film.

  Next, the laminated film is patterned using a photolithography technique. Thereby, an electrode pad 28 made of a laminated film is formed (see FIG. 2C).

  Next, as shown in FIG. 2D, a photosensitive polyimide resin film 10 is formed on the entire surface. The polyimide resin is provided in a state dissolved in a solvent, that is, in a varnish state. For this reason, the polyimide resin film 10 can be formed by a spin coat method. The conditions for forming the polyimide resin film 10 by spin coating are, for example, a rotation speed of 1000 rpm and a rotation time of 30 seconds.

  Next, using a hot plate, for example, 90 ° C. heat treatment (precure) is performed on the polyimide resin film 10. Thereby, the film thickness of the polyimide resin film 10 becomes, for example, about 10 μm.

  Next, as illustrated in FIG. 3A, openings 22 a to 22 c reaching the electrode pads 28 are formed in the polyimide resin film 10 using a photolithography technique. When the polyimide resin film 10 is exposed, for example, ultraviolet rays are used.

  Next, heat treatment (baking) for curing the polyimide resin film 10 is performed. The heat treatment temperature is, for example, 400 ° C. Thus, a polyimide resin film 10 having a thickness of, for example, about 5 μm is formed.

  Next, a Cr film having a thickness of 300 nm and an Au film having a thickness of 700 nm are sequentially laminated on the entire surface by, eg, sputtering. Thereby, a laminated film composed of a Cr film and an Au film is formed. The laminated film is for forming the lower electrode 12.

  When forming the Cr film constituting the laminated film, a DC sputtering apparatus is used and a bias of about 200 W to 300 W is applied to the substrate. The reason for applying a bias to the substrate when forming the Cr film is as follows. That is, since the film stress in the Cr film is generally very large, when the Cr film is simply formed on the polyimide resin film, the direction of the film stress generated in the Cr film and the direction of the film stress generated in the polyimide resin film 20 are opposite to each other. In this case, the polyimide resin film 20 is cracked. On the other hand, when a Cr film is formed while applying a bias to the silicon substrate 30, the grain growth of Cr is promoted and the film stress generated in the Cr film is alleviated. Therefore, in this embodiment, the Cr film is formed while applying a bias to the silicon substrate 30.

  Next, a photoresist film (not shown) is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film is patterned using a photolithography technique.

  Next, the laminated film is etched by Ar ion milling using the photoresist film as a mask. Thereby, the lower electrode 12 made of a laminated film is formed (see FIG. 3B). Thereafter, the photoresist film is peeled off.

Next, a dielectric film 14 made of BST is formed on the entire surface by sputtering. BST has a relatively large relative dielectric constant (about 1500 in bulk), and is a material useful for forming a small and large-capacity capacitor. The film forming conditions for forming the BST film are, for example, as follows. The substrate temperature is set to 200 ° C., for example. Since the heat resistant temperature of the polyimide resin film 10 is relatively high at about 300 to 400 ° C., no particular problem occurs even when the BST film is formed at such a temperature. The gas pressure in the film forming chamber is, for example, 0.1 Pa. The flow rate ratio between Ar gas and O ₂ gas is, for example, 4: 1. The applied power is 500 W, for example. The film formation time is, for example, 30 minutes. Thus, for example, the dielectric film 14 made of BST having a film thickness of 100 nm, a relative dielectric constant of 100, and a dielectric loss of 1% is formed.

  Next, the dielectric film 14 is patterned into a predetermined shape by Ar ion milling using photolithography technology (see FIG. 3C).

  Next, a 100 nm-thickness Au film is formed on the entire surface by, eg, sputtering. The Au film is for forming the upper electrode 16.

  Next, a photoresist film (not shown) is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film is patterned using a photolithography technique.

  Next, the Au film is patterned into a predetermined shape by Ar ion milling using the photoresist film as a mask. Thereby, the upper electrode 16 made of Au is formed (see FIG. 4A). Thereafter, the photoresist film is peeled off.

  Thus, a capacitor 18 composed of the lower electrode 12, the dielectric film 14, and the upper electrode 16 is formed.

Next, a silane coupling agent (not shown) is applied to the entire surface by, eg, spin coating. As the silane coupling agent, for example, aminopropyltriethoxysilane (NH ₂ (CH ₂ ) ₃ Si (OCH ₂ ) ₃ ) is used. The spin coating conditions are, for example, 1500 rpm and 30 seconds. A silane coupling agent is for improving the adhesiveness with respect to the foundation | substrate of the protective film 20 which consists of a polyimide formed at a post process.

  Next, for example, using a hot plate, heat treatment (curing) for solidifying the silane coupling agent is performed. The heat treatment temperature is, for example, 90 ° C.

  Next, a photosensitive polyimide resin is applied to the entire surface by, eg, spin coating. Thereby, the protective film 20 made of polyimide resin is formed (see FIG. 4B).

  Next, a photoresist film (not shown) is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film is patterned using a photolithography technique.

  Next, the protective film 20 is etched using the photoresist film as a mask. As a result, through holes 22 a to 22 c reaching the electrode pad 28 are formed in the protective film 20. The through hole 22 a is formed so as to expose a part of the upper electrode 16. The through hole 22b is formed so that a part of the lower electrode 12 is exposed.

  Next, for example, a heat treatment (baking) at 400 ° C. is performed on the protective film 20 using, for example, a hot plate. Thus, the protective film 20 having a film thickness of, for example, about 3 μm is formed.

  Next, a Ti film having a thickness of 0.2 μm, a Cu film having a thickness of 0.3 μm, and a Ni film having a thickness of 4 μm are sequentially stacked by, for example, sputtering. Thereby, a laminated film composed of a Ti film, a Cu film, and a Ni film is formed.

  Next, using a photolithography technique, the laminated film in a region excluding the vicinity of the through holes 22a to 22c is removed by etching. Thus, the through electrodes 24a to 24c made of a laminated film are embedded in the through holes 22a to 22c. The through electrode 24 a is electrically connected to the upper electrode 16. The lower electrode 24b is electrically connected to the lower electrode 12 (see FIG. 4C).

  Next, as shown in FIG. 5A, solder bumps 26 made of Su-Ag are formed on the through electrodes 24a to 24c by, for example, plating.

  Next, the silicon substrate 30 is removed by, eg, CMP. When polishing the silicon substrate 30, polishing is performed from the lower surface side of the silicon substrate 30.

  Next, the silicon of the silicon substrate 30 that could not be removed by polishing is removed by etching using, for example, hydrofluoric acid. At this time, the Ti film constituting the adhesion layer 32 is also removed by etching.

  Next, the Cu film constituting the adhesion layer 32 and the Cu film 34 are removed by, for example, wet etching.

  Thus, the interposer 8 according to the present embodiment is manufactured (see FIG. 5B).

  As described above, the interposer according to the present embodiment forms the support base material 10 made of the resin film on the substrate 30, forms the capacitor 18 on the support base material 10, and includes the through electrodes 24 a to 24 c on the support base material 10. The main feature is that the substrate 30 is removed after embedding.

  As described above, the proposed interposer is not easy to manufacture and cost reduction is difficult.

  On the other hand, according to the interposer according to the present embodiment, the support base material 10 made of a resin film is formed on the substrate 30, the capacitor 18 is formed on the support base material 10, and the through electrodes 24a to 24a are formed on the support base material 10. Since the substrate 30 is removed after the 24c is embedded, it is not necessary to form a through hole in the substrate 30. Moreover, since the interposer 8 according to the present embodiment can be manufactured using a general semiconductor device manufacturing process as described above, the interposer can be easily manufactured. Therefore, according to this embodiment, an interposer can be provided at low cost.

(Modification)
Next, a modification of the interposer and the manufacturing method thereof according to the present embodiment will be described with reference to FIG. FIG. 6 is a cross-sectional view showing an interposer according to this modification.

  The interposer according to this modification is mainly characterized in that the support base material 10a is formed of an epoxy resin film.

  As shown in the figure, a support base material 10a is formed of an epoxy resin film.

  Since the epoxy resin is used as the material of the resin film constituting the support base material 10a, it is the same as the interposer according to the first embodiment, and thus the description thereof is omitted.

  Thus, the interposer 8a according to this modification is configured.

  Next, the manufacturing method of the interposer according to the present embodiment will be described with reference to FIG. FIG. 7 is a process cross-sectional view illustrating a method for manufacturing an interposer according to this modification.

  First, the process up to the formation of the electrode pad 28 is the same as the method for manufacturing the semiconductor device according to the present embodiment described above, and therefore the description thereof is omitted (see FIGS. 2A to 2C).

  Next, as shown in FIG. 7A, an epoxy resin film 10a is formed on the entire surface. Since the epoxy resin is provided in a varnish state, it can be applied by a spin coating method. The spin coating conditions are, for example, 2000 rpm and 30 seconds. Thus, for example, an epoxy resin film 10a having a thickness of 10 μm is formed.

  Next, for example, using a hot plate, the epoxy resin film 10a is heat-treated (pre-baked) at 60 ° C., for example.

  Next, as shown in FIG. 7B, openings 22a to 22c reaching the electrode pads are formed in the epoxy resin film 10a by using a photolithography technique.

  Next, heat treatment (baking) for curing the epoxy resin film 10a is performed. The heat treatment temperature is, for example, 300 ° C. Thereby, the film thickness of the epoxy resin film 10a becomes, for example, about 5 μm.

  Since the subsequent steps are the same as those of the method for manufacturing the interposer according to the present embodiment described above, description thereof will be omitted (see FIGS. 3B to 5B).

  Thus, the interposer 8a according to this modification is manufactured (see FIG. 7C).

[Second Embodiment]
An interposer according to a second embodiment of the present invention will be described with reference to FIG. FIG. 8 is a cross-sectional view showing the interposer according to the present embodiment. The same components as those of the interposer according to the first embodiment shown in FIGS. 1 to 7 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  In the interposer according to the present embodiment, the electrode pad 25 made of Au is formed on the upper surface side of the through electrodes 24a to 24c, and the electrode pad 28a made of Au is formed on the lower surface side of the through electrodes 24a to 24c. There are main features.

  As shown in the drawing, an electrode pad 25 made of, for example, a 5 μm Au film is formed on the upper surface side of the through electrodes 24a to 24c. The electrode pad 25 is formed by, for example, a plating method.

  An electrode pad 28a made of an Au film is formed on the lower surface side of the through electrodes 24a to 24c.

  Here, the electrode pads 25 and 28a made of Au are formed on the upper surface side and the lower surface side of the through electrodes 24a to 24c, but only the upper surface side of the through electrodes 24a to 24c or the lower surface side of the through electrodes 24a to 24c. Only the electrode pads 25 and 28a may be formed.

  Solder bumps are not formed on the electrode pads 24a to 24c.

  Thus, the interposer 8b according to the present embodiment is configured.

  As described above, the interposer according to the present embodiment is mainly characterized in that the electrode pads 25 and 28a made of an Au film are formed on the upper surface side and the lower surface side of the through electrodes 24a to 24c. Therefore, when electrode pads (not shown) made of an Au film are formed on a circuit board (not shown), the electrode pads 25 and 28a of the interposer 8b and the electrode pads of the circuit board are connected to the solder bumps. It is possible to perform bonding by Au-Au ultrasonic bonding without using. When electrode pads (not shown) made of Au are formed on a semiconductor element (not shown), solder bumps are used for the electrode pads 25 and 28a of the interposer 8b and the electrode pads of the semiconductor element. It can join by Au-Au ultrasonic bonding, without.

[Third Embodiment]
An interposer according to a third embodiment of the present invention will be described with reference to FIG. FIG. 9 is a cross-sectional view showing the interposer according to the present embodiment. The same components as those of the interposer according to the first or second embodiment shown in FIGS. 1 to 8 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  The interposer according to the present embodiment is mainly characterized in that a spiral inductor 19 is further formed in addition to the capacitor 18.

  As shown in FIG. 9, an opening 23 d reaching the electrode pad 28 is formed in the protective film 20 and the support base material 10.

  A through electrode 24d is embedded in the opening 23d.

  Around the through electrode 24d, a spiral inductor 19 formed in a spiral shape around the through electrode 24 is formed. The spiral inductor 19 is formed using the same conductive film as the upper electrode 16.

  Here, the case where the spiral inductor 19 is formed using the same conductive film as the upper electrode 16 has been described as an example, but the spiral inductor 19 is formed using the same conductive film as the lower electrode 12. Also good.

  The inner end of the spiral inductor 19 is connected to the through electrode 24d. The outer end of the spiral inductor is electrically connected to the through electrode 24a.

  Thus, the interposer 8c according to the present embodiment is configured.

  In this manner, not only the capacitor 18 but also the inductor 19 may be further formed.

[Fourth embodiment]
An electronic device according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 10 is a cross-sectional view illustrating the electronic device according to the present embodiment. The same components as those of the interposer according to the first to third embodiments shown in FIGS. 1 to 9 are denoted by the same reference numerals, and description thereof will be omitted or simplified.

  As shown in FIG. 10, another circuit board 38 is mounted on the circuit board 36. The circuit board 36 is a mother board, for example. The circuit board 38 is, for example, a package board. The electrode pads 40 formed on the upper surface side of the circuit board 36 and the electrode pads 42 formed on the lower surface side of the circuit board 38 are connected by solder bumps 44.

  On the circuit board 38, the interposer 8 according to the first embodiment is mounted. An electrode pad (not shown) formed on the upper surface side of the circuit board 38 and an electrode pad 28 (see FIG. 1) formed on the lower surface side of the interposer 8 are connected by solder bumps 46.

  On the interposer 8, a semiconductor integrated circuit element 48, more specifically, for example, an LSI is mounted. The through electrode 24 (see FIG. 1) of the interposer 8 and an electrode pad (not shown) formed on the lower surface side of the semiconductor integrated circuit element 48 are connected by a solder bump 50.

  Thus, the electronic device according to the present embodiment is configured.

  The electronic device according to the present embodiment is mainly characterized in that the interposer 8 according to the first embodiment is used. As described above, the interposer 8 according to the first embodiment can be manufactured at low cost. For this reason, according to the present embodiment, it is possible to reduce the cost of the electronic device using the inexpensive interposer 8.

  Here, the case where the interposer 8 according to the first embodiment is mounted on the circuit board 38 has been described as an example, but the interposer 8a according to the modification of the first embodiment, the interposer 8b according to the second embodiment, or the third. The interposer 8c according to the embodiment may be mounted on the circuit board 38. When the interposer 8b according to the second embodiment is used, the bonding can be performed by Au-Au ultrasonic bonding without using the solder bumps 46 and 50.

(Modification)
Next, a modification of the electronic device according to the present embodiment will be described with reference to FIG. FIG. 11 is a cross-sectional view showing an electronic device according to this modification.

  The electronic device according to this modification is mainly characterized in that a recess 54 is formed in the circuit board 38 a and the interposer 8 is mounted in the recess 54.

  As shown in FIG. 11, a recess 54 is formed in the circuit board 38a.

  An interposer 8 is mounted in the recess 54. An electrode pad (not shown) formed on the upper surface side of the circuit board 38 and an electrode pad 28 (see FIG. 1) formed on the lower surface side of the interposer 8 are connected by solder bumps 46.

  A semiconductor integrated circuit element 48 is mounted on the interposer 8 and the circuit board 38a. The through electrode 24 (see FIG. 1) of the interposer 8 and an electrode pad (not shown) formed on the lower surface side of the semiconductor integrated circuit element 48 are connected by a solder bump 50. Further, electrode pads (not shown) formed on the circuit board 38 a and electrode pads (not shown) formed on the lower surface side of the semiconductor integrated circuit element 48 are connected by solder bumps 50.

  Thus, an electronic apparatus according to this modification is configured.

  As described above, the recess 54 may be formed in the circuit board 38 a and the interposer 8 may be mounted in the recess 54.

  Here, the case where the interposer 8 according to the first embodiment is mounted in the recess 54 has been described as an example. However, the interposer 8a according to the modification of the first embodiment, the interposer 8b according to the second embodiment, or the third implementation. You may make it mount the interposer 8c by a form in the recessed part 54. FIG.

[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.

  For example, in the above embodiment, the case where a polyimide resin film or an epoxy resin film is used as the resin film constituting the support base material has been described as an example. However, the resin film constituting the support base material is a polyimide resin film or an epoxy resin film. However, any other resin film can be used as appropriate. For example, as a resin film constituting the support substrate, a bismaleimide / triazine (BT) resin film, a polytetrafluoroethylene (PTFE) resin film, a benzocyclobutene (BCB) resin film, an acrylic resin film, or a diallyl phthalate resin film Etc. may be used.

  Moreover, in the said embodiment, although the silicon substrate was used as the board | substrate 30, the material of the board | substrate 30 is not limited to a silicon | silicone, The board | substrate consisting of all other materials can be used suitably. For example, Cu may be used as the material of the substrate 30. A substrate made of Cu can be easily removed by wet etching.

  In the above embodiment, the case where BST is used as the material of the dielectric film 14 has been described as an example. However, the material of the dielectric film 14 is not limited to BST, and any other dielectric film is appropriately used. be able to. For example, a dielectric film made of a complex oxide containing at least one element of Sr, Ba, Pb, Zr, Bi, Ta, Ti, Mg, and Nb may be used.

  Moreover, the material of the lower electrode 12 and the upper electrode 16 is not limited to the said embodiment, All other materials can be used suitably. For example, as the material of the lower electrode 12 and the upper electrode 16, in addition to Au, a film made of Cr, Cu, W, Ni, Pt, Pd, Ru, Ru oxide, Ir, Ir oxide, or Pt oxide is used. May be.

(Appendix 1)
A support substrate made of a resin film;
A dielectric film formed on the support substrate and formed between the first electrode, the second electrode facing the first electrode, and the first electrode and the second electrode A capacitor having
An insulating film formed on the support substrate and the capacitor;
A first through electrode penetrating the insulating film and the support substrate and connected to the first electrode of the capacitor;
An interposer comprising: a second through electrode penetrating the insulating film and the supporting base material and connected to the second electrode of the capacitor.

(Appendix 2) In the interposer described in Appendix 1,
The interposer, wherein the first through electrode and the second through electrode are electrically connected to a plurality of electrode pads formed on a circuit board or a semiconductor element, respectively.

(Appendix 3) In the interposer described in Appendix 1,
The interposer further comprising an inductor formed on the support substrate.

(Appendix 4) In the interposer described in Appendix 3,
The interposer further comprising a third through electrode penetrating the support base material and connected to the inductor.

(Supplementary Note 5) In the interposer according to any one of Supplementary Notes 1 to 4,
The support substrate is composed of a polyimide resin film, an epoxy resin film, a bismaleimide-triazine resin film, a polytetrafluoroethylene resin film, a benzocyclobutene resin film, an acrylic resin film, or a diallyl phthalate resin film. Interposer to do.

(Supplementary note 6) In the interposer according to any one of supplementary notes 1 to 5,
The interposer is characterized in that the dielectric film is made of a composite oxide containing at least one of Sr, Ba, Pb, Zr, Bi, Ta, Ti, Mg, and Nb.

(Supplementary note 7) In the interposer according to any one of supplementary notes 1 to 6,
The first electrode or the second electrode of the capacitor is made of Au, Cr, Cu, W, Ni, Pt, Pd, Ru, Ru oxide, Ir, Ir oxide, or Pt oxide. Characteristic interposer.

(Supplementary note 8) In the interposer according to any one of supplementary notes 1 to 7,
The interposer further comprising solder bumps respectively formed on the first through electrode and the second through electrode.

(Supplementary note 9) In the interposer according to any one of supplementary notes 1 to 7,
The interposer further comprising an electrode pad made of Au formed on an upper surface side or a lower surface side of the first through electrode and the second through electrode.

(Appendix 10)
An electronic device having a circuit board and an interposer mounted on the circuit board,
The interposer includes a support base made of a resin film; a first electrode formed on the support base; a second electrode facing the first electrode; the first electrode; A capacitor having a dielectric film formed between the two electrodes; an insulating film formed on the supporting base material and the capacitor; and passing through the insulating film and the supporting base material; A first through electrode connected to the first electrode; and a second through electrode connected to the second electrode of the capacitor through the insulating film and the support substrate;
The electronic device, wherein the first through electrode and the second through electrode are electrically connected to a plurality of electrode pads formed on the circuit board, respectively.

(Appendix 11)
In the electronic device according to attachment 10,
A semiconductor element mounted on the interposer;
The electronic device, wherein the first through electrode and the second through electrode are electrically connected to a plurality of electrode pads formed in the semiconductor element, respectively.

(Appendix 12)
Forming a resin film on the substrate;
Forming a capacitor having a first electrode, a dielectric film formed on the first electrode, and a second electrode formed on the dielectric film on the resin film;
Forming an insulating film on the resin film and the capacitor;
A first opening that exposes the first electrode to the insulating film and the resin film and reaches the lower surface of the resin film, and a second opening that exposes the second electrode and reaches the lower surface of the resin film. Forming an opening of
A first through electrode connected to the first electrode is embedded in the first opening, and a second through electrode connected to the second electrode is embedded in the second opening. Process,
And a step of removing the substrate.

It is sectional drawing which shows the interposer by 1st Embodiment of this invention. It is process sectional drawing (the 1) which shows the manufacturing method of the interposer by 1st Embodiment of this invention. It is process sectional drawing (the 2) which shows the manufacturing method of the interposer by 1st Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the interposer by 1st Embodiment of this invention. It is process sectional drawing (the 4) which shows the manufacturing method of the interposer by 1st Embodiment of this invention. It is sectional drawing which shows the interposer by the modification of 1st Embodiment of this invention. It is process sectional drawing which shows the manufacturing method of the interposer by the modification of 1st Embodiment of this invention. It is sectional drawing which shows the interposer by 2nd Embodiment of this invention. It is sectional drawing which shows the interposer by 3rd Embodiment of this invention. It is sectional drawing which shows the electronic device by 4th Embodiment of this invention. It is sectional drawing which shows the electronic device by the modification of 4th Embodiment of this invention.

Explanation of symbols

8, 8a to 8c ... interposer 10 ... support substrate, resin film 12 ... lower electrode 14 ... dielectric film 16 ... upper electrode 18 ... capacitor 19 ... spiral inductor 20 ... protective films 22a-22d ... openings, through holes 24a ... 24d ... through electrode 25 ... electrode pad 26 ... solder bump 28 ... electrode pad 30 ... silicon substrate 32 ... adhesion layer 34 ... Cu film 36 ... circuit substrate 38, 38a ... circuit substrate 40 ... electrode pad 42 ... electrode pad 44 ... solder bump 46 ... Solder bump 48 ... Semiconductor integrated circuit element 50 ... Solder bump 54 ... Recess

Claims (2)

Forming a first metal layer on the substrate;
Forming a second metal layer having an opening on the first metal layer;
Forming a third metal layer in the opening;
Forming a resin film on the second metal layer and the third metal layer;
Forming a capacitor having a first electrode, a dielectric film formed on the first electrode, and a second electrode formed on the dielectric film on the resin film;
Forming an insulating film on the resin film and the capacitor;
A first opening that exposes the first electrode to the insulating film and the resin film and reaches the lower surface of the resin film, and a second opening that exposes the second electrode and reaches the lower surface of the resin film. Forming an opening of
A first through electrode connected to the first electrode is embedded in the first opening, and a second through electrode connected to the second electrode is embedded in the second opening. Process,
Removing the substrate and the first metal layer;
Forming an electrode pad by removing the second metal layer to expose the third metal layer. An interposer manufacturing method comprising: The first metal layer includes a stacked structure of a fourth metal layer and a fifth metal layer,
The fourth metal layer and the fifth metal layer are different materials,
The fifth metal layer and the second metal layer are the same material,
In the step of removing the substrate and the first metal layer, the fourth metal layer is removed,
Wherein in the step of forming the electrode pad, manufacturing method of the interposer of claim 1, wherein further removing a metal layer of the fifth.

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