JP2002141669A - Base material for inter-substrate connection and its manufacturing method - Google Patents

Base material for inter-substrate connection and its manufacturing method

Info

Publication number
JP2002141669A
JP2002141669A JP2000333250A JP2000333250A JP2002141669A JP 2002141669 A JP2002141669 A JP 2002141669A JP 2000333250 A JP2000333250 A JP 2000333250A JP 2000333250 A JP2000333250 A JP 2000333250A JP 2002141669 A JP2002141669 A JP 2002141669A
Authority
JP
Japan
Prior art keywords
substrate
base material
conductive
conductive material
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000333250A
Other languages
Japanese (ja)
Inventor
Kiyotaka Tsukada
輝代隆 塚田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2000333250A priority Critical patent/JP2002141669A/en
Publication of JP2002141669A publication Critical patent/JP2002141669A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a base material for inter-substrate connection which joins circuit boards together by a simple structure and gives electric continuity between the circuit boards. SOLUTION: This base material 3 for inter-substrate connection which is interposed between the 1st and 2nd circuit boards 1 and 2 to electrically connect the both to each other is provided with a conductive path formed by burying a conductive material 40 in a base material 8 for adhesion. This conductive path 4 is formed by laminating the conductive material 40 on the base material 8 for adhesion, forming a punch hole by punching specific parts of the conductive material 40 and base material 8 for adhesion with a die cutting punch, and receiving a punching of the conductive material and a punching of the base material for adhesion by an imbedding punch, then lifting the embedding punch, and embedding the punching of the conductive material in the punched hole.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【技術分野】本発明は,回路基板間に介設するための基
板間接続用基材及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for connecting between substrates for interposing between circuit boards and a method for manufacturing the same.

【0002】[0002]

【従来技術】従来,多層プリント配線板を製造するにあ
たっては,導体回路を有する第一,第二回路基板を準備
し,これらの間にプリプレグを介在させて積層圧着する
方法がある。第一,第二回路基板間の電気導通を行うに
あたっては,ドリルにより第一,第二回路基板及びその
間のプリプレグを貫通するスルーホールをあけ,その中
に金属メッキを施していた。発明者は,第一,第二回路
基板間を接着するプリプレグの有効利用を図るべく,プ
リプレグに,上記回路基板間を接着する接着材としての
役割だけでなく,両回路基板間の電気導通を行う役割も
付与することに着想した。
2. Description of the Related Art Conventionally, in manufacturing a multilayer printed wiring board, there is a method in which first and second circuit boards having a conductive circuit are prepared, and a prepreg is interposed between the circuit boards and laminated and pressed. In conducting electric conduction between the first and second circuit boards, a through-hole penetrating through the first and second circuit boards and the prepreg therebetween is drilled, and metal plating is performed therein. In order to effectively use the prepreg for bonding between the first and second circuit boards, the inventor has not only provided the prepreg with a function as an adhesive for bonding between the circuit boards, but also provided an electrical connection between the two circuit boards. I thought of giving roles to perform.

【0003】[0003]

【解決しようとする課題】本発明は,回路基板間を簡易
な構造により接合するとともに回路基板間の電気導通を
行うことができる基板間接続用基材及びその製造方法を
提供しようとするものである。
SUMMARY OF THE INVENTION The present invention aims to provide a substrate for connection between boards which can join circuit boards by a simple structure and can conduct electricity between circuit boards, and a method of manufacturing the same. is there.

【0004】[0004]

【課題の解決手段】請求項1の発明は,第一,第二回路
基板の間に介設して両者間の接着と電気導通とを行うた
めの基板間接続用基材であって,上記基板間接続用基材
は,接着用基材に導電材を埋め込んでなる導電路を設け
ていることを特徴とする基板間接続用基材である。
According to a first aspect of the present invention, there is provided a base material for inter-substrate connection between a first circuit board and a second circuit board for performing adhesion and electrical conduction between the first and second circuit boards. The substrate for connection between substrates is a substrate for connection between substrates, wherein a conductive path formed by embedding a conductive material in a substrate for adhesion is provided.

【0005】本発明の基板間接続用基材は,従来専ら回
路基板間を接着するために用いられていた接着用基材
に,第一,第二回路基板間の電気導通を行うための導電
路を形成したものである。したがって,接着用基材の上
下に第一,第二回路基板を積層することによって,基板
間接続用基材は,回路基板間の接着と導通の双方を行う
ことができる。したがって,本発明によれば,簡易な構
造により第一,第二回路基板間の接着と電気導通の双方
を行うことができる。
[0005] The substrate for connection between the substrates of the present invention is a conductive material for electrical conduction between the first and second circuit boards, which is used for bonding between the first and second circuit boards. A road is formed. Therefore, by laminating the first and second circuit boards above and below the bonding substrate, the substrate-to-substrate connecting substrate can perform both bonding and conduction between the circuit boards. Therefore, according to the present invention, both adhesion and electrical conduction between the first and second circuit boards can be performed with a simple structure.

【0006】請求項2の発明のように,上記導電材にお
ける少なくとも上下端は,低融点導電材料からなること
が好ましい。これにより,接着用基材が,第一,第二回
路基板の導体回路に対して強く接着して,導電路の導電
性が高くなる。上記低融点導電材料は,基板間接続用基
材を第一,第二回路基板の間に介在させてこれらを加熱
圧着するときの温度よりも低い温度を融点とする導電材
料であり,例えば,半田,導電性接着材などがある。導
電性接着材は,樹脂に金属粒子を添加したものである。
It is preferable that at least the upper and lower ends of the conductive material are made of a low melting point conductive material. As a result, the bonding base material is strongly bonded to the conductor circuits of the first and second circuit boards, and the conductivity of the conductive path is increased. The low-melting-point conductive material is a conductive material whose melting point is lower than the temperature at which the base material for connecting the substrates is interposed between the first and second circuit boards and these are heated and pressed. Solder, conductive adhesive, etc. The conductive adhesive is obtained by adding metal particles to a resin.

【0007】導電材の上下端にのみ低融点導電材料を設
け,その他の部分(例えば中心部)は,低融点導電材料
よりも高い融点を持つ高融点導電材料を設けていてもよ
い。高融点導電材料としては,たとえば,銅,アルミニ
ウム,ニッケルなどがある。また,導電材のすべてが,
上記低融点導電材料であってもよい。
A low melting point conductive material may be provided only at the upper and lower ends of the conductive material, and a high melting point conductive material having a higher melting point than the low melting point conductive material may be provided at other portions (for example, at the center). Examples of the high melting point conductive material include copper, aluminum, and nickel. Also, all of the conductive materials
The low melting point conductive material may be used.

【0008】接着用基材としては,ガラスクロスに絶縁
性樹脂を含浸させたプリプレグを用いることが好まし
い。これにより,第一,第二回路基板を強固に接着する
ことができる。
It is preferable to use a prepreg in which an insulating resin is impregnated in a glass cloth as the bonding substrate. Thereby, the first and second circuit boards can be firmly bonded.

【0009】上記絶縁性樹脂としては,エポキシ系樹
脂,フェノール樹脂,ビスマレイミドトレアジン樹脂,
ポリフェニレン樹脂,ポリフェニレンエーテル樹脂,ポ
リイミド系樹脂などの熱硬化性樹脂あるいはそれらの混
合物を用いることができる。接着用基材には,ガラスク
ロス,無機フィラーなどの補強材を含んでいてもよい。
As the insulating resin, epoxy resin, phenol resin, bismaleimidetreazine resin,
Thermosetting resins such as polyphenylene resin, polyphenylene ether resin, and polyimide resin, or a mixture thereof can be used. The bonding substrate may include a reinforcing material such as a glass cloth or an inorganic filler.

【0010】上記ガラスクロスは,X方向と,該X方向
と直交するY方向の2方向にガラスファイバーの繊維束
を織り込んだものである。接着用基材は,樹脂の種類に
よって,硬化により収縮する性質を有する場合がある。
この場合,導電路の位置ズレ防止のため,接着用基材の
寸法制御をすることが好ましい。
The above-mentioned glass cloth is made by weaving fiber bundles of glass fibers in two directions, an X direction and a Y direction orthogonal to the X direction. The adhesive base material may have a property of contracting upon curing depending on the type of resin.
In this case, it is preferable to control the size of the bonding base material in order to prevent the conductive paths from being displaced.

【0011】具体的には,X方向に配置される繊維の容
積とY方向に配置される繊維の容積との差は5体積%以
下であることが好ましい。5体積%を超える場合には,
接着用基材の収縮率が,X方向とY方向とで相違し,導
電路が位置ズレを生じるおそれがあるからである。更
に,繊維の径もX方向,Y方向で同じ径を使用するのが
好ましい。更に繊維径も小さいほうが好ましい。これに
より,絶縁樹脂との接着面積を同じくすることができ,
接着面積を増やすことができる。
Specifically, the difference between the volume of the fibers arranged in the X direction and the volume of the fibers arranged in the Y direction is preferably 5% by volume or less. If it exceeds 5% by volume,
This is because the shrinkage rate of the bonding base material differs between the X direction and the Y direction, and the conductive paths may be displaced. Further, it is preferable to use the same fiber diameter in the X direction and the Y direction. Further, it is preferable that the fiber diameter is small. As a result, the bonding area with the insulating resin can be made the same,
The bonding area can be increased.

【0012】また,他の寸法制御の方法として,接着用
基材に無機フィラーを30〜80重量%添加する方法も
ある。30重量%未満の場合には,接着用基材のX−Y
方向の収縮率が大幅に異なるおそれがある。80重量%
を超える場合には,接着用基材の接着力が低下するおそ
れがある。
As another method of controlling the size, there is a method of adding 30 to 80% by weight of an inorganic filler to an adhesive substrate. If the amount is less than 30% by weight, the bonding substrate XY
There is a possibility that the shrinkage in the directions may be significantly different. 80% by weight
If the ratio exceeds the above range, the adhesive strength of the adhesive substrate may decrease.

【0013】第一回路基板および第二回路基板は,たと
えば,導体回路を有し,該導体回路の一部は上記導電路
の上下端に接合している。第一,第二回路基板は,導電
路を通じて電気導通が行われる。導体回路における導電
路と接合している部分には,接続パッドが設けられてい
ることが好ましい。これにより,導電路と導体回路との
間の導電性を向上させることができる。上記接続パッド
は,導電路の上下端の一部または全体を被覆している
が,全体を被覆していることが好ましい。これにより,
導電路と接続パッドとの電気的接続性が確保される。上
記導体回路としては,ランド,ビアホール,配線パター
ンなどがある。
The first circuit board and the second circuit board have, for example, a conductor circuit, and a part of the conductor circuit is joined to upper and lower ends of the conductive path. The first and second circuit boards are electrically connected through the conductive path. It is preferable that a connection pad is provided at a portion of the conductive circuit that is connected to the conductive path. Thereby, the conductivity between the conductive path and the conductive circuit can be improved. The connection pad covers part or all of the upper and lower ends of the conductive path, but preferably covers the entirety. This gives
Electrical connection between the conductive path and the connection pad is ensured. The conductor circuit includes a land, a via hole, a wiring pattern, and the like.

【0014】上記第一回路基板または/及び上記第二回
路基板における上記基板間接続用基材に対向する側の表
面には,電子部品が搭載されていることが好ましい。こ
れにより,部品の高密度実装を実現することができる。
電子部品としては,たとえば,チップキャパシタ,電解
コンデンサ,チップ抵抗体などがある。もちろん,上記
第一回路基板または/及び上記第二回路基板における上
記基板間接続用基材に対向する側と反対側の表面に,電
子部品を搭載してもよい。
It is preferable that an electronic component is mounted on a surface of the first circuit board and / or the second circuit board on a side facing the inter-substrate connection base material. Thereby, high-density mounting of components can be realized.
Examples of the electronic component include a chip capacitor, an electrolytic capacitor, and a chip resistor. Of course, an electronic component may be mounted on the surface of the first circuit board and / or the second circuit board opposite to the side facing the inter-substrate connection base material.

【0015】請求項3の発明は,第一,第二回路基板間
の電気導通を行うための導電路を有するとともに,上記
第一,第二回路基板間を接着するための基板間接続用基
材を製造する方法であって,上記導電路を形成するにあ
たっては,接着用基材及び導電材を積層し,打抜き用パ
ンチにて導電材及び接着用基材の所定部分を打ち抜いて
打抜き穴を形成するとともに,上記接着用基材の打抜き
片及び上記導電材の打抜き片を埋込み用パンチにて受け
止め,その後,該埋込み用パンチを接着用基材の打抜き
穴に近づけて,上記導電材の打抜き片を上記打抜き穴の
中に埋め込むことを特徴とする基板間接続用基材の製造
方法である。
According to a third aspect of the present invention, there is provided a board for connecting between the first and second circuit boards, the board having a conductive path for electrical conduction between the first and second circuit boards. In the method of manufacturing a material, in forming the conductive path, a bonding material and a conductive material are laminated, and a predetermined portion of the conductive material and the bonding material is punched out with a punch to form a punched hole. Forming and receiving the punched piece of the bonding base material and the punched piece of the conductive material with an embedding punch, and then bringing the embedding punch close to the punched hole of the bonding base material to punch the conductive material. A method of manufacturing a base material for connection between substrates, comprising embedding a piece into the punched hole.

【0016】本製造方法においては,積層した接着用基
材及び導電材に対して,打抜き用パンチによるプレスを
行うことにより,これらに打抜き穴とその打抜き片を形
成し,続いて埋込み用パンチにより導電材の打抜き片を
接着用基材の打抜き穴内に埋め込んでいる。これによ
り,接着用基材に,導電材の打抜き片からなる導電路が
形成される。このような打抜き加工により,簡易に導電
路を形成することができる。
In the present manufacturing method, a punched punch and a punched piece are formed in the laminated bonding base material and the conductive material by pressing with a punch for punching, and the punched hole and the punched piece are subsequently formed. A punched piece of a conductive material is embedded in a punched hole of the bonding base material. As a result, a conductive path made of a punched piece of a conductive material is formed on the bonding substrate. By such a punching process, a conductive path can be easily formed.

【0017】接着用基材に積層する導電材は,たとえ
ば,導電性のある導電性シートである。導電性シートと
しては,銅箔,ハンダ箔,金属粉末が樹脂の中に分散し
た導電性フィルム,加圧によって導電性を発揮する異方
性導電性フィルムなどを用いることができる。また,導
電材は,ハンダを用いることが好ましい。比較的低温で
溶融するため,接続パッドと融着しやすいからである。
The conductive material laminated on the bonding substrate is, for example, a conductive sheet having conductivity. Examples of the conductive sheet include a copper foil, a solder foil, a conductive film in which a metal powder is dispersed in a resin, and an anisotropic conductive film that exhibits conductivity when pressed. Further, it is preferable to use solder as the conductive material. This is because they are melted at a relatively low temperature and are easily fused to connection pads.

【0018】接着用基材の厚みBに対する上記導電性シ
ートの厚みAの比率(A/B)は,0.7〜1.5であ
ることが好ましい。これにより,埋め込まれた導電材の
厚みが,接着用基材の打抜き穴の長さとほぼ同じにな
り,第一,第二回路基板を積層したときに,導電材の上
下端がこれらの回路基板の接続パッドに確実に接合す
る。このため,導電信頼性の高い多層プリント配線板を
形成することができることになる。溶融し易い金属導体
では上記比率(A/B)が0.7〜1.2であることが
より好ましい結果となる。1.2を超えると溶融した金
属が水平方向に流れ易くなり,隣接する他の電極と接続
し易くなり,ショート不良となることが有るからであ
る。一方,導電性金属入りの樹脂フィルムの如く,柔らか
くなる導電性材料では,ながれにくいため,上記比率
(A/B)が1〜1.5であることが好ましい。
The ratio (A / B) of the thickness A of the conductive sheet to the thickness B of the bonding substrate is preferably 0.7 to 1.5. As a result, the thickness of the embedded conductive material becomes substantially the same as the length of the punched hole of the bonding substrate, and when the first and second circuit boards are laminated, the upper and lower ends of the conductive material are connected to these circuit boards. To the connection pad. For this reason, it is possible to form a multilayer printed wiring board having high conductive reliability. It is more preferable that the ratio (A / B) of the metal conductor that is easily melted be 0.7 to 1.2. If the ratio exceeds 1.2, the molten metal easily flows in the horizontal direction, and is easily connected to another adjacent electrode, which may cause a short circuit. On the other hand, in the case of a soft conductive material such as a resin film containing a conductive metal, the ratio (A / B) is preferably 1 to 1.5 because the material does not easily flow.

【0019】上記基板間接続用基材を介設して第一,第
二回路基板を積層圧着するにあたっては,上記導電路の
上下端に第一,第二回路基板の上記導体回路の少なくと
も一部を接触させた状態で加熱することが好ましい。こ
れにより,加熱圧着の際に,導電材の上下端に対して導
体回路が密着する。このため,溶融した接着用基材が導
電材と導体回路との間に侵入することがない。このた
め,導電路と導体回路とを確実に接続することができ
る。
When the first and second circuit boards are laminated and pressure-bonded with the inter-substrate connecting base material interposed therebetween, at least one of the conductor circuits of the first and second circuit boards is placed on the upper and lower ends of the conductive path. It is preferable to heat with the parts in contact. As a result, the conductor circuit comes into close contact with the upper and lower ends of the conductive material at the time of thermocompression bonding. For this reason, the molten adhesive base material does not enter between the conductive material and the conductive circuit. Therefore, the conductive path and the conductor circuit can be reliably connected.

【0020】[0020]

【発明の実施の形態】実施形態例1 本発明の実施形態に係る基板間接続用基材及びその製造
方法について,図1〜図3を用いて説明する。本例の基
板間接続用基材3は,図1に示すごとく,第一,第二回
路基板1,2の間に介設して両者間の接着と電気導通を
行うものである。基板間接続用基材3は,接着用基材8
に導電材40を埋め込んでなる導電路4を設けている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A substrate for connection between substrates and a method for manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, the board-to-board connection base material 3 of this embodiment is provided between the first and second circuit boards 1 and 2 to perform adhesion and electrical conduction therebetween. The base material 3 for connection between boards is made of a base material 8 for bonding.
A conductive path 4 in which a conductive material 40 is embedded is provided.

【0021】上記基板間接続用基材3の製造方法につい
て説明する。まず,接着用基材8としては,ガラスクロ
スにエポキシ樹脂を含浸させてなるプリプレグを用い
る。次に,この接着用基材8に導電路4を形成する。導
電路4の形成にあたっては,図2(a)に示すごとく,
接着用基材8の上に,導電材40を形成するためのハン
ダ箔400を積層する。接着用基材8の厚みは,0.0
6mmであり,ハンダ箔400の厚みは0.07mmで
あって,両者はほぼ同じ厚みである。次いで,これらを
ダイ7の上に載置する。ダイ7は,接着用基材8の導電
路形成部分に対応する部分にガイド穴70を有する。ガ
イド穴70の形状は,導電路の軸方向と垂直な断面形状
とほぼ同じである。ガイド穴70の上下の位置に,打抜
き用の上パンチ81と埋込み用の下パンチ82が上下方
向に可動なように配置されている。打抜き前の段階で
は,ダイ7よりも上側に上パンチ81を,ダイより下側
に下パンチ82を配置させる。
A method of manufacturing the substrate 3 for connecting substrates will be described. First, a prepreg formed by impregnating a glass cloth with an epoxy resin is used as the bonding substrate 8. Next, the conductive path 4 is formed in the bonding substrate 8. In forming the conductive path 4, as shown in FIG.
A solder foil 400 for forming the conductive material 40 is laminated on the bonding base 8. The thickness of the bonding substrate 8 is 0.0
6 mm, the thickness of the solder foil 400 is 0.07 mm, and both are almost the same thickness. Next, these are placed on the die 7. The die 7 has a guide hole 70 at a portion corresponding to the conductive path forming portion of the bonding base material 8. The shape of the guide hole 70 is substantially the same as the cross-sectional shape perpendicular to the axial direction of the conductive path. An upper punch 81 for punching and a lower punch 82 for embedding are arranged at positions above and below the guide hole 70 so as to be vertically movable. In the stage before punching, the upper punch 81 is arranged above the die 7 and the lower punch 82 is arranged below the die.

【0022】次に,図2(b)に示すごとく,上パンチ
81を下方に移動させ,ダイ7上に載置されている接着
用基材8及び銅箔400を円形状に打ち抜いて,それぞ
れに打抜き穴801,401を形成する。打ち抜いて形
成された接着用基材8及び銅箔400の打抜き片80
2,402は,下パンチ82により受け止められる。
Next, as shown in FIG. 2B, the upper punch 81 is moved downward, and the bonding base material 8 and the copper foil 400 placed on the die 7 are punched out in a circular shape. Then, punch holes 801 and 401 are formed. The bonding base material 8 formed by punching and the punched pieces 80 of the copper foil 400
2, 402 are received by the lower punch 82.

【0023】次いで,図2(c)に示すごとく,上パン
チ81を上方向にスライドさせ,その下面を接着用基材
8の上面の高さまで戻す。また,これにともない,下パ
ンチ82を上方向にスライドさせ,その上に載置されて
いる銅箔400の打抜き片402を,接着用基材8の打
抜き穴801の中に埋め込む。銅箔400の打抜き片4
02の下に配置されている接着用基材8の打抜き片80
2は,取り去る。これにより,接着用基材8に,銅箔4
00の打抜き片402からなる導電性材料40を埋め込
んだ導電路4が形成される。以上により基板間接続用基
材3が得られる。
Next, as shown in FIG. 2C, the upper punch 81 is slid upward, and the lower surface thereof is returned to the level of the upper surface of the bonding base material 8. At the same time, the lower punch 82 is slid upward, and the punched piece 402 of the copper foil 400 placed thereon is embedded in the punched hole 801 of the bonding base material 8. Punched piece 4 of copper foil 400
02 of the bonding base material 8 disposed under the base material 02
2 remove. Thereby, the copper foil 4
The conductive path 4 is formed by embedding the conductive material 40 composed of the punched pieces 402 of 00. As described above, the substrate 3 for connecting between substrates is obtained.

【0024】図3に示すごとく,上記基板間接続用基材
3を介設して第一,第二回路基板1,2を積層すると,
多層プリント配線板9が得られる。第一,第二回路基板
1,2は,導体回路51,52を有している。第一回路
基板1に設けた導体回路51は,絶縁基板7の上下面に
形成した配線パターン511と,ビアホール512とを
有する。配線パターン511は,接続パッド510と接
続している。第二回路基板2に設けた導体回路52は,
絶縁基板7の上下面に形成した配線パターン521と,
ビアホール522とを有する。配線パターン521は,
接続パッド520と接続している。
As shown in FIG. 3, when the first and second circuit boards 1 and 2 are laminated with the inter-substrate connecting base material 3 interposed therebetween,
The multilayer printed wiring board 9 is obtained. The first and second circuit boards 1 and 2 have conductor circuits 51 and 52, respectively. The conductor circuit 51 provided on the first circuit board 1 has a wiring pattern 511 formed on the upper and lower surfaces of the insulating substrate 7 and a via hole 512. The wiring pattern 511 is connected to the connection pad 510. The conductor circuit 52 provided on the second circuit board 2 is
A wiring pattern 521 formed on the upper and lower surfaces of the insulating substrate 7;
And a via hole 522. The wiring pattern 521 is
It is connected to the connection pad 520.

【0025】第一回路基板1における接着用基材8に対
向する側の表面には,導電路4の上下端に接合する接続
パッド510を設けている。導電路4と配線パターン5
11との間の電気導通は,接続パッド510を通じて行
われる。第二回路基板2における接着用基材8に対向す
る側の表面には,導電路4の上下端に接合する接続パッ
ド520を形成している。導電路4と配線パターン52
1との間の電気導通は,接続パッド520を通じて行わ
れる。第二回路基板2における接着用基材8に対向する
側の表面には,電解コンデンサなどの電子部品6が搭載
されている。第一,第二回路基板1,2に設けたビアホ
ール512,522の中には絶縁樹脂材料60が充填さ
れている。
On the surface of the first circuit board 1 on the side facing the bonding substrate 8, connection pads 510 to be joined to the upper and lower ends of the conductive path 4 are provided. Conductive path 4 and wiring pattern 5
Electrical connection with the connection pad 11 is made through the connection pad 510. On the surface of the second circuit board 2 on the side facing the bonding substrate 8, connection pads 520 are formed which are joined to the upper and lower ends of the conductive path 4. Conductive path 4 and wiring pattern 52
1 is conducted through the connection pad 520. An electronic component 6 such as an electrolytic capacitor is mounted on the surface of the second circuit board 2 on the side facing the bonding substrate 8. The insulating resin material 60 is filled in the via holes 512 and 522 provided in the first and second circuit boards 1 and 2.

【0026】第一回路基板1を形成するにあたっては,
図1に示すごとく,第一回路基板1用の絶縁基板7とし
て,ガラスクロス・ビスマレイミドトリアジンなどの複
合樹脂材料を準備し,その両面に銅箔を貼着する。次い
で,サブトラクト法またはアディティブ法などにより,
配線パターン511を形成する。この際,絶縁基板7に
おける導電路4に対応する部分に接続パッド510を形
成する。また,絶縁基板7にドリルなどにより穴あけを
行い,内壁にめっきを施して導通性を付与してビアホー
ル512を形成する。ビアホール512の中に,絶縁樹
脂材料60を充填する。また,絶縁基板7における接着
用基材8に対応する側に,電解コンデンサなどの電子部
品6を接合する。これにより,第一回路基板1を得る。
In forming the first circuit board 1,
As shown in FIG. 1, a composite resin material such as glass cloth / bismaleimide triazine is prepared as an insulating substrate 7 for the first circuit board 1, and copper foils are adhered to both surfaces thereof. Then, by the subtraction method or the additive method,
The wiring pattern 511 is formed. At this time, connection pads 510 are formed in portions of the insulating substrate 7 corresponding to the conductive paths 4. In addition, a hole is formed in the insulating substrate 7 with a drill or the like, and plating is applied to the inner wall to impart conductivity, thereby forming a via hole 512. The insulating resin material 60 is filled in the via hole 512. Further, an electronic component 6 such as an electrolytic capacitor is joined to a side of the insulating substrate 7 corresponding to the bonding substrate 8. Thereby, the first circuit board 1 is obtained.

【0027】第二回路基板2を形成するにあたっては,
上記第一回路基板と同様に,第二回路基板2用の絶縁基
板7に配線パターン521を形成する。この際,絶縁基
板7における導電路4に対応する部分に,接続パッド5
20を形成する。また,絶縁基板7にビアホール522
を形成する。これにより,第二回路基板2を得る。
In forming the second circuit board 2,
Similarly to the first circuit board, a wiring pattern 521 is formed on the insulating substrate 7 for the second circuit board 2. At this time, a connection pad 5 is provided on a portion of the insulating substrate 7 corresponding to the conductive path 4.
20 is formed. Also, a via hole 522 is formed in the insulating substrate 7.
To form Thereby, the second circuit board 2 is obtained.

【0028】上記第一,第二回路基板1,2間に上記基
板間接続用基材3を介設して多層プリント配線板を形成
するにあたっては,図1に示すごとく,下から順に,第
二回路基板2,基板間接続用基材3,第一回路基板1,
基板間接続用基材3及び第二回路基板2を積層し,厚み
方向に4MPaで加圧する。これにより,基板間接続用
基材3における導電路4の上下端に,第一,第二回路基
板1,2に形成した導体回路の一部である接続パッド5
10,520が接触する。この状態で,これらを190
℃にて加熱する。すると,基板間接続用基材3における
接着用基材8が,第一,第二回路基板1,2に対して溶
着する。その後,加熱を停止すると,接着用基材8は硬
化する。以上により,図3に示す多層プリント配線板9
が得られる。
In forming a multi-layer printed wiring board with the inter-substrate connecting substrate 3 interposed between the first and second circuit boards 1 and 2, as shown in FIG. Two circuit board 2, base material for connection between boards 3, first circuit board 1,
The inter-substrate connection base material 3 and the second circuit board 2 are stacked and pressed at 4 MPa in the thickness direction. As a result, the connection pads 5, which are a part of the conductor circuits formed on the first and second circuit boards 1 and 2, are provided on the upper and lower ends of the conductive paths 4 in the substrate 3 for connecting substrates.
10,520 contact. In this state,
Heat at ° C. Then, the bonding substrate 8 in the substrate-to-substrate connecting substrate 3 is welded to the first and second circuit boards 1 and 2. Thereafter, when heating is stopped, the bonding base material 8 is cured. As described above, the multilayer printed wiring board 9 shown in FIG.
Is obtained.

【0029】本例の基板間接続用基材3は,接着用基材
8に導電路4を形成したものであり,基板接着材として
の役割だけでなく,電気導電路としての役割も備えてい
る。このため,基板間接続用基材3を第一,第二回路基
板1,2間に介設することにより,基板接着と電気導通
の双方を行うことができる。また,導電路4の上下端に
は,接続パッド510,520が配置されているため,
該接続パッドを通じて第一,第二回路基板1,2に設け
た導体回路51,52への電気導通を確実に行うことが
できる。しかも1回の積層を行うことで多層の基板を得
ることができる。本例は,第一回路基板1の上下両側に
それぞれ一の第二回路基板2を積層しているが,片面に
のみ積層してもよく,また二以上の第二回路基板を積層
してもよい。
The inter-substrate connection base material 3 of this embodiment is obtained by forming the conductive path 4 on the bonding base material 8 and has a role not only as a substrate adhesive but also as an electric conductive path. I have. Therefore, by interposing the substrate 3 for connection between the substrates between the first and second circuit boards 1 and 2, both the substrate bonding and the electrical conduction can be performed. Further, since connection pads 510 and 520 are arranged at the upper and lower ends of the conductive path 4,
Electrical conduction to the conductor circuits 51 and 52 provided on the first and second circuit boards 1 and 2 can be reliably performed through the connection pads. In addition, a multilayer substrate can be obtained by performing a single lamination. In this example, one second circuit board 2 is laminated on each of the upper and lower sides of the first circuit board 1. However, the second circuit board 2 may be laminated on only one side, or two or more second circuit boards may be laminated. Good.

【0030】実施形態例2 本例は,図4に示すごとく,接着用基材8に埋め込む導
電材40の上下端は,低融点導電材料層41からなり,
その他の部分は高融点導電材料層42からなる。低融点
導電材料層41は半田であり,高融点導電材料層42は
銅である。上記導電材を形成するにあたっては,図5に
示すごとく,高融点導電材料層42としての銅箔の上下
両側に,低融点導電材料層41としての半田層を形成す
る。半田層はメッキ法または半田箔の貼着により形成す
る。この導電材40を接着用基材8の上に重ね,次いで
実施形態例1と同様にダイ7の上に載置し,上パンチ8
1及び下パンチ82を用いて打抜き,導電材40の打抜
き片を接着用基材8の中に埋め込む。
Embodiment 2 In this embodiment, as shown in FIG. 4, the upper and lower ends of a conductive material 40 embedded in a bonding base material 8 are made of a low-melting-point conductive material layer 41.
Other portions are made of the high melting point conductive material layer 42. The low melting point conductive material layer 41 is made of solder, and the high melting point conductive material layer 42 is made of copper. In forming the above-mentioned conductive material, as shown in FIG. 5, a solder layer as a low-melting conductive material layer 41 is formed on both upper and lower sides of a copper foil as a high-melting conductive material layer. The solder layer is formed by a plating method or by sticking a solder foil. The conductive material 40 is superimposed on the bonding substrate 8 and then placed on the die 7 in the same manner as in the first embodiment.
The first and the lower punches 82 are used for punching, and a punched piece of the conductive material 40 is embedded in the bonding base material 8.

【0031】本例においては,導電材40の上下端に低
融点導電材料41を配置しているため,その上下に第
一,第二回路基板を積層し加熱圧着したときに,導電材
40の上下が溶融して接続パッドと強固に接合する。こ
のため,導電材40と導体回路との導電性が高くなる。
In this embodiment, since the low-melting-point conductive material 41 is disposed at the upper and lower ends of the conductive material 40, the first and second circuit boards are stacked on the upper and lower sides of the conductive material 41, and when the heat-compression bonding is carried out, The upper and lower parts are melted and firmly joined to the connection pad. Therefore, the conductivity between the conductive material 40 and the conductive circuit is increased.

【0032】実施形態例3 本例は,図6に示すごとく,基板間接続用基材3の導電
路4の上下にビアホール512,522を配置させ,ビ
アホール512,導電路4及びビアホール522が連続
して1つのスルーホール5を形成した例である。ビアホ
ール512,522の内壁は金属めっき膜50により被
覆され,その上下開口部に形成されたランド501と接
続している。ビアホール512,522の内部には絶縁
樹脂材料60が充填されている。導電路4は,ビアホー
ル512,522のランド501と接合している。
Embodiment 3 In this embodiment, as shown in FIG. 6, via holes 512 and 522 are arranged above and below a conductive path 4 of a substrate 3 for connection between substrates, and the via hole 512, the conductive path 4 and the via hole 522 are continuous. This is an example in which one through hole 5 is formed. The inner walls of the via holes 512 and 522 are covered with the metal plating film 50 and are connected to lands 501 formed in the upper and lower openings. The inside of the via holes 512 and 522 is filled with the insulating resin material 60. The conductive path 4 is joined to the lands 501 of the via holes 512 and 522.

【0033】本例においては,基板間接続用基材3の導
電路4をスルーホール5の中層として用いている。この
場合にも,導電路4は,その上下のランド501に接合
して,スルーホール5の導電性を高めることができる。
その他,ビアホール512,522の内壁に金属めっき
膜をその内部に絶縁樹脂材料60を設ける代わりに,ビ
アホール512,522の内部全体に導電性材料を充填
すれば,導電材40は,ビアホール内の導電性材料に対
して接合する。この場合には,ビアホールにランドを設
けなくてもよい。
In this embodiment, the conductive path 4 of the substrate 3 for connecting substrates is used as the middle layer of the through hole 5. Also in this case, the conductive path 4 can be joined to the upper and lower lands 501 to enhance the conductivity of the through hole 5.
In addition, instead of providing the metal plating film on the inner walls of the via holes 512 and 522 and the insulating resin material 60 therein, instead of filling the entire inside of the via holes 512 and 522 with a conductive material, the conductive material 40 becomes conductive in the via holes. Bonding to conductive materials. In this case, lands need not be provided in the via holes.

【0034】[0034]

【発明の効果】本発明によれば,回路基板間を簡易な構
造により接合するとともに回路基板間の電気導通を行う
ことができる基板間接続用基材及びその製造方法を提供
することができる。
According to the present invention, it is possible to provide a substrate for connection between substrates, which can join circuit substrates with a simple structure and can conduct electricity between the circuit substrates, and a method of manufacturing the same.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施形態例1における,基板間接続用基材を示
す説明図。
FIG. 1 is an explanatory view showing a substrate for connection between substrates in a first embodiment.

【図2】実施形態例1における,基板間接続用基材の製
造方法の説明図。
FIG. 2 is an explanatory diagram of a method for manufacturing a substrate for connection between substrates according to the first embodiment.

【図3】実施形態例1における,多層プリント配線板の
断面図。
FIG. 3 is a cross-sectional view of the multilayer printed wiring board according to the first embodiment.

【図4】実施形態例2における,基板間接続用基材の断
面図。
FIG. 4 is a cross-sectional view of an inter-substrate connection base material according to a second embodiment.

【図5】実施形態例2における,基板間接続用基材の製
造方法の説明図。
FIG. 5 is an explanatory diagram of a method of manufacturing a substrate for connection between substrates in a second embodiment.

【図6】実施形態例3における,多層プリント配線板の
断面図。
FIG. 6 is a sectional view of a multilayer printed wiring board according to a third embodiment.

【符号の説明】[Explanation of symbols]

1...第一回路基板, 2...第二回路基板, 3...基板間接続用基材, 301,401,70...穴, 302,402...打抜き片, 4...導電路, 40...導電材, 41...低融点導電材料層, 42...高融点導電材料層, 400...銅箔, 51,52...導体回路, 510,520...接続パッド, 511,521...配線パターン, 512,522...ビアホール, 6...電子部品, 60...絶縁樹脂材料, 7...ダイ, 8...接着用基材, 81...上パンチ, 82...下パンチ, 9...多層プリント配線板, 1. . . 1. first circuit board; . . 2. second circuit board; . . Base material for connection between substrates, 301, 401, 70. . . Holes, 302, 402. . . 3. punched pieces; . . Conductive path, 40. . . Conductive material, 41. . . 42. low melting point conductive material layer; . . High melting point conductive material layer, 400. . . Copper foil, 51, 52. . . Conductor circuit, 510, 520. . . Connection pads, 511, 521. . . Wiring pattern, 512, 522. . . Via hole, 6. . . Electronic components, 60. . . 6. Insulating resin material, . . Die, 8. . . Base material for bonding, 81. . . Upper punch, 82. . . Lower punch, 9. . . Multilayer printed wiring board,

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 3/40 H05K 3/40 K ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H05K 3/40 K

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 第一,第二回路基板の間に介設して両者
間の接着と電気導通とを行うための基板間接続用基材で
あって,上記基板間接続用基材は,接着用基材に導電材
を埋め込んでなる導電路を設けていることを特徴とする
基板間接続用基材。
An inter-substrate connection base material provided between a first circuit board and a second circuit board to perform adhesion and electrical conduction between the first and second circuit boards. A substrate for connection between substrates, wherein a conductive path formed by embedding a conductive material in an adhesive substrate is provided.
【請求項2】 請求項1において,上記導電材の少なく
とも上下端は,低融点導電材料からなることを特徴とす
る基板間接続用基材。
2. The base material for connection between substrates according to claim 1, wherein at least upper and lower ends of the conductive material are made of a low melting point conductive material.
【請求項3】 第一,第二回路基板間の電気導通を行う
ための導電路を有するとともに,上記第一,第二回路基
板間を接着するための基板間接続用基材を製造する方法
であって,上記導電路を形成するにあたっては,接着用
基材及び導電材を積層し,打抜き用パンチにて導電材及
び接着用基材の所定部分を打ち抜いて打抜き穴を形成す
るとともに,上記接着用基材の打抜き片及び上記導電材
の打抜き片を埋込み用パンチにて受け止め,その後,該
埋込み用パンチを接着用基材の打抜き穴に近づけて,上
記導電材の打抜き片を上記打抜き穴の中に埋め込むこと
を特徴とする基板間接続用基材の製造方法。
3. A method of manufacturing a substrate for connecting between substrates, having a conductive path for establishing electrical continuity between the first and second circuit boards, and bonding the first and second circuit boards together. In forming the conductive path, a bonding material and a conductive material are laminated, and a predetermined portion of the conductive material and the bonding material is punched by a punch to form a punched hole. The punched piece of the bonding base material and the punched piece of the conductive material are received by the embedding punch, and then the embedding punch is brought close to the punched hole of the bonding base material. A method for producing a substrate for connection between substrates, characterized by being embedded in a substrate.
JP2000333250A 2000-10-31 2000-10-31 Base material for inter-substrate connection and its manufacturing method Pending JP2002141669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000333250A JP2002141669A (en) 2000-10-31 2000-10-31 Base material for inter-substrate connection and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000333250A JP2002141669A (en) 2000-10-31 2000-10-31 Base material for inter-substrate connection and its manufacturing method

Publications (1)

Publication Number Publication Date
JP2002141669A true JP2002141669A (en) 2002-05-17

Family

ID=18809360

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101109389B1 (en) * 2010-04-30 2012-01-30 삼성전기주식회사 A printed circuit board and a method of manufacturing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0437544A (en) * 1990-06-01 1992-02-07 Ibiden Co Ltd Detection mark printing device of printed circuit board
JPH04137743A (en) * 1990-09-28 1992-05-12 Ibiden Co Ltd Electronic component mounting board provided with fail mark
JPH077267A (en) * 1993-06-15 1995-01-10 Nec Toyama Ltd Manufacture of multilayer printed interconnection board
JPH09293950A (en) * 1996-04-26 1997-11-11 Mitsubishi Plastics Ind Ltd Manufacture of thick copper circuit board
JP2000196235A (en) * 1998-10-23 2000-07-14 Suzuki Co Ltd Manufacture of resin sheet having filled via

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0437544A (en) * 1990-06-01 1992-02-07 Ibiden Co Ltd Detection mark printing device of printed circuit board
JPH04137743A (en) * 1990-09-28 1992-05-12 Ibiden Co Ltd Electronic component mounting board provided with fail mark
JPH077267A (en) * 1993-06-15 1995-01-10 Nec Toyama Ltd Manufacture of multilayer printed interconnection board
JPH09293950A (en) * 1996-04-26 1997-11-11 Mitsubishi Plastics Ind Ltd Manufacture of thick copper circuit board
JP2000196235A (en) * 1998-10-23 2000-07-14 Suzuki Co Ltd Manufacture of resin sheet having filled via

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101109389B1 (en) * 2010-04-30 2012-01-30 삼성전기주식회사 A printed circuit board and a method of manufacturing the same

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