JP2002134541A - Semiconductor device and its fabrication method and packaging structure of the device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and its fabrication method and a packaging structure of the semiconductor device, by which stable and inexpensive connections can be supplied without any conduction failure or conduction instability such as short or open even the area is narrowed when the electrode pattern of a circuit board or the protrusion electrode of a semiconductor chip is made high density or narrow pitch. SOLUTION: The semiconductor device has an electrode pad 12 of input- output terminals provided on a semiconductor substrate, an insulation film 6 provided on the semiconductor substrate in order to expose the electrode pad 12, common electrode 14 provided on the electrode pad 12, a protrusion electrode 4 provided on the common electrode 14, and a micro protrusion 18 having a meshed concave and convex at the top of the protrusion electrode 4. The method for manufacturing the semiconductor device and the structure for mounting the semiconductor device are also provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to face-down bonding of a semiconductor chip, and more particularly to a structure of a bump electrode on a semiconductor chip for electrical and mechanical connection and a face-down bonding mounting structure.

[0002]

2. Description of the Related Art In recent years, the pitch between electrodes has become extremely small with the increase in the density of semiconductor chips, and the mounting connection area between a circuit board and a semiconductor chip, that is, the electrode area for connection, tends to decrease. is there. As a typical example, a mounting structure of a semiconductor chip mounted on a liquid crystal display device will be described as an example. First, a mounting structure by COG paste mounting will be described with reference to FIG. 20, and then a semiconductor chip mounting will be described with reference to FIGS. The manufacturing method and the mounting method will be described.

[Structure of mounting semiconductor chip on liquid crystal display device: FIG. 20] A plurality of semiconductors for driving the liquid crystal display device are provided in the expanded region by expanding the peripheral portion of the glass substrate constituting the liquid crystal display device. As a conventional technology in which a chip is mounted, there is chip-on-glass (hereinafter referred to as COG) paste mounting.

Hereinafter, a mounting structure of a semiconductor chip on a liquid crystal display device will be described with reference to FIG. FIG. 20 is a cross-sectional view showing a structure in which a semiconductor chip is mounted on a liquid crystal display device.

[0005] As shown in FIG.
A liquid crystal 48 is sealed in the gap between the four, and indium tin oxide (hereinafter, referred to as “below”) formed on the glass substrate 24 of the liquid crystal display device 38 constituted by a sealing material 54 formed by a printing method using a vacuum evaporation method or a sputtering method. At the same time as forming a pixel pattern with a transparent electrode 46 such as ITO, the peripheral portion of the glass substrate 24 is expanded, and the transparent electrode 46 such as ITO is routed to the expanded region.
A plurality of semiconductor chips 8 for driving the liquid crystal display device 38 are mounted on the wiring.

Copper (Cu) or gold (A) having a height of 5 to 50 μm
The semiconductor chip 8 having the projecting electrode 4 made of u) is mechanically and electrically connected to the transparent electrode 46 formed of ITO on the glass substrate 24 by the conductive adhesive 44. The gap between the semiconductor chip 8 and the glass substrate 24 is formed with a sealing resin 22.

The transparent electrode 4 on the input side on the liquid crystal display device 38
6 further includes wiring of a flexible printed circuit board 32 (hereinafter referred to as an FPC board) and an FPC board 32.
Are electrically and mechanically connected to each other via an anisotropic conductive film 36 that connects them.

[Method of Manufacturing and Mounting Semiconductor Device:
21 to 30] A method of manufacturing a semiconductor chip according to the prior art will be described with reference to FIGS. 21 to 26, and a method of mounting a semiconductor device will be described with reference to FIGS. 27 to 30.

As shown in FIG. 21, the semiconductor substrate 2 is covered with an insulating film 6 such as a silicon nitride film (SiN film) except for a region serving as a pad electrode of the aluminum wiring 12, and is electrically insulated from the outside. ing. A common electrode film 14 which is also a barrier metal layer for preventing metal diffusion and serves as an electrode for electrolytic plating is formed on the entire surface of the semiconductor substrate 2 by using a vacuum evaporation method or a sputtering method.

Next, as shown in FIG. 22, a resist film 26 is formed on the entire surface of the semiconductor substrate 2 and a necessary portion above the aluminum wiring 12 is formed in order to perform electrolytic plating on a portion where a bump electrode is to be formed. Patterning is performed so as to selectively open.

Thereafter, as shown in FIG. 23, copper (Cu) is formed on the common electrode film 14 in the opening of the resist film 26 by electrolytic plating, and then gold (Au) is formed by electrolytic plating. Then, the projection electrode 4 having a mushroom-shaped cross section is formed.

Thereafter, as shown in FIG.
The resist film 26 used as a blocking film for the plating process is removed. Then, as shown in FIG. 25, the common electrode film 14 other than the lower surface region of the bump electrode 4 is removed with an etchant using the bump electrode 4 as a mask.

Finally, as shown in FIG.
By cutting the dicing line (hereinafter referred to as dicing), which is the boundary between adjacent semiconductor chips,
The semiconductor substrate 2 is cut into single semiconductor chips 8.

Next, as shown in FIG. 27, conductive particles such as silver (Ag) or an alloy powder of silver (Ag) and palladium (Pd) are applied to the protruding electrodes 4 formed on the semiconductor chip 8. The mixed epoxy-based conductive adhesive 44 is formed by using a transfer method.

Next, as shown in FIG. 28, a semiconductor chip 8 having a conductive adhesive 44 formed on the bump electrode 4 and a transparent electrode 46 formed on the glass substrate 24 and corresponding to the bump electrode 4 of the semiconductor chip 8 are formed. Align.

After that, as shown in FIG. 29, face-down bonding for connecting the protruding electrode 4 and the transparent electrode 46 with the conductive adhesive 44 is performed, and then the conductive adhesive 44 is thermally cured. Are electrically and mechanically connected.

Since the conductive adhesive 44 usually uses an epoxy adhesive, the curing temperature is 80 ° C. to 120 ° C.
Then, the transparent electrode 46 of the glass substrate 24 and the protruding electrode 4 of the semiconductor chip 8 are bonded and electrically and mechanically connected.

Finally, as shown in FIG. 30, a gap between the semiconductor chip 8 and the glass substrate 24 is filled with a sealing resin 22,
By curing the sealing resin 22, the reliability is further improved.

Further, as shown in FIG. 20, an FPC board 32 is disposed on a transparent electrode 46 on a glass substrate 24 with an anisotropic conductive film 36 mixed with conductive particles interposed therebetween. The FPC board 32 is connected to the glass substrate 24 by applying heat and pressure to the substrate 32 and performing pressure bonding.

The FPC board 32 is in the form of a film in which copper (Cu) wiring electrodes are patterned on a polyimide sheet in order to supply power to the semiconductor chip 8 or to provide an input signal. 80 μm-10
It is about 0 μm.

[0021]

In the prior art described above, the pitch between the protruding electrodes 4 that can be stably connected is about 150 μm. If the pitch between the protruding electrodes 4 becomes smaller than this, the semiconductor chip 8 When the conductive adhesive 44 is transferred to the upper protruding electrode 4, a short-circuit defect between adjacent protruding electrodes 4 occurs due to transfer sagging or the like. Further, due to the variation in the transfer of the conductive adhesive 44, the semiconductor chip 8
The prior art also has a problem that a large number of portions where the conductive adhesive 44 is not transferred to the upper protruding electrode 4 cause an open failure.

[Object of the Invention] An object of the present invention is to solve the above-mentioned problems and to reduce the mounting area when the electrode pattern of the circuit board and the bump electrodes of the semiconductor chip are made dense and narrow. Another object of the present invention is to provide a semiconductor device, a method of manufacturing the same, and a mounting structure of the semiconductor device, which can stably and inexpensively supply a connection without a conduction failure or a conduction instability such as a short circuit or an open circuit.

[0023]

Means for Solving the Problems In order to achieve the above object, the following means are adopted for a semiconductor device, a method of manufacturing the same and a mounting structure of the semiconductor device according to the present invention.

In the semiconductor device of the present invention, an electrode pad serving as an input / output terminal provided on the semiconductor substrate, an insulating film provided on the semiconductor substrate so as to expose the electrode pad, and provided on the electrode pad It is characterized by comprising a common electrode film and a protruding electrode provided on the common electrode film, wherein a fine projection having mesh-like irregularities is provided on the top of the protruding electrode.

In the method of manufacturing a semiconductor device according to the present invention, a step of forming an insulating film on a semiconductor substrate having a pad electrode formed thereon, and selectively opening the insulating film to expose the pad electrode; Forming a common electrode film on the entire surface of the substrate, forming a resist film on the entire surface of the semiconductor substrate, and patterning the resist film having an opening on the pad electrode region by photolithography, Forming a protruding electrode on the common electrode film in the opening of the resist film by plating, and etching the common electrode film so as to leave the common electrode film in a region matching the protruding electrode; ,
The method includes a step of forming fine projections having mesh-like irregularities on a top of the projection electrode by using a mesh jig, and a step of dicing the semiconductor substrate to form a semiconductor chip.

In the mounting structure of a semiconductor device according to the present invention, an electrode pad as an input / output terminal provided on a semiconductor substrate, an insulating film provided on the semiconductor substrate so as to expose the electrode pad, A semiconductor chip having a common electrode film provided thereon and a projecting electrode provided on the common electrode film, a semiconductor chip having fine projections having fine mesh-like irregularities on top of the projecting electrode, and a circuit board having a wiring pattern And directly connecting the protruding electrode provided with fine projections having mesh-like irregularities formed on the top thereof and the wiring pattern, and having an insulating resin provided between the semiconductor chip and the circuit board. I do.

[Operation] In the semiconductor device of the present invention, the surface of the protruding electrode formed on the semiconductor substrate is not flat, but is formed on the semiconductor chip with the electrode pads on the circuit board and the microscopic protrusions. Connection with the protruding electrode is made.

The mechanical bonding between the circuit board and the semiconductor chip is performed by thermocompression bonding between the protruding electrodes and the electrode pads via a thermosetting resin such as an epoxy resin.

That is, the semiconductor device according to the present invention, the method of manufacturing the same, and the mounting structure of the semiconductor device have a structure in which a large number of minute projections are selectively formed on a projection electrode formed on a semiconductor substrate, and the projection electrode surface has a large number of irregularities. By forming the minute projections in the state, connection points of the minute projections for promoting point connection between the electrode pads formed on the circuit board and the projection electrodes are created.

An uneven surface of the minute projection is formed on the top of the projecting electrode, and when the semiconductor chip is mounted on the circuit board, the thermosetting resin interposed between the semiconductor chip and the circuit board passes through the recess of the minute projection. It is pushed out because it is between the protruding electrode and the electrode pad. As a result, the thermosetting resin flows out of the joint area between the protruding electrode and the electrode pad, the thermosetting resin having an insulating property disappears, and the protruding electrode and the electrode pad come into direct contact, and both are mounted with low connection resistance. can do.

Further, by performing the above-mentioned thermocompression bonding, the minute projections are crushed and the insulating oxide film or the contaminant layer formed on the surface of the connection region of the circuit board and obstructing the low resistance connection is eliminated by the minute projections. As a result, the protruding electrode and the electrode pad are in direct contact, and both can be mounted with low connection resistance.

Thus, according to the present invention, even in a semiconductor device having a small pitch dimension between the protruding electrodes and a reduced top area of the protruding electrodes, the connection of the semiconductor chip to the circuit board is stably mounted with a low connection resistance. be able to.

Further, as in the semiconductor device of the present invention, by forming a large number of fine projections on the tops of the protruding electrodes, the tops of the protruding electrodes can be crushed during thermocompression bonding, so that the connection surface area can be increased. The mechanical adhesive strength at the place connected by the thermosetting resin increases. Furthermore, since a conductive adhesive in which a large amount of conductive particles such as silver (Ag) and palladium (Pd) are mixed in an epoxy-based thermosetting resin as in the prior art is not used, it is simple and inexpensive. An industrially excellent semiconductor structure and a manufacturing method thereof can be provided.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device, a mounting structure of the semiconductor device, and a method of manufacturing the semiconductor device according to a preferred embodiment of the present invention will be described with reference to the drawings.

[Structure and mounting structure of semiconductor device: FIG. 1] First, the structure of a bump electrode formed on a semiconductor substrate according to the present invention will be described. As shown in FIG.
On the aluminum electrode 12 formed on the semiconductor substrate 2, a common electrode film 14 is formed by laminating aluminum (Al), chromium (Cr), and copper (Cu) thin films from the semiconductor substrate 2 side. It has a protruding electrode 4 made of (Au). Further, on the top of the protruding electrode 4 made of gold (Au), a large number of microprojections 18 having mesh-like irregularities are formed.

Further, in the mounting structure of the semiconductor device according to the present invention, the semiconductor chip 8 having the projecting electrode 4 made of gold (Au) having a height of 15 μm and the electrode pad 16 formed on the circuit board 10 are mechanically and mechanically connected. The connection is made electrically with a thermosetting resin 30 such as epoxy. The epoxy thermosetting resin 30 has a structure that also fills a gap between the semiconductor chip 8 and the circuit board 10.

[Method of Manufacturing Semiconductor Device According to First Embodiment: FIGS. 2 to 9] Next, a method of manufacturing a semiconductor device according to the first embodiment will be described, and then the semiconductor device according to the second embodiment will be described. I explained the method of manufacturing the device, and finally,
A method for manufacturing a semiconductor device will be described using COG mounting as an example.

First, a method for manufacturing a semiconductor device according to the first embodiment of the present invention will be described. As shown in FIG. 2, an insulating film 6 having an opening of an aluminum wiring 12 of the semiconductor substrate 2 is formed on the semiconductor substrate 2.

Thereafter, a common electrode film 14 is formed on the entire surface of the semiconductor substrate 2 to form a common electrode when formed by electrolytic plating when forming the bump electrodes 4. The common electrode film 14 is formed on the entire surface of the semiconductor substrate 2 by a vacuum evaporation method or a sputtering method.

The common electrode film 14 is sequentially formed from the surface of the semiconductor substrate 2 with a thickness of 0.8 μm of aluminum (Al), 0.01 μm of chromium (Cr), and 0.8 μm of copper (Cu). .

Thereafter, as shown in FIG. 3, a resist film 26 of a photosensitive resin (photoresist) is formed on the entire surface of the common electrode film 14 by a spin coating method to a thickness of 17 μm. Further, the photosensitive resin is exposed to light using a predetermined photomask by an exposure device, and then the resist film 26 is subjected to a photolithography process of performing a development process.
Is performed.

The resist film 26 forms an opening in a region where the bump electrode 4 is to be formed later by the patterning of the photolithography process, so that the common electrode film 14 on the aluminum electrode 12 is exposed.

Next, as shown in FIG.
4 is used as a plating electrode, and a bump electrode 4 having a cross section of a straight wall shape and a thickness of 10 μm to 15 μm is formed on the common electrode film 14 in the opening of the resist film 26 by gold plating.

Thereafter, as shown in FIG. 5, the resist film 26 used as the plating stopper film is removed.

Next, as shown in FIG. 6, the common electrode film 14 is etched by a wet etching method using the projection electrode 4 as a mask, and a pattern is formed so as to leave the common electrode film 14 in a region aligned with the projection electrode 4. I do.

The reason why the wet etching is performed when the common electrode film 14 described in FIG. 6 is subjected to the etching process to form a pattern is as follows.

The common electrode film 14 has a three-layer structure of 0.8 μm of aluminum, 0.01 μm of chromium, and 0.8 μm of copper from the semiconductor substrate 2 side. This is because an etching gas used to obtain an etching selectivity between a layer and another layer must be used, so that the selection of the composite etching gas becomes complicated.

Further, the dry etching method takes a very long time to perform the etching process, which is disadvantageous in industrial production, and furthermore, the equipment used for the etching process becomes expensive. This is because there is also a problem that it is lost. However, according to the wet etching method, by selecting an etching solution having an etching selectivity, an etching process can be easily performed without requiring a large-scale facility.

Next, as shown in FIG. 7, a mesh jig 20 having a mesh formed on a flat surface plate is prepared.

Next, as shown in FIG.
A pressure is uniformly applied to the protruding electrode 4 formed on the rear surface of the semiconductor substrate 2.

Then, as shown in FIG. 9, since the protruding electrode 4 is formed of soft gold (Au), the fine protrusion 18 having fine mesh-like irregularities is formed on the top of the protruding electrode 4. be able to. At this time, if the parallelism between the semiconductor substrate 2 and the jig is poor, it is impossible to uniformly apply pressure to the protruding electrodes 4 on the semiconductor substrate 2. Since the formation of the projections 18 becomes difficult, close attention must be paid to the parallelism.

The pressure applied to the protruding electrode 4 on the semiconductor substrate 2 is preferably such that the top of the protruding electrode 4 formed on the semiconductor substrate 2 can form irregularities of about 3 μm to 5 μm.

The mesh jig 20 is selected to have a shape in which the pressure mark on the top surface of the bump electrode 4 becomes uneven as shown in FIG.

Finally, as shown in FIG. 10, the dicing line at the boundary between the adjacent semiconductor chips 8 in the semiconductor substrate 2 is cut (hereinafter referred to as dicing).
The semiconductor substrate 2 is cut into single semiconductor chips 8.

[Method of Manufacturing Semiconductor Device in Second Embodiment: FIGS. 2 to 4 and FIGS. 14 to 19]
The manufacturing method of the semiconductor device according to the embodiment will be described with reference to FIGS. 2 to 4 and FIGS.

As shown in FIG. 2, an insulating film 6 having an opening of an aluminum wiring 12 of the semiconductor substrate 2 is formed on the semiconductor substrate 2. Thereafter, a common electrode film 14 is formed on the entire surface of the semiconductor substrate 2 to form a common electrode when formed by electrolytic plating at the time of forming the bump electrodes 4. The common electrode film 14 is formed on the entire surface of the semiconductor substrate 2 by a vacuum evaporation method or a sputtering method.

The common electrode film 14 is formed by sequentially forming aluminum (Al) with a thickness of 0.8 μm, chromium (Cr) with a thickness of 0.01 μm, and copper (Cu) with a thickness of 0.8 μm from the surface side of the semiconductor substrate 2. .

Thereafter, as shown in FIG. 3, a resist film 26 of a photosensitive resin (photoresist) is formed on the entire surface of the common electrode film 14 by a spin coating method to a thickness of 17 μm. Further, the photosensitive resin is exposed to light using a predetermined photomask by an exposure device, and then the resist film 26 is subjected to a photolithography process of performing a development process.
Is performed.

By the patterning of the photolithography process, an opening is formed in the resist film 26 in a region where the bump electrode 4 is to be formed later, and the common electrode film 14 on the aluminum electrode 12 is exposed.

Next, as shown in FIG.
4 is used as a plating electrode, and a bump electrode 4 having a cross section of a straight wall shape and a thickness of 10 μm to 15 μm is formed on the common electrode film 14 in the opening of the resist film 26 by gold plating.

Next, as shown in FIG. 14, a mesh jig 20 having a mesh formed on a flat surface plate is prepared.

Next, as shown in FIG. 15, a uniform pressure is applied to the bump electrodes 4 formed on the semiconductor substrate 2.
Add from the back.

Then, as shown in FIG. 16, the fine projections 1 having fine mesh-like irregularities on the tops of the projection electrodes 4 are formed.
8 is formed. At this time, the minute projections 18 are also formed on the surface of the resist film 26.

At this time, if the parallelism between the semiconductor substrate 2 and the jig is poor, it is not possible to uniformly apply pressure to the projecting electrodes 4 on the semiconductor substrate 2. Since it is difficult to form the minute projections 18 having irregularities, close attention must be paid to the parallelism. The semiconductor substrate 2
The pressure applied to the upper projecting electrode 4 is preferably such that the top of the projecting electrode 4 formed on the semiconductor substrate 2 can form irregularities of about 3 μm to 5 μm.

As the mesh jig 20, one having a shape in which the pressure mark on the top surface of the projecting electrode 4 becomes uneven as shown in FIG. 16 is selected.

As a result, as shown in FIG. 17, the top of the bump electrode 4 and the resist film 26 formed on the semiconductor substrate 2 are formed.
The micro projections 18 are formed on the top.

Thereafter, as shown in FIG.
The resist film 26 used as a plating stop film when the is formed by plating is removed.

Thereafter, as shown in FIG.
Is used as a mask to etch the common electrode film 14 by a wet etching method, and the common electrode film 14 is formed in a region aligned with the bump electrode 14.

The main difference between the second embodiment and the semiconductor device manufacturing method according to the first embodiment is that the microprojections 18 are formed after the resist film is removed in the first embodiment. On the other hand, in the second embodiment, the minute projections 18 are formed before the resist film 26 is removed.

[Description of mounting method of semiconductor device: FIGS.
FIG. 13] Next, a method for mounting a semiconductor device according to the present invention will be described with reference to FIGS. 11, 12, and 13. FIG.

Next, the semiconductor chip 8 formed by the semiconductor manufacturing method in the first and second embodiments described above is replaced with a glass substrate 24 which is a circuit substrate of a liquid crystal display panel.
Face down connection. Here, the mounting method will be described with reference to FIGS. 11 to 13 by taking a liquid crystal display panel as an example.

As shown in FIG. 11, in order to mount the semiconductor chip 8 on the glass substrate 24, the surface of the semiconductor chip 8 on which the protruding electrodes 4 are formed is face-down, and the protrusions formed on the semiconductor chip 8 are faced down. The electrode 4 and the transparent electrode 46 formed on the glass substrate 24 are aligned.

Thereafter, as shown in FIG. 12, the semiconductor chip 8 and the bump electrodes 4 formed on the semiconductor chip 8 are formed.
And a thermosetting resin 30 such as epoxy between the glass substrate 24 and the transparent electrode 46 formed on the glass substrate 24.
Intervene.

Finally, with the semiconductor chip 8 set on the glass substrate 24 as shown in FIG. The electrode 4 and the transparent electrode 46 on the glass substrate 24 are mechanically and electrically connected.

At this time, the heating temperature is from 100 ° C. to 180 °.
C. and a pressure of about 400 Kg / cm ² . The heating and pressurizing are performed from the back side of the semiconductor chip 8 using a pressurizing and heating jig having a built-in heater.

An uneven surface of the minute projection 18 is formed on the top of the projection electrode 4. When the semiconductor chip 8 is mounted on the glass substrate 24, the semiconductor chip 8 is interposed between the semiconductor chip 8 and the glass substrate 24 by this pressing process. Thermosetting resin 30
Represents the protruding electrode 4 and the transparent electrode 4
It is pushed out because it is between 6. As a result, the projection electrode 4
The thermosetting resin 30 flows out from the joint area between the transparent electrode 46 and the transparent electrode 46, and the thermosetting resin 30 having an insulating property disappears, the protruding electrode 4 and the transparent electrode 46 come into direct contact, and both are mounted with low connection resistance. can do.

Further, by performing the above-mentioned thermocompression bonding, the minute projections 18 are crushed, and the insulating oxide film and the contaminant layer which are formed on the surface of the transparent electrode 46 of the glass substrate 24 and hinder the low resistance connection are reduced. Excluded by the projection 18, the projection electrode 4 and the transparent electrode 46 are in direct contact, and both can be mounted with low connection resistance.

As a result, in the present invention, the connection of the semiconductor chip 8 to the glass substrate 24 can be performed with a low connection resistance even in the semiconductor chip 8 in which the pitch between the protruding electrodes 4 is small and the top of the protruding electrode 4 is reduced in area. It can be implemented stably.

Furthermore, as in the semiconductor device of the present invention, by forming a large number of fine projections 18 on the tops of the protruding electrodes 4, the tops of the protruding electrodes 4 are crushed during thermocompression bonding, so that the connection surface area can be increased. In addition, the mechanical adhesive strength at the portion connected by the epoxy thermosetting resin 30 increases.

According to the mounting structure of the semiconductor device of the present invention, ultra-fine connection with a connection pitch of 40 μm or less and a connection area above the bump electrode of 2000 μm ² or less is also possible.

In the above embodiment of the present invention, the projecting electrode 4
In the above description, an example is described in which gold (Au) is used. However, copper (Cu) may be formed first, and then gold (Au) may be formed to form a protruding electrode having a laminated structure.

[0082]

As described above, according to the mounting structure of a semiconductor device and the method of manufacturing the same according to the present invention, when a transparent electrode on a glass substrate and a protruding electrode on a semiconductor chip are face-down connected, a minute By forming the projection on the projection electrode of the semiconductor chip, the pitch dimension between the projection electrodes can be reduced, and the semiconductor chip and the circuit board can be mounted with a low connection resistance value.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a state after a semiconductor chip and a circuit board are connected according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a state after a common electrode film is formed on a semiconductor substrate according to the embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a state after a thick resist film is formed on a semiconductor substrate according to an embodiment of the present invention and a bump plating portion is selectively opened.

FIG. 4 is a cross-sectional view illustrating a state after gold (Au) plating is performed on a thick film resist opening on a semiconductor substrate to form a protruding electrode according to the embodiment of the present invention.

FIG. 5 shows a state after bump plating according to the embodiment of the present invention.
It is sectional drawing which shows the state at the time of removing a thick film resist.

FIG. 6 is a cross-sectional view showing a state when the common electrode film of the semiconductor substrate is removed in the embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a state before a mesh jig is pressed on a straight-shaped projecting electrode in order to form minute projections on the projecting electrode on the semiconductor substrate in the embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a state at the time when a mesh jig is pressed against a straight-shaped projecting electrode in order to form minute projections on the projecting electrode on the semiconductor substrate in the embodiment of the present invention.

FIG. 9 is a cross-sectional view showing a state after a mesh jig is pressed on a straight protruding electrode after fine projections are formed on the protruding electrode on the semiconductor substrate in the embodiment of the present invention.

FIG. 10 is a cross-sectional view showing a state in which the semiconductor substrate according to the embodiment of the present invention is diced into chips.

FIG. 11 is a cross-sectional view showing a state after a semiconductor chip and a glass substrate are aligned in the embodiment of the present invention.

FIG. 12 is a cross-sectional view showing a state after a thermosetting resin such as epoxy is applied on the glass substrate after the alignment of the semiconductor chip and the glass substrate in the embodiment of the present invention.

FIG. 13 is a cross-sectional view showing a state after thermocompression bonding of the semiconductor chip and the glass substrate in the embodiment of the present invention.

FIG. 14 is a view showing a state in which a common electrode film and a thick film resist are still formed on a semiconductor substrate according to an embodiment of the present invention; FIG. 4 is a cross-sectional view showing a state before a mesh jig is pressed against a straight protruding electrode.

FIG. 15 is a diagram illustrating a thick resist formed on a semiconductor substrate according to an embodiment of the present invention in order to form minute protrusions on a bump electrode while a common electrode film and a thick resist are still formed on the semiconductor substrate. FIG. 4 is a cross-sectional view showing a state in which a mesh jig is pressing a straight protruding electrode with a mesh jig.

FIG. 16 is a view showing a state in which a common electrode film and a thick film resist are formed on a semiconductor substrate according to an embodiment of the present invention; FIG. 4 is a cross-sectional view showing a state after a mesh jig is pressed against a straight protruding electrode.

FIG. 17 shows a state after forming a fine protrusion on a bump electrode and removing the thick film resist in a state where the common electrode film and the thick film resist are still formed on the semiconductor substrate in the embodiment of the present invention. It is sectional drawing.

FIG. 18 shows a state after forming a fine protrusion on a bump electrode and removing the thick film resist in a state where a common electrode film and a thick film resist are still formed on the semiconductor substrate in the embodiment of the present invention. It is sectional drawing.

FIG. 19 is a view showing a state in which a common electrode film and a thick film resist are still formed on a semiconductor substrate according to an embodiment of the present invention. It is sectional drawing which shows the state after removing.

FIG. 20 is a cross-sectional view showing a structure in which a semiconductor chip is mounted on a liquid crystal display device in a conventional technology by COG paste.

FIG. 21 is a cross-sectional view showing a state after a common electrode film is formed on a semiconductor substrate in a conventional technique.

FIG. 22 is a cross-sectional view showing a state after a resist film is formed on a semiconductor substrate in a conventional technique.

FIG. 23 is a cross-sectional view showing a state after a bump is formed by performing electroplating on a semiconductor substrate in a conventional technique.

FIG. 24 is a cross-sectional view showing a state after removing a resist film on a semiconductor substrate in a conventional technique.

FIG. 25 is a cross-sectional view showing a state after a common electrode film on a semiconductor substrate is removed in a conventional technique.

FIG. 26 is a cross-sectional view showing a state in which a semiconductor substrate according to a conventional technique is diced into chips.

FIG. 27 is a cross-sectional view showing a state after a conductive adhesive is transferred onto a protruding electrode on a semiconductor chip in a conventional technique.

FIG. 28 is a cross-sectional view showing a state after a projection electrode on a semiconductor chip and a glass substrate are aligned in a conventional technique.

FIG. 29 is a cross-sectional view showing a state after bonding a semiconductor chip and a glass substrate in a conventional technique.

FIG. 30 is a cross-sectional view showing a state after sealing a semiconductor chip and a glass substrate in a conventional technique.

[Explanation of symbols]

2: semiconductor substrate 4: protruding electrode 6: insulating film 8: semiconductor chip 12: aluminum wiring 1
4: Common electrode film 16: Electrode pad 18: Micro projection 2
0: mesh jig 22: sealing resin 24: glass substrate 2
6: resist film 28: liquid crystal display device 30: thermosetting resin
32: FPC board 36: Anisotropic conductive film for FPC 38: Liquid crystal display 44: Conductive adhesive 46: Transparent electrode 4
8: Liquid crystal 54: Sealing material

Claims (8)

[Claims] An electrode pad serving as an input / output terminal provided on the semiconductor substrate; an insulating film provided on the semiconductor substrate so as to expose the electrode pad; a common electrode film provided on the electrode pad; And a projection electrode provided on the common electrode film, wherein a fine projection having mesh-like irregularities is provided on the top of the projection electrode. 2. The semiconductor device according to claim 1, wherein said common electrode film is a laminated film of aluminum, chromium, and copper from the semiconductor substrate side. 3. The semiconductor device according to claim 1, wherein the cross-sectional shape of the bump electrode is a straight wall. 4. The semiconductor device according to claim 1, wherein said protruding electrode is made of gold. 5. A step of forming an insulating film on a semiconductor substrate having a pad electrode formed thereon, selectively opening the insulating film to expose the pad electrode, and forming a common electrode film on the entire surface of the semiconductor substrate. Forming a resist film on the entire surface of the semiconductor substrate, and patterning the resist film having an opening on the pad electrode region by photolithography, and forming the resist film in the opening of the resist film. Forming a projecting electrode on the electrode film by plating; etching the common electrode film so as to leave the common electrode film in a region matching the projecting electrode; and forming a mesh on the top of the projecting electrode. A step of forming fine projections having mesh-like unevenness using a jig; and a step of forming a semiconductor chip by dicing the semiconductor substrate. A method of manufacturing a semiconductor device. 6. The semiconductor device according to claim 5, wherein the step of forming minute projections having mesh-like irregularities is performed by pressing the projection electrode against a mesh jig and pressing after removing the resist film. Production method. 7. The step of forming minute projections having mesh-like irregularities, comprising: forming the resist film, pressing the projecting electrode against a mesh jig and applying pressure, and then forming the resist film. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor device is separated. 8. An electrode pad which is an input / output terminal provided on the semiconductor substrate, an insulating film provided on the semiconductor substrate so as to expose the electrode pad, a common electrode film provided on the electrode pad, A semiconductor chip provided with a projection electrode provided on the common electrode film, and having a fine projection having fine mesh-like irregularities on the top of the projection electrode; a circuit board having a wiring pattern; and a mesh formed on the top. A semiconductor device mounting structure comprising an insulating resin provided between a semiconductor chip and a circuit board by directly connecting the projecting electrode provided with minute projections having irregularities and the wiring pattern.