JP2002057160A - Manufacturing method of silicon wafer - Google Patents

Manufacturing method of silicon wafer

Info

Publication number
JP2002057160A
JP2002057160A JP2000244201A JP2000244201A JP2002057160A JP 2002057160 A JP2002057160 A JP 2002057160A JP 2000244201 A JP2000244201 A JP 2000244201A JP 2000244201 A JP2000244201 A JP 2000244201A JP 2002057160 A JP2002057160 A JP 2002057160A
Authority
JP
Japan
Prior art keywords
wafer
silicon
heat treatment
defect
silicon wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000244201A
Other languages
Japanese (ja)
Other versions
JP4463950B2 (en
Inventor
Makoto Iida
誠 飯田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP2000244201A priority Critical patent/JP4463950B2/en
Priority to PCT/JP2001/006626 priority patent/WO2002015253A1/en
Priority to TW90119383A priority patent/TW515008B/en
Publication of JP2002057160A publication Critical patent/JP2002057160A/en
Application granted granted Critical
Publication of JP4463950B2 publication Critical patent/JP4463950B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • C30B15/203Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)

Abstract

PROBLEM TO BE SOLVED: To provide the manufacturing method of a silicon wafer which is favorable for forming an annealing wafer uniformly having full zero defects layers and the BMDs density within the surface of the annealing wafer suppressing an irregularity (that is, an irregularity in defect sizes within the surface of the annealing wafer in growing condition) in the zero defects layers, which are seen in the annealing wafer subsequent to a heat treatment within the surface of the annealing wafer and an irregularity in the BMDs density subsequent to a heat treatment, such as a precipitation heat treatment or a device heat treatment, within the surface of the annealing wafer, and to provide such the silicon wafer. SOLUTION: In the manufacturing method of a silicon wafer which forms the silicon wafer from a silicon single crystal pulled up after nitrogen is doped to the silicon single crystal by a CZ method and heat-treats the wafer, the wafer is grown on the condition that the ratio V/G of the pulling-up speed V (mm/min) at the time when the silicon single crystal is pulled up to a temperature gradient G (K/mm) in a solid-liquid interface is set in the ratio of 1 to 0.175 to 0.225 mm2/K.min in the extent wider than 90% in the radial direction of the pulled-up crystal and the wafer is formed by the manufacturing method.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明が属する技術分野】本発明は、窒素をドープして
引上げたチョクラルスキー法(CZ法)シリコン単結晶
から作製されたシリコンウエーハに熱処理(アニール)
を施すことにより、ウエーハ表層部に無欠陥層を有し、
バルク部にイントリンシックゲッタリング(IG、In
trinsic Gettering)層が形成される
シリコンウエーハ(アニールウエーハ)を製造するのに
好適なシリコンウエーハの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat treatment (annealing) for a silicon wafer produced from a Czochralski method (CZ method) silicon single crystal pulled by doping with nitrogen.
Has a defect-free layer on the wafer surface layer,
Intrinsic gettering (IG, In
The present invention relates to a method for manufacturing a silicon wafer suitable for manufacturing a silicon wafer (annealed wafer) on which a thin gettering layer is formed.

【0002】[0002]

【従来の技術】半導体デバイスの高集積化・微細化に伴
い、ウエーハ表層の一層の完全性とバルク中のゲッタリ
ング能力の強化が強く要求されている。それに対し、最
近、窒素をドープしたCZ法シリコンウエーハに熱処理
を施すことにより、上記の2つの要求を同時に満たした
ウエーハが開発された。
2. Description of the Related Art As semiconductor devices become more highly integrated and miniaturized, there is a strong demand for more complete wafer surface layers and enhanced gettering capability in bulk. On the other hand, recently, a wafer satisfying the above two requirements simultaneously has been developed by subjecting a CZ method silicon wafer doped with nitrogen to a heat treatment.

【0003】すなわち、CZ法シリコン単結晶に窒素を
ドープすることにより、as−grown結晶中のグロ
ーンイン(grown−in)欠陥(主に原子空孔の集
合体により形成されるボイド欠陥)のサイズが小さくな
るため、後工程の高温アニールによりウエーハ表層部の
無欠陥化が容易になり、しかもバルク部においては窒素
が有する酸素析出促進効果により、析出熱処理やデバイ
ス熱処理工程を経ることによって、ゲッタリングに寄与
する酸素析出物等の欠陥(以下、BMD(Bulk M
icro Defects)と呼ぶことがある)を高密
度に有するIG層が形成されるというものである。
That is, by doping nitrogen into a CZ silicon single crystal, the size of a grown-in defect (a void defect mainly formed by an aggregate of atomic vacancies) in an as-grown crystal is reduced. Since it becomes smaller, high-temperature annealing in a later step makes it easier to eliminate defects in the surface layer of the wafer.Moreover, in the bulk part, due to the oxygen precipitation promoting effect of nitrogen, it undergoes a precipitation heat treatment and a device heat treatment step, resulting in gettering. Defects such as oxygen precipitates that contribute (hereinafter referred to as BMD (Bulk M
An IG layer having a high density (hereinafter referred to as "micro Defects") is formed.

【0004】[0004]

【発明が解決しようとする課題】ところで、CZ法シリ
コンウエーハのバルク部に形成され、ゲッタリングに寄
与するBMDの密度と、表層部の無欠陥層の形成に影響
するグローンイン欠陥のサイズは、通常、面内分布を有
することが知られており、特に、ウエーハの中心付近で
BMD密度、グローンイン欠陥サイズともに大きく、ウ
エーハ周辺では両者とも徐々に低下している傾向があ
る。
By the way, the density of BMD formed in the bulk portion of the CZ method silicon wafer and contributing to gettering and the size of the grown-in defect affecting the formation of the defect-free layer in the surface layer are usually different. In particular, the BMD density and the size of the grown-in defect are large near the center of the wafer, and both tend to gradually decrease around the wafer.

【0005】この傾向は窒素ドープ結晶においても同様
で、BMD密度やグローンイン欠陥サイズの絶対値は変
化するが、面内分布を持つことには変わりはない。よっ
て、表層部に無欠陥層を形成するための高温アニールを
施した後は、アニールウエーハの中心部分に特にグロー
ンイン欠陥が残り易いことになる。
[0005] This tendency is the same in a nitrogen-doped crystal. Although the BMD density and the absolute value of the grown-in defect size change, they still have an in-plane distribution. Therefore, after high-temperature annealing for forming a defect-free layer on the surface layer portion, particularly, a grown-in defect tends to remain at the center of the annealed wafer.

【0006】また、バルクのゲッタリング能力を決定す
る析出熱処理後のBMD密度に関し、ウエーハ周辺部で
BMD密度が低下する傾向は、特に窒素ドープウエーハ
に関して顕著であることが、本発明者の調査により明確
になった。
Further, the inventors of the present invention have found that the tendency of the BMD density at the periphery of the wafer to decrease with respect to the BMD density after the precipitation heat treatment for determining the bulk gettering ability is remarkable especially for a nitrogen-doped wafer. Clarified.

【0007】このように、アニールウエーハに求められ
るウエーハ表層部に形成される無欠陥層と析出熱処理ま
たはデバイス熱処理後のBMD密度のいずれの特性も、
現時点では面内で不均一であるという問題を抱えてい
る。
As described above, the characteristics of the defect-free layer formed on the surface layer of the wafer and the BMD density after the deposition heat treatment or the device heat treatment required for the annealed wafer are as follows:
At present, there is a problem of unevenness in the plane.

【0008】そこで本発明は、このような問題点を解決
するためになされたもので、熱処理後のアニールウエー
ハに見られる無欠陥層の面内バラツキ(すなわち、グロ
ーンイン欠陥サイズの面内バラツキ)と、析出熱処理ま
たはデバイス熱処理等の熱処理後のBMD密度の面内バ
ラツキを抑えて、十分な無欠陥層とBMD密度を面内均
一に有するアニールウエーハを作製するために好適なシ
リコンウエーハを製造する方法およびそのようなシリコ
ンウエーハを提供することを主たる目的としている。
The present invention has been made in order to solve such a problem, and the present invention has been made in view of the in-plane variation of the defect-free layer (ie, the in-plane variation of the size of the grown-in defect) observed in the annealed wafer after the heat treatment. Method for producing a silicon wafer suitable for producing an annealed wafer having a sufficient defect-free layer and a uniform BMD density in a plane by suppressing the in-plane variation of the BMD density after a heat treatment such as a precipitation heat treatment or a device heat treatment. And to provide such a silicon wafer.

【0009】[0009]

【課題を解決するための手段】上記目的を達成する本発
明のシリコンウエーハの製造方法に係る発明は、チョク
ラルスキー法により窒素をドープして引上げられたシリ
コン単結晶からシリコンウエーハを作製し、該シリコン
ウエーハに熱処理を施すシリコンウエーハの製造方法に
おいて、前記シリコン単結晶を引上げる際の引上速度V
(mm/min)と固液界面の温度勾配G(K/mm)
の比V/Gが、引上げ結晶径方向の90%以上の範囲に
おいて0.175〜0.225mm2 /K・minとな
る条件で育成することを特徴としている(請求項1)。
Means for Solving the Problems The invention according to the method for producing a silicon wafer of the present invention, which achieves the above object, comprises producing a silicon wafer from a silicon single crystal pulled by doping with nitrogen by the Czochralski method, In the method of manufacturing a silicon wafer, wherein the silicon wafer is subjected to a heat treatment, a pulling speed V when pulling the silicon single crystal is pulled.
(Mm / min) and the temperature gradient G (K / mm) at the solid-liquid interface
Is grown under a condition that the ratio V / G is 0.175 to 0.225 mm 2 / K · min in a range of 90% or more in the pulled crystal radial direction (claim 1).

【0010】このような条件下で育成された窒素をドー
プしたシリコン単結晶から切り出されたシリコンウエー
ハは、グローンイン欠陥サイズの面内分布もBMD密度
の面内分布も均一なものとすることができる。従って、
これに高温熱処理を施せば、ウエーハ表層部の無欠陥層
の面内バラツキがなく、バルク部のBMD密度が面内均
一で高密度なIG能力の高いアニールウエーハを得るこ
とができる。
[0010] A silicon wafer cut from a nitrogen-doped silicon single crystal grown under such conditions can have uniform in-plane distribution of grown-in defect size and in-plane distribution of BMD density. . Therefore,
If this is subjected to a high-temperature heat treatment, it is possible to obtain an annealed wafer having a high IG capability, in which the BMD density of the bulk portion is uniform, the BMD density is uniform in the surface, and the bulk portion has no in-plane variation.

【0011】この場合、前記シリコンウエーハ中の窒素
濃度は、1×1013〜5×1015個/cm3 であること
が好ましい(請求項2)。窒素濃度をこのような範囲内
に納めれば、グローンイン欠陥のサイズを小さくする効
果が十分であるとともに、単結晶の育成にも悪影響を及
ぼさないので、後工程の高温アニールによりウエーハ表
層部の無欠陥化が容易になるとともに、バルク部におい
ては窒素が有する酸素析出促進効果により、析出熱処理
やデバイス熱処理を経ることによって、ゲッタリングに
寄与するBMDを高密度に有するIG層を形成すること
ができる。
In this case, the concentration of nitrogen in the silicon wafer is preferably 1 × 10 13 to 5 × 10 15 / cm 3 (claim 2). If the nitrogen concentration is within this range, the effect of reducing the size of the grown-in defect is sufficient, and the growth of the single crystal is not adversely affected. Defect formation is facilitated, and an IG layer having a high density of BMDs contributing to gettering can be formed by performing a precipitation heat treatment or a device heat treatment in a bulk portion due to an oxygen precipitation promoting effect of nitrogen. .

【0012】そして本発明によれば、熱処理後のアニー
ルウエーハに見られる無欠陥層の面内バラツキと、析出
熱処理またはデバイス熱処理等の熱処理後のBMD密度
の面内バラツキを抑えて、十分な無欠陥層とBMD密度
を面内均一に有するアニールウエーハを得ることのでき
るシリコンウエーハが提供される(請求項3)。
According to the present invention, the in-plane variation of the defect-free layer seen in the annealed wafer after the heat treatment and the in-plane variation of the BMD density after the heat treatment such as the deposition heat treatment or the device heat treatment are suppressed, and the sufficient non-defect is obtained. A silicon wafer capable of obtaining an annealed wafer having a defect layer and a BMD density in-plane uniformly is provided.

【0013】以下、本発明についてさらに詳細に説明す
る。本発明者は、十分な無欠陥層とBMD密度を面内均
一に有するアニールウエーハを作製するためには、シリ
コンウエーハとして、バルク部に形成されるゲッタリン
グに寄与するBMDの密度と、表層部の無欠陥層の形成
に影響するグローンイン欠陥のサイズがともに面内分布
を持たないものを用意する必要があることを知見した。
Hereinafter, the present invention will be described in more detail. In order to produce an annealed wafer having a sufficient defect-free layer and a BMD density in-plane uniformly, the present inventor has proposed that a silicon wafer should have a BMD density contributing to gettering formed in a bulk portion and a surface layer portion. It has been found that it is necessary to prepare one in which both the sizes of the grown-in defects affecting the formation of the defect-free layer have no in-plane distribution.

【0014】すなわち本発明者は、アニールウエーハ用
として現状製造している窒素ドープされたCZ法シリコ
ンウエーハに高温アニールを施した後のウエーハ表層部
のグローンイン欠陥密度と、追加熱理後のBMD密度に
関して鋭意調査を行った。その結果、ウエーハ中心部で
は残存欠陥数は多く、BMD密度も高いが、ウエーハ周
辺部では残存欠陥数は少なく、BMD密度も少ないこと
がわかった。また、その中間の位置(以下、R/2位置
という。Rはウエーハ半径)では、残存欠陥も程々に少
なく、BMD密度も程々に高くなっていた。
That is, the inventor of the present invention has conducted a high-temperature annealing of a nitrogen-doped CZ silicon wafer currently manufactured for an annealing wafer, and obtained a Bloom-in defect density in a surface layer portion of the wafer and a BMD density after additional thermal treatment. We conducted intensive research on. As a result, it was found that the number of residual defects was large and the BMD density was high in the central portion of the wafer, but the number of residual defects was small and the BMD density was low in the peripheral portion of the wafer. Further, at the intermediate position (hereinafter, referred to as R / 2 position, where R is a wafer radius), the number of residual defects was small, and the BMD density was also high.

【0015】これら3箇所の中ではR/2位置が、表層
部の完全性とバルク中のゲッタリング能力のバランスが
最も良いことになる。つまり、このR/2位置の状態を
ウエーハ面内に拡大できれば、面内均一で高品質なウエ
ーハが得られることになる。そこで、このR/2位置の
状態を拡大するため、BMDやグローンイン欠陥の分布
とCZ法シリコン単結晶の引上げ方法との相関関係を調
査した。
Of these three locations, the R / 2 position has the best balance between the integrity of the surface layer and the gettering ability in the bulk. That is, if the state of the R / 2 position can be expanded in the wafer plane, a uniform and high quality wafer in the plane can be obtained. Therefore, in order to enlarge the state of the R / 2 position, the correlation between the distribution of BMD or the grown-in defect and the pulling method of the CZ silicon single crystal was investigated.

【0016】その結果、このようにグローンイン欠陥サ
イズやBMD密度の面内分布が不均一になる原因は、少
なくとも結晶育成時の引上げ速度V(mm/min)と
シリコンの融点から1400℃までの範囲における引き
上げ軸方向の固液界面の温度勾配G(K/mm)の比で
あるV/Gが面内で分布を持つ、すなわちV/Gが面内
で変動するためであることがわかってきた。そこでウエ
ーハ面内の位置に関わらずグローンイン欠陥サイズやB
MD密度を所望のものとするために必要な具体的なV/
G値を求めることにした。以下、これについて説明す
る。
As a result, the in-plane distributions of the grown-in defect size and the BMD density become non-uniform at least in the pulling speed V (mm / min) during crystal growth and in the range from the melting point of silicon to 1400 ° C. It has been found that V / G, which is the ratio of the temperature gradient G (K / mm) at the solid-liquid interface in the lifting axis direction, has a distribution in the plane, that is, V / G fluctuates in the plane. . Therefore, regardless of the position in the wafer surface,
Specific V / necessary to achieve the desired MD density
The G value was determined. Hereinafter, this will be described.

【0017】グローンイン欠陥がV/Gの影響を受ける
ことは既に良く知られているので、結晶引上げ装置の特
定のホットゾーン(Hot Zone、HZ、炉内構
造)を用いて引上げ結晶中に取り込まれる窒素濃度を1
×1013個/cm3 とし、1.0〜1.4mm/min
の範囲から選択された引上げ速度にて複数本の結晶の育
成を行い、それぞれのV/Gの面内分布とグローンイン
欠陥のサイズとの関係及び800℃×4時間+1000
℃×16時間の熱処理後のBMD密度との関係を調査し
た。その結果を図1および図2に示す。
Since it is already well known that a grown-in defect is affected by V / G, it is taken into a pulled crystal using a specific hot zone (Hot Zone, HZ, structure inside a furnace) of a crystal pulling apparatus. Nitrogen concentration 1
× 10 13 / cm 3 , 1.0 to 1.4 mm / min
A plurality of crystals are grown at a pulling speed selected from the range, and the relationship between the in-plane distribution of each V / G and the size of the grown-in defect and 800 ° C. × 4 hours + 1000
The relationship with the BMD density after heat treatment at 16C for 16 hours was investigated. The results are shown in FIGS.

【0018】図1はウエーハの面内の中央部、R/2
部、周辺部(ウエーハ外周より10mmの位置)につい
て測定したBMD密度の全データとV/Gとの関係を示
しており、BMD密度がV/Gと直接相関していること
を表している。V/Gが0.190mm2 /K・min
付近より小さくなるとBMD密度が急激に低下し、0.
175mm2 /K・minを下回るとゲッタリング能力
が不十分となる1×10 9 個/cm3 以下に低下するこ
とがわかる。すなわち、高密度のBMDを得るために
は、ウエーハ面内位置にかかわらず、V/Gを0.17
5mm2 /K・min以上とすれば良いことがわかっ
た。
FIG. 1 shows a central portion in the plane of the wafer, R / 2.
Part and peripheral part (at a position 10 mm from the outer periphery of the wafer)
Shows the relationship between V / G and all data of BMD density measured by
And BMD density is directly correlated with V / G
Is represented. V / G is 0.190mmTwo / K · min
When it becomes smaller than the vicinity, the BMD density decreases sharply,
175mmTwo / K · min, gettering ability
Is insufficient 1 × 10 9 Pieces / cmThree Drop below
I understand. That is, in order to obtain high density BMD
Sets V / G to 0.17 regardless of the position in the wafer plane.
5mmTwo / K · min or more
Was.

【0019】一方、図2はOPP(Optical P
recipitate Profiler)によりグロ
ーンイン欠陥のサイズを相対評価し、V/Gとの関係を
調査した結果を示している。図1と同様にウエーハの面
内の中央部、R/2部、周辺部について測定したOPP
サイズの全データとV/Gとの関係を示しており、OP
PサイズがV/Gと直接相関していることを表してい
る。すなわち、V/Gが0.225mm2 /K・min
以下ではグローンイン欠陥のサイズが急激に小さくな
り、0.225mm2 /K・minを越えるような範囲
では、グローンイン欠陥のサイズが大きな値で飽和傾向
にあることを新規に発見した。従って、熱処理により消
滅させ易いサイズの小さいグローンイン欠陥とするため
には、ウエーハの面内の位置に関わらず、V/Gを0.
225mm2 /K・min以下とすればよい。
FIG. 2 shows an OPP (Optical P).
2 shows the results of relative evaluation of the size of a grown-in defect by using a reciprocating profiler and investigating the relationship with V / G. OPP measured at the center, R / 2, and peripheral portions in the plane of the wafer as in FIG.
It shows the relationship between all data of the size and V / G, and OP
This indicates that the P size is directly correlated with V / G. That is, V / G is 0.225 mm 2 / K · min.
In the following, it has been newly discovered that the size of the grown-in defect rapidly decreases and the size of the grown-in defect tends to be saturated at a large value in a range exceeding 0.225 mm 2 / K · min. Therefore, in order to obtain a small size of a grown-in defect which can be easily eliminated by the heat treatment, V / G is set to 0.1 regardless of the position in the plane of the wafer.
It may be 225 mm 2 / K · min or less.

【0020】以上、図1および図2の結果から、窒素ド
ープされたCZ法シリコン単結晶を引上げる際に、V/
Gを結晶の径方向で0.175〜0.225mm2 /K
・minの範囲内となるように製造すれば、ウエーハ面
内で不均一とはならず、グローンイン欠陥サイズが適度
に小さいためウエーハ全面にわたり十分にグローンイン
欠陥を消滅させ、かつ、適度なBMD密度が形成される
アニールウエーハが得られることになる。
From the results shown in FIGS. 1 and 2, when pulling a nitrogen-doped CZ silicon single crystal, V / V
G is 0.175 to 0.225 mm 2 / K in the radial direction of the crystal
・ If manufactured to be within the range of min, it does not become non-uniform in the wafer surface, and since the size of the grown-in defect is appropriately small, the grown-in defect is sufficiently eliminated over the entire surface of the wafer, and an appropriate BMD density is obtained. The formed annealed wafer is obtained.

【0021】ここで、引上げ結晶の外周部においては、
グローンイン欠陥のサイズやBMD密度を決める点欠陥
が、結晶育成中に外方拡散してしまう。従って、引上げ
結晶の外周端から半径の5%程度までの領域(例えば、
直径200mmの結晶を引上げた場合には外周端から1
0mmまで)においては、グローンイン欠陥のサイズや
BMD密度とV/Gの相関が弱くなる。すなわち、本発
明におけるV/Gが適用されるのは、引上げ結晶の径方
向の両外周部5%づつを除く、少なくとも90%の領域
であり、この領域は引上げ条件により90〜100%の
範囲で変動する。
Here, at the outer periphery of the pulled crystal,
Point defects that determine the size of the grown-in defect and the BMD density diffuse outward during crystal growth. Therefore, a region (for example, about 5% of the radius from the outer peripheral edge of the pulled crystal)
When a crystal with a diameter of 200 mm is pulled, 1 mm from the outer edge
(Up to 0 mm), the correlation between the size of the grown-in defect and the BMD density and V / G becomes weak. That is, V / G in the present invention is applied to at least 90% of the region except for 5% each of both outer peripheral portions in the radial direction of the pulled crystal, and this region is in the range of 90 to 100% depending on the pulling condition. It fluctuates.

【0022】[0022]

【発明の実施の形態】以下、本発明の実施形態につい
て、図面を参照しながら詳細に説明する。まず、本発明
で使用したCZ法による単結晶引上げ装置の構成例を図
6により説明する。図6に示すように、この単結晶引上
げ装置30は、引上げ室31と、引上げ室31中に設け
られたルツボ32と、ルツボ32の周囲に配置されたヒ
ータ34と、ルツボ32を回転させるルツボ保持軸33
及びその回転機構(図示せず)と、シリコンの種結晶5
を保持するシードチャック6と、シードチャック6を引
上げるワイヤ7と、ワイヤ7を回転又は巻き取る巻取機
構(図示せず)を備えて構成されている。ルツボ32
は、その内側のシリコン融液(湯)2を収容する側には
石英ルツボが設けられ、その外側には黒鉛ルツボが設け
られている。また、ヒータ34の外側周囲には断熱材3
5が配置されている。
Embodiments of the present invention will be described below in detail with reference to the drawings. First, a configuration example of a single crystal pulling apparatus using the CZ method used in the present invention will be described with reference to FIG. As shown in FIG. 6, the single crystal pulling apparatus 30 includes a pulling chamber 31, a crucible 32 provided in the pulling chamber 31, a heater 34 disposed around the crucible 32, and a crucible 32 for rotating the crucible 32. Holding shaft 33
And its rotation mechanism (not shown), and a silicon seed crystal 5.
, A wire 7 for pulling up the seed chuck 6, and a winding mechanism (not shown) for rotating or winding the wire 7. Crucible 32
Is provided with a quartz crucible on the side for containing the silicon melt (hot water) 2 inside, and a graphite crucible on the outside thereof. A heat insulating material 3 is provided around the outside of the heater 34.
5 are arranged.

【0023】また、本発明の製造方法に関わる製造条件
として、V/Gの適正な範囲を径方向および軸方向に拡
大する方法は既に良く知られている方法で行えばよい。
即ち、結晶周辺の温度勾配(Ge)と結晶中心の温度勾
配(Gc)の差(Ge−Gc)を小さくして固液界面温
度勾配Gが面内でフラットになるように、例えば結晶の
固液界面の外周に環状の固液界面断熱材8を設け、その
上に上部囲繞断熱材9を配置したHZを設置している。
この固液界面断熱材8は、その下端とシリコン融液2の
湯面との間に3〜5cmの隙間10を設けて設置されて
いる。上部囲繞断熱材9は条件によっては使用しないこ
ともある。さらに、冷却ガスを吹き付けたり、輻射熱を
遮って単結晶を冷却する筒状の冷却装置36を設けても
よい。
As a manufacturing condition relating to the manufacturing method of the present invention, a method of expanding an appropriate range of V / G in a radial direction and an axial direction may be performed by a well-known method.
That is, for example, the solid-liquid interface temperature gradient G is made flat in the plane by reducing the difference (Ge-Gc) between the temperature gradient (Ge) around the crystal and the temperature gradient (Gc) at the crystal center. An annular solid-liquid interface heat insulating material 8 is provided on the outer periphery of the liquid interface, and an HZ in which an upper surrounding heat insulating material 9 is disposed thereon is provided.
The solid-liquid interface heat insulating material 8 is provided with a gap 10 of 3 to 5 cm between its lower end and the surface of the silicon melt 2. The upper surrounding insulating material 9 may not be used depending on conditions. Further, a cylindrical cooling device 36 for spraying a cooling gas or blocking the radiant heat to cool the single crystal may be provided.

【0024】別に、最近では引上げ室31の水平方向の
外側に、図示しない磁石を設置し、シリコン融液2に水
平方向あるいは垂直方向等の磁場を印加することによっ
て、融液の対流を抑制し、単結晶の安定成長をはかる、
いわゆるMCZ法が用いられることも多い。
Separately, recently, a magnet (not shown) is installed outside the pulling chamber 31 in the horizontal direction, and a magnetic field in the horizontal or vertical direction is applied to the silicon melt 2 to suppress the convection of the melt. For stable growth of single crystals,
The so-called MCZ method is often used.

【0025】次に、上記の単結晶引上げ装置30による
単結晶育成方法について説明する。まず、ルツボ32内
でシリコンの高純度多結晶原料を融点(約1420°
C)以上に加熱して融解する。窒素ドープは、例えば原
料シリコン中に窒化膜付きシリコンウエーハを投入する
ことによって行うことができる。次に、ワイヤ7を巻き
出すことにより融液2の表面略中心部に種結晶5の先端
を接触又は浸漬させる。その後、ルツボ保持軸33を適
宜の方向に回転させるとともに、ワイヤ7を回転させな
がら巻き取り種結晶5を引上げることにより、単結晶育
成が開始される。以後、引上げ速度と温度を適切に調節
することにより略円柱形状の単結晶棒1を得ることがで
きる。
Next, a method for growing a single crystal using the above-described single crystal pulling apparatus 30 will be described. First, a high-purity polycrystalline silicon material is melted in a crucible 32 at a melting point (about 1420 °).
C) Heat to melt above. Nitrogen doping can be performed, for example, by charging a silicon wafer with a nitride film into raw silicon. Next, by unwinding the wire 7, the tip of the seed crystal 5 is brought into contact with or immersed substantially in the center of the surface of the melt 2. Thereafter, the crucible holding shaft 33 is rotated in an appropriate direction, and at the same time, the wound seed crystal 5 is pulled up while rotating the wire 7, thereby starting single crystal growth. Thereafter, by appropriately adjusting the pulling speed and the temperature, a substantially columnar single crystal rod 1 can be obtained.

【0026】得られた単結晶棒を通常の方法により、ワ
イヤーソー等で切り出し、面取り、ラッピング、エッチ
ング、研磨等を施すことによって、窒素ドープシリコン
ウエーハとすることができる。
A nitrogen-doped silicon wafer can be obtained by cutting out the obtained single crystal rod with a wire saw or the like and subjecting it to chamfering, lapping, etching, polishing and the like.

【0027】次に、本発明では、得られたシリコンウエ
ーハに熱処理を施す。これによって表面に面内均一に無
欠陥層が形成され、バルク部には高密度にBMDが発生
する。具体的な熱処理条件としては、通常のヒータ式の
バッチ炉を用い、アルゴン等の不活性ガス、水素ガス、
またはこれらの混合雰囲気下で、1000〜1350℃
で1時間以上の熱処理(例えば、1200℃・1時間、
または1150℃・4時間等)を行う。また、ランプ加
熱等によるRTA(Rapid Thermal An
nealing)装置を用いて、急速加熱・急速冷却に
よる熱処理を行ったり、バッチ炉とRTA装置を併用し
た熱処理とすることもできる。
Next, in the present invention, the obtained silicon wafer is subjected to a heat treatment. As a result, a defect-free layer is formed uniformly on the surface in-plane, and BMD is generated at high density in the bulk portion. As a specific heat treatment condition, an ordinary heater type batch furnace is used, and an inert gas such as argon, hydrogen gas,
Or 1000-1350 degreeC under these mixed atmospheres
Heat treatment for 1 hour or more (for example, at 1200 ° C. for 1 hour,
Or 1150 ° C. for 4 hours). In addition, RTA (Rapid Thermal Anl) by lamp heating or the like is performed.
A heat treatment by rapid heating / rapid cooling using a nearing apparatus or a heat treatment using a batch furnace and an RTA apparatus in combination is also possible.

【0028】[0028]

【実施例】以下、本発明の実施例と比較例を挙げて本発
明を具体的に説明するが、本発明はこれらに限定される
ものではない。 (実施例1)実施例1として、結晶中心温度勾配Gc=
3.543[K/mm]、結晶周辺温度勾配Ge=3.
933[K/mm]、Ge−Gc=0.390[K/m
m]と比較的Ge−Gcの小さいHZを有する単結晶引
上げ装置を用い、引上げ速度を約0.74mm/min
に調整して、直径6インチの窒素ドープシリコン単結晶
を引上げた。窒素ドープは、原料シリコン中に窒化膜付
きシリコンウエーハを投入し、引上げ結晶の肩の位置で
の窒素濃度(計算値)が2×1013/cm3 となるよう
にした。また、酸素濃度は14〜15ppma(JEI
DA(日本電子工業振興協会)規格)となるように調整
した。
EXAMPLES Hereinafter, the present invention will be described specifically with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited to these. (Example 1) As Example 1, a crystal center temperature gradient Gc =
3.543 [K / mm], crystal peripheral temperature gradient Ge = 3.
933 [K / mm], Ge-Gc = 0.390 [K / m]
m] and a single crystal pulling apparatus having a relatively small Ge-Gc HZ and a pulling speed of about 0.74 mm / min.
The nitrogen-doped silicon single crystal having a diameter of 6 inches was pulled up. In the nitrogen doping, a silicon wafer with a nitride film was put into the raw material silicon so that the nitrogen concentration (calculated value) at the shoulder of the pulled crystal was 2 × 10 13 / cm 3 . The oxygen concentration is 14 to 15 ppma (JEI
It was adjusted to DA (Japan Electronics Industry Development Association) standard.

【0029】図3に結晶引上げ時のV/Gの結晶径方向
の分布を示した。V/Gは径方向全体が約0.180〜
0.223mm2 /K・minの範囲に入っていた。
FIG. 3 shows the distribution of V / G in the crystal diameter direction during crystal pulling. V / G is about 0.180-
It was in the range of 0.223 mm 2 / K · min.

【0030】引上げられた結晶からシリコンウエーハを
作製し、OPP法によりグローンイン欠陥のサイズを測
定した後、800℃、4時間+1000℃、16時間の
析出熱処理を加えてBMDを形成し、OPP法によりB
MD密度を測定した。グローンイン欠陥のサイズの測定
結果を図4に、BMD密度の測定結果を図5に示した。
A silicon wafer is prepared from the pulled crystal, and the size of the grown-in defect is measured by the OPP method. Then, a heat treatment for precipitation is performed at 800 ° C. for 4 hours + 1000 ° C. for 16 hours to form a BMD, and the BMD is formed by the OPP method. B
The MD density was measured. FIG. 4 shows the measurement result of the size of the grown-in defect, and FIG. 5 shows the measurement result of the BMD density.

【0031】グローンイン欠陥は、1200℃、1時間
のアルゴン雰囲気により十分に消滅させることができる
サイズ(1.5以下)であり(図4)、面内分布も小さ
かった。また、BMD密度は、ウエーハ面内いずれの位
置においても、ほぼ2〜5×109/cm3 であり、高密
度でかつ均一な面内分布が得られた(図5)。
The grown-in defect had a size (1.5 or less) that could be sufficiently eliminated by an argon atmosphere at 1200 ° C. for 1 hour (FIG. 4), and the in-plane distribution was small. Further, the BMD density was approximately 2 to 5 × 10 9 / cm 3 at any position in the wafer plane, and a high-density and uniform in-plane distribution was obtained (FIG. 5).

【0032】(比較例1、比較例2)比較例1、2とし
て、Gc=3.778[K/mm]、Ge=4.904
[K/mm]、Ge−Gc=1.126[K/mm]と
比較的Ge−Gcの大きいHZを有する単結晶引上げ装
置を用い、比較例1では引上速度を約0.84mm/m
in、比較例2では約0.87mm/minに調整し
て、直径6インチの窒素ドープシリコン単結晶を引上げ
た。窒素ドープは、原料シリコン中に窒化膜付きシリコ
ンウエーハを投入し、引上げ結晶の肩の位置での窒素濃
度(計算値)が2×1013/cm3 となるようにした。
また、酸素濃度は14〜15ppma(JEIDA)と
なるように調整した。
(Comparative Examples 1 and 2) As Comparative Examples 1 and 2, Gc = 3.778 [K / mm] and Ge = 4.904.
[K / mm], Ge-Gc = 1.126 [K / mm] A single crystal pulling apparatus having an HZ having a relatively large Ge-Gc was used. In Comparative Example 1, the pulling speed was about 0.84 mm / m.
In Comparative Example 2, the pressure was adjusted to about 0.87 mm / min, and a nitrogen-doped silicon single crystal having a diameter of 6 inches was pulled. In the nitrogen doping, a silicon wafer with a nitride film was put into the raw material silicon so that the nitrogen concentration (calculated value) at the shoulder of the pulled crystal was 2 × 10 13 / cm 3 .
Further, the oxygen concentration was adjusted to be 14 to 15 ppma (JEIDA).

【0033】比較例1、比較例2の結晶引上げ時のV/
Gの結晶径方向の分布を図3に併記した。比較例1でV
/Gが0.175〜0.225mm2 /K・minの範
囲に入っていたのは、結晶の中心から約62mmの範囲
までの約83%であり、比較例2の場合は、結晶の中心
から外周方向に約30mmの位置から約66mmの位置
までの約48%であった。
In Comparative Examples 1 and 2, the V /
The distribution of G in the crystal diameter direction is also shown in FIG. V in Comparative Example 1
/ G was within the range of 0.175 to 0.225 mm 2 / K · min in about 83% of the range from the center of the crystal to about 62 mm. In the case of Comparative Example 2, the center of the crystal was From the position of about 30 mm to the position of about 66 mm in the outer circumferential direction.

【0034】引上げられた結晶からシリコンウエーハを
作製し、OPP法によりグローンイン欠陥のサイズを測
定した後、800℃、4時間+1000℃、16時間の
析出熱処理を加えてBMDを形成し、OPP法によりB
MD密度を測定した。グローンイン欠陥のサイズの測定
結果を図4に、BMD密度の測定結果を図5に併記し
た。
A silicon wafer is prepared from the pulled crystal, and the size of the grown-in defect is measured by the OPP method. Then, a heat treatment for precipitation is performed at 800 ° C. for 4 hours at + 1000 ° C. for 16 hours to form a BMD, and the BMD is formed by the OPP method. B
The MD density was measured. FIG. 4 shows the measurement result of the size of the grown-in defect, and FIG. 5 also shows the measurement result of the BMD density.

【0035】比較例1ではウエーハ中心側においてグロ
ーンイン欠陥サイズがある程度小さく、ウエーハ周辺部
では極めて小さくなっており、欠陥サイズの面内分布こ
そ大きいが、全体的にアニールにより消え易いサイズの
欠陥であった。しかしながら、析出熱処理後のBMD密
度に関してはV/Gの値が低いウエーハ周辺部において
BMD密度が2×108/cm3 程度と低くなっており、
周辺部でゲッタリング能力の小さい、面内分布が大きい
ものであることがわかった。
In Comparative Example 1, the size of the grown-in defect was small to some extent at the center of the wafer, and extremely small at the periphery of the wafer. The in-plane distribution of the defect size was large. Was. However, regarding the BMD density after the precipitation heat treatment, the BMD density is as low as about 2 × 10 8 / cm 3 in the peripheral portion of the wafer where the value of V / G is low,
It was found that the gettering ability was small in the peripheral portion and the in-plane distribution was large.

【0036】比較例2では、BMD密度に関しては面内
でほぼ1×109/cm3 以上が得られたが、グローンイ
ン欠陥サイズの面内分布が大きく、特にウエーハ中心側
のサイズがかなり大きいため、1200℃、1時間のア
ルゴン雰囲気によるアニールを行っても中心部分のグロ
ーンイン欠陥が一部残留することを確認した。
In Comparative Example 2, a BMD density of about 1 × 10 9 / cm 3 or more was obtained in the plane, but the in-plane distribution of the grown-in defect size was large, and in particular, the size on the wafer center side was considerably large. It was confirmed that even after annealing in an argon atmosphere at 1200 ° C. for 1 hour, a part of the grown-in defect at the center portion remained.

【0037】これらの結果より、比較例1、2で使用し
た結晶引上げ装置のHZの場合、グローンイン欠陥のサ
イズとBMD密度の双方を面内均一にするためには、た
とえ引上げ速度を0.84〜0.87mm/minの限
られた範囲に制御したとしても極めて困難であることが
わかる。
From these results, in the case of the crystal pulling apparatus HZ used in Comparative Examples 1 and 2, in order to make both the size of the grown-in defect and the BMD density uniform in the plane, the pulling speed was set to 0.84. It can be seen that it is extremely difficult even if control is performed within a limited range of about 0.87 mm / min.

【0038】なお、本発明は、上記実施形態に限定され
るものではない。上記実施形態は、例示であり、本発明
の特許請求の範囲に記載された技術的思想と実質的に同
一な構成を有し、同様な作用効果を奏するものは、いか
なるものであっても本発明の技術的範囲に包含される。
The present invention is not limited to the above embodiment. The above embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the scope of the claims of the present invention. It is included in the technical scope of the invention.

【0039】例えば、上記実施形態においては、直径6
インチのシリコン単結晶を育成する場合につき例を挙げ
て説明したが、本発明はこれには限定されず、直径8〜
16インチあるいはそれ以上のシリコン単結晶にも適用
できる。また、本発明は、シリコン融液に水平磁場、縦
磁場、カスプ磁場等を印加するいわゆるMCZ法にも適
用できることは言うまでもない。
For example, in the above embodiment, the diameter 6
Although the case of growing an inch silicon single crystal has been described by way of example, the present invention is not limited to this, and a diameter of 8 to
It can be applied to a silicon single crystal of 16 inches or more. Needless to say, the present invention can be applied to a so-called MCZ method in which a horizontal magnetic field, a vertical magnetic field, a cusp magnetic field, or the like is applied to a silicon melt.

【0040】[0040]

【発明の効果】本発明によれば、グローンイン欠陥サイ
ズの面内分布もBMD密度の面内分布も均一な窒素をド
ープしたシリコンウエーハを形成することができる。従
って、これに高温熱処理を施せば、ウエーハ表層部の無
欠陥層の面内バラツキがなく、バルク部にBMD密度が
面内均一なIG層を有するアニールウエーハを製造する
ことができる。
According to the present invention, a silicon wafer doped with nitrogen having a uniform in-plane distribution of the grown-in defect size and a uniform in-plane distribution of the BMD density can be formed. Therefore, if this is subjected to a high-temperature heat treatment, an annealed wafer having no in-plane variation of the defect-free layer on the surface portion of the wafer and having an IG layer with a uniform in-plane BMD density in the bulk portion can be manufactured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明におけるV/GとBMD密度との関係を
示す図である。
FIG. 1 is a diagram showing the relationship between V / G and BMD density in the present invention.

【図2】本発明におけるV/Gとグローンイン欠陥サイ
ズとの関係を示す図である。
FIG. 2 is a diagram showing the relationship between V / G and the size of a grown-in defect in the present invention.

【図3】実施例1、比較例1、比較例2に関し、結晶引
上げ時の結晶径方向におけるV/Gの分布図である。
FIG. 3 is a distribution diagram of V / G in Example 1, Comparative Example 1, and Comparative Example 2 in the crystal diameter direction at the time of crystal pulling.

【図4】実施例1、比較例1、比較例2に関し、引上げ
結晶の結晶径方向におけるグローンイン欠陥サイズの分
布図である。
FIG. 4 is a distribution diagram of a grown-in defect size in the crystal diameter direction of a pulled crystal in Example 1, Comparative Example 1, and Comparative Example 2.

【図5】実施例1、比較例1、比較例2に関し、引上げ
結晶の結晶径方向におけるBMD密度の分布図である。
FIG. 5 is a distribution diagram of a BMD density in a crystal diameter direction of a pulled crystal in Example 1, Comparative Example 1, and Comparative Example 2.

【図6】本発明で使用したCZ法による単結晶引上げ装
置の概略説明図である。
FIG. 6 is a schematic explanatory view of a single crystal pulling apparatus by a CZ method used in the present invention.

【符号の説明】[Explanation of symbols]

1…成長単結晶棒、 2…シリコン融液、 3…湯面、
4…固液界面、5…種結晶、 6…シードチャック、
7…ワイヤ、8…固液界面断熱材、 9…上部囲繞断
熱材、10…湯面と固液界面断熱材下端との隙間、30
…単結晶引上げ装置、 31…引上げ室、 32…ルツ
ボ、33…ルツボ保持軸、 34…ヒータ、 35…断
熱材、 36…冷却装置。
1 ... grown single crystal rod, 2 ... silicon melt, 3 ...
4: solid-liquid interface, 5: seed crystal, 6: seed chuck,
7: wire, 8: solid-liquid interface heat insulator, 9: upper surrounding heat insulator, 10: gap between the molten metal surface and solid-liquid interface heat insulator lower end, 30
... single crystal pulling device, 31 ... pulling chamber, 32 ... crucible, 33 ... crucible holding shaft, 34 ... heater, 35 ... heat insulating material, 36 ... cooling device.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 チョクラルスキー法により窒素をドープ
して引上げられたシリコン単結晶からシリコンウエーハ
を作製し、該シリコンウエーハに熱処理を施すシリコン
ウエーハの製造方法において、前記シリコン単結晶を引
上げる際の引上速度V(mm/min)と固液界面の温
度勾配G(K/mm)の比V/Gが、引上げ結晶径方向
の90%以上の範囲において0.175〜0.225m
2 /K・minとなる条件で育成することを特徴とす
るシリコンウエーハの製造方法。
1. A method for producing a silicon wafer from a silicon single crystal pulled by doping with nitrogen by the Czochralski method and subjecting the silicon wafer to a heat treatment. The ratio V / G of the pulling speed V (mm / min) and the temperature gradient G (K / mm) at the solid-liquid interface is 0.175 to 0.225 m in a range of 90% or more in the pulling crystal radial direction.
A method for producing a silicon wafer, wherein the silicon wafer is grown under a condition of m 2 / K · min.
【請求項2】 前記シリコンウエーハ中の窒素濃度が1
×1013〜5×1015個/cm3 であることを特徴とす
る請求項1に記載したシリコンウエーハの製造方法。
2. The method according to claim 1, wherein the silicon wafer has a nitrogen concentration of 1%.
The method for producing a silicon wafer according to claim 1, wherein the amount is from × 10 13 to 5 × 10 15 / cm 3 .
【請求項3】 前記請求項1または請求項2に記載した
製造方法により製造されたことを特徴とするシリコンウ
エーハ。
3. A silicon wafer manufactured by the manufacturing method according to claim 1 or 2.
JP2000244201A 2000-08-11 2000-08-11 Method for manufacturing silicon wafer Expired - Fee Related JP4463950B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005001170A1 (en) * 2003-06-27 2005-01-06 Shin-Etsu Handotai Co., Ltd. Process for producing single crystal and single crystal
US7582159B2 (en) 2003-05-13 2009-09-01 Shin-Etsu Handotai Co., Ltd. Method for producing a single crystal
JP2012076982A (en) * 2010-10-06 2012-04-19 Sumco Corp Method for manufacturing silicon wafer
JP2013522157A (en) * 2010-03-16 2013-06-13 エルジー シルトロン インコーポレイテッド Method for manufacturing single crystal ingot and wafer manufactured thereby

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6927150B2 (en) * 2018-05-29 2021-08-25 信越半導体株式会社 Method for manufacturing silicon single crystal

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3085146B2 (en) * 1995-05-31 2000-09-04 住友金属工業株式会社 Silicon single crystal wafer and method of manufacturing the same
JP3428627B2 (en) * 1998-09-11 2003-07-22 三菱住友シリコン株式会社 Silicon single crystal pulling method
JP3601340B2 (en) * 1999-02-01 2004-12-15 信越半導体株式会社 Epitaxial silicon wafer, method for manufacturing the same, and substrate for epitaxial silicon wafer
JP2001026196A (en) * 2000-01-01 2001-01-30 Fujitsu Ltd Electronic blackboard

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7582159B2 (en) 2003-05-13 2009-09-01 Shin-Etsu Handotai Co., Ltd. Method for producing a single crystal
WO2005001170A1 (en) * 2003-06-27 2005-01-06 Shin-Etsu Handotai Co., Ltd. Process for producing single crystal and single crystal
US7323048B2 (en) 2003-06-27 2008-01-29 Shin-Etsu Handotai Co., Ltd. Method for producing a single crystal and a single crystal
JP2013522157A (en) * 2010-03-16 2013-06-13 エルジー シルトロン インコーポレイテッド Method for manufacturing single crystal ingot and wafer manufactured thereby
JP2012076982A (en) * 2010-10-06 2012-04-19 Sumco Corp Method for manufacturing silicon wafer

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