JP2019206451A - Manufacturing method of silicon single crystal and epitaxial silicon wafer and silicon single crystal substrate - Google Patents

Manufacturing method of silicon single crystal and epitaxial silicon wafer and silicon single crystal substrate Download PDF

Info

Publication number
JP2019206451A
JP2019206451A JP2018102016A JP2018102016A JP2019206451A JP 2019206451 A JP2019206451 A JP 2019206451A JP 2018102016 A JP2018102016 A JP 2018102016A JP 2018102016 A JP2018102016 A JP 2018102016A JP 2019206451 A JP2019206451 A JP 2019206451A
Authority
JP
Japan
Prior art keywords
single crystal
silicon single
nitrogen
crystal
raw material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2018102016A
Other languages
Japanese (ja)
Other versions
JP6927150B2 (en
Inventor
孝世 菅原
Takayo Sugawara
孝世 菅原
星 亮二
Ryoji Hoshi
亮二 星
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP2018102016A priority Critical patent/JP6927150B2/en
Priority to KR1020190045181A priority patent/KR20190135913A/en
Priority to CN201910458568.0A priority patent/CN110541191B/en
Publication of JP2019206451A publication Critical patent/JP2019206451A/en
Application granted granted Critical
Publication of JP6927150B2 publication Critical patent/JP6927150B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/02Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt
    • C30B15/04Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt adding doping materials, e.g. for n-p-junction
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02Heat treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Abstract

To provide a manufacturing method of a silicon single crystal capable of sufficiently forming BMD in an advanced low temperature/short time device process and manufacturing a wafer having a high gettering capacity at a high yield in a low/no defect silicon single crystal substrate and an epitaxial silicon wafer of which precipitation is accelerated by nitrogen doping.SOLUTION: A manufacturing method of a silicon single crystal grows the silicon single crystal by Chokralsky method under a condition where a whole area of a crystal becomes N-region. Nitrogen is doped at a concentration of 2×10atoms/cmor more and 3.2×10atoms/cmor less. A ratio Ge/Gc is made to be Ge/Gc>1 where Gc is a temperature gradient at a crystal center part in a lifting axis direction of the silicon single crystal, and Ge is a temperature gradient at a crystal peripheral part. Ge/Gc is gradually increased according to an increase in nitrogen concentration due to segregation in lifting the silicon single crystal.SELECTED DRAWING: Figure 1

Description

本発明は、シリコン単結晶の製造方法、エピタキシャルシリコンウェーハ及びシリコン単結晶基板に関する。   The present invention relates to a method for producing a silicon single crystal, an epitaxial silicon wafer, and a silicon single crystal substrate.

近年、微細化が進む半導体デバイス(Logic、NAND、DRAM等)においては、二つの大きな課題がある。   2. Description of the Related Art In recent years, semiconductor devices (Logic, NAND, DRAM, etc.) that are becoming finer have two major problems.

一つは、ウェーハ表面近傍の極小さな欠陥もデバイス不良の要因となり得るため、デバイス動作領域となる表面近傍で欠陥が少ないもしくは無い高品質なウェーハを製造しなければならないことである。   One is that a very small defect in the vicinity of the wafer surface can cause a device failure, so that a high-quality wafer having few or no defects in the vicinity of the surface serving as a device operation region must be manufactured.

もう一つは、プロセスが低温・短時間化してきている影響で、従来はデバイスプロセス中に十分に形成が可能であった、不純物金属のゲッタリングサイトとなるBMD(Bulk Micro Defect)が形成されにくく、デバイスの歩留りの低下要因となることである。   The other is due to the fact that the process is becoming colder and shorter in time, and BMD (Bulk Micro Defect), which is a gettering site for impurity metals, which can be sufficiently formed during the device process has been formed. It is difficult to reduce the device yield.

前者のウェーハ表面近傍の欠陥に対する要求を満足するものとしては、空孔起因のCOP(Crystal Originated Particle)を有するV−rich領域や熱酸化時にリング状に酸化誘起積層欠陥が発生するR−OSF領域、格子間シリコン起因の転位ループや転位クラスターのいずれも含まないN(Neutral)領域で製造された低/無欠陥結晶のシリコン単結晶基板や、基板上に無欠陥の層を形成するエピタキシャルシリコンウェーハ、アニールウェーハがある。   V-rich regions having COPs (Crystal Originated Particles) due to vacancies and R-OSF regions in which oxidation-induced stacking faults occur in a ring shape during thermal oxidation can satisfy the requirement for defects near the wafer surface. A low / defect-free silicon single crystal substrate manufactured in an N (Neutral) region containing neither dislocation loops or dislocation clusters due to interstitial silicon, or an epitaxial silicon wafer that forms a defect-free layer on the substrate There is an annealed wafer.

このうち、アニールウェーハにおいては、無欠陥層を形成するために要する後処理時間が長く、大量供給には不向きで高コストになり易いという問題がある。   Among these, the annealed wafer has a problem that the post-processing time required for forming the defect-free layer is long, and is unsuitable for mass supply and tends to be expensive.

エピタキシャルシリコンウェーハは比較的短時間の後処理で無欠陥層形成が可能であるが、低/無欠陥結晶のシリコン単結晶基板と比べると追加のコストがかかってしまう。   An epitaxial silicon wafer can be formed with a defect-free layer by a relatively short post-treatment, but requires an additional cost as compared with a low / defect-free crystal silicon single crystal substrate.

また、エピタキシャルシリコンウェーハでは、後処理の追加コストを相殺するため、低/無欠陥結晶よりも高速で結晶成長させた高生産性のV−rich結晶を用いるのが一般的となっている。   In addition, in an epitaxial silicon wafer, in order to offset the additional cost of post-processing, it is common to use a highly productive V-rich crystal grown at a higher speed than a low / defect-free crystal.

不純物金属のゲッタリングサイトとなるBMDを増やすには、窒素ドープが有効であることが知られている。しかしながら、窒素ドープしたV−rich結晶においては、ウェーハ外周部でR−OSF領域起因のBMD密度低下、EP欠陥化、及び、高窒素原子濃度でドープした際の板状または棒状のCOPに起因するEP欠陥化が問題になる場合がある。   Nitrogen doping is known to be effective in increasing BMD serving as impurity metal gettering sites. However, in a nitrogen-doped V-rich crystal, the BMD density is reduced due to the R-OSF region at the outer periphery of the wafer, EP defects are caused, and the plate-like or rod-like COP is doped when doped with a high nitrogen atom concentration. EP defect may be a problem.

これを回避するために、結晶を製品直径よりも太く成長させて、円筒研削でR−OSFにあたる部分を取り除く方法があるが、研削ロス、研削加工のコスト、及び、時間がかかってしまう。また、別の方法として、R−OSFを含まないN−領域の結晶を用いる方法があるが、窒素をドープして、歩留り良く、R−OSFを含まない結晶を得ることは困難であった。   In order to avoid this, there is a method in which the crystal is grown thicker than the product diameter and the portion corresponding to the R-OSF is removed by cylindrical grinding. However, it takes grinding loss, grinding cost and time. As another method, there is a method using an N-region crystal that does not contain R-OSF. However, it is difficult to obtain a crystal that does not contain R-OSF by doping nitrogen and has a good yield.

次に、後者の微細化に伴う低温・短時間プロセスの影響について説明する。   Next, the influence of the low temperature and short time process accompanying the latter miniaturization will be described.

MOSFETの動作(ソース・ドレイン電流)には、ゲート絶縁膜の静電容量(=絶縁膜比誘電率×ゲート面積/絶縁膜厚さ)が必要量確保されなければならない。そこで、半導体デバイスの微細化の進行で、ゲート長が短くなってゲート面積が減少する分を、ゲート絶縁膜の薄膜化で補っている。   For the operation (source / drain current) of the MOSFET, a necessary amount of capacitance of the gate insulating film (= insulating film relative dielectric constant × gate area / insulating film thickness) must be ensured. Therefore, the thinning of the gate insulating film compensates for the reduction in the gate area due to the miniaturization of the semiconductor device and the reduction in the gate area.

そのため、近年の半導体デバイスにおいては、ゲート絶縁膜は0.5nm程度と極薄いEOT(等価酸化膜厚)となっており、ゲート絶縁膜の均一性がデバイス動作の信頼性に対する重要なファクターを占めることとなっている。そこで、デバイス工程の各種熱処理を低温・短時間化することでゲート絶縁膜の膜厚・膜質の均一化が図られている。   Therefore, in recent semiconductor devices, the gate insulating film has an extremely thin EOT (equivalent oxide thickness) of about 0.5 nm, and the uniformity of the gate insulating film occupies an important factor for the reliability of device operation. It is supposed to be. Therefore, the film thickness and film quality of the gate insulating film are made uniform by reducing the temperature and time of various heat treatments in the device process.

しかしながら、デバイスプロセスの低温・短時間化の弊害として、従来は、不純物金属のゲッタリングサイトとなるBMDが、デバイスプロセス中において、基板中に十分に形成されていたのに対して、低温・短時間のデバイスプロセス中ではBMD形成が少なく、不純物金属に対するゲッタリング能力が減少してしまい、デバイス歩留りの低下要因となることがある。   However, as a negative effect of the low temperature and short time of the device process, conventionally, the BMD serving as an impurity metal gettering site has been sufficiently formed in the substrate during the device process. In a time-consuming device process, the formation of BMD is small, and the gettering ability with respect to the impurity metal is reduced, which may cause a reduction in device yield.

このような問題があるため、先端の低温・短時間のデバイスプロセスにおいて、従来よりもBMDを形成しやすく、低温・短時間のデバイスプロセス中においても高ゲッタリング能力を得ることができるウェーハが必要とされている。   Because of these problems, it is necessary to have a wafer that is easier to form BMD in the low-temperature and short-time device process at the leading edge and that can obtain high gettering capability even in the low-temperature and short-time device process. It is said that.

低温・短時間のデバイスプロセス中に十分なBMDを形成するためには、特許文献1に示されているように、窒素ドープによって空孔凝集を抑制して、残存過剰空孔による析出核形成の促進によって、デバイスプロセス前に熱的に安定な(大きいサイズの)析出核を増加させる方法が有効であることが知られている。   In order to form a sufficient BMD during a low-temperature, short-time device process, as shown in Patent Document 1, nucleation of vacancies is suppressed by nitrogen doping, and the formation of precipitation nuclei due to residual excess vacancies is performed. It is known that methods of increasing the number of thermally stable (large sized) precipitation nuclei by promotion prior to device processing are effective.

しかしながら、先に述べた窒素ドープしたV−rich結晶を基板に用いたエピタキシャルシリコンウェーハにおいては、ウェーハ外周部でR−OSF領域起因のBMD密度低下、EP欠陥化、及び、高濃度で窒素ドープした際の板状または棒状のCOPに起因するEP欠陥化が問題になる場合があった。   However, in the epitaxial silicon wafer using the nitrogen-doped V-rich crystal described above as the substrate, the BMD density decreased due to the R-OSF region, the EP defect, and the nitrogen doping was performed at a high concentration at the outer periphery of the wafer. In some cases, the EP defect due to the plate-like or rod-like COP is a problem.

特開2001−139396号公報JP 2001-139396 A 特開2000−53497号公報JP 2000-53497 A 特開平11−79889号公報JP 11-79889 A 特開2000−178099号公報JP 2000-178099 A WO2002/000969WO2002 / 000969 特開2000−16897号公報JP 2000-16897 A 特開2000−159595号公報JP 2000-159595 A 特開2008−66357号公報JP 2008-66357 A 特開2007−70132号公報JP 2007-70132 A 特開2016−13957号公報JP 2016-13957 A

本発明は上記問題に鑑みてなされたものであり、窒素ドープによって析出(BMD形成)が促進された低/無欠陥結晶シリコン単結晶基板及びそれを基板に用いたエピタキシャルシリコンウェーハにおいて、先端の低温・短時間のデバイスプロセスにおいても十分なBMD形成が可能で、高いゲッタリング能力を有するウェーハを高い歩留りで製造可能とするシリコン単結晶の製造方法を提供することを目的とする。   The present invention has been made in view of the above problems, and a low / defect-free crystalline silicon single crystal substrate in which precipitation (BMD formation) is promoted by nitrogen doping and an epitaxial silicon wafer using the same in a low-temperature-free crystal silicon single crystal substrate. An object of the present invention is to provide a method for producing a silicon single crystal that can form a sufficient BMD even in a short-time device process and can produce a wafer having a high gettering capability with a high yield.

上記課題を解決するために、本発明は、チョクラルスキー法によって、結晶全面がN−領域となる条件で引上げることによってシリコン単結晶を育成する方法であって、前記シリコン単結晶を育成する際に、窒素を2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープし、前記シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部(結晶外周部)の温度勾配Geの比をGe/Gc>1となるようにし、前記Ge/Gcを、前記シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくすることを特徴とするシリコン単結晶の製造方法を提供する。 In order to solve the above-mentioned problems, the present invention is a method for growing a silicon single crystal by pulling up under the condition that the entire surface of the crystal becomes an N-region by the Czochralski method. At this time, nitrogen is doped at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3 or less, and the temperature gradient Gc and crystal at the center of the crystal in the pulling axis direction of the silicon single crystal The ratio of the temperature gradient Ge in the peripheral part (crystal outer peripheral part) is set to be Ge / Gc> 1, and the Ge / Gc is gradually increased according to the increase in nitrogen concentration due to segregation when the silicon single crystal is pulled. There is provided a method for producing a silicon single crystal characterized by being made large.

このようなシリコン単結晶の製造方法であれば、高濃度に窒素をドープすることによって、熱的に安定な大きいサイズの析出核を増加させて、低温・短時間のデバイスプロセスにおいても高いBMD形成能力(ゲッタリング能力)を達成しつつ、結晶育成中の偏析による窒素高濃度化によって生じる欠陥分布変化を矯正・調整して、結晶全長の広い窒素濃度範囲においてもR−OSF領域を回避したシリコン単結晶を製造することができる。   With such a method for producing a silicon single crystal, high-concentration precipitation nuclei are increased by doping nitrogen at a high concentration, and high BMD formation can be achieved even in a low-temperature and short-time device process. Silicon that avoids the R-OSF region even in the nitrogen concentration range with a wide crystal length by correcting and adjusting the defect distribution change caused by nitrogen concentration increase due to segregation during crystal growth while achieving the capability (gettering capability) Single crystals can be produced.

このとき、前記Ge/Gcの調整を、石英ルツボ内の原料融液直上に配置された熱遮蔽体と前記原料融液の液面との間隔を制御すること、前記石英ルツボを囲うように配置されたヒーターの位置を前記原料融液の液面に対して低くすること、前記シリコン単結晶の製造装置のメインチャンバーの外側に配置された磁場印加装置の磁場強度を弱くすること、及び、前記磁場印加装置の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって行なうことが好ましい。   At this time, the Ge / Gc is adjusted so as to surround the quartz crucible by controlling the distance between the heat shield disposed immediately above the raw material melt in the quartz crucible and the liquid surface of the raw material melt. Lowering the position of the heater made with respect to the liquid surface of the raw material melt, weakening the magnetic field strength of the magnetic field application device disposed outside the main chamber of the silicon single crystal manufacturing device, and It is preferable that the position of the magnetic field application device be lowered by any one or a combination of two or more.

このようなGe/Gcの調整方法であれば、製造装置を大きく変更することがないため、簡便にGe/Gcを調整することが可能となる。   With such a Ge / Gc adjustment method, the manufacturing apparatus is not significantly changed, and Ge / Gc can be easily adjusted.

またこのとき、前記Ge/Gcの調整を、前記熱遮蔽体と前記原料融液の液面との間隔を制御することによって行なう際に、窒素をドープしない場合に結晶全面がN−領域となる条件における前記熱遮蔽体と前記原料融液の液面との間隔をDとしたときに、窒素をドープする場合の前記熱遮蔽体と前記原料融液の液面との間隔D’を、窒素濃度に応じて、D’/D=0.94−窒素濃度/(2.41×1015)から求めたD’となるように変化させることが好ましい。 At this time, when the Ge / Gc is adjusted by controlling the distance between the thermal shield and the liquid surface of the raw material melt, the entire crystal surface becomes an N-region when nitrogen is not doped. When the distance between the thermal shield and the liquid surface of the raw material melt in the conditions is D, the distance D ′ between the thermal shield and the liquid surface of the raw material melt when nitrogen is doped is defined as nitrogen. According to the concentration, it is preferable to change it so that D ′ is obtained from D ′ / D = 0.94−nitrogen concentration / (2.41 × 10 15 ).

このようなGe/Gcの調整方法であれば、Ge/Gcの調整を、簡便かつ正確に窒素濃度に応じて、熱遮蔽体と原料融液の液面との間隔を調整することによって行うことができるため、より簡便にGe/Gcを調整することが可能となる。   With such a Ge / Gc adjustment method, Ge / Gc adjustment is performed by adjusting the distance between the heat shield and the liquid surface of the raw material melt according to the nitrogen concentration easily and accurately. Therefore, Ge / Gc can be adjusted more easily.

またこのとき、前記求めたD’が20mmより大きくなる場合には、前記熱遮蔽体と前記原料融液の液面との間隔を前記求めたD’とすることで前記Ge/Gcを調整し、前記求めたD’が20mm以下となる場合には、前記熱遮蔽体と前記原料融液の液面との間隔を20mmとし、さらに、前記石英ルツボを囲うように配置されたヒーターの位置を前記原料融液の液面に対して低くすること、前記シリコン単結晶の製造装置のメインチャンバーの外側に配置された磁場印加装置の磁場強度を弱くすること、及び、前記磁場印加装置の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって前記Ge/Gcを調整することが好ましい。   At this time, when the obtained D ′ is larger than 20 mm, the Ge / Gc is adjusted by setting the obtained D ′ as the distance between the thermal shield and the liquid surface of the raw material melt. When the obtained D ′ is 20 mm or less, the distance between the thermal shield and the liquid surface of the raw material melt is set to 20 mm, and the position of the heater disposed so as to surround the quartz crucible is Lowering the liquid surface of the raw material melt, weakening the magnetic field strength of the magnetic field application device disposed outside the main chamber of the silicon single crystal manufacturing device, and the position of the magnetic field application device Preferably, the Ge / Gc is adjusted by any one or a combination of two or more.

このようなシリコン単結晶の製造方法であれば、熱遮蔽体と原料融液の液面との間隔が狭くなりすぎることがないため、熱遮蔽体によりシリコン単結晶の引き上げを妨げることなくシリコン単結晶を製造することができる。   With such a silicon single crystal manufacturing method, the distance between the heat shield and the liquid surface of the raw material melt does not become too narrow. Crystals can be produced.

また、本発明は、結晶全面がN−領域のシリコン単結晶基板上にエピタキシャル層を有するエピタキシャルシリコンウェーハであって、前記シリコン単結晶基板に、窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、サイズが28nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下で、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするエピタキシャルシリコンウェーハを提供する。 The present invention is also an epitaxial silicon wafer having an epitaxial layer on a silicon single crystal substrate whose entire crystal surface is an N-region, wherein nitrogen is 2 × 10 13 atoms / cm 3 or more in the silicon single crystal substrate. It is doped with a nitrogen concentration of 2 × 10 14 atoms / cm 3 or less, and the number of defects having a size of 28 nm or more is 10 cm or more. Provided is an epitaxial silicon wafer characterized in that BMD having an average size of 45 nm or more detected after heat treatment at 3 hr + 1000 ° C. for 2 hr has a density of 1 × 10 8 / cm 3 or more.

このようなエピタキシャルシリコンウェーハであれば、R−OSF領域起因のBMD密度低下、EP欠陥化、及び、高濃度での窒素ドープした際の板状または棒状のCOPに起因するEP欠陥化がないものとなる。   In such an epitaxial silicon wafer, there is no reduction in BMD density due to the R-OSF region, EP defect, and EP defect due to plate-like or rod-like COP when nitrogen is doped at a high concentration. It becomes.

また、本発明は、鏡面研磨加工された表面を有する結晶全面がN−領域のシリコン単結晶基板であって、窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、TDDB特性の良品率が90%以上で、サイズが45nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下であり、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするシリコン単結晶基板を提供する。 Further, according to the present invention, the entire surface of the crystal having a mirror-polished surface is an N-region silicon single crystal substrate, and nitrogen is 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3. It is doped with the following nitrogen concentration, the yield rate of TDDB characteristics is 90% or more, and the number of defects having a size of 45 nm or more is 10 cm or more, and the average of all substrates in the silicon single crystal block is 2 pieces / piece or less. Provided is a silicon single crystal substrate characterized in that BMD having an average size of 45 nm or more detected after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr has a density of 1 × 10 8 / cm 3 or more.

このようなシリコン単結晶基板であれば、R−OSF領域起因のBMD密度低下なく、TDDB特性が良好なものとなる。   With such a silicon single crystal substrate, the BMD density is not reduced due to the R-OSF region, and the TDDB characteristics are good.

本発明のシリコン単結晶の製造方法であれば、高濃度に窒素をドープすることによって、熱的に安定な大きいサイズの析出核を増加させて、低温・短時間のデバイスプロセスにおいても高いBMD形成能力(ゲッタリング能力)を達成しつつ、結晶育成中の偏析による窒素高濃度化によって生じる欠陥分布変化を矯正・調整して、結晶全長の広い窒素濃度範囲においてもR−OSF領域を回避したシリコン単結晶を製造することができる。
さらに、本発明のエピタキシャルシリコンウェーハであれば、R−OSF領域起因のBMD密度低下、EP欠陥化、及び、高濃度での窒素ドープによる板状または棒状のCOPに起因するEP欠陥化のないものとなる。また、本発明のシリコン単結晶基板であれば、R−OSF領域起因のBMD密度の低下がなく、TDDB特性が良好なものとなる。
In the method for producing a silicon single crystal of the present invention, high-concentration precipitation nuclei are increased by doping nitrogen at a high concentration, so that high BMD formation is achieved even in a low-temperature and short-time device process. Silicon that avoids the R-OSF region even in the nitrogen concentration range with a wide crystal length by correcting and adjusting the defect distribution change caused by nitrogen concentration increase due to segregation during crystal growth while achieving the capability (gettering capability) Single crystals can be produced.
Further, the epitaxial silicon wafer of the present invention has no BMD density reduction, EP defect caused by the R-OSF region, and EP defect caused by plate-like or rod-like COP caused by nitrogen doping at a high concentration. It becomes. In addition, if the silicon single crystal substrate of the present invention is used, the BMD density due to the R-OSF region is not lowered and the TDDB characteristics are good.

本発明に用いることができるチョクラルスキー法によるシリコン単結晶の製造装置の一例を示す図である。It is a figure which shows an example of the manufacturing apparatus of the silicon single crystal by the Czochralski method which can be used for this invention. 比較例1、比較例2、及び、実施例1の引上げ条件でシリコン単結晶を製造した場合の、シリコン単結晶の径方向位置を横軸としたシリコン単結晶の引上げ軸方向における欠陥分布図である。FIG. 3 is a defect distribution diagram in the pulling axis direction of a silicon single crystal when the silicon single crystal is manufactured under the pulling conditions of Comparative Example 1, Comparative Example 2 and Example 1 with the radial position of the silicon single crystal as a horizontal axis. is there. 比較例3におけるエピタキシャルウェーハの欠陥評価の結果を示すグラフである。10 is a graph showing the results of defect evaluation of an epitaxial wafer in Comparative Example 3. 比較例4におけるエピタキシャルウェーハの欠陥評価の結果を示すグラフである。It is a graph which shows the result of the defect evaluation of the epitaxial wafer in the comparative example 4. 実施例2におけるエピタキシャルウェーハの欠陥評価の結果を示すグラフである。6 is a graph showing the results of defect evaluation of an epitaxial wafer in Example 2. 比較例5におけるシリコン単結晶基板のTDDB特性評価の結果を示すグラフである。10 is a graph showing the results of TDDB characteristic evaluation of a silicon single crystal substrate in Comparative Example 5. 比較例6におけるシリコン単結晶基板のTDDB特性評価の結果を示すグラフである。10 is a graph showing the results of TDDB characteristic evaluation of a silicon single crystal substrate in Comparative Example 6. 実施例3におけるシリコン単結晶基板のTDDB特性評価の結果を示すグラフである。10 is a graph showing the results of TDDB characteristic evaluation of a silicon single crystal substrate in Example 3.

以下、本発明について、実施態様の一例として、図を参照しながら詳細に説明するが、本発明はこれに限定されるものではない。
なお、本発明者らが本発明を見出すに至るまでの考察や実験の内容も併せて記載しつつ、本発明のシリコン単結晶の製造方法、エピタキシャルシリコンウェーハ、及び、シリコン単結晶基板を説明する。
Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto.
The silicon single crystal manufacturing method, the epitaxial silicon wafer, and the silicon single crystal substrate of the present invention will be described while also describing the contents of the considerations and experiments until the inventors find the present invention. .

上述のように、窒素ドープしたV−rich結晶を基板に用いたエピタキシャルシリコンウェーハにおいては、ウェーハ外周部でR−OSF領域起因のBMD密度低下、EP欠陥化、及び、高濃度で窒素ドープした際の板状または棒状のCOPに起因するEP欠陥化が問題になる場合があった。   As described above, in the epitaxial silicon wafer using the nitrogen-doped V-rich crystal as the substrate, the BMD density is lowered due to the R-OSF region at the outer periphery of the wafer, the EP defect is formed, and nitrogen doping is performed at a high concentration. In some cases, EP defect caused by the plate-like or rod-like COP becomes a problem.

これに対して、本発明者らは、特許文献2にあるような、窒素ドープしたN(Neutral)領域で製造された低/無欠陥結晶のシリコン単結晶基板またはそれを基板に用いたエピタキシャルシリコンウェーハであれば、R−OSF領域起因のBMD密度低下の問題を解消しつつ、窒素ドープによる熱的に安定な(大きいサイズの)析出核の増加とウェーハ表層デバイス動作領域の低/無欠陥要求を両立することができると考えた。   On the other hand, the present inventors have disclosed a low / defect-free silicon single crystal substrate manufactured in a nitrogen-doped N (Neutral) region as in Patent Document 2 or epitaxial silicon using the same as the substrate. In the case of a wafer, while solving the problem of decrease in BMD density due to the R-OSF region, an increase in thermally stable (large size) precipitation nuclei due to nitrogen doping and a low / defect-free requirement in the wafer surface layer device operating region I thought that it was possible to achieve both.

しかしながら、このような考えに基づき、本発明者らが鋭意研究を進める中、窒素ドープをおこない、N−領域で低/無欠陥結晶をチョクラルスキー法により製造する際に、結晶成長軸方向全長においてR−OSF領域を回避することが困難で、結晶一本の中での歩留りが極めて低くなる問題に直面した。   However, based on this idea, while the present inventors are diligently researching, when nitrogen doping is performed and a low / defect-free crystal is produced by the Czochralski method in the N-region, the total length in the crystal growth axis direction In this case, it was difficult to avoid the R-OSF region, and the yield in one crystal was extremely low.

具体的には、窒素をドープしないN−領域での低/無欠陥結晶の製造において、R−OSF領域を回避して結晶成長軸方向全長においてN−領域を高歩留まりで採取するような育成方法(特許文献3から7)を用いても、窒素をドープした際には、結晶成長軸方向全長のうち窒素濃度の低い一部の範囲でしかR−OSFを回避したN−領域での低/無欠陥結晶の製造はできなかった。   Specifically, in the production of a low / defect-free crystal in an N-region that is not doped with nitrogen, a growth method that avoids the R-OSF region and collects the N-region at a high yield along the entire length in the crystal growth axis Even when (Patent Documents 3 to 7) are used, when nitrogen is doped, the low / N in the N-region where R-OSF is avoided only in a part of the total length in the crystal growth axis direction where the nitrogen concentration is low. A defect-free crystal could not be produced.

また、窒素をドープしたN−領域での低/無欠陥結晶の製造に関する特許文献8に示されているように、TDDB特性が優れ、BMD密度バラツキの小さいウェーハを提供可能とする3×1013atoms/cm以下の窒素濃度では、デバイスプロセス前に熱的に安定な(大きいサイズの)析出核を増加させるには不十分で、先端の低温・短時間のデバイスプロセスにおける高BMD密度(ゲッタリング能力)に対する要求を満たすものではなかった。 Further, as shown in Patent Document 8 relating to the production of a low / defect-free crystal in an N-region doped with nitrogen, 3 × 10 13 which can provide a wafer with excellent TDDB characteristics and small variation in BMD density. A nitrogen concentration of atoms / cm 3 or less is insufficient to increase thermally stable (large size) precipitation nuclei before the device process, and a high BMD density (getter) in the low-temperature and short-time device process at the tip. It did not meet the demand for (ring ability).

また、窒素濃度を、デバイスプロセス前に熱的に安定な(大きいサイズの)析出核を増加させるに十分な3×1013atoms/cm以上の高窒素濃度とすると、特許文献2に記載されているように結晶中心部の温度勾配Gcと結晶周辺部分の温度勾配Geとの差をΔG=Ge−Gc≦5℃/cmとしても、特許文献9に記載されているように結晶育成中の偏析による窒素濃度変化に応じた引上げ速度の調整を行なっても、ウェーハ外周部でR−OSF領域が発生し易くなり、それを回避するために結晶成長速度を低下させるとウェーハ中心部のBMDの数が減少して面内のBMD密度(ゲッタリング能力)の不均一化が生じることや、場合によってはウェーハ中心部で転位ループや転位クラスターを有するI−rich領域となってしまう問題が生じた。 Further, if the nitrogen concentration is set to a high nitrogen concentration of 3 × 10 13 atoms / cm 3 or more sufficient to increase thermally stable (large size) precipitation nuclei before the device process, it is described in Patent Document 2. As shown in Patent Document 9, even if the difference between the temperature gradient Gc at the center of the crystal and the temperature gradient Ge at the periphery of the crystal is ΔG = Ge−Gc ≦ 5 ° C./cm, Even if the pulling rate is adjusted according to the change in nitrogen concentration due to segregation, the R-OSF region is likely to be generated at the outer peripheral portion of the wafer. To avoid this, if the crystal growth rate is lowered, the BMD in the central portion of the wafer is reduced. As the number decreases, the in-plane BMD density (gettering ability) becomes non-uniform, and in some cases, it becomes an I-rich region having dislocation loops and dislocation clusters in the center of the wafer. A problem occurred.

これらの問題に直面し、更に本発明者が鋭意研究を進めた結果、窒素をドープしたN−領域での低/無欠陥結晶の製造においては、窒素濃度に応じて結晶周辺部(結晶外周部)で欠陥領域の変化が生じることを見出した。   Faced with these problems, the present inventor has further intensively studied. As a result, in the production of low / defect-free crystals in the N-region doped with nitrogen, the crystal peripheral portion (crystal outer peripheral portion depends on the nitrogen concentration). ) Found that the defect area changed.

次に、窒素濃度に応じた結晶周辺部での欠陥領域の変化について具体的に説明する。   Next, the change of the defect region around the crystal according to the nitrogen concentration will be specifically described.

結晶の熱環境以外の要因による欠陥分布の変化は、特許文献10にあるように、点欠陥の外方拡散によるものとして理解できる。結晶周辺部では、格子間シリコンや空孔などの点欠陥の外方拡散の影響が大きくなり、空孔の外方拡散は結晶周辺部での残留空孔濃度を減少させる効果がある。しかしながら、窒素が高濃度でドープされると、窒素と空孔のペア(NVペア)形成によって空孔の外方拡散が抑制される。   The change in the defect distribution due to factors other than the thermal environment of the crystal can be understood as being due to the outward diffusion of point defects, as described in Patent Document 10. In the periphery of the crystal, the influence of outward diffusion of point defects such as interstitial silicon and vacancies increases, and the outward diffusion of vacancies has the effect of reducing the residual vacancy concentration in the periphery of the crystal. However, when nitrogen is doped at a high concentration, the outward diffusion of vacancies is suppressed by forming a pair of nitrogen and vacancies (NV pairs).

そのため、窒素をドープしない場合と比べて窒素をドープした場合には、窒素の濃度が高くなるほど結晶周辺部の残留空孔濃度が上昇してしまい、結晶周辺部の欠陥領域がR−OSF領域側にシフトしていくこととなる。   Therefore, in the case where nitrogen is doped as compared with the case where nitrogen is not doped, the residual vacancy concentration in the crystal peripheral portion increases as the nitrogen concentration increases, and the defect region in the crystal peripheral portion becomes the R-OSF region side. It will shift to.

本発明者らは、これが、窒素をドープしてN−領域での低/無欠陥結晶を製造した際に、ウェーハ外周部でR−OSF領域が発生し易くなり、それを回避するために結晶成長速度を低下させるとウェーハ中心部のBMDが減少して面内のBMD密度(ゲッタリング能力)の不均一化が生じることや、場合によってはウェーハ中心部で転位ループや転位クラスターを有するI−rich領域となってしまった問題の原因であり、概ね窒素濃度が2×1013atoms/cmから空孔の外方拡散抑制の影響がみられ、3×1013atoms/cm以上となると深刻に結晶歩留りに影響を与えるレベルとなっていることを見出した。 In order to avoid the R-OSF region, which is likely to occur in the outer peripheral portion of the wafer when the present inventors manufacture a low / defect-free crystal in the N-region by doping nitrogen. When the growth rate is lowered, the BMD at the center of the wafer is reduced and the in-plane BMD density (gettering ability) becomes non-uniform, and in some cases, I-having dislocation loops and dislocation clusters at the center of the wafer. This is the cause of the problem that has become the rich region. When the nitrogen concentration is approximately 2 × 10 13 atoms / cm 3 , the effect of suppressing the outward diffusion of vacancies is observed, and when it becomes 3 × 10 13 atoms / cm 3 or more. It was found that the level seriously affects the crystal yield.

本発明は、このように本発明者らの鋭意研究によって完成されたものであり、窒素ドープのN−領域で製造された低/無欠陥結晶のシリコン単結晶基板及びそれを基板に用いたエピタキシャルシリコンウェーハにおいて、窒素の偏析の影響を考慮したシリコン単結晶の結晶育成を行ない、この育成したシリコン単結晶を用いてシリコン単結晶基板及びそれを基板に用いたエピタキシャルシリコンウェーハを作製することで、R−OSF領域起因の問題を完全に解消し、窒素ドープによる熱的に安定な(大きいサイズの)析出核の増加とウェーハ表層デバイス動作領域の低/無欠陥要求の両立が可能となることを見出し、本発明に到達した。   The present invention has thus been completed by the present inventors' extensive research, and is a low / defect-free silicon single crystal substrate manufactured in a nitrogen-doped N-region and an epitaxial using the same as the substrate. In the silicon wafer, crystal growth of the silicon single crystal considering the influence of nitrogen segregation is performed, and using this grown silicon single crystal, a silicon single crystal substrate and an epitaxial silicon wafer using the substrate are produced. The problem caused by the R-OSF region can be completely solved, and the increase of thermally stable (large size) precipitation nuclei by nitrogen doping and the low / defect-free requirement of the wafer surface layer device operating region can be achieved. The headline, the present invention has been reached.

まず、本発明のシリコン単結晶育成方法について詳述する。   First, the silicon single crystal growth method of the present invention will be described in detail.

本発明は、チョクラルスキー法によって、結晶全面がN−領域となる条件で引上げることによってシリコン単結晶を育成する方法であって、シリコン単結晶を育成する際に、窒素を2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープし、シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geの比をGe/Gc>1となるようにし、Ge/Gcを、シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくすることを特徴とするシリコン単結晶の製造方法である。ここで、結晶周辺部はシリコン単結晶の外周端から概ね直径の1/3以下の領域内で適宜決定する。 The present invention is a method of growing a silicon single crystal by pulling it up under the condition that the entire crystal surface becomes an N-region by the Czochralski method. When growing the silicon single crystal, 2 × 10 13 nitrogen is used. Doping is performed at a nitrogen concentration of atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3 or less, and the ratio of the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal to the temperature gradient Ge at the periphery of the crystal is expressed as Ge. / Gc> 1, and the method for producing a silicon single crystal is characterized in that Ge / Gc is gradually increased in accordance with an increase in nitrogen concentration due to segregation during pulling of the silicon single crystal. Here, the peripheral portion of the crystal is appropriately determined within a region approximately 1/3 or less of the diameter from the outer peripheral edge of the silicon single crystal.

このようなシリコン単結晶の製造方法であれば、高濃度に窒素をドープすることによって、熱的に安定な大きいサイズの析出核を増加させて、低温・短時間のデバイスプロセスにおいても高いBMD形成能力(ゲッタリング能力)を達成しつつ、結晶育成中の偏析による窒素高濃度化によって生じる欠陥分布変化を矯正・調整して、結晶全長の広い窒素濃度範囲においてもR−OSF領域を回避したシリコン単結晶を製造することができる。   With such a method for producing a silicon single crystal, high-concentration precipitation nuclei are increased by doping nitrogen at a high concentration, and high BMD formation can be achieved even in a low-temperature and short-time device process. Silicon that avoids the R-OSF region even in the nitrogen concentration range with a wide crystal length by correcting and adjusting the defect distribution change caused by nitrogen concentration increase due to segregation during crystal growth while achieving the capability (gettering capability) Single crystals can be produced.

また、本発明のシリコン単結晶の製造方法により製造されたシリコン単結晶を用いることで、シリコン単結晶基板及びそれを用いたエピタキシャルシリコンウェーハにおいて、高窒素濃度でドープすることによるR−OSF領域起因の弊害がなくなるため、低温・短時間のデバイスプロセスにおいても高いBMD形成能力(ゲッタリング能力)を有するウェーハを高歩留まりで得ることが可能となる。   Further, by using the silicon single crystal manufactured by the method for manufacturing a silicon single crystal of the present invention, the silicon single crystal substrate and the epitaxial silicon wafer using the silicon single crystal substrate are doped with a high nitrogen concentration, resulting in the R-OSF region. Therefore, a wafer having a high BMD formation capability (gettering capability) can be obtained with a high yield even in a low-temperature and short-time device process.

窒素をドープしない際に結晶全長・全面でN−領域を得られるように結晶成長中の温度分布が調整された条件において、窒素ドープ量を、2×1013atoms/cmより小さい窒素濃度とした場合には、欠陥分布への影響は軽微で、シリコン単結晶基板とした状態でのTDDB特性やシリコン単結晶基板を用いたエピタキシャルシリコンウェーハでのEP欠陥発生はほとんど問題にならない。 Under the condition that the temperature distribution during crystal growth is adjusted so that the N-region can be obtained over the entire length of the crystal and the entire surface when not doped with nitrogen, the nitrogen doping amount is set to a nitrogen concentration smaller than 2 × 10 13 atoms / cm 3. In this case, the influence on the defect distribution is negligible, and the TDDB characteristics in a state where the silicon single crystal substrate is used and the generation of EP defects in the epitaxial silicon wafer using the silicon single crystal substrate are hardly a problem.

しかしながら、3×1013atoms/cmの窒素濃度になると、欠陥分布への影響がみられ、シリコン単結晶基板とした状態でのTDDB特性の悪化や、シリコン単結晶基板を用いたエピタキシャルシリコンウェーハでのEP欠陥発生が生じてくる。また、特許文献9に示されているように、窒素濃度に応じて引上げ速度を調整(窒素濃度増加に応じて引上げ速度を遅く調整)しても、この窒素濃度では先端デバイスプロセスに用いるような低温・短時間の熱処理では十分なBMD密度は得られない。 However, when the nitrogen concentration is 3 × 10 13 atoms / cm 3 , the defect distribution is affected, and the TDDB characteristics deteriorate when the silicon single crystal substrate is used, or an epitaxial silicon wafer using the silicon single crystal substrate. In this case, an EP defect occurs. Further, as shown in Patent Document 9, even if the pulling rate is adjusted according to the nitrogen concentration (the pulling rate is adjusted slowly according to the increase in the nitrogen concentration), this nitrogen concentration is used for the advanced device process. A sufficient BMD density cannot be obtained by low-temperature and short-time heat treatment.

3×1013atoms/cm以上の窒素濃度であれば、先端デバイスプロセスに用いるような低温・短時間の熱処理で十分なBMD密度を得るのに有効であるが、特に結晶周辺部で欠陥分布変化が大きくなり、シリコン単結晶基板とした状態でのTDDB特性の更なる悪化や、エピタキシャルシリコンウェーハでのEP欠陥発生が重度化する。この窒素濃度範囲においては、特許文献9の窒素濃度増加に対して引上げ速度を遅く調整することによって十分に改善することはできず、結晶外周部におけるシリコン単結晶ウェーハとした場合のTDDB特性やエピタキシャルシリコンウェーハでのEP欠陥発生を改善できるまで引上げ速度を遅くすると、ウェーハ中心部のBMDが減少して面内のBMD密度(ゲッタリング能力)の不均一が生じることや、場合によってはウェーハ中心部で転位ループや転位クラスターを有するI−rich領域となってしまって中心部でEP欠陥が生じてしまう。 A nitrogen concentration of 3 × 10 13 atoms / cm 3 or more is effective for obtaining a sufficient BMD density by low-temperature and short-time heat treatment as used in the advanced device process. The change becomes large, and further deterioration of the TDDB characteristic in the state of the silicon single crystal substrate and generation of EP defects in the epitaxial silicon wafer become serious. In this nitrogen concentration range, it cannot be sufficiently improved by slowing the pulling rate with respect to the increase in nitrogen concentration in Patent Document 9, and the TDDB characteristics and epitaxial properties in the case of a silicon single crystal wafer in the outer periphery of the crystal. If the pulling speed is slowed down until EP defect generation on the silicon wafer can be improved, the BMD at the center of the wafer decreases, resulting in in-plane BMD density (gettering ability) non-uniformity, and in some cases the center of the wafer Thus, an I-rich region having a dislocation loop or a dislocation cluster is formed, and an EP defect occurs in the central portion.

6×1013atoms/cm以上の窒素濃度では、先端デバイスプロセスに用いるような低温・短時間の熱処理で十分なBMD密度を得るのにより好ましいが、特に結晶周辺部で欠陥分布変化が更に大きくなり、シリコン単結晶基板とした状態でのTDDB特性の悪化や、シリコン単結晶基板を用いたエピタキシャルシリコンウェーハでのEP欠陥発生がより重度となる。この窒素濃度範囲においては、特許文献9の窒素濃度増加に対して引上げ速度を遅く調整することによって十分に改善することはできず、結晶周辺部におけるシリコン単結晶基板とした状態でのTDDB特性やシリコン単結晶基板を用いたエピタキシャルシリコンウェーハでのEP欠陥発生を改善できるまで引上げ速度を遅くすると、もはや全面N−領域を保持することができず、ウェーハ中心部で転位ループや転位クラスターを有するI−rich領域となって、それを元にした中心部でEP欠陥が生じてしまう。 A nitrogen concentration of 6 × 10 13 atoms / cm 3 or more is preferable to obtain a sufficient BMD density by low-temperature and short-time heat treatment as used in the advanced device process, but the defect distribution change is particularly large at the periphery of the crystal. Thus, the deterioration of the TDDB characteristics in the state where the silicon single crystal substrate is formed and the generation of EP defects in the epitaxial silicon wafer using the silicon single crystal substrate become more serious. In this nitrogen concentration range, it cannot be sufficiently improved by adjusting the pulling rate slower with respect to the increase in nitrogen concentration in Patent Document 9, and the TDDB characteristics in a state where a silicon single crystal substrate is formed in the periphery of the crystal. If the pulling rate is slowed down until the generation of EP defects in an epitaxial silicon wafer using a silicon single crystal substrate can be improved, the entire N-region can no longer be retained, and I having dislocation loops and dislocation clusters in the center of the wafer. A -rich region is formed, and an EP defect occurs in the central portion based on the -rich region.

本発明のシリコン単結晶の製造方法であれば、先端デバイスプロセスに用いるような低温・短時間の熱処理で十分なBMD密度を得るのに最適な窒素濃度3.2×1014atoms/cmまで、製造されたシリコン単結晶を用いてシリコン単結晶基板を製造したときのTDDB特性が良好で、このシリコン単結晶基板を用いてエピタキシャルシリコンウェーハとした状態でのEP欠陥発生もないウェーハを得ることができる。 With the silicon single crystal manufacturing method of the present invention, a nitrogen concentration of 3.2 × 10 14 atoms / cm 3 is optimal for obtaining a sufficient BMD density by low-temperature and short-time heat treatment as used in advanced device processes. To obtain a wafer having good TDDB characteristics when a silicon single crystal substrate is manufactured using the manufactured silicon single crystal, and no EP defects are generated in the state of using the silicon single crystal substrate as an epitaxial silicon wafer. Can do.

本発明においては、例えば図1に示すようなシリコン単結晶の製造装置14であって、チョクラルスキー法によって結晶全面がN−領域となる条件で引上げることでシリコン単結晶を育成することが可能なシリコン単結晶の製造装置を用いる。このようなシリコン単結晶の製造装置について図1を参照して説明するが、本発明において用いることができる単結晶製造装置は、これに限定されない。   In the present invention, for example, a silicon single crystal manufacturing apparatus 14 as shown in FIG. 1 can grow a silicon single crystal by pulling it up under the condition that the entire surface of the crystal becomes an N-region by the Czochralski method. A silicon single crystal manufacturing apparatus that can be used is used. Such a silicon single crystal manufacturing apparatus will be described with reference to FIG. 1, but the single crystal manufacturing apparatus that can be used in the present invention is not limited to this.

図1に示すシリコン単結晶の製造装置14の外観は、メインチャンバー1、これに連通する引上げチャンバー2で構成されている。メインチャンバー1の内部には、黒鉛ルツボ6及び石英ルツボ5が設置されている。黒鉛ルツボ6及び石英ルツボ5を囲むようにヒーター7が設けられており、ヒーター7によって、石英ルツボ5内に収容された原料シリコン多結晶が溶融されて原料融液4とされる。また、断熱部材8が設けられており、ヒーター7からの輻射熱のメインチャンバー1等への影響を防いでいる。   The external appearance of the silicon single crystal manufacturing apparatus 14 shown in FIG. 1 includes a main chamber 1 and a pulling chamber 2 communicating with the main chamber 1. A graphite crucible 6 and a quartz crucible 5 are installed inside the main chamber 1. A heater 7 is provided so as to surround the graphite crucible 6 and the quartz crucible 5, and the raw material silicon polycrystal accommodated in the quartz crucible 5 is melted by the heater 7 to form a raw material melt 4. Further, a heat insulating member 8 is provided to prevent the radiant heat from the heater 7 from affecting the main chamber 1 and the like.

原料融液4の融液面上では熱遮蔽体12が、融液面に所定間隔で対向配置され、原料融液4の融液面からの輻射熱を遮断している。このルツボ中に種結晶を浸漬した後、原料融液4から棒状の単結晶棒3が引き上げられる。ルツボは結晶成長軸方向に昇降可能であり、単結晶の成長が進行して減少した原料融液4の液面下降分を補うように、成長中にルツボを上昇させることにより、原料融液4の融液面の高さはおおよそ一定に保たれる。   On the melt surface of the raw material melt 4, the heat shield 12 is disposed opposite to the melt surface at a predetermined interval to block radiant heat from the melt surface of the raw material melt 4. After immersing the seed crystal in the crucible, the rod-shaped single crystal rod 3 is pulled up from the raw material melt 4. The crucible can be moved up and down in the direction of the crystal growth axis, and the raw material melt 4 is raised by raising the crucible during the growth so as to compensate for the lowering of the liquid surface of the raw material melt 4 that has decreased as the growth of the single crystal proceeds. The height of the melt surface is kept approximately constant.

さらに、単結晶育成時にパージガスとしてアルゴンガス等の不活性ガスが、ガス導入口10から導入され、引き上げ中の単結晶棒3とガス整流筒11との間を通過した後、熱遮蔽体12と原料融液4の融液面との間を通過し、ガス流出口9から排出している。導入するガスの流量と、ポンプや弁によるガスの排出量を制御することにより、引上げ中のチャンバー内の圧力が制御される。   Further, an inert gas such as argon gas is introduced from the gas inlet 10 as a purge gas during single crystal growth, and after passing between the single crystal rod 3 being pulled up and the gas rectifying cylinder 11, It passes between the melt surface of the raw material melt 4 and is discharged from the gas outlet 9. By controlling the flow rate of gas to be introduced and the amount of gas discharged by a pump or valve, the pressure in the chamber being pulled up is controlled.

また、CZ法によって結晶を育成するに際し、磁場印加装置13によって磁場を印加してもよい。   Further, when growing a crystal by the CZ method, a magnetic field may be applied by the magnetic field application device 13.

ここで、なぜ、シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geを、Ge/Gc>1となるようにし、Ge/Gcを、シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくするとよいのかを論理的に説明する。   Here, why the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal and the temperature gradient Ge at the periphery of the crystal are such that Ge / Gc> 1, and Ge / Gc is pulled up by the silicon single crystal. It will be logically explained whether it should be gradually increased as the nitrogen concentration increases due to segregation.

偏析により窒素濃度が増加するに従って、NVペア形成が増加して、結晶外表面への空孔(Vacancy)の外方拡散が減少し、結晶周辺の残留Vacancy濃度が高濃度化するため、結晶周辺がVacancy優勢の欠陥領域にシフトしていく。   As the nitrogen concentration increases due to segregation, the formation of NV pairs increases, the outward diffusion of vacancies to the outer surface of the crystal decreases, and the residual vacancy concentration around the crystal increases. Shifts to a defect dominant defect area.

窒素の偏析によって結晶周辺の欠陥領域がVacancy優勢側にシフトしたままでは、結晶周辺の残留Vacancy濃度が結晶中心〜r/2(ここでrはシリコン単結晶の半径である。)の残留Vacancy濃度より高いことによるBMD分布の不均一化や、外周部での欠陥領域のN−領域からR−OSF領域へのシフトがおこってしまう。   If the defect region around the crystal is shifted to the vacancy dominant side due to the segregation of nitrogen, the residual vacancy concentration around the crystal is the residual vacancy concentration between the crystal center and r / 2 (where r is the radius of the silicon single crystal). Due to the fact that it is higher, the BMD distribution becomes non-uniform, and the defect region at the outer peripheral portion shifts from the N-region to the R-OSF region.

これを回避するには、NVペア形成の影響によって結晶周辺で残留Vacancyが多くなる分を、予め固液界面のVacancy取込み量で調整することが有効となる。   In order to avoid this, it is effective to adjust in advance the amount of residual vacancy around the crystal due to the influence of NV pair formation by the amount of vacancy taken at the solid-liquid interface.

つまり、固液界面の結晶周辺以外の部分で取り込まれるVacancy量よりも、結晶周辺部で取り込まれるVacancy量を少なくする。   That is, the amount of vacancy taken in at the periphery of the crystal is made smaller than the amount of vacancy taken in at a portion other than the periphery of the crystal at the solid-liquid interface.

シリコン単結晶成長における点欠陥の取り込みに関しては、ボロンコフの理論が広く知られており、シリコン単結晶の成長速度Vと界面近傍の温度勾配Gとの比V/Gに依存して点欠陥濃度が決定される。   Boronkov's theory is widely known for the incorporation of point defects in silicon single crystal growth, and the point defect concentration depends on the ratio V / G between the growth rate V of the silicon single crystal and the temperature gradient G in the vicinity of the interface. It is determined.

Vacancy濃度と格子間シリコン(Interstial−Si)濃度が拮抗するV/Gに対して、V/Gが大きければ固液界面でのVacancy濃度が増加し、小さければ固液界面のInterstial−Si濃度が増加する。   In contrast to V / G where the vacancy concentration and the interstitial silicon (interstitial-Si) concentration antagonize, if V / G is large, the vacancy concentration at the solid-liquid interface increases, and if V / G is small, the interstitial-Si concentration at the solid-liquid interface is To increase.

そのため、ボロンコフの理論に基づき、NVペア形成の影響によって結晶周辺で残留Vacancyが多くなる分を、予め、結晶周辺のV/Geを中心のV/Gcよりも小さい値になるようにする。すなわち、
V/Gc>V/Ge
とする。
Therefore, based on the Boronkov theory, the amount of increase in residual vacancy around the crystal due to the influence of the NV pair formation is set in advance so that V / Ge around the crystal is smaller than V / Gc around the center. That is,
V / Gc> V / Ge
And

定常的な単結晶育成中、結晶成長方向に垂直な面での成長速度Vは結晶中心部から結晶周辺部で同一であるため、1/Gc>1/Ge、Ge/Gc>1とすることが有効であり、窒素濃度が増加するに従ってNVペア形成の影響によって結晶周辺部で残留Vacancyが多くなる分を、Ge/Gcが徐々に大きくなるようにして相殺することが可能となる。   During steady single crystal growth, the growth rate V in the plane perpendicular to the crystal growth direction is the same from the crystal center to the crystal periphery, so 1 / Gc> 1 / Ge and Ge / Gc> 1. Is effective, and the increase in residual vacancy at the periphery of the crystal due to the effect of NV pair formation as the nitrogen concentration increases can be offset as Ge / Gc gradually increases.

Ge/Gcの調整は、石英ルツボ5内の原料融液直上に配置された熱遮蔽体12と前記原料融液の液面との間隔を制御すること、前記石英ルツボ5を囲うように配置されたヒーター7の位置を前記原料融液の液面に対して低くすること、前記シリコン単結晶の製造装置のメインチャンバー1の外側に配置された磁場印加装置13の磁場強度を弱くすること、及び、前記磁場印加装置13の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって行なうことが好ましい。このようなGe/Gcの調整方法であれば、製造装置を大きく変更することがないため、簡便にGe/Gcを調整することが可能となる。   The Ge / Gc is adjusted by controlling the distance between the heat shield 12 disposed immediately above the raw material melt in the quartz crucible 5 and the liquid surface of the raw material melt, and surrounding the quartz crucible 5. Lowering the position of the heater 7 with respect to the liquid surface of the raw material melt, weakening the magnetic field strength of the magnetic field applying device 13 disposed outside the main chamber 1 of the silicon single crystal manufacturing device, and It is preferable that the position of the magnetic field application device 13 is lowered by any one or a combination of two or more. With such a Ge / Gc adjustment method, the manufacturing apparatus is not significantly changed, and Ge / Gc can be easily adjusted.

なぜ、このようなGe/Gcの調整方法によって、Ge/Gcが大きくなるのかを説明する。   The reason why Ge / Gc is increased by such a Ge / Gc adjustment method will be described.

Ge/Gcを大きくする方法には、Geを大きくする方法とGcを小さくする方法の二つがある。   There are two methods for increasing Ge / Gc: a method for increasing Ge and a method for decreasing Gc.

Geを大きくするには、固液界面上部の結晶側面部への熱輻射(輻射による熱供給)を減らすことが有効である。その具体的方法としては、原料融液4直上の熱遮蔽体12と原料融液4の液面との間隔を狭くして、黒鉛ルツボ6外側に配置されている熱源の加熱用のヒーター7からの熱輻射の一部を遮熱する方法、熱源の加熱用のヒーター7を原料融液4の液面位置に対して低く配置して固液界面上部への熱輻射を減らす方法がある。   In order to increase Ge, it is effective to reduce the heat radiation (heat supply by radiation) to the crystal side surface portion above the solid-liquid interface. As a specific method, the distance between the heat shield 12 directly above the raw material melt 4 and the liquid surface of the raw material melt 4 is narrowed, and the heater 7 for heating the heat source disposed outside the graphite crucible 6 is used. There is a method of shielding a part of the heat radiation, and a method of reducing the heat radiation to the upper part of the solid-liquid interface by disposing the heater 7 for heating the heat source lower than the liquid surface position of the raw material melt 4.

なお、炉内ガスの熱伝導やガスの流れによる対流伝熱によっても僅かにGeは変化するが、融点1420℃以上の高温環境が主となるCZ法によるシリコン単結晶製造環境においては熱輻射の影響が支配的となるため、熱輻射による制御が重要となる。   Although Ge is slightly changed by heat conduction of the gas in the furnace and convective heat transfer due to the gas flow, in a silicon single crystal manufacturing environment by the CZ method mainly having a high temperature environment with a melting point of 1420 ° C. or higher, heat radiation Since the influence becomes dominant, control by thermal radiation is important.

Gcを小さくする方法は、固液界面(融点等温線)の高さを低下させ、固液界面上部との温度勾配を緩和する方法となり、磁場による結晶成長界面下部の融液対流の抑制を弱め、結晶育成中に発生した凝固潜熱を対流で取り除きやすくする。凝固潜熱が対流によって取り除かれるようになると、そうでない場合と比較して、熱バランスによって固液界面の高さが低下することとなる。このとき、結晶最外周部の融点等温線は常に原料融液4表面につながっているため、Gcが選択的に小さくなることとなる。   The method of reducing Gc reduces the height of the solid-liquid interface (melting point isotherm) and relaxes the temperature gradient with the upper part of the solid-liquid interface, and weakens the suppression of melt convection at the lower part of the crystal growth interface by a magnetic field. This makes it easy to remove the latent heat of solidification generated during crystal growth by convection. When the latent heat of solidification is removed by convection, the height of the solid-liquid interface is reduced due to heat balance as compared to the case where it is not. At this time, since the melting point isotherm of the outermost peripheral part of the crystal is always connected to the surface of the raw material melt 4, Gc is selectively reduced.

磁場により結晶成長界面下部の融液対流の抑制を弱める方法としては、磁場位置を同一のままにする場合には、磁場強度を弱める方法がある。また、磁場強度を固定とする場合は、磁場位置を原料融液4表面位置から離す方法がある。磁場位置、磁場強度どちらも変更可能な場合には、磁場強度を弱くする方法と磁場位置を変更する方法を組み合わせてもよい。   As a method of weakening suppression of melt convection below the crystal growth interface by a magnetic field, there is a method of weakening the magnetic field strength when the magnetic field position remains the same. When the magnetic field strength is fixed, there is a method of separating the magnetic field position from the surface position of the raw material melt 4. When both the magnetic field position and the magnetic field strength can be changed, a method of weakening the magnetic field strength and a method of changing the magnetic field position may be combined.

固液界面の高さを低下させる方法として、結晶回転を弱めることでも固液界面を低下させることができるが、面内のドーパント濃度、酸素濃度の不均一につながるため、固液界面部の磁場強度を弱める方法が好ましい。   As a method of reducing the height of the solid-liquid interface, the solid-liquid interface can also be lowered by weakening the crystal rotation. However, since the in-plane dopant concentration and oxygen concentration are not uniform, the magnetic field at the solid-liquid interface part is reduced. A method of reducing the strength is preferred.

また、Ge/Gcの調整を、熱遮蔽体12と原料融液4の液面との間隔を制御することによって行なう際に、窒素をドープしない場合に結晶全面がN−領域となる条件における熱遮蔽体12と原料融液4の液面との間隔をDとしたときに、窒素をドープする場合の熱遮蔽体12と原料融液4の液面との間隔を、窒素濃度に応じて、D’/D=0.94−窒素濃度/(2.41×1015)から求めたD’となるように変化させることが好ましい。 Further, when Ge / Gc is adjusted by controlling the distance between the thermal shield 12 and the liquid surface of the raw material melt 4, the heat under the condition that the entire crystal surface becomes an N− region when nitrogen is not doped. When the distance between the shield 12 and the liquid surface of the raw material melt 4 is D, the distance between the heat shield 12 and the liquid surface of the raw material melt 4 when doping nitrogen is determined according to the nitrogen concentration. It is preferable to change so that it may become D 'calculated | required from D' / D = 0.94-nitrogen concentration / (2.41 * 10 < 15 >).

このようなGe/Gcの調整方法であれば、Ge/Gcの調整を、窒素濃度に応じて、熱遮蔽体12と原料融液4の液面との間隔を調整することによって行うことができるため、より簡便かつ正確にGe/Gcを調整することが可能となる。   With such a Ge / Gc adjustment method, the Ge / Gc adjustment can be performed by adjusting the distance between the heat shield 12 and the liquid surface of the raw material melt 4 according to the nitrogen concentration. Therefore, Ge / Gc can be adjusted more easily and accurately.

どのようにして、このD’の関係式を導いたのかを記載する。   It is described how this D 'relational expression was derived.

第一に、全面でN−領域を得られる原料融液4直上の熱遮蔽体12と融液との間隔Dとして、窒素をドープしない場合、窒素を2−2.2×1013、3−3.2×1013、6−6.2×1013、1−1.2×1014、1.5−1.7×1014、2.2−2.4×1014、3−3.2×1014atoms/cmの窒素濃度でドープした場合それぞれに対して、窒素以外の条件は同一として、直胴成長中に引上げ速度を徐々に漸減させて、シリコン単結晶ブロック内に欠陥領域V−rich、R−OSF領域、Nv領域、Ni領域、I−rich領域を含むようにし、得られたシリコン単結晶ブロックから結晶成長軸方向に平行なサンプルを切り出し、ウェット酸化雰囲気で800℃4hr+1000℃16hrの熱処理を施し、X線トポグラフ法(XRT)にて各窒素濃度による欠陥分布の変化を調査した。 First, as the distance D between the heat shield 12 and the melt directly above the raw material melt 4 that can obtain the N-region on the entire surface, when nitrogen is not doped, nitrogen is 2-2.2 × 10 13 , 3- 3.2 × 10 13, 6-6.2 × 10 13, 1-1.2 × 10 14, 1.5-1.7 × 10 14, 2.2-2.4 × 10 14, 3-3 In the case of doping with a nitrogen concentration of 2 × 10 14 atoms / cm 3 , the conditions other than nitrogen were the same, and the pulling rate was gradually decreased during the growth of the straight body, so that there was a defect in the silicon single crystal block. A region V-rich, R-OSF region, Nv region, Ni region, and I-rich region were included, and a sample parallel to the crystal growth axis direction was cut out from the obtained silicon single crystal block and 800 ° C. in a wet oxidizing atmosphere. Heat treatment at 4 hr + 1000 ° C for 16 hr Applied, it was to investigate the changes in the defect distribution by each of the nitrogen concentration in the X-ray topography (XRT).

第二に、各窒素濃度において、原料融液4直上の熱遮蔽体12と原料融液4の液面との間隔を変化させ、窒素をドープしない場合と同等のN−領域の分布が得られる原料融液4直上の熱遮蔽体12と原料融液4の液面との間隔D’を求めた。   Second, at each nitrogen concentration, the distance between the heat shield 12 immediately above the raw material melt 4 and the liquid surface of the raw material melt 4 is changed, and an N-region distribution equivalent to that obtained when nitrogen is not doped is obtained. The distance D ′ between the heat shield 12 immediately above the raw material melt 4 and the liquid surface of the raw material melt 4 was determined.

第三に、窒素濃度に対する熱遮蔽体12と原料融液4の液面との間隔D’と間隔Dの比の変化の関係式を最小二乗法によって求め、D’/D=0.94−窒素濃度/(2.41×1015)を得た。 Third, a relational expression of a change in the ratio of the distance D ′ between the heat shield 12 and the liquid surface of the raw material melt 4 to the nitrogen concentration and the ratio of the distance D is obtained by the least square method, and D ′ / D = 0.94− Nitrogen concentration / (2.41 × 10 15 ) was obtained.

求めたD’が20mmより大きくなる場合には、熱遮蔽体12と原料融液4の液面との間隔を求めたD’とすることでGe/Gcを調整し、求めたD’が20mm以下となる場合には、熱遮蔽体12と原料融液4の液面との間隔を20mmとし、さらに、石英ルツボ5を囲うように配置されたヒーター7の位置を前記原料融液4の液面に対して低くすること、シリコン単結晶の製造装置14のメインチャンバー1の外側に配置された磁場印加装置13の磁場強度を弱くすること、及び、磁場印加装置13の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって前記Ge/Gcを調整することが好ましい。   When the obtained D ′ is larger than 20 mm, Ge / Gc is adjusted by setting the distance between the thermal shield 12 and the liquid surface of the raw material melt 4 to obtain D ′, and the obtained D ′ is 20 mm. In the following cases, the distance between the heat shield 12 and the liquid surface of the raw material melt 4 is 20 mm, and the position of the heater 7 arranged so as to surround the quartz crucible 5 is the liquid of the raw material melt 4. Lowering the surface, weakening the magnetic field strength of the magnetic field application device 13 disposed outside the main chamber 1 of the silicon single crystal production device 14, and lowering the position of the magnetic field application device 13. Preferably, the Ge / Gc is adjusted by any one of them or a combination of two or more thereof.

このようなシリコン単結晶の製造方法であれば、熱遮蔽体12と原料融液4の液面との間隔が20mm以下と狭くなった場合に、熱遮蔽体12が原料融液4と接触してしまう等によりシリコン単結晶の引き上げを妨げることなくシリコン単結晶を製造することができる。   With such a method for producing a silicon single crystal, when the distance between the heat shield 12 and the liquid surface of the raw material melt 4 is as narrow as 20 mm or less, the heat shield 12 comes into contact with the raw material melt 4. Thus, the silicon single crystal can be manufactured without hindering the pulling of the silicon single crystal.

上記のような、本発明の方法により、結晶全面がN−領域のシリコン単結晶基板上にエピタキシャル層を有するエピタキシャルシリコンウェーハであって、シリコン単結晶基板に、窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、サイズが28nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下で、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするエピタキシャルシリコンウェーハが提供される。 According to the method of the present invention as described above, an epitaxial silicon wafer having an epitaxial layer on a silicon single crystal substrate whose entire crystal surface is an N− region, and nitrogen is 2 × 10 13 atoms / cm on the silicon single crystal substrate. 3 to 3.2 × 10 14 atoms / cm 3 doped with a nitrogen concentration of 3 or less, and the number of defects having a size of 28 nm or more is 10 cm or more. There is provided an epitaxial silicon wafer characterized in that BMD having an average size of 45 nm or more detected after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr has a density of 1 × 10 8 / cm 3 or more.

このようなエピタキシャルシリコンウェーハであれば、R−OSF領域起因のBMD密度低下、EP欠陥化、及び、高濃度での窒素ドープによる板状または棒状のCOPに起因するEP欠陥化がないものとなる。また、800℃、3hr+1000℃、2hrの熱処理により十分なBMD密度が形成され、面内BMD品質が均一なエピタキシャルシリコンウェーハとなる。   With such an epitaxial silicon wafer, there is no decrease in BMD density due to the R-OSF region, EP defect, and EP defect due to plate-like or rod-like COP due to nitrogen doping at a high concentration. . Further, a sufficient BMD density is formed by heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and an in-plane BMD quality becomes an epitaxial silicon wafer.

また、本発明の方法により、鏡面研磨加工された表面を有する結晶全面がN−領域のシリコン単結晶基板であって、窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、TDDB特性の良品率が90%以上で、サイズが45nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下であり、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするシリコン単結晶基板を提供することができる。 Further, according to the method of the present invention, the entire surface of the crystal having a mirror-polished surface is a silicon single crystal substrate having an N− region, and nitrogen is 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / It is doped with a nitrogen concentration of cm 3 or less, the yield rate of TDDB characteristics is 90% or more, and the number of defects with a size of 45 nm or more is 10 cm or more, and the average number of all substrates in the silicon single crystal block is 2 pieces / piece or less. Provided is a silicon single crystal substrate characterized in that BMD having an average size of 45 nm or more detected after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr has a density of 1 × 10 8 / cm 3 or more can do.

このようなシリコン単結晶基板であれば、R−OSF領域起因のBMD密度の低下がなく、TDDB特性が良好なものとなる。また、800℃、3hr+1000℃、2hrの熱処理により十分なBMD密度が形成され、面内BMD品質が均一なシリコン単結晶基板となる。   With such a silicon single crystal substrate, there is no decrease in BMD density due to the R-OSF region, and the TDDB characteristics are good. In addition, a sufficient BMD density is formed by heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and a silicon single crystal substrate with uniform in-plane BMD quality is obtained.

以下、実施例及び比較例を挙げて本発明を具体的に説明するが、本発明はこれらに制限されるものではない。   EXAMPLES Hereinafter, although an Example and a comparative example are given and this invention is demonstrated concretely, this invention is not restrict | limited to these.

(比較例1)
窒素をドープせず、32インチ(812.8mm)ルツボに410kgの原料を溶融し、4000Gの磁場印加下で直径300mmの結晶製造を実施した。このとき、予め原料融液直上の熱遮蔽体と原料融液との間隔(50mm)、ヒーター位置、磁場印加装置の位置を調整して、結晶全長に亘り全面でN(Neutral)領域を得られるように結晶成長中の温度分布を調整した。この条件において、直胴成長中に引上げ速度を徐々に漸減させて、シリコン単結晶ブロック内に欠陥領域V−rich、R−OSF領域、Nv領域、Ni領域、I−rich領域(V−richからI−richの各領域)を含むようにし、得られたシリコン単結晶ブロックから結晶成長軸方向に平行なサンプルを切り出し、ウェット酸化雰囲気で800℃4hr+1000℃16hrの熱処理を施し、XRT(X線トポグラフ法)にて欠陥分布を評価した。
(Comparative Example 1)
Without doping nitrogen, 410 kg of raw material was melted in a 32 inch (812.8 mm) crucible, and a crystal having a diameter of 300 mm was produced under the application of a 4000 G magnetic field. At this time, an N (Neutral) region can be obtained over the entire length of the crystal by previously adjusting the distance (50 mm) between the heat shield immediately above the raw material melt and the raw material melt, the heater position, and the position of the magnetic field application device. Thus, the temperature distribution during crystal growth was adjusted. Under this condition, the pulling rate is gradually decreased during the growth of the cylinder, and the defect region V-rich, R-OSF region, Nv region, Ni region, I-rich region (from V-rich region) is formed in the silicon single crystal block. A sample parallel to the crystal growth axis direction was cut out from the obtained silicon single crystal block and subjected to a heat treatment at 800 ° C. for 4 hours + 1000 ° C. for 16 hours to obtain an XRT (X-ray topograph). Method) was used to evaluate the defect distribution.

(比較例2)
比較例1と同様の原料融液直上の熱遮蔽体と原料融液との間隔(50mm)、ヒーター位置、磁場位置、磁場強度において、窒素をドープして、直胴成長中に引上げ速度を徐々に漸減させてシリコン単結晶ブロック内にV−richからI−richの各領域を含む欠陥分布評価シリコン単結晶ブロックを製造した。窒素濃度は、2×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度2×1013−2.2×1013atoms/cm)、3×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度3×1013−3.2×1013atoms/cm)、6×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度6×1013−6.2×1013atoms/cm)、3×1014atoms/cm水準(シリコン単結晶ブロック内窒素濃度3×1014−3.2×1014atoms/cm)として、それぞれのシリコン単結晶ブロックを製造し、各窒素濃度での欠陥分布を比較例1と同様に評価した。
(Comparative Example 2)
In the same manner as in Comparative Example 1, the distance between the heat shield immediately above the raw material melt and the raw material melt (50 mm), the heater position, the magnetic field position, and the magnetic field strength are doped with nitrogen, and the pulling rate is gradually increased during the growth of the straight body. The silicon single crystal block having defect distribution evaluation including each region from V-rich to I-rich in the silicon single crystal block was manufactured. Nitrogen concentration is 2 × 10 13 atoms / cm 3 level (nitrogen concentration in silicon single crystal block 2 × 10 13 −2.2 × 10 13 atoms / cm 3 ), 3 × 10 13 atoms / cm 3 level (silicon single crystal Nitrogen concentration in crystal block 3 × 10 13 −3.2 × 10 13 atoms / cm 3 ), 6 × 10 13 atoms / cm 3 level (nitrogen concentration in silicon single crystal block 6 × 10 13 −6.2 × 10 13 atoms / cm 3 ), 3 × 10 14 atoms / cm 3 level (nitrogen concentration in silicon single crystal block 3 × 10 14 −3.2 × 10 14 atoms / cm 3 ), each silicon single crystal block is manufactured. The defect distribution at each nitrogen concentration was evaluated in the same manner as in Comparative Example 1.

(実施例1)
原料融液直上の熱遮蔽体と原料融液の液面との間隔を、D’/D=0.94−窒素濃度/2.41×1015から求まるD’とした以外は、比較例2と同様に実施した。原料融液直上の熱遮蔽体と原料融液の液面との間隔をこのように変化させることで、シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geを、Ge/Gc>1となるようにし、Ge/Gcを、シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくした。ここで、Dは50mmである。原料融液直上の熱遮蔽体と原料融液の液面との間隔を2×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度2−2.2×1013atoms/cm)ではD’=46.6mm(D’/D=0.932)、3×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度3−3.2×1013atoms/cm)ではD’=46.3mm(D’/D=0.926)、6×1013atoms/cm水準(シリコン単結晶ブロック内窒素濃度6−6.2×1013atoms/cm)ではD’=45.8mm(D’/D=0.916)、3×1014atoms/cm水準(シリコン単結晶ブロック内窒素濃度3−3.2×1014atoms/cm)ではD’=40.8mm(D’/D=0.816)としてシリコン単結晶ブロックを製造し、各窒素濃度で原料融液直上の熱遮蔽体と原料融液の液面との間隔を調整した際の欠陥分布を評価した。原料融液直上の熱遮蔽体と原料融液の液面との間隔の変更は、ルツボの高さ位置の変更によって実施した。
Example 1
Comparative Example 2 except that the distance between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt was D ′ / D = 0.94−nitrogen concentration / 2.41 × 10 15 It carried out like. By changing the distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt in this way, the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal and the temperature gradient Ge at the periphery of the crystal Ge / Gc> 1, and Ge / Gc was gradually increased as the nitrogen concentration increased due to segregation during pulling of the silicon single crystal. Here, D is 50 mm. The distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt is 2 × 10 13 atoms / cm 3 level (nitrogen concentration in silicon single crystal block: 2-2.2 × 10 13 atoms / cm 3 ). At D ′ = 46.6 mm (D ′ / D = 0.932), 3 × 10 13 atoms / cm 3 level (nitrogen concentration in silicon single crystal block: 3-3.2 × 10 13 atoms / cm 3 ), D ′ = 46.3 mm (D ′ / D = 0.926), D ′ = 45 at 6 × 10 13 atoms / cm 3 level (silicon single crystal block nitrogen concentration 6-6.2 × 10 13 atoms / cm 3 ) 8 mm (D ′ / D = 0.916), 3 × 10 14 atoms / cm 3 level (silicon single crystal block nitrogen concentration: 3-3.2 × 10 14 atoms / cm 3 ), D ′ = 40.8 mm (D ′ / D = 0.8 16) A silicon single crystal block was manufactured, and the defect distribution when the distance between the heat shield directly above the raw material melt and the liquid surface of the raw material melt was adjusted at each nitrogen concentration was evaluated. The change between the heat shield just above the raw material melt and the liquid surface of the raw material melt was changed by changing the height position of the crucible.

図2に、比較例1、比較例2、及び、実施例1の引上げ条件でシリコン単結晶を製造した場合の、シリコン単結晶の径方向位置を横軸としたシリコン単結晶の引上げ軸方向における欠陥分布図を示す。   In FIG. 2, when the silicon single crystal is manufactured under the pulling conditions of Comparative Example 1, Comparative Example 2, and Example 1, the silicon single crystal in the pulling axis direction with the radial position of the silicon single crystal as the horizontal axis. A defect distribution map is shown.

比較例1に対して、窒素をドープした比較例2の欠陥分布は、窒素ドープ量2×1013atoms/cm水準、3×1013atoms/cm水準、6×1013atoms/cm水準、3×1014atoms/cm水準それぞれにおいて、窒素濃度が増加するに従って窒素と空孔のペア(NVペア)形成によって結晶育成中の空孔(Vacancy)の外方拡散が減少するため、結晶外周側の欠陥領域がVacancy優勢側(高V/G側)にシフトし、R−OSF領域が外周部でダレた分布に変化している。 Compared with Comparative Example 1, the defect distribution of Comparative Example 2 doped with nitrogen is as follows: nitrogen doping amount 2 × 10 13 atoms / cm 3 level, 3 × 10 13 atoms / cm 3 level, 6 × 10 13 atoms / cm 3 At each of the 3 × 10 14 atoms / cm 3 levels, the out-diffusion of vacancies during crystal growth decreases due to the formation of nitrogen / vacancy pairs (NV pairs) as the nitrogen concentration increases, The defect region on the outer peripheral side of the crystal is shifted to the vacancy dominant side (high V / G side), and the R-OSF region changes to a distribution that is sagging at the outer peripheral portion.

このような欠陥分布では、ウェーハを作製した際に、面内で残留Vacancy濃度が大きく異なる欠陥領域が混在(外周部のR−OSF領域+R/2〜中心部のNv領域、外周部のNv領域+R/2〜中心部のNi領域、外周部のR−OSF領域+R/2部のNv領域+中心部のNi領域)することや、面内全て同一のNv領域であってもウェーハ外周は残留Vacancyが多くなることとなる。そのため、800℃、3hr+1000℃、2hrの熱処理をした後の面内のBMD(Bulk Micro Defect)密度が大きく異なってしまうことになり、ウェーハ面内の低BMD領域でのゲッタリング能力不足によるデバイス歩留り低下などの要因となる。   In such a defect distribution, when a wafer is manufactured, defect regions having greatly different residual vacancy concentrations in the surface are mixed (R-OSF region in the outer peripheral portion + R / 2 to Nv region in the central portion, Nv region in the outer peripheral portion. + R / 2 to Ni region in the central portion, R-OSF region in the outer peripheral portion + Nv region in the R / 2 portion + Ni region in the central portion) Vacancy will increase. Therefore, the BMD (Bulk Micro Defect) density in the surface after heat treatment at 800 ° C., 3 hr + 1000 ° C., 2 hr is greatly different, and the device yield due to insufficient gettering ability in the low BMD region in the wafer surface. It becomes a factor such as decline.

これに対して、本発明の実施例1では、窒素濃度増加に伴う欠陥分布変化(結晶外周側の欠陥領域がVacancy優勢側にシフトし、R−OSF領域が外周部でダレた分布へ変化)が矯正されており、ウェーハを作製した際に、ウェーハ面内全面を均一な欠陥領域とできるため、低温、短時間、例えば800℃、3hr+1000℃、2hrの熱処理をした後のウェーハ面内BMD密度を均一にコントロールすることができる。また、R−OSF領域の混在によるシリコン単結晶基板状態でのTDDB特性悪化や、製造したシリコン単結晶基板をエピタキシャルシリコンウェーハ用基板に用いた場合のEP欠陥化も抑制できる点でもデバイス歩留り、ウェーハ歩留りが良好となる。   On the other hand, in Example 1 of the present invention, the defect distribution change with increasing nitrogen concentration (the defect region on the crystal outer periphery side shifts to the vacancy dominant side, and the R-OSF region changes to a distribution that sags on the outer periphery) When the wafer is fabricated, the entire surface of the wafer can be made into a uniform defect region. Therefore, the BMD density in the wafer surface after heat treatment at a low temperature for a short time, for example, 800 ° C., 3 hr + 1000 ° C., 2 hr. Can be controlled uniformly. In addition, the device yield is reduced in that the TDDB characteristic deterioration in the silicon single crystal substrate state due to the mixture of the R-OSF regions and the EP defect when the manufactured silicon single crystal substrate is used for the epitaxial silicon wafer substrate can be suppressed. Yield is good.

また、窒素は結晶育成中の偏析現象(平衡偏析係数7×10−4)によって、結晶育成が進むと徐々に高濃度化していくため、長尺結晶全長から歩留り良く製品を得るために、本発明は非常に有効となる。 In addition, since nitrogen gradually increases in concentration due to segregation phenomenon (equilibrium segregation coefficient 7 × 10 −4 ) during crystal growth, the concentration of nitrogen gradually increases. The invention is very effective.

[エピタキシャルシリコンウェーハの良品率変化(シリコン単結晶1本中の品質推移)]
次に、本発明を実際の製品製造に適用した際に得られる効果について、エピタキシャルウェーハの良品率を例として詳細に説明する。
[Change in non-defective rate of epitaxial silicon wafers (quality transition in one silicon single crystal)]
Next, the effect obtained when the present invention is applied to actual product manufacturing will be described in detail with reference to the non-defective product ratio of the epitaxial wafer.

(比較例3)
32インチ(812.8mm)ルツボに410kgの原料を溶融し、4000Gの磁場印加下で直径300mmの結晶製造を実施した。原料融液直上の熱遮蔽体と原料融液の液面との間隔50mmで、窒素をドープしない際に結晶全長に亘り全面でN−領域を得られるように結晶育成中のヒーター位置、磁場印加装置の位置を調整した条件において、直胴製品採取部において、窒素ノンドープ(比較例3−1)、2×1013−6×1013atoms/cmの窒素濃度(比較例3−2)、1×1014−3.2×1014atoms/cmの窒素濃度(比較例3−3)となるように3本の結晶製造を行い、得られた結晶からシリコン単結晶基板を作製し、エピタキシャルシリコンウェーハ用基板として用いてエピタキシャルシリコンウェーハの製造を行なった。エピタキシャルシリコンウェーハの欠陥評価のため、KLA Tencor社製のSP3を用い、Obliqueモードで28nm以上で検出される欠陥を評価した。また、作製したエピタキシャルウェーハを800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。
(Comparative Example 3)
410 kg of raw material was melted in a 32 inch (812.8 mm) crucible, and a crystal having a diameter of 300 mm was produced under the application of a magnetic field of 4000 G. Heater position and magnetic field application during crystal growth so that an N-region can be obtained over the entire length of the crystal when nitrogen is not doped at an interval of 50 mm between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt. In the condition where the position of the apparatus is adjusted, in the straight body product collecting part, nitrogen non-dope (Comparative Example 3-1), nitrogen concentration of 2 × 10 13 -6 × 10 13 atoms / cm 3 (Comparative Example 3-2), Three crystals were manufactured so as to have a nitrogen concentration of 1 × 10 14 −3.2 × 10 14 atoms / cm 3 (Comparative Example 3-3), and a silicon single crystal substrate was manufactured from the obtained crystals. An epitaxial silicon wafer was manufactured using it as a substrate for an epitaxial silicon wafer. In order to evaluate defects of the epitaxial silicon wafer, SP3 manufactured by KLA Tencor was used to evaluate defects detected at 28 nm or more in the Oblique mode. Moreover, the produced epitaxial wafer was subjected to a heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method.

(比較例4)
原料融液直上の熱遮蔽体と原料融液の液面との間隔も50mmのまま、特許文献9に示されているように窒素濃度に応じて引上げ速度を調整(窒素濃度増加に対して引上げ速度を遅く調整)した以外は、比較例3−2と同じ(比較例4−1)、比較例3−3と同じ(比較例4−2)として、比較例3と同様に、エピタキシャルシリコンウェーハを製造し、欠陥評価を行なった。また、作製したエピタキシャルウェーハを800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。
(Comparative Example 4)
Adjust the pulling speed according to the nitrogen concentration as shown in Patent Document 9 with the distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt being 50 mm (increase with increasing nitrogen concentration) The epitaxial silicon wafer is the same as Comparative Example 3-2 (Comparative Example 4-2) and Comparative Example 3-3 (Comparative Example 4-2) except that the speed is adjusted to be slower). Were manufactured and evaluated for defects. Moreover, the produced epitaxial wafer was subjected to a heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method.

(実施例2)
原料融液直上の熱遮蔽体と原料融液の液面との間隔D’を、D’/D=0.94−窒素濃度/(2.41×1015)から求まるD’とした。実施例2−1は、2×1013−6×1013atoms/cmの窒素濃度で、結晶育成中の窒素偏析の影響を相殺するため結晶コーン側からTail側における窒素による偏析での窒素濃度変化に合せてD’=46.6mmから45.8mmに原料融液直上の熱遮蔽体と原料融液の液面との間隔を調整した以外は比較例4−1と同じとし、実施例2−2は、1×1014−3.2×1014atoms/cmの窒素濃度で、D’=44.9mmから40.3mmに原料融液直上の熱遮蔽体と原料融液の液面との間隔を調整した以外は比較例4−2と同じとして、比較例3と同様に、エピタキシャルウェーハ製造し、欠陥評価を行なった。また、作製したエピタキシャルウェーハを800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。原料融液直上の熱遮蔽体と原料融液の液面との間隔をこのように変化させることで、シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geを、Ge/Gc>1となるようにし、Ge/Gcを、シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくした。
(Example 2)
The distance D ′ between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt was defined as D ′ obtained from D ′ / D = 0.94−nitrogen concentration / (2.41 × 10 15 ). Example 2-1 is a nitrogen concentration of 2 × 10 13 -6 × 10 13 atoms / cm 3 , and nitrogen in the segregation by nitrogen from the crystal cone side to the tail side to offset the influence of nitrogen segregation during crystal growth. The same as Comparative Example 4-1, except that the distance between the heat shield immediately above the raw material melt and the liquid level of the raw material melt was adjusted from D ′ = 46.6 mm to 45.8 mm in accordance with the concentration change. 2-2 is a nitrogen concentration of 1 × 10 14 −3.2 × 10 14 atoms / cm 3 , and D ′ = 44.9 mm to 40.3 mm. Except for adjusting the distance to the surface, it was the same as Comparative Example 4-2, and an epitaxial wafer was manufactured and evaluated for defects similarly to Comparative Example 3. Moreover, the produced epitaxial wafer was subjected to a heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method. By changing the distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt in this way, the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal and the temperature gradient Ge at the periphery of the crystal Ge / Gc> 1, and Ge / Gc was gradually increased as the nitrogen concentration increased due to segregation during pulling of the silicon single crystal.

図3、4、及び、5は、それぞれ比較例3、比較例4、及び、実施例2におけるエピタキシャルウェーハの欠陥評価の結果を示すグラフである。高プロセスコストの先端デバイスにおいては、ウェーハ一枚当たり数個の欠陥であっても、それによって生じる不良チップが大きな問題となる。   3, 4 and 5 are graphs showing the results of defect evaluation of epitaxial wafers in Comparative Example 3, Comparative Example 4, and Example 2, respectively. In advanced devices with high process costs, even if there are several defects per wafer, defective chips caused by such defects become a major problem.

比較例3において、2×1013atoms/cmの窒素濃度まではEP欠陥発生はほとんど問題にならないが、熱的に安定な(大きいサイズの)析出核を増加させるに十分な高窒素濃度となる3×1013atoms/cmの窒素濃度になるとEP欠陥発生がみられるようになった。更に窒素濃度が高い3×1013atoms/cm以上では、窒素濃度の増加に伴ってEP欠陥が増加し、高プロセスコストの先端デバイスへの使用には耐えられないレベルとなっている。また、比較例3−1、3−2、及び、3−3における、800℃、3hr+1000℃、2hrの熱処理後のエピタキシャルシリコンウェーハのBMD密度はそれぞれ1−3×10、1−2×10、及び、2.5−15×10/cmであった。窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMD密度を1×10以上とすることができた。 In Comparative Example 3, EP defect generation hardly becomes a problem up to a nitrogen concentration of 2 × 10 13 atoms / cm 3 , but a high nitrogen concentration sufficient to increase thermally stable (large size) precipitation nuclei is sufficient. When a nitrogen concentration of 3 × 10 13 atoms / cm 3 is obtained, EP defects are generated. Further, when the nitrogen concentration is higher than 3 × 10 13 atoms / cm 3 , EP defects increase as the nitrogen concentration increases, and the level is unbearable for use in advanced devices with high process costs. In Comparative Examples 3-1, 3-2, and 3-3, the BMD density of the epitaxial silicon wafer after the heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr was 1-3 × 10 7 , 1-2 × 10 respectively. 8 and 2.5-15 × 10 8 / cm 3 . The BMD density of an average size of 45 nm or more, which is considered to have sufficient gettering ability in the tip device at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more, could be 1 × 10 8 or more.

比較例4では、窒素濃度増加に対して引上げ速度を低下させたことで改善効果がみられるが、先端デバイスプロセスに用いるような低温・短時間の熱処理で十分なBMD密度を得るのにより好ましい6×1013atoms/cm以上の窒素濃度からEP欠陥が増加し始め、窒素1×1014atoms/cm以上では先端デバイスに使用に適するレベルにはなっていない。更に、より引上げ速度を低下させた場合、800℃、3hr+1000℃、2hrの熱処理をした際に、ウェーハ中心部のBMDが減少して、面内のBMD密度(ゲッタリング能力)の不均一が生じることや、場合によってはウェーハ中心部で転位ループや転位クラスターを有するI−rich領域となってしまって、中心部でEP欠陥が生じてしまったため、窒素濃度に対する引上げ速度調整だけでは完全にEP欠陥を抑制することは不可能であった。また、比較例4−1、及び、4−2における、800℃、3hr+1000℃、2hrの熱処理後のエピタキシャルシリコンウェーハのBMD密度はそれぞれ1−2×10、及び、2.5−15×10/cmであった。窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMD密度を1×10以上とすることができた。 In Comparative Example 4, an improvement effect can be seen by lowering the pulling speed with respect to the increase in nitrogen concentration, but it is more preferable to obtain a sufficient BMD density by low-temperature and short-time heat treatment as used in advanced device processes. EP defects start to increase from a nitrogen concentration of × 10 13 atoms / cm 3 or more, and at nitrogen of 1 × 10 14 atoms / cm 3 or more, the level is not suitable for use in advanced devices. Furthermore, when the pulling rate is further lowered, when heat treatment is performed at 800 ° C., 3 hr + 1000 ° C., 2 hr, the BMD at the center of the wafer is reduced and the in-plane BMD density (gettering ability) is nonuniform. In some cases, an I-rich region having a dislocation loop or a dislocation cluster in the center of the wafer has resulted in an EP defect in the center. It was impossible to suppress. In Comparative Examples 4-1 and 4-2, the BMD densities of the epitaxial silicon wafers after the heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr are 1-2 × 10 8 and 2.5-15 × 10 respectively. It was 8 / cm 3 . The BMD density of an average size of 45 nm or more, which is considered to have sufficient gettering ability in the tip device at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more, could be 1 × 10 8 or more.

対して、実施例2では、3.2×1014atoms/cmの窒素濃度までEP欠陥は良好なレベルに抑制することができている。その結果、28nm以上での欠陥は、10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下と極めて良好な欠陥レベルであり、比較例3及び4よりも欠陥の少ないエピタキシャルシリコンウェーハを得ることができた。また、800℃、3hr+1000℃、2hrの熱処理後のエピタキシャルシリコンウェーハのBMD密度は実施例2−1で1−2×10/cm、実施例2−2で2.5−5×10/cmであり、窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMDの密度を1×10/cm以上とすることができた。なお、3.5×1014atoms/cmの窒素濃度では析出物起因のEP欠陥発生が生じる場合があったため、窒素濃度は3.2×1014atoms/cm以下とすることが望ましい。 On the other hand, in Example 2, EP defects can be suppressed to a good level up to a nitrogen concentration of 3.2 × 10 14 atoms / cm 3 . As a result, the number of defects at 28 nm or more is an extremely good defect level of 2 pieces / piece or less on average for all substrates in a silicon single crystal block of 10 cm or more, and an epitaxial silicon wafer having fewer defects than Comparative Examples 3 and 4. Could get. Further, the BMD density of the epitaxial silicon wafer after the heat treatment at 800 ° C., 3 hr + 1000 ° C., 2 hr is 1-2 × 10 8 / cm 3 in Example 2-1, and 2.5-5 × 10 8 in Example 2-2. / cm 3 and the density of the average size 45nm or more BMD and 1 × 10 8 / cm 3 or more appears to have a sufficient gettering capability tip device with nitrogen concentration 2 × 10 13 atoms / cm 3 or more I was able to. It should be noted that since the generation of EP defects due to precipitates may occur at a nitrogen concentration of 3.5 × 10 14 atoms / cm 3 , the nitrogen concentration is desirably 3.2 × 10 14 atoms / cm 3 or less.

このように、本発明を用いれば、先端の低温・短時間デバイスプロセスにおいて高いゲッタリング能力が期待できる高窒素濃度条件においても、良好なEP欠陥レベルを有するエピタキシャルシリコンウェーハを結晶全長で非常に高い歩留りで製造することが可能となる。   As described above, when the present invention is used, an epitaxial silicon wafer having a good EP defect level is very high in the entire crystal length even under a high nitrogen concentration condition where a high gettering capability can be expected in a low temperature / short time device process at the tip. It becomes possible to manufacture with a yield.

[シリコン単結晶基板の良品率変化(シリコン単結晶1本中の品質推移)]
次に、本発明を実際の製品製造に適用した際に得られる効果について、シリコン単結晶基板の良品率を例として詳細に説明する。
[Change in non-defective product rate of silicon single crystal substrate (quality transition in one silicon single crystal)]
Next, the effect obtained when the present invention is applied to actual product manufacture will be described in detail by taking a non-defective product ratio of a silicon single crystal substrate as an example.

(比較例5)
32インチ(812.8mm)ルツボに410kgの原料を溶融し、4000Gの磁場印加下で直径300mmの結晶製造を実施した。原料融液直上の熱遮蔽体と原料融液の液面との間隔50mmで、窒素をドープしない際に結晶全長に亘り全面でN(Neutral)領域を得られるように結晶育成中のヒーター位置、磁場印加装置の位置を調整した条件において、直胴製品採取部において、窒素ノンドープ(比較例5−1)、2×1013−6×1013atoms/cmの窒素濃度(比較例5−2)、1×1014−3.2×1014atoms/cmの窒素濃度(比較例5−3)となるように3本の結晶製造を行い、得られた結晶からシリコン単結晶基板を作製し、TDDB特性を評価した。また、シリコン単結晶基板の欠陥評価のため、KLA Tencor社製のSP3を用い、Obliqueモードで45nm以上で検出される欠陥を評価した。また、作製したシリコン単結晶基板を800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。
(Comparative Example 5)
410 kg of raw material was melted in a 32 inch (812.8 mm) crucible, and a crystal having a diameter of 300 mm was produced under the application of a magnetic field of 4000 G. The heater position during crystal growth so that an N (Neutral) region can be obtained over the entire length of the crystal when nitrogen is not doped at a distance of 50 mm between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt. Under the condition where the position of the magnetic field application device is adjusted, the nitrogen concentration of nitrogen non-doped (Comparative Example 5-1) and 2 × 10 13 -6 × 10 13 atoms / cm 3 (Comparative Example 5-2) ) Three crystals were manufactured so as to have a nitrogen concentration of 1 × 10 14 −3.2 × 10 14 atoms / cm 3 (Comparative Example 5-3), and a silicon single crystal substrate was manufactured from the obtained crystals The TDDB characteristics were evaluated. Further, for defect evaluation of the silicon single crystal substrate, SP3 manufactured by KLA Tencor was used to evaluate defects detected at 45 nm or more in the Oblique mode. In addition, the manufactured silicon single crystal substrate was heat-treated at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method.

(比較例6)
原料融液直上の熱遮蔽体と原料融液の液面との間隔を50mmのまま、特許文献9に示されているように窒素濃度に応じて引上げ速度を調整(窒素濃度増加に対して引上げ速度を遅く調整)した以外は、比較例5−2と同じ(比較例6−1)、比較例5−3と同じ(比較例6−2)として、比較例5と同様に製造したシリコン単結晶基板のTDDB特性及び欠陥を評価した。また、作製したシリコン単結晶基板を800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。
(Comparative Example 6)
Adjusting the pulling speed according to the nitrogen concentration as shown in Patent Document 9 with the distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt adjusted to 50% (as the nitrogen concentration increases) Except that the speed was adjusted to be slower), the same silicon as manufactured in Comparative Example 5 was used as Comparative Example 5-2 (Comparative Example 6-1) and Comparative Example 5-3 (Comparative Example 6-2). The TDDB characteristics and defects of the crystal substrate were evaluated. In addition, the manufactured silicon single crystal substrate was heat-treated at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method.

(実施例3)
原料融液直上の熱遮蔽体と原料融液の液面との間隔を、D’/D=0.94−窒素濃度/(2.41×1015)から求まるD’とした。実施例3−1は、2×1013−6×1013atoms/cmの窒素濃度で、結晶育成中の窒素偏析の影響を相殺するため結晶コーン側からTail側における窒素による偏析での窒素濃度変化に合せてD’=46.6mmから45.8mmに原料融液直上の熱遮蔽体と原料融液の液面との間隔を調整した以外は比較例6−1と同じとし、実施例3−2は、1×1014−3.2×1014atoms/cmの窒素濃度で、D’=44.9mmから40.3mmに原料融液直上の熱遮蔽体と原料融液の液面との間隔を調整した以外は比較例6−2と同じとして、比較例5と同様に、シリコン単結晶基板を製造し、TDDB特性及び欠陥を評価した。また、作製したシリコン単結晶基板を800℃、3hr+1000℃、2hrの熱処理後、赤外散乱法により30nm以上のBMD密度を測定した。原料融液直上の熱遮蔽体と原料融液の液面との間隔をこのように変化させることで、シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geを、Ge/Gc>1となるようにし、Ge/Gcを、シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくした。
(Example 3)
The distance between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt was defined as D ′ obtained from D ′ / D = 0.94−nitrogen concentration / (2.41 × 10 15 ). Example 3-1 has a nitrogen concentration of 2 × 10 13 -6 × 10 13 atoms / cm 3 and nitrogen in the segregation due to nitrogen from the crystal cone side to the tail side in order to offset the influence of nitrogen segregation during crystal growth. The same as Comparative Example 6-1 except that the distance between the heat shield immediately above the raw material melt and the liquid surface of the raw material melt was adjusted from D ′ = 46.6 mm to 45.8 mm in accordance with the change in concentration. 3-2 is a nitrogen concentration of 1 × 10 14 −3.2 × 10 14 atoms / cm 3 , and D ′ = 44.9 mm to 40.3 mm. A silicon single crystal substrate was manufactured in the same manner as in Comparative Example 5 except that the distance from the surface was adjusted, and the TDDB characteristics and defects were evaluated. In addition, the manufactured silicon single crystal substrate was heat-treated at 800 ° C., 3 hr + 1000 ° C., and 2 hr, and then a BMD density of 30 nm or more was measured by an infrared scattering method. By changing the distance between the heat shield just above the raw material melt and the liquid surface of the raw material melt in this way, the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal and the temperature gradient Ge at the periphery of the crystal Ge / Gc> 1, and Ge / Gc was gradually increased as the nitrogen concentration increased due to segregation during pulling of the silicon single crystal.

図6、7、及び、8は、それぞれ比較例5、比較例6、及び、実施例3におけるシリコン単結晶基板のTDDB特性評価の結果を示すグラフである。   6, 7, and 8 are graphs showing the results of TDDB characteristic evaluation of the silicon single crystal substrates in Comparative Example 5, Comparative Example 6, and Example 3, respectively.

図6、7、及び、8において、灰色セルがTDDB不良箇所となっている。TDDB不良欠陥とEP欠陥源は関係性があり、比較例3、比較例4、及び、実施例2のEP欠陥の評価(図3、4、及び、5)と同様の結果となっている。比較例5においては、3×1013atoms/cm以上の窒素濃度で、窒素濃度増加に従って徐々にTDDB不良が増加している。比較例5におけるTDDB特性の良品率は、比較例5−1、比較例5−2及び比較例5−3において、それぞれ99.7−99.3、99.3−69.2、及び、50.7−14.7%であった。また、比較例5−1、5−2、及び、5−3における、45nm以上での欠陥は、10cm以上のシリコン単結晶ブロック内の全基板平均で1−2、1.8−158、及び、73−1250個/枚であった。また、比較例5−1、5−2、及び、5−3における、800℃、3hr+1000℃、2hrの熱処理後のシリコン単結晶基板のBMD密度はそれぞれ1−3×10、1−2×10、及び、2.5−15×10/cmであった。窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMD密度を1×10以上とすることができた。 In FIG. 6, 7, and 8, the gray cell is a TDDB defect location. The TDDB defect defect and the EP defect source are related to each other and have the same results as the evaluation of the EP defect in Comparative Example 3, Comparative Example 4, and Example 2 (FIGS. 3, 4, and 5). In Comparative Example 5, the TDDB defects gradually increase as the nitrogen concentration increases at a nitrogen concentration of 3 × 10 13 atoms / cm 3 or more. The non-defective rate of the TDDB characteristic in Comparative Example 5 is 99.7-99.3, 99.3-69.2, and 50 in Comparative Example 5-1, Comparative Example 5-2, and Comparative Example 5-3, respectively. 7-14.7%. Further, in Comparative Examples 5-1, 5-2, and 5-3, the defects at 45 nm or more were 1-2, 1.8-158, and on average for all substrates in a silicon single crystal block of 10 cm or more. 73-1250 pieces / sheet. In Comparative Examples 5-1, 5-2, and 5-3, the BMD densities of the silicon single crystal substrates after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr were 1-3 × 10 7 , 1-2 ×, respectively. 10 8, and was 2.5-15 × 10 8 / cm 3. The BMD density of an average size of 45 nm or more, which is considered to have sufficient gettering ability in the tip device at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more, could be 1 × 10 8 or more.

比較例6でも、EP欠陥の傾向と同様に、比較例5に対しては改善効果がみられるものの、完全には改善できず、6×1013atoms/cm以上の窒素濃度からTDDB不良が増加し、悪化していく。比較例6におけるTDDB特性の良品率は、比較例6−1及び比較例6−2において、それぞれ99.7−87.3、69.9−51.7%であった。また、比較例6−1及び比較例6−2における45nm以上での欠陥は、10cm以上のシリコン単結晶ブロック内の全基板平均で1−57個/枚、及び、160−364個/枚であった。また、比較例6−1、及び、6−2における、800℃、3hr+1000℃、2hrの熱処理後のシリコン単結晶基板のBMD密度はそれぞれ1−2×10、及び、2.5−15×10/cmであった。窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMD密度を1×10以上とすることができた。 In Comparative Example 6, as with the EP defect tendency, although an improvement effect is seen with respect to Comparative Example 5, it cannot be completely improved, and a TDDB defect is observed due to a nitrogen concentration of 6 × 10 13 atoms / cm 3 or more. Increasing and getting worse. The non-defective rate of the TDDB characteristics in Comparative Example 6 was 99.7-87.3 and 69.9-51.7% in Comparative Example 6-1 and Comparative Example 6-2, respectively. Moreover, the defect in 45 nm or more in the comparative example 6-1 and the comparative example 6-2 is 1-57 piece / piece and 160-364 piece / sheet on the average of all the substrates in a silicon single crystal block of 10 cm or more. there were. In Comparative Examples 6-1 and 6-2, the BMD densities of the silicon single crystal substrates after the heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr are 1-2 × 10 8 and 2.5-15 ×, respectively. It was 10 8 / cm 3 . The BMD density of an average size of 45 nm or more, which is considered to have sufficient gettering ability in the tip device at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more, could be 1 × 10 8 or more.

対して、実施例3では、3.2×1014atoms/cmの窒素濃度までTDDB不良を抑制することができている。実施例3におけるTDDB特性の良品率は、実施例3−1及び実施例3−2において、窒素濃度2−3.2×1014atoms/cmの範囲で、それぞれ99.7−99.3%であった。また、実施例3−1及び実施例3−2における45nm以上での欠陥は、10cm以上のシリコン単結晶ブロック内の全基板平均で1−1.9、及び、1.2−2個/枚であった。また、実施例3−1及び実施例3−2における、800℃、3hr+1000℃、2hrの熱処理後のシリコン単結晶基板のBMD密度はそれぞれ1−2×10、及び、2.5−15×10/cmであった。窒素濃度2×1013atoms/cm以上で先端デバイスで十分なゲッタリング能力を有すると思われる平均サイズ45nm以上のBMD密度を1×10以上とすることができた。 On the other hand, in Example 3, the TDDB failure can be suppressed to a nitrogen concentration of 3.2 × 10 14 atoms / cm 3 . The non-defective product ratio of the TDDB characteristic in Example 3 is 99.7-99.3 in Example 3-1 and Example 3-2, respectively, in the nitrogen concentration range of 2-3.2 × 10 14 atoms / cm 3. %Met. Moreover, the defect in 45 nm or more in Example 3-1 and Example 3-2 is 1-1.9 on the average of all the substrates in a silicon single crystal block of 10 cm or more, and 1.2-2 piece / sheet. Met. Further, the BMD densities of the silicon single crystal substrates after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr in Example 3-1 and Example 3-2 are 1-2 × 10 8 and 2.5-15 ×, respectively. It was 10 8 / cm 3 . The BMD density of an average size of 45 nm or more, which is considered to have sufficient gettering ability in the tip device at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more, could be 1 × 10 8 or more.

このように、本発明を用いれば、先端の低温・短時間デバイスプロセスにおいて高いゲッタリング能力が期待できる高窒素濃度条件においても、TDDB不良の増加がなく、良好な欠陥レベルを有するシリコン単結晶基板を、結晶全長で非常に高い歩留りで製造することが可能となる。   Thus, by using the present invention, a silicon single crystal substrate having a good defect level without increasing TDDB defects even under high nitrogen concentration conditions where high gettering capability can be expected in a low temperature / short time device process at the leading edge. Can be produced with a very high yield over the entire crystal length.

以上のように、本発明を用いれば、先端デバイスプロセスに用いるような低温・短時間の熱処理で十分なBMD密度を得るのに最適な窒素濃度3×1013atoms/cmから3.2×1014atoms/cmまで、シリコン単結晶基板とした状態でのTDDB特性が良好で、エピタキシャルシリコンウェーハでのEP欠陥発生もないウェーハを得ることができる。 As described above, according to the present invention, a nitrogen concentration of 3 × 10 13 atoms / cm 3 to 3.2 × optimal for obtaining a sufficient BMD density by a low-temperature and short-time heat treatment as used in the advanced device process is used. Up to 10 14 atoms / cm 3 , it is possible to obtain a wafer that has good TDDB characteristics in a state where a silicon single crystal substrate is formed and that does not generate an EP defect in an epitaxial silicon wafer.

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は、例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。   In addition, this invention is not limited to the said embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

1…メインチャンバー、 2…引上げチャンバー、 3…単結晶棒、
4…原料融液、 5…石英ルツボ、 6…黒鉛ルツボ、 7…ヒーター、
8…断熱部材、 9…ガス流出口、 10…ガス導入口、 11…ガス整流筒、
12…熱遮蔽体、 13…磁場印加装置、 14…シリコン単結晶の製造装置。
1 ... main chamber, 2 ... pulling chamber, 3 ... single crystal rod,
4 ... Raw material melt, 5 ... Quartz crucible, 6 ... Graphite crucible, 7 ... Heater,
8 ... heat insulating member, 9 ... gas outlet, 10 ... gas inlet, 11 ... gas rectifier,
DESCRIPTION OF SYMBOLS 12 ... Thermal shield, 13 ... Magnetic field application apparatus, 14 ... Manufacturing apparatus of a silicon single crystal.

Claims (6)

チョクラルスキー法によって、結晶全面がN−領域となる条件で引上げることによってシリコン単結晶を育成する方法であって、
前記シリコン単結晶を育成する際に、窒素を2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープし、
前記シリコン単結晶の引上げ軸方向の結晶中心部の温度勾配Gcと結晶周辺部の温度勾配Geの比をGe/Gc>1となるようにし、
前記Ge/Gcを、前記シリコン単結晶の引上げの際の偏析による窒素濃度の増加に応じて、徐々に大きくすることを特徴とするシリコン単結晶の製造方法。
A method of growing a silicon single crystal by pulling up under the condition that the entire crystal surface becomes an N-region by the Czochralski method,
When growing the silicon single crystal, nitrogen is doped at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3 or less,
The ratio of the temperature gradient Gc at the center of the crystal in the pulling axis direction of the silicon single crystal to the temperature gradient Ge at the periphery of the crystal is such that Ge / Gc>1;
A method for producing a silicon single crystal, characterized in that the Ge / Gc is gradually increased in accordance with an increase in nitrogen concentration due to segregation when the silicon single crystal is pulled.
前記Ge/Gcの調整を、石英ルツボ内の原料融液直上に配置された熱遮蔽体と前記原料融液の液面との間隔を制御すること、前記石英ルツボを囲うように配置されたヒーターの位置を前記原料融液の液面に対して低くすること、前記シリコン単結晶の製造装置のメインチャンバーの外側に配置された磁場印加装置の磁場強度を弱くすること、及び、前記磁場印加装置の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって行なうことを特徴とする請求項1に記載のシリコン単結晶の製造方法。   The adjustment of Ge / Gc is performed by controlling the distance between the heat shield disposed immediately above the raw material melt in the quartz crucible and the liquid surface of the raw material melt, and the heater disposed so as to surround the quartz crucible. Is lowered with respect to the liquid surface of the raw material melt, the magnetic field strength of the magnetic field applying device disposed outside the main chamber of the silicon single crystal manufacturing apparatus is reduced, and the magnetic field applying device The method for producing a silicon single crystal according to claim 1, wherein the position is lowered by any one or a combination of two or more. 前記Ge/Gcの調整を、前記熱遮蔽体と前記原料融液の液面との間隔を制御することによって行なう際に、窒素をドープしない場合に結晶全面がN−領域となる条件における前記熱遮蔽体と前記原料融液の液面との間隔をDとしたときに、窒素をドープする場合の前記熱遮蔽体と前記原料融液の液面との間隔を、窒素濃度に応じて、D’/D=0.94−窒素濃度/(2.41×1015)から求めたD’となるように変化させることを特徴とする請求項2に記載のシリコン単結晶の製造方法。 When the Ge / Gc is adjusted by controlling the distance between the thermal shield and the liquid surface of the raw material melt, the heat under the condition that the entire crystal surface becomes an N-region when not doped with nitrogen. When the distance between the shield and the liquid surface of the raw material melt is D, the distance between the heat shield and the liquid surface of the raw material melt when doping nitrogen is determined according to the nitrogen concentration. 3. The method for producing a silicon single crystal according to claim 2, wherein the value is changed so as to be D 'obtained from' /D=0.94-nitrogen concentration / (2.41 × 10 15 ). 前記求めたD’が20mmより大きくなる場合には、前記熱遮蔽体と前記原料融液の液面との間隔を前記求めたD’とすることで前記Ge/Gcを調整し、前記求めたD’が20mm以下となる場合には、前記熱遮蔽体と前記原料融液の液面との間隔を20mmとし、さらに、前記石英ルツボを囲うように配置されたヒーターの位置を前記原料融液の液面に対して低くすること、前記シリコン単結晶の製造装置のメインチャンバーの外側に配置された磁場印加装置の磁場強度を弱くすること、及び、前記磁場印加装置の位置を低くすること、のうちいずれか一つあるいは二つ以上の組み合わせによって前記Ge/Gcを調整することを特徴とする請求項3に記載のシリコン単結晶の製造方法。   When the obtained D ′ is larger than 20 mm, the Ge / Gc is adjusted by setting the obtained D ′ as the distance between the thermal shield and the liquid surface of the raw material melt. When D ′ is 20 mm or less, the distance between the heat shield and the liquid surface of the raw material melt is set to 20 mm, and the heater disposed so as to surround the quartz crucible is positioned at the raw material melt. Lowering the liquid level, reducing the magnetic field strength of the magnetic field application device disposed outside the main chamber of the silicon single crystal manufacturing apparatus, and lowering the position of the magnetic field application device, The method for producing a silicon single crystal according to claim 3, wherein the Ge / Gc is adjusted by any one or a combination of two or more thereof. 結晶全面がN−領域のシリコン単結晶基板上にエピタキシャル層を有するシリコンエピタキシャルウェーハであって、
前記シリコン単結晶基板に、窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、
サイズが28nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下で、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするエピタキシャルシリコンウェーハ。
A silicon epitaxial wafer having an epitaxial layer on a silicon single crystal substrate whose entire crystal surface is an N-region,
The silicon single crystal substrate is doped with nitrogen at a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3 or less,
BMD having an average size of 45 nm or more detected after heat treatment at 800 ° C., 3 hr + 1000 ° C., and 2 hr with an average of 2 or less on all substrates in a silicon single crystal block having a size of 28 nm or more and a size of 10 cm or more. Is an epitaxial silicon wafer characterized by having a density of 1 × 10 8 / cm 3 or more.
鏡面研磨加工された表面を有する結晶全面がN−領域のシリコン単結晶基板であって、
窒素が2×1013atoms/cm以上3.2×1014atoms/cm以下の窒素濃度でドープされており、
TDDB特性の良品率が90%以上で、サイズが45nm以上の欠陥の数が10cm以上のシリコン単結晶ブロック内の全基板平均で2個/枚以下であり、800℃、3hr+1000℃、2hrの熱処理をした後に検出される平均サイズ45nm以上のBMDが1×10/cm以上の密度のものであることを特徴とするシリコン単結晶基板。
The entire surface of the crystal having a mirror-polished surface is an N-region silicon single crystal substrate,
Nitrogen is doped with a nitrogen concentration of 2 × 10 13 atoms / cm 3 or more and 3.2 × 10 14 atoms / cm 3 or less,
A non-defective product ratio of TDDB characteristics is 90% or more, and the number of defects having a size of 45 nm or more is 10 cm or more, and the average of all substrates in a silicon single crystal block is 2 pieces / piece or less. A silicon single crystal substrate characterized in that BMDs having an average size of 45 nm or more detected after being processed have a density of 1 × 10 8 / cm 3 or more.
JP2018102016A 2018-05-29 2018-05-29 Method for manufacturing silicon single crystal Active JP6927150B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2018102016A JP6927150B2 (en) 2018-05-29 2018-05-29 Method for manufacturing silicon single crystal
KR1020190045181A KR20190135913A (en) 2018-05-29 2019-04-18 Method for manufacturing silicon single crystal, epitaxial silicon wafer and silicon single crystal substrate
CN201910458568.0A CN110541191B (en) 2018-05-29 2019-05-29 Method for producing single crystal silicon, epitaxial silicon wafer, and single crystal silicon substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018102016A JP6927150B2 (en) 2018-05-29 2018-05-29 Method for manufacturing silicon single crystal

Publications (2)

Publication Number Publication Date
JP2019206451A true JP2019206451A (en) 2019-12-05
JP6927150B2 JP6927150B2 (en) 2021-08-25

Family

ID=68709593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018102016A Active JP6927150B2 (en) 2018-05-29 2018-05-29 Method for manufacturing silicon single crystal

Country Status (3)

Country Link
JP (1) JP6927150B2 (en)
KR (1) KR20190135913A (en)
CN (1) CN110541191B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113862791A (en) * 2021-09-28 2021-12-31 西安奕斯伟材料科技有限公司 Crystal pulling furnace for pulling monocrystalline silicon rod
CN113897671B (en) * 2021-09-30 2023-05-05 西安奕斯伟材料科技股份有限公司 Preparation method of nitrogen-doped monocrystalline silicon rod
CN115404539A (en) * 2022-08-30 2022-11-29 西安奕斯伟材料科技有限公司 Method for pulling single crystal silicon rod by Czochralski method, single crystal silicon rod, silicon wafer and epitaxial silicon wafer
CN115574722B (en) * 2022-11-04 2024-03-29 中国计量科学研究院 Self-tracing interference type displacement sensor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1179889A (en) 1997-07-09 1999-03-23 Shin Etsu Handotai Co Ltd Production of and production unit for silicon single crystal with few crystal defect, and silicon single crystal and silicon wafer produced thereby
JP2000016897A (en) 1998-07-03 2000-01-18 Sumitomo Metal Ind Ltd Production of high quality silicon single crystal
JP3692812B2 (en) 1998-06-04 2005-09-07 信越半導体株式会社 Nitrogen-doped low-defect silicon single crystal wafer and manufacturing method thereof
JP4358333B2 (en) 1998-11-20 2009-11-04 Sumco Techxiv株式会社 Method for producing silicon single crystal
JP3601328B2 (en) 1998-12-14 2004-12-15 信越半導体株式会社 Method for producing silicon single crystal and silicon single crystal and silicon wafer produced by this method
JP3787472B2 (en) 1999-11-12 2006-06-21 信越半導体株式会社 Silicon wafer, method for manufacturing the same, and method for evaluating silicon wafer
JP4102988B2 (en) 2000-06-26 2008-06-18 信越半導体株式会社 Method for producing silicon wafer and epitaxial wafer, and epitaxial wafer
JP4463950B2 (en) * 2000-08-11 2010-05-19 信越半導体株式会社 Method for manufacturing silicon wafer
JP3624827B2 (en) * 2000-12-20 2005-03-02 三菱住友シリコン株式会社 Method for producing silicon single crystal
JP4806975B2 (en) * 2005-06-20 2011-11-02 株式会社Sumco Method for growing silicon single crystal
JP4715402B2 (en) 2005-09-05 2011-07-06 株式会社Sumco Single crystal silicon wafer manufacturing method, single crystal silicon wafer, and wafer inspection method
JP2008066357A (en) 2006-09-05 2008-03-21 Shin Etsu Handotai Co Ltd Silicon single crystal wafer and method of manufacturing the same
JP6044530B2 (en) * 2013-12-05 2016-12-14 株式会社Sumco Method for growing silicon single crystal
JP6135611B2 (en) 2014-07-03 2017-05-31 信越半導体株式会社 Point defect concentration calculation method, Grown-in defect calculation method, Grown-in defect in-plane distribution calculation method, and silicon single crystal manufacturing method using them

Also Published As

Publication number Publication date
JP6927150B2 (en) 2021-08-25
CN110541191B (en) 2022-08-09
CN110541191A (en) 2019-12-06
KR20190135913A (en) 2019-12-09

Similar Documents

Publication Publication Date Title
US8211228B2 (en) Method for producing single crystal and a method for producing annealed wafer
CN110541191B (en) Method for producing single crystal silicon, epitaxial silicon wafer, and single crystal silicon substrate
US8545622B2 (en) Annealed wafer and manufacturing method of annealed wafer
JP3846627B2 (en) Silicon wafer, silicon epitaxial wafer, annealed wafer, and manufacturing method thereof
CN108368638B (en) Semiconductor wafer made of monocrystalline silicon and method for producing the same
JP2008066357A (en) Silicon single crystal wafer and method of manufacturing the same
KR20140001815A (en) Method of manufacturing silicon substrate, and silicon substrate
JP2007194232A (en) Process for producing silicon single crystal wafer
KR20140021543A (en) Method of manufacturing silicon substrate and silicon substrate
JP4196602B2 (en) Epitaxial growth silicon wafer, epitaxial wafer, and manufacturing method thereof
JP3614019B2 (en) Manufacturing method of silicon single crystal wafer and silicon single crystal wafer
JP4710603B2 (en) Annealed wafer and its manufacturing method
JP3771737B2 (en) Method for producing silicon single crystal wafer
JP2009274888A (en) Production method of silicon single crystal, and silicon single crystal wafer
JP2002198375A (en) Method of heat treatment of semiconductor wafer and semiconducor wafer fabricated therby
JP4080657B2 (en) Method for producing silicon single crystal ingot
JP4688984B2 (en) Silicon wafer and crystal growth method
JP4463950B2 (en) Method for manufacturing silicon wafer
JP4360208B2 (en) Method for producing silicon single crystal
JP7384264B1 (en) Silicon wafers and epitaxial wafers for epitaxial growth
TWI420005B (en) Method of manufacturing single crystal ingot and wafer manufactured by thereby
JP2001080992A (en) Silicon wafer and production of the same
JP2002093814A (en) Substrate single crystal of silicon epitaxial wafer, and its manufacturing method
KR101464566B1 (en) Silicon wafer
JP2010016099A (en) Silicon single crystal wafer, and method of manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20200416

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20210209

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20210216

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210401

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20210706

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20210719

R150 Certificate of patent or registration of utility model

Ref document number: 6927150

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150