JP2010016099A - Silicon single crystal wafer, and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-quality and defect-free silicon single crystal wafer with high general versatility which has no contamination problem and has gettering performance which is uniform in wafer surface at low cost, and to provide a method of manufacturing the same. <P>SOLUTION: In a silicon single crystal wafer grown by a Czochralski method, an oxygen concentration is 6×10<SP>17</SP>atoms/cm<SP>3</SP>(ASTM'79) or lower. Nitrogen is not doped, and removed from an overall N-region single crystal manufactured by the Czochralski method, and an EG process is carried out to one main surface of the silicon single crystal wafer. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a silicon single crystal wafer and a method for manufacturing the same, and more specifically to a defect-free silicon single crystal wafer having a uniform gettering capability in the wafer surface and a method for manufacturing the same.

In semiconductor devices, elements are mainly formed on the surface layer of a silicon single crystal wafer, so it is important that no defects exist on the surface layer of the silicon single crystal wafer.
In describing defects that are undesirable when they exist, first, vacancy point defects called vacancy (hereinafter sometimes abbreviated as V) incorporated into a silicon single crystal, and interstitial-silicon (Interstitial-Si). The factor that determines the concentration of each interstitial silicon point defect called “I” (hereinafter sometimes abbreviated as “I”) is generally known.

  In a silicon single crystal, the V region is a region where there are many such as recesses and holes generated due to a shortage of silicon atoms, and the I region is a dislocation generated due to the presence of extra silicon atoms, extra dislocations. This is a region with a large mass of silicon atoms, and there is a neutral region (Neutral region, hereinafter sometimes abbreviated as N region) between the V region and the I region without any shortage or excess of atoms. It will exist. Groin-in defects (FPD, LSTD, COP, etc.) are generated only when V or I is supersaturated. Even if there is some atomic bias, It turns out that does not exist.

  It is known that the concentration of both point defects is determined by the relationship between the crystal pulling rate (growth rate) F in the CZ method and the temperature gradient G in the vicinity of the solid-liquid interface in the crystal. In addition, in the N region between the V region and the I region, it has been confirmed that there is a ring-shaped defect called OSF (Oxidation Induced Stacking Fault).

  When these defects due to crystal growth are classified, for example, when the growth rate is relatively high, void type defects such as FPD, LSTD, COP, etc., which are attributed to voids in which vacancy-type point defects are aggregated, have a crystal diameter. A region that exists at high density throughout the direction and has these defects is called a V-rich region. Further, when the growth rate is lowered, the OSF ring described above is generated from the periphery of the crystal as the growth rate is lowered, and an L / D (Large Dislocation) that is considered to be caused by a dislocation loop outside the ring. Dislocation loop abbreviations (LSEPD, LFPD, etc.) are present at low density, and the region where these defects are present is called an I-rich region. Further, when the growth rate is lowered, the OSF ring aggregates and disappears at the center of the wafer, and the entire surface becomes an I-rich region.

In addition, there is an N region in the middle of the V-rich region and the I-rich region outside the OSF ring, where there is no vacancy-induced FPD, LSTD, COP, dislocation loop-induced LSEPD, LFPD, or even OSF. Has been discovered.
Furthermore, it has been confirmed that there are no void type defects caused by vacancies, no defects caused by dislocation loops, and the presence of an N region in which no OSF is present inside the OSF ring.

In the normal method, these N regions exist obliquely with respect to the growth axis direction when the growth rate is lowered, and therefore exist only in a part of the wafer surface.
For this N region, the Boronkov theory states that the parameter F / G, which is the ratio of the pulling rate (F) and the temperature gradient (G) in the crystal solid-liquid interface direction, determines the total concentration of point defects. Considering this, since the pulling speed should be constant in the plane, since G has a distribution in the plane, for example, at a certain pulling speed, the center is a V-rich region and the N region is sandwiched around I. Only crystals that would be a rich region were obtained.

  Therefore, recently, when the in-plane G distribution has been improved and the N region that existed only in the oblique direction is pulled up while the pulling rate (F) is gradually decreased, the N region becomes lateral at a certain pulling rate. Crystals spread over the entire surface can be manufactured. Further, in order to expand the crystal of the entire N region in the length direction, it can be achieved to some extent if the pulling rate is maintained while maintaining the pulling speed when the N region spreads laterally. Further, considering that G changes as the crystal grows, if it is corrected and the pulling speed is adjusted so that F / G is constant, the entire N region is also formed in the growth direction. It became possible to expand the crystal. That is, it is possible to reduce the void type defects and dislocation clusters by controlling the F / G at the time of pulling the CZ crystal and pulling it up in the entire N region, but the margin of the control width of the F / G is very narrow. There was a problem.

Patent Document 1 proposes a method for manufacturing a defect-free wafer whose entire surface is an N region.
However, the wafer as described in Patent Document 1 includes a Nv region where BMD can be easily performed and a Ni region where it is difficult to perform BMD in the wafer surface, and the BMD density in the wafer surface is different. A wafer with gettering capability cannot be produced.
In order to prevent this, for example, oxygen concentration may be increased to facilitate the precipitation of oxygen to facilitate the generation of BMD, but this time excessive precipitation will cause problems such as wafer warpage and pattern misalignment.

  Therefore, conversely, if a single crystal having an extremely low oxygen concentration is used as in the techniques disclosed in Patent Documents 2 and 3, precipitation is unlikely to occur, so that no wafer warpage or pattern misalignment occurs. Uniformity is maintained. However, since such a wafer hardly generates BMD, the gettering ability cannot be expected.

  Further, there is a possibility that high temperature heat treatment is performed on a low oxygen concentration wafer as proposed in Patent Document 4, but since BMD is also formed, nonuniformity due to a defect region cannot be avoided. In addition, there are problems of cost increase and contamination due to high temperature treatment, and low versatility.

Japanese Patent No. 3460551 Japanese Patent No. 2688137 JP 2005-145724 A JP 2006-261632 A Japanese Patent No. 3994602

  Therefore, in order to solve the problem of low versatility due to high-temperature heat treatment and non-uniform generation of defects, Patent Document 5 discloses a low-oxygen concentration silicon single crystal wafer in the entire N region doped with nitrogen. The manufacturing method is disclosed.

The technique described in Patent Document 5 is characterized in that the region that can be used as a defect-free wafer is increased by expanding the N region by doping nitrogen.
However, it becomes easy to generate OSF by doping nitrogen.
Further, in the N region wafer doped with nitrogen, when evaluating the oxide film breakdown voltage, TDDB (Time Dependent Dielectric Breakdown) deteriorates, which is a problem.

  The present invention has been made in view of the above problems, and is a high-quality, defect-free silicon single crystal having high versatility, low cost, no problem of contamination, and uniform gettering ability in the wafer surface. An object of the present invention is to provide a wafer and a manufacturing method thereof.

In order to solve the above-described problems, in the present invention, a silicon single crystal wafer grown by the Czochralski method has an oxygen concentration of 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less, and is doped with nitrogen. A silicon single crystal wafer characterized in that it is cut out from a single crystal in the entire N region manufactured by the Czochralski method and subjected to EG treatment on one main surface of the silicon single crystal wafer. (Claim 1).

In this way, EG (Extrinsic Gettering) that is not gettering by BMD is applied to a defect-free wafer that is not doped with nitrogen and has an entire surface N region with an extremely low oxygen concentration of 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less. ), A silicon single crystal wafer with high in-plane uniformity of gettering capability can be obtained.
That is, since doping with nitrogen facilitates the generation of OSF, in the present invention, the wafer is not doped with nitrogen and has a very low oxygen concentration. As a result, the OSF region can be made defect-free and the N region can be widened. Therefore, the margin of the F / G control width can be widened, and the versatility can be reduced at a low cost.
Further, by performing the EG treatment on the portion of the gettering ability that has become weak due to the extremely low oxygen, it is possible to obtain a silicon single crystal wafer in which the uniformity of the in-plane gettering ability is ensured.
In addition, since it is not necessary to perform a high-temperature heat treatment step or the like, there is no problem of contamination by metal impurities, and cost reduction can be achieved.

Further, it is preferable that any one of backside sand blasting, backside polysilicon film formation, and surface ion implantation is performed as the EG processing.
As an EG treatment, a strained layer can be formed on the backside of the wafer (sandblasting or polysilicon formation), and if a gettering layer is formed in the vicinity of a device active layer on which a semiconductor element is formed The strained layer can be formed to a specific depth by ion implantation.

Moreover, it is preferable that carbon ion implantation is performed as the surface ion implantation treatment.
As described above, if carbon is ion-implanted, it is possible to suppress a change in resistivity or the like due to the implanted carbon.

Further, the present invention is a method for producing a silicon single crystal wafer, wherein the entire crystal surface is an N region without doping nitrogen, and the oxygen concentration is 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less. A method for producing a silicon single crystal wafer, comprising: growing a silicon single crystal by a Czochralski method under conditions, processing the silicon single crystal into a wafer, and performing EG treatment on one main surface of the wafer. (Claim 4).

Thus, nitrogen without doping, by crystallization entire surface N region, and the oxygen concentration is to grow a ^{6 × 10 17 atoms / cm 3} (ASTM'79) to be less than a single crystal, easily the whole surface of the wafer Can be an N region, that is, a defect-free wafer.
That is, the generation of OSF can be suppressed by setting the extremely low oxygen concentration. As a result, it is possible to widen the control range of F / G when growing a single crystal, and therefore it is possible to easily grow without requiring strict control.
Furthermore, gettering capability is added to the wafer by performing EG processing on the wafer produced by processing the single crystal grown earlier, with the extremely low oxygen concentration, resulting in a decrease in gettering capability due to precipitation of BMD and the like. To do. As a result, a silicon single crystal wafer capable of maintaining the uniformity of the in-plane gettering capability can be manufactured.

The EG treatment is preferably any one of backside sand blasting, backside polysilicon film formation, and surface ion implantation.
As described above, the formation of the back surface sandblast or the back surface polysilicon film can reduce the influence on the surface on the device active layer side and can be easily implemented. Further, by performing ion implantation on the surface, a gettering layer adjacent to the device active layer can be formed.

In the ion implantation process, it is preferable that carbon ions are implanted from the wafer surface to form a carbon ion implanted layer.
In this way, carbon ion implantation is electrically neutral and has a small diffusion coefficient, so that even if crystal defects are introduced into the ion implantation layer, it is possible to suppress changes in resistivity and the like. .

As explained above, a silicon single crystal in the entire N region having an oxygen concentration of 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less is grown by Czochralski method without doping nitrogen, and EG treatment is performed. As a result, the expanded N region can be effectively used regardless of the presence or absence of the OSF region in the N region, and a defect-free silicon single crystal wafer can be obtained with extremely high productivity, high yield, and low cost compared to the conventional method. Can be manufactured. By performing EG treatment, it is possible to provide a silicon single crystal wafer that can uniformly add gettering capability and can cope with problems such as impurity contamination, and a method for manufacturing the same.

Hereinafter, the present invention will be described more specifically.
As described above, the development of a high-quality defect-free silicon single crystal wafer having high versatility, low cost and no contamination problem, uniform gettering capability in the wafer surface, and a method for producing the same is awaited. It was.

  Accordingly, the present inventors have intensively studied a method for effectively using the OSF without generating OSF in order to improve the productivity of defect-free crystals and reduce the manufacturing cost.

  As a result, when pulling up the single crystal, the present inventors suppress the generation of OSF by not doping nitrogen, and reduce the oxygen concentration in the crystal as much as possible, thereby deactivating the OSF (device characteristics). It has been found that the N region can be substantially enlarged and effectively used. That is, it becomes possible to manufacture defect-free wafers with extremely high productivity and high yield as compared with the prior art.

However, even though it is possible to efficiently manufacture a defect-free wafer, it is not possible to expect a gettering effect by depositing BMD because the oxygen concentration is low.
As a result of further investigations on this problem, the present inventors have conducted uniform EG treatment on one main surface of a wafer processed with a silicon single crystal grown under the above-described conditions. The present invention has been completed based on the idea that the problem can be solved by adding a gettering capability to.

Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.
The silicon single crystal wafer of the present invention is grown by the Czochralski method, is not doped with nitrogen, has an oxygen concentration of 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less, and the entire crystal surface is N A single crystal grown so as to be a region is cut out and one main surface thereof is subjected to EG treatment.

Thus, in the case of a defect-free wafer that is not doped with nitrogen and has an entire N region with an extremely low oxygen concentration of 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less, the oxygen concentration is reduced and nitrogen is reduced. Generation of OSF can be strongly suppressed by not doping. Since the generation of OSF is suppressed, the region including the OSF region can be used, and thus the N region can be substantially enlarged, so that the range of F / G control during single crystal pulling is widened. be able to. For this reason, productivity can be improved and manufacturing costs can be reduced.
In addition, by performing EG treatment on a defect-free silicon single crystal wafer that is the entire N region and has an extremely low oxygen concentration, it can have uniform gettering capability in the plane.

Here, as the EG treatment, any one of backside sandblasting, backside polysilicon film formation, and surface ion implantation may be performed.
As the EG treatment, if the backside sandblasting or the backside polysilicon film formation is performed by introducing a strained layer on the backside of the wafer, impurities and defects remaining on the device active layer side can be greatly reduced. .
Further, when it is desired to form a gettering layer near the device active layer, the ion implantation can be performed from the main surface on the device fabrication side.

Further, when an ion implantation process is performed as the EG process, the implanted ions can be converted into carbon ions.
As described above, if the electrically neutral carbon ions are implanted, the resistivity can be suppressed from changing.

  Such a silicon single crystal wafer can be manufactured by the following method for manufacturing a silicon single crystal wafer, but is not limited to this.

Here, an example of a single crystal growth apparatus used for manufacturing the silicon single crystal wafer of the present invention will be described with reference to FIG.
As shown in FIG. 1, the single crystal growing apparatus 15 includes a main chamber 1, a pulling chamber 2 above the main chamber 1, a crucible provided in the main chamber 1, a heater 7 disposed around the crucible, A crucible holding shaft for rotating the crucible and its rotation mechanism (not shown), a seed chuck for holding a silicon seed crystal, a wire for pulling up the seed chuck, and a winding mechanism (not shown) for rotating or winding the wire It is configured with. The crucible is provided with a quartz crucible 5 on the inner side containing the raw material melt 4 and a graphite crucible 6 on the outer side. A heat insulating member 8 is disposed around the outside of the heater 7. During the growth of the single crystal, atmospheric gas is introduced from the gas inlet 10 and discharged from the gas outlet 9.

Moreover, in order to set the manufacturing conditions related to the manufacturing method of the present invention, the annular heat shield member 13 is provided on the outer periphery of the solid-liquid interface of the single crystal 3, and the rectifying cylinder 14 is disposed thereon. The heat shield member 13 is installed with a gap of 3 to 10 cm between its lower end and the molten metal surface of the raw material melt 4. The heat shield member 13 may not be used depending on conditions. Further, a cylindrical cooling device 11 that introduces a cooling medium from the cooling medium introduction port 12 or cools the single crystal 3 by blocking radiant heat may be provided.
Further, a magnet (not shown) is installed outside the pulling chamber in the horizontal direction, and a magnetic field in the horizontal direction or the vertical direction is applied to the raw material melt 4 to suppress the convection of the melt and to stably grow the single crystal. In many cases, the so-called MCZ method is used.

Next, a method for growing a silicon single crystal using the above-described single crystal growing apparatus will be described.
First, in a crucible, silicon high-purity polycrystalline raw material is heated to a melting point (about 1420 ° C.) or higher and melted. Next, the tip of the seed crystal is brought into contact with or immersed in the approximate center of the surface of the raw material melt by unwinding the wire. Thereafter, the crucible holding shaft is rotated in an appropriate direction, and the single crystal growth is started by winding the wire while rotating it and pulling up the seed crystal. Thereafter, a substantially cylindrical single crystal can be obtained by appropriately adjusting the pulling speed and temperature.

  Here, in the present invention, the crystal is pulled so that the entire crystal surface becomes an N region. In order to make the entire surface the N region, the ratio of F / G, which is the ratio between the pulling rate (F) and the crystal solid-liquid interface axial temperature gradient (G), is controlled within the range of the N region. Just pull it up. The range that becomes the N region of F / G can be obtained by performing a test of growing by gradually reducing the pulling rate of the single crystal, vertically dividing the grown single crystal in the axial direction, and evaluating the defect distribution. .

During the pulling, the oxygen concentration in the crystal becomes 6 × 10 ¹⁷ atoms / cm ³ or less by controlling the crucible rotation speed, the crystal rotation speed, the introduced gas flow rate, the atmospheric pressure, and the strength and direction of the applied magnetic field. Can be. For example, oxygen can be reduced to a desired value or less by reducing the crucible rotation speed, increasing the gas flow rate, decreasing the pressure, and increasing the magnetic field.

In the present invention, the single crystal to be grown is not doped with nitrogen.
This is because, as described above, when nitrogen is doped on the wafer in the entire N region, electrical characteristics, particularly TDDB, is prevented from being deteriorated, and OSF is not easily generated due to nitrogen doping.

  Then, if the obtained single crystal is processed into a wafer through processes such as slicing, chamfering, grinding, etching, and mirror finish polishing according to a normal method, a defect-free wafer having an entire N region can be produced.

Thereafter, in order to add gettering capability to the wafer, a silicon single crystal wafer is completed by performing EG processing on one main surface of the wafer.
As described above, since the wafer of the present invention is cut out from the single crystal grown so as to be the entire N region, various defects are substantially free. For this reason, defects and electrical properties are very good, but there are no bulk defects. Therefore, since the gettering ability is lacking, it is necessary to perform the EG process and add the gettering ability.

Here, as this EG process, for example, a sandblasting or backside polysilicon film forming process can be performed on the back surface, which is the surface opposite to the main surface on which the device is to be manufactured.
If the strained layer forming process is performed on the back surface of the wafer as described above, impurities and defects on the device active layer side can be reduced. Any known method can be applied to the formation of the sandblast or the polysilicon film.

In addition, ion implantation can be performed on the main surface on which the device is to be manufactured.
By performing ion implantation in this way, a strained layer having a gettering ability can be formed at a specific depth near the device active layer, so that the impurity concentration of the device active layer can be easily reduced. Can do.

When ion implantation is performed as the EG process, carbon ion implantation can be performed.
By using carbon ions as ions to be implanted, it is possible to suppress the resistance of the manufactured silicon single crystal wafer from changing in the ion implanted layer. In addition, since the oxygen concentration of the wafer is low, oxygen precipitation is not promoted even if carbon is ion-implanted, so that formation of BMD or the like can be suppressed, and uneven defects in the surface can be prevented. It is also possible to suppress the occurrence.

According to the method for producing a silicon single crystal wafer of the present invention, since no oxygen is doped and the oxygen concentration is low, the generation of OSF can be suppressed, and therefore the N region containing OSF is also used as a defect-free region. can do. For this reason, control of F / G at the time of growing a single crystal becomes easy, and manufacturing cost can be reduced. That is, in the present invention, the entire N region can be used, but the OSF can be inactivated and incorporated into the N region by nitrogen non-doping and low oxygen concentration.
Further, by performing the EG process, it is possible to manufacture a silicon single crystal wafer in which gettering capability is uniformly added to a defect-free wafer in the plane.

EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.
Example 1
A single crystal growth apparatus as shown in FIG. 1 is equipped with a crucible having a diameter of 24 inches (600 mm), and an extremely low oxygen concentration of 8 inches (200 mm) in diameter using the magnetic field application Czochralski method (MCZ method). A defect-free silicon single crystal of the entire N region was grown.
Cut wafers from the defect-free single crystal was evaluated for oxygen concentration in the wafer center ^{4 × 10 17 atoms / cm 3} (ASTM'79), around ^{3 × 10 17 atoms / cm 3} (ASTM'79) Met.

Carbon ion implantation was performed on this wafer. A silicon single crystal wafer was manufactured with a carbon ion dose of 1 × 10 ¹⁴ / cm ² . This silicon single crystal wafer was subjected to heat treatment at 800 ° C. for 4 hours + 1000 ° C. for 16 hours, which imitated a device, and BMD inside the silicon single crystal wafer was examined by an infrared scattering method.
As a result, as shown in FIG. 2, BMD was hardly observed in the silicon single crystal wafer surface.

Further, this silicon single crystal wafer was intentionally contaminated with nickel, subjected to a drive-in heat treatment at 800 ° C. for 14 minutes and rapidly cooled, and then the surface shallow pits were observed.
As a result, as shown in FIG. 3A, it was confirmed that there was no entire shallow pit. Therefore, it was confirmed that the gettering ability by ion implantation could be added uniformly in the plane, not due to the internal BMD.

(Comparative Example 1)
Except for not performing carbon ion implantation as EG treatment, a wafer cut from the same silicon single crystal as in Example 1 was used, and a heat treatment was performed at 800 ° C. for 4 hours + 1000 ° C. for 16 hours, simulating a device. When the BMD inside the silicon single crystal wafer was examined by the infrared scattering method, almost no BMD was observed in the wafer surface as in the silicon single crystal wafer of Example 1.

The silicon single crystal wafer of Comparative Example 1 was deliberately contaminated with nickel, subjected to a drive-in heat treatment at 800 ° C. for 14 minutes and rapidly cooled, and then the surface shallow pits were observed.
As a result, as shown in FIG. 3B, the entire shallow pit was observed. That is, since there is no BMD or EG, it was confirmed that the wafer has no gettering ability.

(Example 2 and Comparative Examples 2 and 3)
The oxygen concentration is 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) (Example 2), 7 × 10 ¹⁷ atoms / cm ³ (ASTM'79) (Comparative Example 2), 8 × 10 at the periphery of the central portion. A defect-free single crystal was grown under the same conditions as in Example 1 except that ¹⁷ atoms / cm ³ (ASTM'79) (Comparative Example 3) was obtained.
Then, the wafer was cut out from the single crystals of Example 2 and Comparative Examples 2 and 3, heat treatment was performed at 800 ° C. for 4 hours + 1000 ° C. for 16 hours to simulate the device, and the BMD inside the wafer was examined by an infrared scattering method.

As a result, as shown in FIG. 2, BMD is seen in the central part and the peripheral part of the silicon single crystal wafer of Comparative Example 3, but there is little BMD in the R / 2 part, and in-plane BMD uniformity is extremely low. It was a wafer. In such a wafer, there is a risk of warping or cracking of the wafer due to an increase or decrease in temperature in the subsequent device process or the like. Similarly, in the silicon single crystal wafer of Comparative Example 2, a slight amount of BMD was observed in the central portion and the peripheral portion.
On the other hand, in the silicon single crystal wafer of Example 2, BMD deposition is not observed in the central portion / peripheral portion, and it is possible to prevent the occurrence of problems such as wafer warpage due to BMD deposition. I understood.

(Examples 3 and 4)
A silicon single crystal wafer was produced under the same conditions as in Example 1 except that backside sandblasting (Example 3) and backside polysilicon film formation (Example 4) were performed on the wafer processed from the same silicon single crystal as in Example 1. The same evaluation was performed.
As a result, no BMD precipitation was observed in any of the silicon single crystal wafers of Examples 3 and 4, and no shallow pits were observed.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

It is the figure which showed an example of the outline of the growth apparatus of the silicon single crystal used by this invention. It is the figure which showed BMD in-plane distribution of the silicon single crystal wafer of Examples 1, 2 and Comparative Examples 2, 3. It is the figure which showed the result of having evaluated the formation degree of the shallow pit by having intentionally contaminated the silicon single crystal wafer of Example 1 and Comparative Example 1 with nickel.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Main chamber, 2 ... Pulling chamber, 3 ... Single crystal, 4 ... Raw material melt, 5 ... Quartz crucible, 6 ... Graphite crucible, 7 ... Heating heater, 8 ... Heat insulation member, 9 ... Gas outflow port, 10 ... Gas Introducing port, 11 ... cylindrical cooling device, 12 ... cooling medium introducing port, 13 ... heat shield member, 14 ... rectifying cylinder, 15 ... single crystal growing device.

Claims (6)

A silicon single crystal wafer grown by the Czochralski method,
The oxygen concentration is 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less, and the silicon single crystal wafer is cut out from a single crystal in the entire N region manufactured by the Czochralski method without being doped with nitrogen. A silicon single crystal wafer, wherein one main surface is subjected to EG treatment.   2. The silicon single crystal wafer according to claim 1, wherein any one of a backside sand blasting, a backside polysilicon film formation, and a surface ion implantation is performed as the EG processing.   The silicon single crystal wafer according to claim 2, wherein carbon ion implantation is performed as the surface ion implantation treatment. A method for producing a silicon single crystal wafer,
A silicon single crystal is grown by the Czochralski method under the condition that the entire surface of the crystal is an N region without doping nitrogen and the oxygen concentration is 6 × 10 ¹⁷ atoms / cm ³ (ASTM'79) or less. A method for producing a silicon single crystal wafer, wherein after processing from a crystal to a wafer, one main surface of the wafer is subjected to EG treatment.   5. The method for producing a silicon single crystal wafer according to claim 4, wherein the EG treatment is any one of backside sandblasting, backside polysilicon film formation, and surface ion implantation.   6. The method for producing a silicon single crystal wafer according to claim 5, wherein in the ion implantation, carbon ions are implanted from the wafer surface to form a carbon ion implanted layer.

Images