JP2002025934A - Electrode pattern forming method and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electrode pattern forming method for avoiding the occurrence of peeling even if a laminated metal film has an inverted taper form, and to provide a semiconductor device. SOLUTION: The surface of a polyimide film 4 is irradiated with argon gas ions for preventing the occurrence of excessive projecting/recessed parts in a state where an aluminum film 2 and the polyamide film 4 are exposed on a silicon substrate 1. A titanium film 5, a nickel film 6 having tensile stress whose whole stress is not less than 150 N/m and a gold film 7 are sequentially formed on the silicon substrate 1. Excessive photo-etching is performed on the metal film of the three layer structure of the titanium film 5, the nickel film 6 and the gold metal 7, and the metallic films 5, 6 and 7 in the laminated structure of a prescribed area are left.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a technique for stably forming a metal multilayer film on a desired region on a substrate without peeling off the metal multilayer film.

[0002]

2. Description of the Related Art As a method of forming a metal electrode of a semiconductor device, a pattern forming method using photolithography is well known, and an electrode can be formed in a desired region. In particular, in the etching of a multilayer film, the occurrence of reverse taper (side etching) is prevented by controlling the etching solution and conditions in order to avoid problems such as peeling (Kenzo Hatada, Introduction to TAB Technology, Industrial Research Council P.1).
01).

[0005] However, the above-described control of the etching solution and conditions has a problem that etching residue is generated.

[0004]

SUMMARY OF THE INVENTION The present invention has been made under such a background, and an object of the present invention is to prevent the occurrence of peeling even if the laminated metal film has a reverse taper. An object of the present invention is to provide an electrode pattern forming method and a semiconductor device.

[0005]

Means for Solving the Problems The present inventors have found that even when the laminated metal film as the electrode pattern has a reverse tapered structure and the total stress of the soldering metal film has a tensile stress of 150 N / m or more, the peeling is performed. It was found that it was possible to avoid. Based on this, according to the method for forming an electrode pattern according to claim 1, the polyimide film is irradiated with inert gas ions from the state where the underlying metal film and the polyimide film are exposed on the substrate, and the surface is exposed to the inert gas ions. After the unevenness is formed, a contact metal film and a soldering metal film having a total stress of 150 N / m or more in tensile stress are sequentially formed on the substrate. Thereafter, overetching is performed on the metal film having a laminated structure of the contact metal film and the metal film for soldering so that the metal film having the laminated structure in a predetermined region is left.

As a result, the cross-sectional structure at the end face of the metal film having a laminated structure has a reverse tapered shape, and the total stress of the metal film for soldering is 150.
A semiconductor device having a tensile stress of N / m or more can be obtained.

[0007] Here, the occurrence of unetched residue due to the above-mentioned over-etching is prevented. Thus, even if the laminated metal film has a reverse taper, it is possible to avoid the occurrence of peeling.

Here, as described in the second aspect, if excessive unevenness is prevented from being generated, appropriate unevenness is formed, and generation of voids when forming a film thereon can be avoided. More specifically, as described in claim 3, the center line average roughness (Ra) of the surface of the polyimide film after ion irradiation.
Is preferably 1 nm or less. That is, as described in claim 6, the surface of the polyimide film has a center line average roughness (R
It is preferable that the semiconductor device has a rough surface of 1 nm or less.

In the case where the surface of the polyimide film is subjected to a process for forming appropriate irregularities, the soldering metal film has a total stress of 800 N / m.
It is practically preferable to have the following tensile stress.

According to a fifth aspect of the present invention, when the contact metal film is any one of titanium, chromium, and vanadium, and the metal film for soldering is a nickel film or a copper film, It becomes more preferable.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. In this embodiment, the present invention is embodied as an IGBT (insulated gate bipolar transistor) shown in FIG.

In FIG. 1, an n ^- epitaxial layer 1b is formed on a p ⁺ silicon substrate 1a, and a silicon substrate 1 is constituted by the substrate 1a and the epitaxial layer 1b. At the surface portion of n ^- epitaxial layer 1b, p-type layers 20, 21 having different depths are formed, and p-type layers 20, 21 having the same depth are formed.
An n ⁺ region 22 is formed in the surface layer portion 21. On the silicon substrate 1, a gate electrode 24 is arranged via a gate oxide film 23. A large number of such cells are formed on the silicon substrate 1, and an IGBT is constituted by the large number of cells. The semiconductor device of this example has one substrate (chip) 1
Are formed with a plurality of IGBTs (cell groups).

On the upper surface of the silicon substrate 1, an aluminum film 2, a titanium film 5, a nickel film 6, and a gold film 7 are sequentially formed as emitter electrodes. On the other hand, unevenness 1c is formed on the back surface (lower surface) of the silicon substrate 1, and a titanium film 10, a nickel film 11,
The gold film 12 is formed in order. Here, the titanium thin films 5, 10 are contact metal films, and the nickel films 6, 1
1 is a metal film for soldering, and gold films 7 and 12 are oxidation prevention films.

Further, the upper surface of the silicon substrate 1 (the gold film 7)
Side), the heat sink / emitter lead 25 is solder 2
6 are joined. On the other hand, a heat sink / collector lead 27 is joined to the back surface (the gold film 12 side) of the silicon substrate 1 by solder 28.

Next, the manufacturing process of the IGBT, particularly, the method of forming the titanium film 5, the nickel film 6, and the gold film 7, which are the electrode patterns, will be mainly described. A cross-sectional view for explaining the process,
2 to 14.

First, as shown in FIG.
Prepare Then, a general semiconductor device manufacturing technique (such as ion implantation) is applied to the silicon substrate 1 in a wafer state.
Is used to form an IGBT element. Further, an insulating film 3 is formed on the upper surface of the silicon substrate 1 at a boundary portion 2a between adjacent IGBTs (cell groups). This insulating film 3 is made of BP
It is made of an SG film, a PSG film, or the like. Thereafter, an aluminum film 2 is deposited on the silicon substrate 1 including the insulating film 3. This aluminum film 2 serves as a base for the emitter electrode portion of the IGBT.
Then, the aluminum film 2 is formed by photolithography.
2a between adjacent IGBTs (cell groups)
Is removed.

Then, as shown in FIG. 3, a polyimide film 4 as a protective film is formed in a predetermined region on the aluminum film 2 and the insulating film 3. As a result, the aluminum film 2 and the polyimide film 4 which are the underlying metal films are formed on the silicon substrate 1.
Is exposed. More specifically, with respect to the patterning step of the polyimide film 4, a resist is applied, exposed, and immersed in a developer to develop the resist and etch the polyimide film. Further, the resist is stripped using acetone or the like, and annealing is performed.

Subsequently, as shown in FIG.
Before forming the film (see FIG. 5) (as a process before forming the electrode), the polyimide film 4 is irradiated with argon gas ions, which are inert gas ions. FIG. 15 shows a schematic configuration of an apparatus for irradiating this argon gas ion.

In FIG. 15, the chamber 30 is provided with an inlet 30a for introducing a gas and an outlet 30b via a turbo pump 31 for exhaust pressure reduction. Electrode plates 32a and 32b for applying a high-frequency voltage are arranged on the upper and lower surfaces inside the chamber 30. A high frequency output from a high frequency power supply 33 is applied between these electrode plates 32a and 32b. The silicon wafer 34 is mounted on the lower electrode 32b. A magnet 35 is arranged on the outer periphery of the chamber 30 so that a magnetic field acts on the inside of the chamber 30 to generate inert gas ions.

In this apparatus, when the silicon wafer 34 is started in a state where it is mounted on the electrode 32b in the chamber 30, the chamber 30 is evacuated by the turbo pump 31 and is evacuated (specifically, Is 3P
In a), an argon gas is introduced from the inlet 30a. The high frequency power is supplied from the high frequency power supply 33 to the electrodes 32a, 32a.
The magnetic field is generated by the magnet 35 while being applied between 32b. In this state, argon gas ions are generated in the chamber 30 and irradiated on the surface of the silicon wafer 34.

At this time, the power is set to 100 W and the ion irradiation is performed for 60 seconds. This is a low output for ion irradiation. That is, general processing is 400 W, 1
It is about 20 seconds, but in this embodiment, 100 seconds
W, 60 seconds. Thereby, the surface of the polyimide film 4 is irradiated with inert gas ions so as not to generate excessive unevenness, whereby appropriate unevenness is formed and the outermost surface is cleaned. Specifically, the center line average roughness (Ra) of the surface of the polyimide film 4 after ion irradiation is 1
nm or less. The surface area is increased due to the formation of the concavities and convexities due to the irradiation of the argon gas ions, the adhesion of the film formed thereon is improved, and the occurrence of separation can be improved. In particular, due to appropriate unevenness (Ra is 1 nm or less), generation of voids can be avoided when a film is formed thereon, thereby improving reliability. In addition, as described above, the ion irradiation is performed at a low output and for a short time, so that no particles are generated and the apparatus is not contaminated.

FIGS. 16A and 16B show the measurement results of the surface of the polyimide film 4 before and after irradiation with argon gas ions. AFM was used for the measurement. FIG. 16A shows the state before the treatment, and the Ra value of the polyimide film is 0.404 nm.
And the surface area is 250560 nm ² (250,000 n
was m per ^2). FIG. 16B shows the state after the processing.
The Ra value of the polyimide film was 0.495 nm, and the surface area was 252224 nm ² (per 250,000 nm ² ). Thus, the Ra value after the treatment was 1 nm or less, and it was confirmed that the surface area was increased by the treatment.

Subsequently, from the state where the aluminum film 2 and the polyimide film 4 are exposed on the silicon substrate 1 in FIG.
As shown in FIG. 1, a titanium film 5, a nickel film 6, and a gold film 7 are sequentially formed on the silicon substrate 1 as electrode films. At this time, the nickel film 6 has a total stress of 150 N / m.
It has the above tensile stress (the size of F in the figure). When a semiconductor manufacturing method including the above-described step of irradiating inert gas ions is employed, the nickel film 6 has a total stress of 800.
It should have a tensile stress of N / m or less. The total stress of the film is a product of the film thickness and the internal stress (total stress = film thickness × internal stress).

Further, as shown in FIG. 6, a resist 8 is applied to a predetermined region on the metal films 5, 6, 7 having a three-layer structure. Subsequently, as shown in FIGS. 7, 8, and 9, the metal films 5, 6, and 7 having a three-layer structure are wet-etched so as to be over-etched, and the gold film 7, the nickel film 6, the titanium film The film 5 is sequentially removed. Specifically, as shown in FIG. 7, when etching the gold film 7, a mixed solution of iodine + potassium iodide + water is used as an Au etchant (Au etchant). Further, as shown in FIG. 8, when etching the nickel film 6, N
A mixed solution of phosphoric acid + nitric acid + acetic acid + water is used as the i etching solution. Further, as shown in FIG. 9, when etching the titanium film 5, EDTA is used as a Ti etching solution.
A mixed solution of + ammonia + hydrogen peroxide + water is used.

By performing photo-etching on the metal films 5, 6, and 7 having the three-layer structure, the metal films 5, 6, and 7 having the three-layer structure in a predetermined region are left as shown in FIG. . That is, the electrodes of adjacent IGBTs (cell groups) are separated. Further, metal films 5, 6, 7 having a three-layer structure
Side etching (undercut)
Thereby, the cross-sectional structure becomes an inversely tapered shape.

Subsequently, as shown in FIG. 10, after the resist 8 is removed, as shown in FIG.
A protective tape 9 is attached to the surface (upper surface). This tape 9 is for grinding the back surface of the substrate 1.

Then, as shown in FIG. 12, the back surface of the silicon substrate 1 is ground to form irregularities 1c. Further, as shown in FIG. 13, after peeling off the protective tape 9, FIG.
1, a titanium film 10, a nickel film 11, and a gold film 12 are sequentially formed on the back surface of the silicon substrate 1. The resulting semiconductor device has a three-layer structure in which an aluminum film 2 and a polyimide film 4 are disposed on a silicon substrate 1 and a titanium film 5, a nickel film 6, and a gold film 7 are sequentially stacked thereon. The metal film having a three-layer structure is patterned. Further, the cross-sectional structure of the three-layer metal films 5, 6, and 7 at the end faces has an inversely tapered shape.
It has a tensile stress of 50 N / m or more (the size of F in the figure). The surface of the polyimide film 4 is a rough surface having a center line average roughness Ra of 1 nm or less. The nickel film 6
Preferably has a total stress of 800 N / m or less.

The total stress of the nickel film 6 has a tensile stress of 150 N / m or more, and the metal films 5, 6, 7 have a three-layer structure.
Before the film formation of the polyimide film 4, the surface of the polyimide film 4 is irradiated with argon gas ions (inert gas ions) so as not to cause excessive unevenness.
Has a moderate increase in surface area, thereby improving the adhesion, thereby improving the prevention of peeling. That is, the nickel film 6
If you have a very large tensile stress as the total stress of
When the protective tape 9 of FIG. 12 is peeled off, the electrodes 5, 6, and 7 on the polyimide film 4 and the aluminum film 2 are peeled off by the protective tape 9 as shown in FIG. Can be avoided.

The present inventors have examined the following (i) to (iv) in order to confirm the releasability in a process instead of the irradiation with argon gas ions.
Was conducted. (i) Peeling test with tape after cleaning with IPA (isopropyl alcohol) (ii) Peeling test with tape after cleaning with phosphoric acid (iii) Tape cleaning after cleaning with CVD etchant Peeling test (iv) Peeling test with tape after performing surface treatment with CF ₄ However, peeling occurred in all cases. This allows
The usefulness of argon gas ion irradiation was confirmed.

It has been reported that the adhesion is improved by ion beam irradiation in order to prevent the occurrence of peeling (Proc. BEA).
MS 1999, Hakamada et al.) In this case, the center line average roughness Ra of the surface is larger than 1 nm, and there remains a problem in reliability such as generation of voids after film formation. However, as described above, by setting the Ra value to 1 nm or less. No problem such as generation of voids occurs after film formation.

On the other hand, if the metal films 5, 6, and 7 having a laminated structure are not subjected to photo-etching which causes over-etching (without being made to have a reverse taper) and have a forward taper as shown in FIG. However, IGBTs that should be electrically separated are electrically connected. On the other hand, by performing photo-etching that becomes over-etching to form a reverse tapered structure, no etching residue is generated.

In the manufacturing process, the completed wafer (each semiconductor device) is diced and assembled into each chip after an electrical characteristic test. As described above, even when the three-layer metal films 5, 6, and 7 serving as the electrode patterns have a reverse tapered structure and the total stress of the nickel film 6 has a tensile stress of 150 N / m or more, peeling can be avoided. Irradiation of inert gas ions on the surface is effective in preventing delamination. At this time, ion irradiation is performed so as not to generate excessive unevenness (specifically, the Ra value is 1 nm or less), and nickel is applied. It is preferable that the total stress of the film 6 has a tensile stress of 800 N / m or less.

In addition to those described above, the present invention may be implemented as follows. Contact metal film is titanium film 5
However, in addition to the titanium film, any one of chromium and vanadium may be used. Further, the metal film for soldering is the nickel film 6, but may be another metal film, for example, a copper film. Further, although the gold film 7 was used as the antioxidant film,
A silver film may be used. Further, a gold film 7 serving as an antioxidant film
Is not necessarily required.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a semiconductor device according to an embodiment.

FIG. 2 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 3 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 4 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 5 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 6 is a cross-sectional view for explaining an electrode pattern forming method.

FIG. 7 is a cross-sectional view for explaining an electrode pattern forming method.

FIG. 8 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 9 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 10 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 11 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 12 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 13 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 14 is a cross-sectional view for explaining a method of forming an electrode pattern.

FIG. 15 is a schematic configuration diagram of an inert gas ion irradiation device.

FIG. 16 is a view showing measurement results of a surface of a polyimide film.

FIG. 17 is a cross-sectional view illustrating a method of forming an electrode pattern.

FIG. 18 is a cross-sectional view illustrating a method of forming an electrode pattern.

[Explanation of symbols]

1: silicon substrate, 2: aluminum film, 4: polyimide film,
5: titanium film, 6: nickel film, 7: gold film.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 29/78 652 H01L 21/88 T 21/336 29/78 658F (72) Inventor Takeshi Miyajima Kariya, Aichi 1-1-1 Showa-cho, DENSO Corporation (72) Inventor Mikimasa Suzuki 1-1-1, Showa-machi, Kariya-shi, Aichi F-term in Denso Corporation 4M104 BB02 CC01 DD20 DD24 DD64 EE18 FF06 FF17 GG20 HH09 5F004 AA14 AA16 BA04 BA08 BB07 BB13 DA23 DB25 5F033 HH07 HH08 HH13 HH18 MM08 MM17 PP14 QQ08 QQ09 QQ10 QQ19 QQ33 QQ91 RR14 RR15 RR22 TT04 VV07 WW00 XX00 5F043 BB02 BB02

Claims (8)

[Claims] The polyimide film (4) is irradiated with inert gas ions from the state in which the underlying metal film (2) and the polyimide film (4) are exposed on the substrate (1) to form irregularities on the surface. Forming a contact metal film (5) and a soldering metal film (6) having a total stress of 150 N / m or more on the substrate (1) in this order; Performing photo-etching, which is an over-etching process, on the metal film having a stacked structure of the metal film (5) and the metal film for soldering (6) to leave a metal film (5, 6) having a stacked structure in a predetermined region. An electrode pattern forming method, comprising: 2. The method of forming an electrode pattern according to claim 1, wherein the irradiation with the inert gas ions does not cause excessive unevenness. 3. The electrode pattern forming method according to claim 2, wherein a center line average roughness of a surface of the polyimide film (4) after the ion irradiation is 1 nm or less. 4. The method for forming an electrode pattern according to claim 2, wherein the metal film for soldering has a total stress of 800 N /.
A method for forming an electrode pattern, wherein the electrode pattern has a tensile stress of not more than m. 5. The method for forming an electrode pattern according to claim 1, wherein the contact metal film (5) is any one of titanium, chromium, and vanadium, and is used for the soldering. The method for forming an electrode pattern, wherein the metal film (6) is a nickel film or a copper film. 6. A base metal film (2) and a polyimide film (4) are arranged on a substrate (1), and
A semiconductor device in which a metal film having a laminated structure in which a contact metal film (5) and a metal film for soldering (6) are sequentially laminated is patterned, wherein the metal film (5, 6) having the laminated structure has The cross-sectional structure is reverse-tapered, the total stress of the metal film for soldering (6) has a tensile stress of 150 N / m or more, and the surface of the polyimide film (4) has a center line average roughness of 1 nm or less. A semiconductor device characterized by having a rough surface. 7. The semiconductor device according to claim 6, wherein the metal film for soldering has a total stress of 800 N /.
A semiconductor device having a tensile stress of not more than m. 8. The semiconductor device according to claim 6, wherein the contact metal film (5) is any one of titanium, chromium, and vanadium, and the soldering metal film (6) is A semiconductor device comprising a nickel film or a copper film.