JP2002009347A - Led light source and its manufacturing method - Google Patents
Led light source and its manufacturing methodInfo
- Publication number
- JP2002009347A JP2002009347A JP2000191101A JP2000191101A JP2002009347A JP 2002009347 A JP2002009347 A JP 2002009347A JP 2000191101 A JP2000191101 A JP 2000191101A JP 2000191101 A JP2000191101 A JP 2000191101A JP 2002009347 A JP2002009347 A JP 2002009347A
- Authority
- JP
- Japan
- Prior art keywords
- pair
- led
- light source
- substrate
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Wire Bonding (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、基板上にLED
(Light Emitting Diode:発光ダイオード)チップを搭
載したLED光源およびその製造方法に関し、特に、発
光効率が高く、生産性に優れ、高精度で、封止部材の形
状や材質の自由度が高いLED光源およびその製造方法
に関する。TECHNICAL FIELD The present invention relates to an LED on a substrate.
(Light Emitting Diode) An LED light source equipped with a chip and a method of manufacturing the same, particularly an LED light source having high luminous efficiency, excellent productivity, high accuracy, and high degree of freedom in the shape and material of a sealing member. And its manufacturing method.
【0002】[0002]
【従来の技術】従来のLED光源として、例えば、特開
平11−168235号公報に示されるものがある。2. Description of the Related Art A conventional LED light source is disclosed in, for example, Japanese Patent Application Laid-Open No. H11-168235.
【0003】図9は、そのLED光源を示す。このLE
D光源は、基材101上に正負一対のリード110A,
110Bが形成されたLED搭載用基板100と、一対
のリード110A,110Bに、基板製作工程とは別工
程にて個々に形成された金,はんだ等からなる一対のバ
ンプ120a,120bを介して接続されたLEDチッ
プ130と、LEDチップ130を封止する透明樹脂1
40と、アンダーフィル樹脂150とを有する。一対の
リード110A,110Bは、基材101の表面101
aから側面101bを経て裏面101cに延在して形成
されている。LEDチップ130は、光出射面となる上
面130aと反対側の下面130bには反射層131、
および図示しない正負一対の電極が形成されており、一
対の電極は一対のバンプ120a,120bを介して一
対のリード110A,110Bに接続されている。ま
た、LEDチップ130が搭載されたLED搭載用基板
100をメイン基板上に実装する場合は、LEDチップ
130の上面130aを吸着したのではバンプ120
a,120bが剥離されるおそれがあることから、ある
程度の硬度を有する透明樹脂140の平坦な上面を吸着
してハンドリングしている。このような構成によれば、
LEDチップ130の光出射面には電極を設けていない
ため、発光効率の向上が図れる。FIG. 9 shows the LED light source. This LE
The D light source includes a pair of positive and negative leads 110A,
Connected to the LED mounting substrate 100 on which the LED 110B is formed and a pair of leads 110A and 110B via a pair of bumps 120a and 120b made of gold, solder, and the like, which are individually formed in a process different from the substrate manufacturing process. LED chip 130 and transparent resin 1 for sealing LED chip 130
40 and an underfill resin 150. The pair of leads 110 </ b> A and 110 </ b> B
A is formed to extend from a through the side surface 101b to the back surface 101c. The LED chip 130 has a reflective layer 131 on a lower surface 130b opposite to an upper surface 130a serving as a light emitting surface.
Further, a pair of positive and negative electrodes (not shown) is formed, and the pair of electrodes is connected to a pair of leads 110A and 110B via a pair of bumps 120a and 120b. When the LED mounting board 100 on which the LED chip 130 is mounted is mounted on the main board, the upper surface 130a of the LED chip 130 may be sucked and the bump 120
Since a and 120b may be peeled off, the flat upper surface of the transparent resin 140 having a certain degree of hardness is sucked and handled. According to such a configuration,
Since no electrode is provided on the light emitting surface of the LED chip 130, the luminous efficiency can be improved.
【0004】[0004]
【発明が解決しようとする課題】しかし、従来のLED
光源によると、バンプは、金、はんだ等の細線を球状に
し、バンプボンダーによって一つ一つ圧接して形成され
るなど、生産性が悪く、また、ボールバンプを形成する
際にリードパターンを基準に位置決めしているため、リ
ードパターンのエッジのだれやパターンずれ等により位
置精度が出し難い。また、LEDチップが搭載されたL
ED搭載用基板をハンドリングするために、ある程度の
硬度を有し、上面が平坦な透明樹脂140を予め設けな
ければならないため、透明樹脂の形状や材質が制限され
る。However, the conventional LED
According to the light source, the bumps are formed in such a way that the fine wires of gold, solder, etc. are formed into a spherical shape and pressed by a bump bonder one by one, resulting in poor productivity. Position, it is difficult to obtain positional accuracy due to droop of the edge of the lead pattern, pattern shift, or the like. In addition, the LED chip mounted L
In order to handle the ED mounting substrate, the transparent resin 140 having a certain degree of hardness and having a flat upper surface must be provided in advance, so that the shape and material of the transparent resin are limited.
【0005】従って、本発明の目的は、発光効率が高
く、生産性に優れ、高精度のLED光源およびその製造
方法を提供することにある。また、本発明の他の目的
は、封止部材の形状や材質の自由度が高いLED光源お
よびその製造方法を提供することにある。Accordingly, it is an object of the present invention to provide an LED light source having high luminous efficiency, excellent productivity, and high precision, and a method of manufacturing the same. It is another object of the present invention to provide an LED light source having a high degree of freedom in the shape and material of a sealing member, and a method for manufacturing the same.
【0006】[0006]
【課題を解決するための手段】本発明は、上記目的を達
成するため、絶縁基材の裏面に形成された正負一対の裏
リード、および前記絶縁基材の表面に前記一対の裏リー
ドに一対の金属接続部によって接続された正負一対の表
リードを有する基板と、前記基板に対向する面側に正負
一対の電極を有し、前記一対の電極が一対の接合用バン
プを介して前記基板の前記一対の表リードに接続された
LEDチップとを備え、前記一対の接合用バンプは、メ
ッキによって前記一対の表リード上に形成されたことを
特徴とするLED光源を提供する。上記構成によれば、
複数のLEDチップからの光は、電極が設けれていない
光出射面から出射される。また、一対の接合用バンプを
メッキによって形成することにより、生産性が向上し、
基板の外形あるいは合せ穴を基準とすることができるの
で、高い位置精度が得られる。「一対の接合用バンプ」
には、正負の極にそれぞれ1つのバンプを用いた場合に
限らず、一方の極に1つ、他方の極に複数のバンプを用
いた場合や、正負の極にそれぞれ複数のバンプを用いた
場合が含まれる。In order to achieve the above object, the present invention provides a pair of positive and negative back leads formed on the back surface of an insulating base, and a pair of back leads on the front surface of the insulating base. A substrate having a pair of positive and negative front leads connected by a metal connection portion, and a pair of positive and negative electrodes on a surface side facing the substrate, wherein the pair of electrodes is connected to the substrate via a pair of bonding bumps. An LED light source comprising: an LED chip connected to the pair of front leads; wherein the pair of bonding bumps are formed on the pair of front leads by plating. According to the above configuration,
Light from the plurality of LED chips is emitted from the light emission surface where no electrode is provided. In addition, productivity is improved by forming a pair of bonding bumps by plating.
Since the outer shape or the matching hole of the substrate can be used as a reference, high positional accuracy can be obtained. "A pair of bonding bumps"
Is not limited to the case where one bump is used for each of the positive and negative poles, the case where one bump is used for one of the poles, and the case where a plurality of bumps are used for the positive and negative poles Cases are included.
【0007】本発明は、上記目的を達成するため、絶縁
基材の裏面に正負一対の裏リード、および前記絶縁基材
の表面に前記一対の裏リードに一対の金属接続部により
接続された正負一対の表リードを複数組有する集合基板
を形成し、前記集合基板の複数組の前記一対の表リード
に一対の接合用バンプをそれぞれ形成し、1つの面側に
正負一対の電極を有する複数のLEDチップを、前記一
対の電極を前記一対のバンプに接続して前記集合基板上
に搭載し、前記複数のLEDチップを搭載された前記集
合基板をLEDチップ毎に分割することを特徴とするL
ED光源の製造方法を提供する。In order to achieve the above object, the present invention provides a pair of positive and negative back leads on the back surface of an insulating base material and a pair of positive and negative terminals connected to the pair of back leads on the front surface of the insulating base material. An aggregate substrate having a plurality of pairs of front leads is formed, a plurality of bonding bumps are respectively formed on the plurality of pairs of front leads of the aggregate substrate, and a plurality of pairs having a pair of positive and negative electrodes on one surface side. The LED chip is mounted on the collective substrate by connecting the pair of electrodes to the pair of bumps, and the collective substrate on which the plurality of LED chips are mounted is divided for each LED chip.
Provided is a method for manufacturing an ED light source.
【0008】[0008]
【発明の実施の形態】図1および図2は、本発明の実施
の形態に係るLED光源を適用したLED面発光装置を
示し、図1(a)は正面図、同図(b)は側面図、同図
(c)は底面図、図2(a)は図1(a)のA部拡大
図、図2(b)は図1(a)のB部拡大図、図2(c)
はLEDチップの底面図である。1 and 2 show an LED surface light emitting device to which an LED light source according to an embodiment of the present invention is applied. FIG. 1 (a) is a front view, and FIG. 1 (b) is a side view. FIG. 2 (c) is a bottom view, FIG. 2 (a) is an enlarged view of part A of FIG. 1 (a), FIG. 2 (b) is an enlarged view of part B of FIG. 1 (a), FIG.
Is a bottom view of the LED chip.
【0009】このLED面発光装置1は、表面2aおよ
び裏面2bに配線パターンが形成されたマザー基板2を
有する。The LED surface light emitting device 1 has a mother board 2 having a wiring pattern formed on a front surface 2a and a back surface 2b.
【0010】このマザー基板2の表面2aには、図1
(a),(b)、および図2に示すように、サブマウン
ト基板3を介して列状に配置された複数のLEDチップ
4と、各LEDチップ4を封止する透明樹脂からなる複
数の封止部材5と、マザー基板2の表面2aに配置され
たスペーサ6と、LEDチップ4からの光を図1(a)
において上方に反射するリフレクタ7と、内部を保護す
るとともに、LEDチップ4からの光を透過させる透明
板8と、この装置1全体を保護するカバー9とを設けて
いる。なお、サブマウント基板3、LEDチップ4およ
び封止部材5によりLED光源を構成する。FIG. 1 shows a front surface 2a of the mother substrate 2.
As shown in FIGS. 2A and 2B and FIG. 2, a plurality of LED chips 4 arranged in a row via a submount substrate 3 and a plurality of transparent resin sealing each LED chip 4. The light from the sealing member 5, the spacer 6 disposed on the surface 2a of the mother substrate 2, and the LED chip 4 is shown in FIG.
, A reflector 7 that reflects upward, a transparent plate 8 that protects the inside and transmits light from the LED chip 4, and a cover 9 that protects the entire device 1. Note that an LED light source is configured by the submount substrate 3, the LED chip 4, and the sealing member 5.
【0011】このマザー基板2の裏面2bには、図1
(c)に示すように、後述するLED駆動回路を構成す
る複数の抵抗素子10と、1つのツェナーダイオード1
1とを設けている。なお、図1において左側の12A,
13Aと右側の12B,13Bは複数のLEDチップ4
に電圧を印加するための接続端子であり、本装置1組み
付け時の配線引き出し方向に応じて左右の接続端子12
A,13A,12B,13Bを使い分けるようにしてい
る。The back surface 2b of the mother substrate 2 has a structure shown in FIG.
As shown in (c), a plurality of resistance elements 10 constituting an LED drive circuit described later and one Zener diode 1
1 is provided. In FIG. 1, the left side 12A,
13A and the right side 12B, 13B are a plurality of LED chips 4
Connection terminals for applying a voltage to the left and right connection terminals 12 according to the wiring lead-out direction at the time of assembling the device 1.
A, 13A, 12B, and 13B are properly used.
【0012】複数のLEDチップ4は、図1(a)に示
すように、マザー基板2上にサブマウント基板3を介し
て縦方向に4個、横方向に12個の計48個配列されて
いる。LEDチップ4は、フリップチンプボンディング
(FCB)によってサブマウント基板3に搭載されてい
る。LEDチップ4は、透明の絶縁体であるサファイア
基板上に窒化ガリウム等の半導体層を積層させ、図2に
示すように、チップ4の下面4bとなる半導体層の表面
に正電極40aと負電極40bを形成したものであり、
チップ4の上面4aとなるサファイア基板の底面が光出
射面となる。本実施の形態では、例えば、380nmの
波長を有する紫外線を発光するGaN(窒化ガリウム)
系の半導体を用いる。As shown in FIG. 1A, a total of 48 LED chips 4 are arranged on the mother substrate 2 via the submount substrate 3, four in the vertical direction and 12 in the horizontal direction. I have. The LED chip 4 is mounted on the sub-mount substrate 3 by flip-chip bonding (FCB). The LED chip 4 has a structure in which a semiconductor layer such as gallium nitride is laminated on a sapphire substrate which is a transparent insulator, and as shown in FIG. 40b is formed,
The bottom surface of the sapphire substrate serving as the upper surface 4a of the chip 4 is a light emitting surface. In this embodiment, for example, GaN (gallium nitride) that emits ultraviolet light having a wavelength of 380 nm
Uses a system semiconductor.
【0013】マザー基板2は、基材の表面2aおよび裏
面2bに配線パターンを印刷したものである。マザー基
板2の基材は、サブマウント基板3の実装の際に、変形
や強度低下を起こさないように耐熱性と低膨張係数を有
し、さらに、LEDチップ4の発光波長(例えば、紫外
線の波長)に対して高い光反射率と低い光吸収率を有す
る材料が好ましい。このような材料として、例えば、紫
外線に対して42%程度の高い光反射率を有するガラス
エポキシ樹脂等を用いることができる。また、マザー基
板2よりもLEDチップ4に近いサブマウント基板3の
基材として、紫外線に対して42%程度の高い光反射率
を有する材料を用いた場合には、それよりも光反射率の
低い10〜22%程度のガラスエポキシ樹脂等を用いて
もよい。この他に、放熱性と強度を重視する場合は、ア
ルミニュウム等の金属、アルミナ等のセラミックスを用
いることもできる。The mother substrate 2 has a wiring pattern printed on the front surface 2a and the back surface 2b of the base material. The base material of the mother board 2 has heat resistance and a low coefficient of expansion so as not to cause deformation or decrease in strength when the submount board 3 is mounted, and further has a light emission wavelength (for example, ultraviolet light) of the LED chip 4. Materials having high light reflectance and low light absorption with respect to (wavelength) are preferable. As such a material, for example, a glass epoxy resin having a high light reflectance of about 42% with respect to ultraviolet rays can be used. Further, when a material having a high light reflectance of about 42% with respect to ultraviolet rays is used as the base material of the submount substrate 3 closer to the LED chip 4 than the mother substrate 2, the light reflectance is higher than that. A low glass epoxy resin of about 10 to 22% may be used. In addition, when importance is placed on heat dissipation and strength, metals such as aluminum and ceramics such as alumina can be used.
【0014】封止部材5は、LEDチップ4を所定の外
形形状で封止することにより、LEDチップ4が発する
光に所定の配光特性を付与するものである。また、封止
部材5は、LEDチップ4の発光波長に対して耐久性を
有する透明樹脂材料が好ましい。例えば、紫外線に対し
てはシリコーンを用いることができる。The sealing member 5 provides the light emitted from the LED chip 4 with a predetermined light distribution characteristic by sealing the LED chip 4 with a predetermined outer shape. Further, the sealing member 5 is preferably made of a transparent resin material having durability with respect to the emission wavelength of the LED chip 4. For example, silicone can be used for ultraviolet rays.
【0015】スペーサ6は、図2(a)に示すように、
複数のLEDチップ4が配置される位置に複数の円形の
開口6aが設けられ、例えば、シリコーンゴム等の弾性
を有する部材から形成されている。スペーサ6は、カバ
ー9によってリフレクタ7とマザー基板2との間で挟持
されているので、装置1内部が密閉され、装置1内部に
対する防塵・防湿を図ることができる。また、このよう
な構成により、透明板8等の各部品の厚み方向のばらつ
きあるいは誤差を吸収し、装置1全体のゆがみやソリ等
を防止あるいは緩和することができ、さらに、ガラスか
らなる透明板8をカバー9とともに保護することができ
る。As shown in FIG. 2A, the spacer 6
A plurality of circular openings 6a are provided at positions where the plurality of LED chips 4 are arranged, and are made of, for example, an elastic member such as silicone rubber. Since the spacer 6 is sandwiched between the reflector 7 and the mother substrate 2 by the cover 9, the inside of the device 1 is sealed, and dust and moisture can be prevented inside the device 1. Further, with such a configuration, variations or errors in the thickness direction of each component such as the transparent plate 8 can be absorbed, and distortion or warpage of the entire apparatus 1 can be prevented or reduced. 8 and the cover 9 can be protected.
【0016】リフレクタ7は、LEDチップ4に対応す
る位置に開口7a有し、その開口の7a周囲は図2
(a)に示すようにコーン状の反射面7bを形成してい
る。このリフレクタ7は、湿度・熱・紫外線等に対する
十分な耐候性を有し、LEDチップ4の発光波長に対し
て高い光反射率を有する材料から形成するのが好まし
い。本実施の形態では、図1(a),(b)および図2
(a)に示すように、銅,スレンレス等からなる金属板
を絞り加工してLEDチップ4に対応する位置に開口7
a有し、その開口の7a周囲はコーン状の反射面7bを
形成し、表面に高い光反射率を有するような処理、例え
ば、光沢Niメッキを施している。このようなリフレク
タ7を設けることにより、チップ4から透明体8に向う
方向(前方向)に対する光量を更に向上させることがで
きる。なお、リフレクタ7は、樹脂に金属をメッキある
いは蒸着してもよい。これにより、全体が金属の物に比
べての軽量化が図れる。また、リフレクタ7は、樹脂等
の基体に薄い金属カバーを接合したものでもよい。これ
により、金属カバーを薄い金属板の絞り加工等の工法に
よって形成することが可能であるため、材料コスト・加
工コストが安く、全体が金属の物に比べての軽量化も図
れる。The reflector 7 has an opening 7a at a position corresponding to the LED chip 4, and the periphery of the opening 7a is shown in FIG.
As shown in (a), a cone-shaped reflecting surface 7b is formed. The reflector 7 preferably has sufficient weather resistance against humidity, heat, ultraviolet rays, and the like, and is preferably formed of a material having a high light reflectance with respect to the emission wavelength of the LED chip 4. In this embodiment, FIGS. 1A and 1B and FIG.
As shown in (a), a metal plate made of copper, stainless steel, or the like is drawn and the opening 7 is formed at a position corresponding to the LED chip 4.
The periphery of the opening 7a is formed with a cone-shaped reflection surface 7b, and the surface is subjected to a treatment having a high light reflectance, for example, a bright Ni plating. By providing such a reflector 7, the amount of light in the direction (forward direction) from the chip 4 to the transparent body 8 can be further improved. The reflector 7 may be formed by plating or depositing a metal on a resin. As a result, the weight can be reduced as compared with a metal object as a whole. Further, the reflector 7 may be formed by bonding a thin metal cover to a base such as a resin. Thus, the metal cover can be formed by a method such as drawing of a thin metal plate, so that the material cost and the processing cost are low, and the weight of the whole can be reduced as compared with a metal object.
【0017】透明板8は、LEDチップ4の発光波長
(例えば紫外線の波長)に対して高透過率を有する材料
から形成されていることが好ましい。このような材料と
して、例えば、ガラスを用いることができる。The transparent plate 8 is preferably made of a material having a high transmittance with respect to the emission wavelength of the LED chip 4 (for example, the wavelength of ultraviolet rays). As such a material, for example, glass can be used.
【0018】カバー9は、図1(a)に示すように、4
つのLEDチップ4に対応した細長形状を有する複数の
開口9aを有する。カバー9は、耐候性と機械的強度を
有する材料から形成することが好ましい。このような材
料として、例えば、鋼材、アルミニウム等の金属板を用
いることができる。The cover 9 is, as shown in FIG.
It has a plurality of openings 9 a having an elongated shape corresponding to one LED chip 4. The cover 9 is preferably formed from a material having weather resistance and mechanical strength. As such a material, for example, a metal plate such as a steel material or aluminum can be used.
【0019】抵抗素子10は、図1(a),(c)に示
すように、マザー基板2の裏面2bであって各LEDチ
ップ4から均等に距離が離れるようにLEDチップ4の
間に配置されている。これにより、抵抗素子10の発熱
がLEDチップ4の出力低下・信頼性低下に影響しない
ようになり高信頼性が得られる。抵抗素子10は、各L
EDチップ4のVF差による電流のばらつきを緩和する
とともに、各LEDチップ4への電流の制限を行うもの
である。As shown in FIGS. 1A and 1C, the resistance element 10 is disposed between the LED chips 4 on the back surface 2b of the mother board 2 so as to be evenly spaced from each LED chip 4. Have been. As a result, the heat generated by the resistance element 10 does not affect the decrease in output and the decrease in reliability of the LED chip 4, and high reliability can be obtained. Each of the resistance elements 10
In addition to reducing the variation in current due to the VF difference of the ED chip 4, the current to each LED chip 4 is limited.
【0020】図3は、LEDチップ4のFCBによる搭
載構造を示す。サブマウント基板3は、基材31を有
し、この基材31の表面31aに、同図(a)に示すよ
うに、正リード32aおよび負リード32bを形成し、
基材31の裏面31bに、同図(e)に示すように、正
リード33aおよび負リード33bを形成し、表面31
aの正リード32aおよび負リード32bと裏面31b
の正リード33aおよび負リード33bとをスルーホー
ルめっき34a,34bによって各々接続し、表面31
aの正リード32aに正極側であることを表示する正極
性表示部35を延在して形成している。また、表面31
aの正リード32aおよび負リード32bには、表面3
1aのLEDチップ4が搭載される領域以外の領域に電
圧を印加してLEDチップ4の特性を検査するための一
対の三角形の検査用領域38a,38bを有する。これ
らのリード32a,32b,33a,33b、および正
極性表示部35は、エッチング法等の通常の半導体製造
技術における電極配線技術を使用して形成され、例え
ば、Cu+Ni等の下地金属層にAu等の金属めっき層
を積層して形成される。また、基材31の表面31aの
正リード32aおよび負リード32bの対角線上に、一
対のAuからなる位置認識用メッキバンプ36a,36
bを形成し、表面31aの正リード32aおよび負リー
ド32bにAuからなる搭載用メッキバンプ37a,3
7bを各々形成している。搭載用メッキバンプ37a,
37bは、同図(c)に示すように、LEDチップ4の
搭載前は、超音波によるボンディングの際の超音波振動
方向16に垂直な方向に長い楕円、長円等の形状を有し
ており、LEDチップ4の搭載後は、同図(d)に示す
ように、円形となるようにしている。これらのメッキバ
ンプ36a,36b,37a,37bは、例えば、ホト
リソグラフィ法等によって一括形成される。搭載用メッ
キバンプ37a,37bを同図(c)に示すような形状
とすることにより、ショートを防止しながら、接合面積
を大きくして接合強度の向上を図ることができる。な
お、表面31aのLEDチップ4が搭載される領域以外
の領域は、一対の搭載用メッキバンプ37a,37bを
介してLEDチップ4が搭載されたサブマウント基板3
をハンドリングするための吸着面となる。FIG. 3 shows a mounting structure of the LED chip 4 by FCB. The submount substrate 3 has a base material 31, and a positive lead 32a and a negative lead 32b are formed on a surface 31a of the base material 31 as shown in FIG.
A positive lead 33a and a negative lead 33b are formed on the back surface 31b of the base material 31 as shown in FIG.
a positive lead 32a, negative lead 32b and back surface 31b
Are connected to the positive lead 33a and the negative lead 33b by through-hole plating 34a, 34b, respectively.
A positive display portion 35 for indicating that it is on the positive electrode side is formed to extend on the positive lead 32a of FIG. Also, the surface 31
The positive lead 32a and the negative lead 32b of FIG.
There is a pair of triangular inspection areas 38a and 38b for applying a voltage to an area other than the area where the LED chip 4 of 1a is mounted to inspect the characteristics of the LED chip 4. The leads 32a, 32b, 33a, 33b and the positive display section 35 are formed by using an electrode wiring technique in a normal semiconductor manufacturing technique such as an etching method. For example, Au or the like is formed on a base metal layer such as Cu + Ni. Are formed by laminating metal plating layers. The position recognition plating bumps 36a, 36 made of a pair of Au are provided on the diagonal line of the positive lead 32a and the negative lead 32b on the surface 31a of the base material 31.
b, and the mounting plating bumps 37a, 3 made of Au are formed on the positive lead 32a and the negative lead 32b on the surface 31a.
7b are formed. Mounting plating bump 37a,
37b, as shown in FIG. 3C, before mounting the LED chip 4, has a shape such as an ellipse or an ellipse that is long in a direction perpendicular to the ultrasonic vibration direction 16 at the time of ultrasonic bonding. After the LED chip 4 is mounted, the LED chip 4 has a circular shape as shown in FIG. These plated bumps 36a, 36b, 37a, 37b are formed collectively by, for example, photolithography. By forming the mounting plating bumps 37a and 37b in the shape as shown in FIG. 3C, it is possible to increase the bonding area and improve the bonding strength while preventing short circuit. The area other than the area where the LED chip 4 is mounted on the front surface 31a is a submount substrate 3 on which the LED chip 4 is mounted via a pair of mounting plating bumps 37a and 37b.
It becomes an adsorption surface for handling.
【0021】基材31は、LEDチップ4の実装の際
に、変形や強度低下を起こさないように耐熱性と低膨張
係数を有し、さらに、LEDチップ4の発光波長(例え
ば、紫外線の波長)に対して高い光反射率と低い光吸収
率を有する材料が好ましい。このような材料として、例
えば、紫外線に対して42%程度の高い光反射率を有す
るガラスエポキシ樹脂等を用いることができる。この他
に、要求される特性に応じて他の樹脂やセラミックス等
の絶縁体を用いてもよい。The base material 31 has heat resistance and a low coefficient of expansion so as not to cause deformation and a decrease in strength when the LED chip 4 is mounted, and further has a light emission wavelength of the LED chip 4 (for example, a wavelength of ultraviolet light). A material having a high light reflectance and a low light absorptance with respect to (1) is preferable. As such a material, for example, a glass epoxy resin having a high light reflectance of about 42% with respect to ultraviolet rays can be used. In addition, an insulator such as another resin or ceramic may be used according to required characteristics.
【0022】図4は、マザー基板2の表面2aの配線パ
ターンを示す。配線パターン20は、エッチング法等の
通常の半導体製造技術における電極配線技術を使用して
形成され、例えば、Cu+Ni等の下地金属層にAu等
の金属めっき層を積層して形成される。サブマウント基
板3が搭載される位置には、同図(b)に示すように、
サブマウント基板3の裏面31bの正リード33aおよ
び負リード33bがそれぞれ銀ペーストを介して接続さ
れる一対の接続領域20a,20bが形成されている。
また、マザー基板2の表面2aのサブマウント基板3が
搭載される以外のスペースの複数の個所(本実施の形態
では3個所)に、同図(c)に示すように、テスト用の
接続領域20a,20bが形成されている。FIG. 4 shows a wiring pattern on the front surface 2 a of the mother substrate 2. The wiring pattern 20 is formed using an electrode wiring technique in a normal semiconductor manufacturing technique such as an etching method, and is formed by, for example, laminating a metal plating layer such as Au on a base metal layer such as Cu + Ni. At the position where the sub-mount substrate 3 is mounted, as shown in FIG.
A pair of connection regions 20a and 20b to which the positive lead 33a and the negative lead 33b on the back surface 31b of the submount substrate 3 are connected via a silver paste are formed.
In addition, as shown in FIG. 3C, a connection area for testing is provided at a plurality of places (three places in this embodiment) of the surface 2a of the mother board 2 other than where the submount board 3 is mounted. 20a and 20b are formed.
【0023】図5は、LED駆動回路を示す。このLE
D駆動回路は、同図に示すように、複数のLEDチップ
4のアノードに接続された接続端子12と、複数のLE
Dチップ4に抵抗素子10を介して接続された複数のL
EDチップ4と、複数のLEDチップ4のカソードに接
続された接続端子13と、過電圧を防止するツェナーダ
イオード11とを備えている。なお、ツェナーダイオー
ド11は、これに限定されず、アバランシェダイオー
ド、その他のダイオードを用いることができる。FIG. 5 shows an LED driving circuit. This LE
As shown in the drawing, the D drive circuit includes a connection terminal 12 connected to the anodes of the LED chips 4 and a plurality of LEs.
A plurality of Ls connected to the D chip 4 via the resistance element 10
It includes an ED chip 4, a connection terminal 13 connected to the cathodes of the plurality of LED chips 4, and a Zener diode 11 for preventing overvoltage. Note that the Zener diode 11 is not limited to this, and an avalanche diode or another diode can be used.
【0024】図6〜図8は、本実施の形態の製造方法を
示す。まず、多数個取り用サブマウント集合基板30を
準備する(ST1)。すなわち、図6(a),(b)、
および図7(a)に示すように、サブマウント集合基板
30の基材の表面に正リード32aおよび負リード32
bを形成し、裏面に正リード33aおよび負リード33
bを形成し、表面の正リード32aおよび負リード32
bと裏面の正リード33aおよび負リード33bとをス
ルーホールめっき34a,34bによって各々接続す
る。次に、図7(b)に示すように、レジスト14を塗
布し、同図(c)に示すように、穴15aを有するマス
ク15の上から紫外線(HV)を照射し、同図(d)に
示すように、レジスト14に穴14aを形成する。次
に、同図(e)に示すように、レジスト14の穴14a
内に搭載用メッキバンプ37a,37bを形成する。こ
のとき、同時に位置認識用メッキバンプ36a,36b
も形成する。次に、同図(f)に示すように、レジスト
14を除去する。このようにして基材にリード32a,
32b,33a,33bとメッキバンプ36a,36
b,37a,37bが形成されたサブマウント集合基板
30が完成する。6 to 8 show a manufacturing method according to the present embodiment. First, a submount aggregate substrate 30 for multi-cavity preparation is prepared (ST1). That is, FIGS. 6A and 6B,
7A, the positive lead 32a and the negative lead 32 are provided on the surface of the base material of the submount aggregate substrate 30.
b, and a positive lead 33a and a negative lead 33 are formed on the back surface.
b, and the positive lead 32a and the negative lead 32 on the surface are formed.
b and the positive lead 33a and the negative lead 33b on the rear surface are connected by through-hole platings 34a and 34b, respectively. Next, as shown in FIG. 7 (b), a resist 14 is applied, and as shown in FIG. 7 (c), ultraviolet rays (HV) are irradiated from above the mask 15 having the holes 15a. As shown in FIG. 1B, a hole 14a is formed in the resist 14. Next, as shown in FIG.
The mounting plating bumps 37a and 37b are formed therein. At this time, the position recognition plating bumps 36a, 36b
Also form. Next, the resist 14 is removed as shown in FIG. In this manner, the leads 32a,
32b, 33a, 33b and plated bumps 36a, 36
The submount aggregate substrate 30 on which b, 37a, and 37b are formed is completed.
【0025】次に、サブマウント集合基板30上にフリ
ップチップとしてのLEDチップ4をフリップチップボ
ンディングし、LEDチップ4を封止部材5によって封
止し(ST2)、専用の検査装置によって各LEDチッ
プ4の光量等の特性検査を行う(ST3)。このとき、
不良のLEDチップ4にはマーキングを行う。次に、サ
ブマウント集合基板30をLEDチップ4毎に分割して
複数のサブマウント基板3を製作する(ST4)。Next, the LED chip 4 as a flip chip is flip-chip bonded on the submount aggregate substrate 30, the LED chip 4 is sealed by the sealing member 5 (ST2), and each LED chip is inspected by a dedicated inspection device. A characteristic test such as the light amount of No. 4 is performed (ST3). At this time,
The defective LED chip 4 is marked. Next, the submount aggregate substrate 30 is divided for each LED chip 4 to produce a plurality of submount substrates 3 (ST4).
【0026】一方、複数のサブマウント基板3を搭載さ
れるマザー基板2を準備する(ST10)。ここでは、
マザー基板2の基材に配線パターン20が形成される。
次に、マザー基板2に抵抗素子10、ツェナーダイオー
ド11等の回路部品を実装する(ST11)。On the other hand, a mother substrate 2 on which a plurality of sub-mount substrates 3 are mounted is prepared (ST10). here,
The wiring pattern 20 is formed on the base material of the mother substrate 2.
Next, circuit components such as the resistance element 10 and the zener diode 11 are mounted on the mother substrate 2 (ST11).
【0027】次に、上記工程ST11で製作されたマザ
ー基板2上に上記工程ST4で製作された複数のサブマ
ウント基板3を搭載する(ST12)。LEDチップ4
上にシリコンで封止する(ST13)。マザー基板2
に、スペーサ6、リフレクタ7、透明板8およびカバー
9を組み込んでLED面発光装置1を組み立て(ST1
4)、装置1全体の検査(ST15)で終了する。Next, the plurality of submount substrates 3 manufactured in step ST4 are mounted on the mother substrate 2 manufactured in step ST11 (ST12). LED chip 4
The top is sealed with silicon (ST13). Mother board 2
Then, the LED surface light-emitting device 1 is assembled by incorporating the spacer 6, the reflector 7, the transparent plate 8 and the cover 9 (ST1).
4), end with inspection of the entire device 1 (ST15).
【0028】上記実施の形態によれば、LEDチップ4
がFCB実装されたサブマウント基板3は、多数個取り
用サブマウント集合基板30上に多数のLEDチップ4
をFCB実装し、それを分割することによって製作して
いるので、生産性が向上し、コスト低減を図ることがで
きる。また、サブマウント集合基板30上に高密度で一
括して多数のバンプを形成することにより、メッキバン
プ工程を短縮化できるので、これによってもサブマウン
ト基板3の製造コストを低減することができる。また、
加熱以外に加圧等の他のストレスが加わるLEDチップ
4のFCB実装をサブマウント基板3に対して行ってい
るので、マザー基板2への搭載部品やマザー基板2の材
質の選択の自由度が大きくなる。また、サブマウント集
合基板30のサイズを統一することにより、FCB実装
用の高精度な治具を統一することができる。また、サブ
マウント基板3をマザー基板2に実装しているので、汎
用のハンドリングマシンの使用が可能となり、ハンドリ
ングし易くなる。また、バンプをメッキによって形成す
ることにより、生産性が向上し、サブマウント基板3の
外形(あるいは合せ穴)を基準とすることができるの
で、高い位置精度が得られる。また、超音波振動により
搭載用メッキバンプ37a,37bとLEDチップ4を
接合すると、搭載用メッキバンプ37a,37bは、超
音波振動方向に長くなるが、予めその分を考慮して超音
波振動方向に垂直な方向に長い形状とすることにより、
短絡を防止することが可能となる。また、サブマウント
基板3を小型化してLEDチップサイズに限りなく近づ
けた場合には、IC等で言うチップサイズパッケージ
(CSP)製作が可能になる。また、フリップチップボ
ンダという特殊で高価な設備類がない工程でも、マウン
ター・ダイボンダー等の一般設備による利用が可能にな
る。また、形状・形態などの都合からフリップチップボ
ンダーとその周辺治具類との関連で、直接搭載すること
が困難な実装パッケージヘの応用も可能になる。また、
サブマウント基板3の表面31aにLEDチップ4が搭
載されたサブマウント基板3をハンドリングするための
吸着面を有しているので、モールドレスでのハンドリン
グ(後工程のダイスボンド等)が可能になる。また、ダ
イスボンド・マウント後での樹脂封止が可能であるの
で、シリコーン系の非常に柔らかく機械でのハンドリン
グが困難な樹脂による直接モールドが可能になる。ま
た、ケース9、リフレクタ7などの形状や、サブマウン
ト基板3のスペースにとらわれない形状での樹脂封止が
できる。また、特性検査を集合状態で行うことができる
ため、検査工数の低減も可能である。また、GaN系の
LEDチップを多数個使用したLED面発光装置におい
てFCB方式のベアチップ実装を行っているので、発光
効率の向上を図ることができる。また、マザー基板2お
よびサブマウント基板3は、搭載するLEDチップ4の
発光波長に対して、光反射率が高く、かつ光吸収率の少
ない材料を使用しているので、発光効率が高くなり、低
電力化が図れる。また、LED駆動回路の入力側にツェ
ナーダイオード11を設けているので、GaN系LED
チップ4の静電耐圧が低いことによる静電破壊を防ぐこ
とができる。また、光量テストを含む特性検査を行った
後、マザー基板2上にLEDチップ4がFCB実装され
たサブマウント基板3を実装できるので、予め単体での
選別が容易になるため、面発光装置1としての光量ムラ
を緩和するための選別搭載が可能になり、リペアが不要
になる。また、マザー基板2上にLEDチップ4がFC
B実装されたサブマウント基板3を実装した後に封止部
材5をモールド形成しているので、実装後にその封止部
材5の形状や材質を決定することか可能となるため、そ
の形状や材質の選択性が拡がり、希望の配光特性が実現
しやすくなる。また、本面発光装置1は、全体がカバー
9により保護されているので、信頼性・機械的強度を確
保することができる。According to the above embodiment, the LED chip 4
The submount substrate 3 on which the FCB is mounted has a large number of LED chips 4 on a multi-mount submount aggregate substrate 30.
Is manufactured by FCB mounting and dividing the same, so that productivity can be improved and cost can be reduced. In addition, by forming a large number of bumps at a high density on the submount collective substrate 30 at a time, the plating bump process can be shortened, so that the manufacturing cost of the submount substrate 3 can also be reduced. Also,
Since the FCB mounting of the LED chip 4 to which other stress such as pressure is applied in addition to the heating is performed on the submount substrate 3, the degree of freedom in selecting components to be mounted on the mother substrate 2 and the material of the mother substrate 2 is increased. growing. In addition, by unifying the size of the submount assembly substrate 30, a high-precision jig for FCB mounting can be unified. Further, since the sub-mount substrate 3 is mounted on the mother substrate 2, a general-purpose handling machine can be used, and handling becomes easy. Further, by forming the bumps by plating, the productivity is improved, and the outer shape (or matching hole) of the submount substrate 3 can be used as a reference, so that high positional accuracy can be obtained. When the mounting plating bumps 37a, 37b and the LED chip 4 are joined by ultrasonic vibration, the mounting plating bumps 37a, 37b become longer in the ultrasonic vibration direction. By making it long in the direction perpendicular to
Short circuits can be prevented. Further, when the submount substrate 3 is miniaturized to be as close as possible to the LED chip size, a chip size package (CSP) called an IC or the like can be manufactured. Further, even in a process without special and expensive equipment such as a flip chip bonder, it can be used by general equipment such as a mounter and a die bonder. In addition, it is possible to apply the present invention to a mounting package in which it is difficult to directly mount the flip chip bonder and its peripheral jigs due to the shape and form. Also,
Since the surface 31a of the submount substrate 3 has a suction surface for handling the submount substrate 3 on which the LED chip 4 is mounted, it is possible to handle in a molding dress (die bonding in a later step). . In addition, since resin sealing after die bond mounting is possible, it is possible to directly mold with a silicone-based resin that is very soft and difficult to handle with a machine. In addition, resin sealing can be performed in a shape such as the case 9 and the reflector 7 and a shape that is not restricted by the space of the submount substrate 3. In addition, since the characteristic inspection can be performed in a collective state, the number of inspection steps can be reduced. Further, since the FCB bare chip mounting is performed in the LED surface light emitting device using a large number of GaN-based LED chips, the luminous efficiency can be improved. In addition, the mother substrate 2 and the submount substrate 3 use a material having a high light reflectance and a low light absorptance with respect to the emission wavelength of the LED chip 4 to be mounted. Low power can be achieved. Also, since the Zener diode 11 is provided on the input side of the LED drive circuit, the GaN-based LED
Electrostatic breakdown due to low electrostatic withstand voltage of the chip 4 can be prevented. Further, after performing the characteristic inspection including the light amount test, the submount substrate 3 in which the LED chip 4 is mounted on the mother substrate 2 by FCB can be mounted. In order to alleviate the unevenness of the light amount, it is possible to select and mount, and the repair becomes unnecessary. Also, the LED chip 4 is mounted on the mother board 2 by FC.
Since the sealing member 5 is molded after the B-mounted submount substrate 3 is mounted, the shape and the material of the sealing member 5 can be determined after the mounting. Selectivity is expanded, and desired light distribution characteristics are easily realized. Further, since the entire surface light emitting device 1 is protected by the cover 9, reliability and mechanical strength can be ensured.
【0029】なお、本発明は、基板上にFCB実装され
たLEDチップからリード線あるいはリードフレーム等
を導出するとともに、LEDチップを封止部材により封
止した単一のLEDランプに適用してもよい。また、複
数のLEDチップをマトリクス状に配列し、複数のLE
Dチップを画像信号に応じて選択的に点灯させる画像表
示装置に適用してもよい。The present invention can be applied to a single LED lamp in which a lead wire or a lead frame is derived from an LED chip mounted on a substrate by FCB and the LED chip is sealed with a sealing member. Good. A plurality of LED chips are arranged in a matrix, and a plurality of LE chips are arranged.
The present invention may be applied to an image display device that selectively turns on a D chip according to an image signal.
【0030】[0030]
【発明の効果】以上説明した通り、本発明のLED光源
およびその製造方法によれば、複数のLEDチップから
の光は、電極が設けれていない光出射面から出射される
ので、発光効率の向上を図ることができる。また、一対
の接合用バンプをメッキによって形成しているので、生
産性が向上し、高い位置精度が得られる。また、LED
チップが搭載された基板をハンドリングした後に封止部
材を設けることができるので、封止部材の形状や材質の
自由度が高くなる。As described above, according to the LED light source and the method of manufacturing the same of the present invention, light from a plurality of LED chips is emitted from the light emission surface where no electrodes are provided, so that the luminous efficiency is reduced. Improvement can be achieved. Further, since the pair of bonding bumps are formed by plating, productivity is improved and high positional accuracy is obtained. In addition, LED
Since the sealing member can be provided after handling the substrate on which the chip is mounted, the degree of freedom of the shape and material of the sealing member is increased.
【図1】本発明の実施の形態に係るLED光源を適用し
たLED面発光装置を示し、(a)は正面図、(b)は
側面図、(c)は底面図である。FIG. 1 shows an LED surface light emitting device to which an LED light source according to an embodiment of the present invention is applied, wherein (a) is a front view, (b) is a side view, and (c) is a bottom view.
【図2】(a)は図1(a)のA部拡大図、(b)は図
1(a)のB部拡大図、(c)はLEDチップの底面図
である。2A is an enlarged view of a portion A in FIG. 1A, FIG. 2B is an enlarged view of a portion B in FIG. 1A, and FIG. 2C is a bottom view of the LED chip.
【図3】本実施の形態のFCB構造を示し、(a)はL
EDチップが搭載されたサブマウント基板の表面図、
(b)は断面図、(c),(d)はLEDチップ搭載用
バンプの形状を示す図、(e)はサブマウント基板の裏
面図である。3A and 3B show an FCB structure according to the embodiment, and FIG.
Surface view of the submount substrate on which the ED chip is mounted,
(B) is a sectional view, (c) and (d) are views showing the shape of the bump for mounting the LED chip, and (e) is a rear view of the submount substrate.
【図4】(a)はマザー基板の表面図、(b)は(a)
のD部拡大図、(c)は(a)のE部拡大図である。4A is a front view of a mother substrate, and FIG. 4B is a view of FIG.
(C) is an enlarged view of an E portion of (a).
【図5】本実施の形態のLED駆動回路を示す図FIG. 5 is a diagram showing an LED drive circuit according to the present embodiment.
【図6】(a),(b)は本実施の形態のサブマウント
基板の製造工程を示す図である。FIGS. 6A and 6B are diagrams showing a manufacturing process of the submount substrate of the present embodiment.
【図7】(a)〜(f)は本実施の形態のサブマウント
基板の製造工程を示す図である。FIGS. 7A to 7F are diagrams showing a manufacturing process of the submount substrate of the present embodiment.
【図8】本実施の形態のLED面発光装置の製造工程を
示す図である。FIG. 8 is a diagram showing a manufacturing process of the LED surface light-emitting device of the present embodiment.
【図9】従来のLED光源を示す断面図である。FIG. 9 is a sectional view showing a conventional LED light source.
1 LED面発光装置 2 マザー基板 2a 表面 2b 裏面 3 サブマウント基板 4 LEDチップ 4a 正電極 4b 負電極 5 封止部材 6 スペーサ 6a 開口 7 リフレクタ 7a 開口 7b 反射面 8 透明板 9 カバー 9a 開口 10 抵抗素子 11 ツェナーダイオード 12A,12B,13A,13B 接続端子 14 レジスト 14a 穴 15 マスク 15a 穴 20 配線パターン 20a,20b 接続領域 30 多数個取り用サブマウント集合基板 31a 表面 31b 裏面 32a 正リード 32b 負リード 33a 正リード 33b 負リード 34a,34b スルーホールめっき 35 正極性表示部 36a,36b 位置認識用メッキバンプ 37a,37b 搭載用メッキバンプ 38a,38b 検査用領域 40a 正電極 40b 負電極 100 基板 101 基材 101a 表面 101b 側面 101c 裏面 110A,110B リード 120a,120b バンプ 130 LEDチップ 130a 上面 130b 下面 131 反射層 140 透明樹脂 150 アンダーフィル樹脂 REFERENCE SIGNS LIST 1 LED surface light emitting device 2 mother substrate 2 a front surface 2 b back surface 3 submount substrate 4 LED chip 4 a positive electrode 4 b negative electrode 5 sealing member 6 spacer 6 a opening 7 reflector 7 a opening 7 b reflecting surface 8 transparent plate 9 cover 9 a opening 10 resistance element DESCRIPTION OF SYMBOLS 11 Zener diode 12A, 12B, 13A, 13B Connection terminal 14 Resist 14a Hole 15 Mask 15a Hole 20 Wiring pattern 20a, 20b Connection area 30 Multi-mounting submount aggregate substrate 31a Front surface 31b Back surface 32a Positive lead 32b Negative lead 33a Positive lead 33b Negative leads 34a, 34b Through-hole plating 35 Positive display portion 36a, 36b Plating bump for position recognition 37a, 37b Plating bump for mounting 38a, 38b Inspection area 40a Positive electrode 40b Negative electrode 100 bases 101 substrate 101a surface 101b side 101c back side 110A, 110B leads 120a, 120b bump 130 LED chips 130a top 130b bottom surface 131 reflecting layer 140 transparent resin 150 underfill resin
フロントページの続き (72)発明者 手島 聖貴 東京都練馬区東大泉四丁目26番11号 株式 会社光波内 (72)発明者 三溝 宏 東京都練馬区東大泉四丁目26番11号 株式 会社光波内 (72)発明者 黒山 俊宣 愛知県西春日井郡春日町大字落合字長畑1 番地 豊田合成株式会社内 (72)発明者 石田 卓也 神奈川県横須賀市池田町4丁目4番地1号 関東化成工業株式会社内 (72)発明者 柳澤 英夫 神奈川県横須賀市池田町4丁目4番地1号 関東化成工業株式会社内 (72)発明者 菊川 祐介 神奈川県横須賀市池田町4丁目4番地1号 関東化成工業株式会社内 Fターム(参考) 5F041 AA03 AA42 CB15 DA09 DA41 DA78 5F044 KK01 KK17 Continued on the front page (72) Inventor Seiki Teshima 4-26-11 Higashi-Oizumi, Nerima-ku, Tokyo Co., Ltd. (72) Inventor Hiroshi Mizo 4-26-11, Higashi-Oizumi, Nerima-ku, Tokyo Co., Ltd. (72) Inventor Toshinobu Kuroyama 1 Ochiai Nagahata, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei Co., Ltd. (72) Inventor Hideo Yanagisawa 4-4-1, Ikeda-cho, Yokosuka City, Kanagawa Prefecture Inside Kanto Kasei Kogyo Co., Ltd. F term (reference) 5F041 AA03 AA42 CB15 DA09 DA41 DA78 5F044 KK01 KK17
Claims (14)
リード、および前記絶縁基材の表面に前記一対の裏リー
ドに一対の金属接続部によって接続された正負一対の表
リードを有する基板と、 前記基板に対向する面側に正負一対の電極を有し、前記
一対の電極が一対の接合用バンプを介して前記基板の前
記一対の表リードに接続されたLEDチップとを備え、 前記一対の接合用バンプは、メッキによって前記一対の
表リード上に形成されたことを特徴とするLED光源。1. A pair of positive and negative back leads formed on a back surface of an insulating base material, and a pair of positive and negative front leads connected to the pair of back leads by a pair of metal connecting portions on the surface of the insulating base material. A substrate, comprising a pair of positive and negative electrodes on a surface side facing the substrate, and an LED chip in which the pair of electrodes is connected to the pair of front leads of the substrate via a pair of bonding bumps; The LED light source, wherein the pair of bonding bumps are formed on the pair of front leads by plating.
合用バンプが配列された方向に垂直な方向に長い楕円形
あるいは長円形を有する構成の請求項1記載のLED光
源。2. The LED light source according to claim 1, wherein said pair of bonding bumps has an elliptical shape or an oval shape in a direction perpendicular to a direction in which said pair of bonding bumps are arranged.
よる接合の際の超音波振動方向に垂直な方向に長い楕円
形あるいは長円形を有する構成の請求項1記載のLED
光源。3. The LED according to claim 1, wherein the pair of bonding bumps have an elliptical shape or an oval shape that is long in a direction perpendicular to the ultrasonic vibration direction at the time of bonding by ultrasonic vibration.
light source.
バンプに対して所定の位置関係を有する自動認識用のバ
ンプが前記一対の接合用バンプとメッキによって一括で
形成された構成の請求項1記載のLED光源。4. The pair of front leads, wherein a bump for automatic recognition having a predetermined positional relationship with respect to the pair of bonding bumps is formed collectively by plating with the pair of bonding bumps. Item 7. The LED light source according to Item 1.
EDチップが搭載される領域以外の領域に電圧を印加し
て前記LEDチップの特性を検査するための一対の検査
用領域を有する構成の請求項1記載のLED光源。5. A method according to claim 1, wherein said pair of front leads is provided with said L on said surface.
2. The LED light source according to claim 1, comprising a pair of inspection areas for applying a voltage to an area other than an area where the ED chip is mounted to inspect characteristics of the LED chip.
って前記LEDチップが発する光に所定の配光特性を付
与する透明樹脂からなる封止部材によって封止された構
成の請求項1記載のLED光源。6. The LED according to claim 1, wherein said LED chip is sealed by a sealing member made of a transparent resin which gives predetermined light distribution characteristics to light emitted by said LED chip in a predetermined outer shape. light source.
四角形状を有し、先端部が球状を有する構成の請求項6
記載のLED光源。7. The substrate according to claim 6, wherein the substrate has a quadrangular shape, and the sealing member has a rectangular bottom surface corresponding to the quadrangular shape of the substrate and a spherical end portion.
LED light source as described.
ールめっきである構成の請求項1記載のLED光源。8. The LED light source according to claim 1, wherein said pair of metal connection portions are formed by a pair of through-hole plating.
が搭載される領域以外の領域に、前記一対の接合用バン
プを介して前記LEDチップが搭載された前記基板をハ
ンドリングするための吸着面を有する構成の請求項1記
載のLED光源。9. A suction surface for handling the substrate on which the LED chip is mounted via an area other than the area on which the LED chip is mounted, via the pair of bonding bumps. The LED light source according to claim 1, comprising:
および前記絶縁基材の表面に前記一対の裏リードに一対
の金属接続部により接続された正負一対の表リードを複
数組有する集合基板を形成し、 前記集合基板の複数組の前記一対の表リードに一対の接
合用バンプをそれぞれ形成し、1つの面側に正負一対の
電極を有する複数のLEDチップを、前記一対の電極を
前記一対のバンプに接続して前記集合基板上に搭載し、 前記複数のLEDチップが搭載された前記集合基板をL
EDチップ毎に分割することを特徴とするLED光源の
製造方法。10. A pair of positive and negative back leads on a back surface of the insulating base material.
And forming a collective substrate having a plurality of pairs of positive and negative front leads connected to the pair of back leads by a pair of metal connecting portions on the surface of the insulating base; and a plurality of sets of the pair of front leads of the collective substrate. Forming a pair of bonding bumps, and mounting a plurality of LED chips having a pair of positive and negative electrodes on one surface side by connecting the pair of electrodes to the pair of bumps and mounting the plurality of LED chips on the collective substrate; The collective substrate on which a plurality of LED chips are mounted is denoted by L
A method of manufacturing an LED light source, wherein the method is divided for each ED chip.
は、メッキによって形成する構成の請求項10記載のL
ED光源の製造方法。11. The method according to claim 10, wherein said plurality of pairs of bonding bumps are formed by plating.
Manufacturing method of ED light source.
合用バンプの形成は、前記一対の接合用バンプに対して
所定の位置関係を有する自動認識用のバンプの形成を含
む構成の請求項10記載のLED光源の製造方法。12. A method according to claim 1, wherein forming a plurality of sets of said pair of bonding bumps on said collective substrate includes forming an automatic recognition bump having a predetermined positional relationship with respect to said pair of bonding bumps. Item 11. The method for manufacturing an LED light source according to Item 10.
び前記自動認識用のバンプの形成は、メッキによって一
括して形成する構成の請求項12記載のLED光源の製
造方法。13. The method for manufacturing an LED light source according to claim 12, wherein the plurality of sets of the pair of bonding bumps and the automatic recognition bumps are formed collectively by plating.
上への搭載は、所定の外形形状によって前記LEDチッ
プが発する光に所定の配光特性を付与する透明樹脂から
なる複数の封止部材によって前記複数のLEDチップを
封止する工程を含む構成の請求項10記載のLED光源
の製造方法。14. The mounting of the plurality of LED chips on the collective substrate is performed by a plurality of sealing members made of a transparent resin that imparts predetermined light distribution characteristics to light emitted by the LED chips according to a predetermined external shape. The method for manufacturing an LED light source according to claim 10, comprising a step of sealing the plurality of LED chips.
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Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003008071A (en) * | 2001-06-22 | 2003-01-10 | Stanley Electric Co Ltd | Led lamp using led substrate assembly |
JP2004165308A (en) * | 2002-11-11 | 2004-06-10 | Nichia Chem Ind Ltd | Light emitting device |
JPWO2004082036A1 (en) * | 2003-03-10 | 2006-06-15 | 豊田合成株式会社 | Solid element device and manufacturing method thereof |
US7179666B2 (en) | 2003-09-19 | 2007-02-20 | Murata Manufacturing Co., Ltd. | Method for manufacturing an electronic circuit device and electronic circuit device |
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US10505083B2 (en) | 2007-07-11 | 2019-12-10 | Cree, Inc. | Coating method utilizing phosphor containment structure and devices fabricated using same |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02113336U (en) * | 1989-02-27 | 1990-09-11 | ||
JPH04315486A (en) * | 1991-04-15 | 1992-11-06 | Hitachi Ltd | Photoelectric device and manufacture thereof |
JPH08124974A (en) * | 1994-10-28 | 1996-05-17 | Nec Corp | Method and device for bonding semiconductor device |
JPH09306936A (en) * | 1996-05-20 | 1997-11-28 | Seiko Epson Corp | Bump electrode and manufacture thereof |
JPH1065219A (en) * | 1996-08-15 | 1998-03-06 | Nippon Retsuku Kk | Manufacture of photoelectric part |
WO1998034285A1 (en) * | 1997-01-31 | 1998-08-06 | Matsushita Electronics Corporation | Light emitting element, semiconductor light emitting device, and method for manufacturing them |
JPH118414A (en) * | 1997-06-18 | 1999-01-12 | Sony Corp | Semiconductor device and semiconductor light-emitting device |
JPH1140848A (en) * | 1997-07-17 | 1999-02-12 | Matsushita Electron Corp | Light-emitting device |
JPH1197493A (en) * | 1997-09-19 | 1999-04-09 | Toshiba Corp | Bonding method and device |
JPH11145199A (en) * | 1997-11-11 | 1999-05-28 | Fujitsu Ltd | Semiconductor device |
JPH11163196A (en) * | 1997-11-26 | 1999-06-18 | Kyocera Corp | Wiring board |
-
2000
- 2000-06-26 JP JP2000191101A patent/JP4601128B2/en not_active Expired - Lifetime
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02113336U (en) * | 1989-02-27 | 1990-09-11 | ||
JPH04315486A (en) * | 1991-04-15 | 1992-11-06 | Hitachi Ltd | Photoelectric device and manufacture thereof |
JPH08124974A (en) * | 1994-10-28 | 1996-05-17 | Nec Corp | Method and device for bonding semiconductor device |
JPH09306936A (en) * | 1996-05-20 | 1997-11-28 | Seiko Epson Corp | Bump electrode and manufacture thereof |
JPH1065219A (en) * | 1996-08-15 | 1998-03-06 | Nippon Retsuku Kk | Manufacture of photoelectric part |
WO1998034285A1 (en) * | 1997-01-31 | 1998-08-06 | Matsushita Electronics Corporation | Light emitting element, semiconductor light emitting device, and method for manufacturing them |
JPH118414A (en) * | 1997-06-18 | 1999-01-12 | Sony Corp | Semiconductor device and semiconductor light-emitting device |
JPH1140848A (en) * | 1997-07-17 | 1999-02-12 | Matsushita Electron Corp | Light-emitting device |
JPH1197493A (en) * | 1997-09-19 | 1999-04-09 | Toshiba Corp | Bonding method and device |
JPH11145199A (en) * | 1997-11-11 | 1999-05-28 | Fujitsu Ltd | Semiconductor device |
JPH11163196A (en) * | 1997-11-26 | 1999-06-18 | Kyocera Corp | Wiring board |
Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003008071A (en) * | 2001-06-22 | 2003-01-10 | Stanley Electric Co Ltd | Led lamp using led substrate assembly |
US7586190B2 (en) | 2002-09-30 | 2009-09-08 | Osram Opto Semiconductors Gmbh | Optoelectronic component and a module based thereon |
JP2004165308A (en) * | 2002-11-11 | 2004-06-10 | Nichia Chem Ind Ltd | Light emitting device |
JPWO2004082036A1 (en) * | 2003-03-10 | 2006-06-15 | 豊田合成株式会社 | Solid element device and manufacturing method thereof |
US8154047B2 (en) | 2003-03-10 | 2012-04-10 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
US7824937B2 (en) | 2003-03-10 | 2010-11-02 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
US7179666B2 (en) | 2003-09-19 | 2007-02-20 | Murata Manufacturing Co., Ltd. | Method for manufacturing an electronic circuit device and electronic circuit device |
US7497597B2 (en) | 2004-01-19 | 2009-03-03 | Toyoda Gosei Co., Ltd. | Light emitting apparatus |
US7850314B2 (en) | 2006-02-24 | 2010-12-14 | Konica Minolta Opto, Inc. | Light-emitting module and image projection apparatus using same |
JP2009532900A (en) * | 2006-04-04 | 2009-09-10 | クリー インコーポレイテッド | Uniform radiation LED package |
US8969908B2 (en) | 2006-04-04 | 2015-03-03 | Cree, Inc. | Uniform emission LED package |
JP2010539676A (en) * | 2007-04-18 | 2010-12-16 | クリー・インコーポレーテッド | Semiconductor light emitting device package and method |
US8791491B2 (en) | 2007-04-18 | 2014-07-29 | Cree, Inc. | Semiconductor light emitting device packages and methods |
US9401461B2 (en) | 2007-07-11 | 2016-07-26 | Cree, Inc. | LED chip design for white conversion |
US10505083B2 (en) | 2007-07-11 | 2019-12-10 | Cree, Inc. | Coating method utilizing phosphor containment structure and devices fabricated using same |
US8877524B2 (en) | 2008-03-31 | 2014-11-04 | Cree, Inc. | Emission tuning methods and devices fabricated utilizing methods |
JP2008277871A (en) * | 2008-08-22 | 2008-11-13 | Showa Denko Kk | Led lamp |
JP2011101054A (en) * | 2009-07-03 | 2011-05-19 | Sharp Corp | Substrate for mounting semiconductor light emitting element, backlight chassis, display device, and television receiver |
US8629458B2 (en) | 2010-04-23 | 2014-01-14 | Semicon Light Co., Ltd. | Compound semiconductor light-emitting element |
WO2011132860A3 (en) * | 2010-04-23 | 2012-01-19 | 주식회사 세미콘라이트 | Compound semiconductor light-emitting element |
WO2011132860A2 (en) * | 2010-04-23 | 2011-10-27 | 주식회사 세미콘라이트 | Compound semiconductor light-emitting element |
US8558252B2 (en) | 2011-08-26 | 2013-10-15 | Cree, Inc. | White LEDs with emission wavelength correction |
JP2016127154A (en) * | 2014-12-29 | 2016-07-11 | 日亜化学工業株式会社 | Light emission device |
CN108257947A (en) * | 2016-12-29 | 2018-07-06 | 晶能光电(江西)有限公司 | A kind of UVLED area sources module |
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