JP2001520805A - 等級化された密度を有するナノポーラス誘電体フィルム及びそのようなフィルムの製造方法 - Google Patents

等級化された密度を有するナノポーラス誘電体フィルム及びそのようなフィルムの製造方法

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Publication number
JP2001520805A
JP2001520805A JP54396498A JP54396498A JP2001520805A JP 2001520805 A JP2001520805 A JP 2001520805A JP 54396498 A JP54396498 A JP 54396498A JP 54396498 A JP54396498 A JP 54396498A JP 2001520805 A JP2001520805 A JP 2001520805A
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JP
Japan
Prior art keywords
dielectric constant
silicon
containing polymer
support
polymer composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP54396498A
Other languages
English (en)
Japanese (ja)
Inventor
ウォーレス，スティーブン
スミス，ダクラス・エム
ラモス，テレサ
ロデリック，ケヴィン・エイチ
ドラッジ，ジェームズ・エス
Original Assignee
アライドシグナル・インコーポレーテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アライドシグナル・インコーポレーテッド filed Critical アライドシグナル・インコーポレーテッド
Publication of JP2001520805A publication Critical patent/JP2001520805A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1005—Formation and after-treatment of dielectrics
    • H01L2221/1042—Formation and after-treatment of dielectrics the dielectric comprising air gaps
    • H01L2221/1047—Formation and after-treatment of dielectrics the dielectric comprising air gaps the air gaps being formed by pores in the dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Formation Of Insulating Films (AREA)
  • Laminated Bodies (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP54396498A 1997-04-17 1998-04-02 等級化された密度を有するナノポーラス誘電体フィルム及びそのようなフィルムの製造方法 Pending JP2001520805A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US4326197P 1997-04-17 1997-04-17
US60/043,261 1997-04-17
US4647498A 1998-03-25 1998-03-25
US09/046,474 1998-03-25
PCT/US1998/006492 WO1998047177A1 (en) 1997-04-17 1998-04-02 Nanoporous dielectric films with graded density and process for making such films

Publications (1)

Publication Number Publication Date
JP2001520805A true JP2001520805A (ja) 2001-10-30

Family

ID=26720199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54396498A Pending JP2001520805A (ja) 1997-04-17 1998-04-02 等級化された密度を有するナノポーラス誘電体フィルム及びそのようなフィルムの製造方法

Country Status (7)

Country Link
EP (1) EP0976153A1 (de)
JP (1) JP2001520805A (de)
KR (1) KR20010006553A (de)
CN (1) CN1260908A (de)
AU (1) AU6878598A (de)
TW (1) TW367591B (de)
WO (1) WO1998047177A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004253626A (ja) * 2003-02-20 2004-09-09 Fujitsu Ltd 多孔性絶縁膜、電子装置及びそれらの製造方法

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6042994A (en) * 1998-01-20 2000-03-28 Alliedsignal Inc. Nanoporous silica dielectric films modified by electron beam exposure and having low dielectric constant and low water content
US6231989B1 (en) 1998-11-20 2001-05-15 Dow Corning Corporation Method of forming coatings
KR100719188B1 (ko) * 1999-08-31 2007-05-16 동경 엘렉트론 주식회사 기판처리방법
US6465365B1 (en) 2000-04-07 2002-10-15 Koninklijke Philips Electronics N.V. Method of improving adhesion of cap oxide to nanoporous silica for integrated circuit fabrication
US6495479B1 (en) * 2000-05-05 2002-12-17 Honeywell International, Inc. Simplified method to produce nanoporous silicon-based films
KR100382702B1 (ko) * 2000-09-18 2003-05-09 주식회사 엘지화학 유기실리케이트 중합체의 제조방법
WO2002031596A1 (en) 2000-10-12 2002-04-18 University Of North Carolina At Chapel Hill Co2-processes photoresists, polymers, and photoactive compounds for microlithography
US20020076543A1 (en) * 2000-12-19 2002-06-20 Sikonia John G. Layered dielectric nanoporous materials and methods of producing same
WO2003069672A1 (en) * 2002-01-03 2003-08-21 Honeywell International Inc. Nanoporous dielectric films with graded density and process for making such films
WO2003088344A1 (en) * 2002-04-10 2003-10-23 Honeywell International, Inc. Low metal porous silica dielectric for integral circuit applications
EP1543549A1 (de) * 2002-09-20 2005-06-22 Honeywell International, Inc. Zwischenschicht zur verbesserung der haftung für materialien mit niedriger dielektrizitätskonstante
US7030468B2 (en) * 2004-01-16 2006-04-18 International Business Machines Corporation Low k and ultra low k SiCOH dielectric films and methods to form the same
JP2010131700A (ja) * 2008-12-04 2010-06-17 Sony Corp 微粒子構造体／基体複合部材及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69128073T2 (de) * 1990-08-23 1998-02-26 Univ California As Represented Verfahren zur herstellung von metalloxidaerogelen mit dichte weniger als 0,02 g/cm3
JP4014234B2 (ja) * 1994-05-27 2007-11-28 テキサス インスツルメンツ インコーポレイテツド 半導体デバイス中に線間容量の低減化された相互接続線を作製する方法
US5494858A (en) * 1994-06-07 1996-02-27 Texas Instruments Incorporated Method for forming porous composites as a low dielectric constant layer with varying porosity distribution electronics applications

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004253626A (ja) * 2003-02-20 2004-09-09 Fujitsu Ltd 多孔性絶縁膜、電子装置及びそれらの製造方法
JP4493278B2 (ja) * 2003-02-20 2010-06-30 富士通株式会社 多孔性樹脂絶縁膜、電子装置及びそれらの製造方法

Also Published As

Publication number Publication date
AU6878598A (en) 1998-11-11
EP0976153A1 (de) 2000-02-02
TW367591B (en) 1999-08-21
CN1260908A (zh) 2000-07-19
KR20010006553A (ko) 2001-01-26
WO1998047177A1 (en) 1998-10-22

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