JP2001351867A - Method and apparatus of semiconductor device - Google Patents

Method and apparatus of semiconductor device

Info

Publication number
JP2001351867A
JP2001351867A JP2000170116A JP2000170116A JP2001351867A JP 2001351867 A JP2001351867 A JP 2001351867A JP 2000170116 A JP2000170116 A JP 2000170116A JP 2000170116 A JP2000170116 A JP 2000170116A JP 2001351867 A JP2001351867 A JP 2001351867A
Authority
JP
Japan
Prior art keywords
semiconductor device
manufacturing
thin film
gas
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000170116A
Other languages
Japanese (ja)
Inventor
Koichi Honda
功一 本多
Shinji Tokunaga
晋次 徳永
Shinji Futamura
信二 二村
Hiroyoshi Takezawa
浩義 竹澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2000170116A priority Critical patent/JP2001351867A/en
Publication of JP2001351867A publication Critical patent/JP2001351867A/en
Pending legal-status Critical Current

Links

Landscapes

  • Chemical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PROBLEM TO BE SOLVED: To make it possible to stabilize TFT characteristics. SOLUTION: After periodical cleaning, electric discharge is performed with a mixed gas of H2 and Ar without the substrate in a deposition system. After that, the film quality is made stable, and the TFT with satisfactory characteristics can be obtained from the first stage of cleaning.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は液晶などと組み合わ
せて画像表示装置を構成するための薄膜トランジスタ
(以後TFTと呼ぶ)の半導体層,絶縁膜層となる薄膜
の製造方法、およびその半導体製造装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film to be used as a semiconductor layer and an insulating film layer of a thin film transistor (hereinafter referred to as a TFT) for forming an image display device in combination with a liquid crystal or the like, and an apparatus for manufacturing the semiconductor. .

【0002】[0002]

【従来の技術】以下に従来の薄膜の製造方法について説
明する。
2. Description of the Related Art A conventional thin film manufacturing method will be described below.

【0003】図3にTFTの要部構成断面図を示す。ガ
ラス基板1上にゲート電極2が形成され、非晶質シリコ
ン半導体層4がゲート絶縁膜3を介して形成され、ソー
ス、ドレイン電極6a、6bがn+非晶質シリコン半導
体層5a、5bを介して形成されている。
FIG. 3 is a sectional view showing the structure of a main part of a TFT. A gate electrode 2 is formed on a glass substrate 1, an amorphous silicon semiconductor layer 4 is formed via a gate insulating film 3, and source and drain electrodes 6a and 6b are formed via n + amorphous silicon semiconductor layers 5a and 5b. It is formed.

【0004】従来は上述のゲート絶縁膜3、非晶質シリ
コン半導体層4、n+非晶質シリコン半導体層5a、5
bは図4に示すようなグロー放電を用いたプラズマ化学
気相堆積装置により作製されている。図4に示すプラズ
マ化学気相堆積装置は、放電電極14と対向放電電極1
2が平行に設置される容量結合型であり、基板は対向放
電電極12に設置される。
Conventionally, the gate insulating film 3, the amorphous silicon semiconductor layer 4, the n + amorphous silicon semiconductor layers 5a, 5
b is manufactured by a plasma chemical vapor deposition apparatus using a glow discharge as shown in FIG. The plasma chemical vapor deposition apparatus shown in FIG.
2 is a capacitive coupling type which is installed in parallel, and the substrate is installed on the counter discharge electrode 12.

【0005】このプラズマ化学気相堆積装置では、薄膜
を堆積する際に堆積室11の側壁や放電電極14等に膜
が付着してその厚みが増していく。その付着した膜の剥
離を防止するために、定期的にNF3ガス、CF4ガスを
主成分に用いたグロー放電により付着膜を除去するクリ
ーニングを行う。さらに、作製する膜質を安定させるた
めに、定期的なクリーニング直後に基板を設置せずに膜
の堆積作業を行い、その後にTFTを作製するための基
板に薄膜の堆積を行う。
In this plasma-enhanced chemical vapor deposition apparatus, when depositing a thin film, the film adheres to the side wall of the deposition chamber 11, the discharge electrode 14, and the like, and the thickness increases. In order to prevent the adhered film from peeling off, cleaning for removing the adhered film is periodically performed by glow discharge using NF 3 gas and CF 4 gas as main components. Further, in order to stabilize the quality of a film to be formed, a film is deposited without a substrate immediately after the periodic cleaning, and then a thin film is deposited on a substrate for forming a TFT.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記の従
来の方法では、膜質を向上するには、定期的なクリーニ
ング直後の堆積膜厚が厚くなり、TFTを作製するため
の基板上への堆積時に堆積室11内に累積して付着した
膜の剥離が起きやすくなる。また、ゲート絶縁膜、非晶
質シリコン半導体層などの薄膜に不必要な不純物の混入
で、TFTの特性の不具合が生じやすく、特に定期的な
クリーニング直後のTFTでは不具合が顕著であった。
However, in the above-mentioned conventional method, in order to improve the film quality, the deposited film thickness becomes large immediately after the periodic cleaning, and the deposited film is deposited at the time of deposition on a substrate for manufacturing a TFT. The film that has accumulated and adhered in the chamber 11 tends to peel off. In addition, inconvenient impurities in the thin film such as the gate insulating film and the amorphous silicon semiconductor layer tend to cause inconvenience in the characteristics of the TFT, and particularly in the TFT immediately after the periodic cleaning, the inconvenience is remarkable.

【0007】また、定期的なクリーニングの際もその膜
を除去するため、時間を要し、生産性の向上の観点で課
題であった。
In addition, it takes time to remove the film even during the periodic cleaning, which is a problem from the viewpoint of improving productivity.

【0008】本発明は上記従来の問題点を解決するた
め、定期的なクリーニング後に、基板を設置しない薄い
堆積を行い、その後に作製するゲート絶縁膜、非晶質シ
リコン半導体層の膜質を安定させて、TFTの特性の不
具合がより低減され、生産性の向上を図ることを目的と
する。
In order to solve the above-mentioned conventional problems, the present invention performs thin deposition without installing a substrate after periodic cleaning, and stabilizes the film quality of a gate insulating film and an amorphous silicon semiconductor layer formed thereafter. Accordingly, it is an object of the present invention to further reduce inconvenience of TFT characteristics and improve productivity.

【0009】[0009]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、プラズマ化学気相堆積装置を用いて基板上に
薄膜を堆積する工程を有し、上記堆積装置内にて高周波
で放電した後に、上記半導体装置用の基板に薄膜を堆積
することを特徴とする。
A method of manufacturing a semiconductor device according to the present invention includes a step of depositing a thin film on a substrate using a plasma enhanced chemical vapor deposition apparatus, and discharges at a high frequency in the deposition apparatus. Later, a thin film is deposited on the substrate for the semiconductor device.

【0010】また、本発明の半導体装置の製造方法は、
半導体装置を製造する前に行われる放電は、上記半導体
装置用の基板が設置される場所に水素ガス及びその混合
ガスを導入することを特徴とする。
Further, the method of manufacturing a semiconductor device according to the present invention comprises:
Discharge performed before manufacturing a semiconductor device is characterized by introducing hydrogen gas and a mixed gas thereof to a place where the substrate for a semiconductor device is installed.

【0011】また、本発明の半導体装置の製造方法は、
混合ガスに不活性ガスが含まれることを特徴とする。
Further, a method of manufacturing a semiconductor device according to the present invention
The mixed gas contains an inert gas.

【0012】また、本発明の半導体装置の製造方法は、
不活性ガスがはArまたはHeのいづれかであることを
特徴とする。
Further, a method of manufacturing a semiconductor device according to the present invention
The inert gas is one of Ar and He.

【0013】また、本発明の半導体装置の製造方法は、
半導体装置が薄膜トランジスタであることを特徴とす
る。
Further, a method of manufacturing a semiconductor device according to the present invention
The semiconductor device is a thin film transistor.

【0014】また、本発明の半導体装置の製造方法は、
薄膜がシリコンを主成分とする半導体薄膜であることを
特徴とする。
Further, a method of manufacturing a semiconductor device according to the present invention
The thin film is a semiconductor thin film containing silicon as a main component.

【0015】また、本発明の半導体製造装置は、請求項
1から請求項6のいづれか一つに記載の製造方法を有す
る。
Further, a semiconductor manufacturing apparatus according to the present invention has the manufacturing method according to any one of the first to sixth aspects.

【0016】このようにして、本発明は、定期的な堆積
室内のクリーニング後に露出した装置を構成する材料に
吸着したクリーニングガスの残留成分を水素ガスとAr
に代表される不活性ガスによる放電で除去することによ
り、作製するゲート絶縁膜、非晶質シリコン半導体層な
どの薄膜に不必要な不純物の混入抑制でき、その結果膜
質を安定化してTFT特性の向上ができ、TFTの特性
の不具合がより低減できる。
As described above, according to the present invention, the residual component of the cleaning gas adsorbed on the material constituting the apparatus exposed after the cleaning in the deposition chamber is periodically replaced with hydrogen gas and Ar gas.
The removal by the discharge with an inert gas represented by the above can suppress the incorporation of unnecessary impurities into the thin film such as the gate insulating film and the amorphous silicon semiconductor layer to be manufactured. As a result, the film quality is stabilized and the TFT characteristics are improved. It is possible to improve the characteristics of the TFT and further reduce the problem.

【0017】また、本発明の液晶表示装置は、請求項7
に記載の半導体製造装置で製造された半導体を有するこ
とを特徴とする。
Further, the liquid crystal display device of the present invention has a seventh aspect.
And a semiconductor manufactured by the semiconductor manufacturing apparatus described in (1).

【0018】このようにして、本発明は、より高品質な
液晶表示装置を提供できる。
Thus, the present invention can provide a higher quality liquid crystal display device.

【0019】[0019]

【発明の実施の形態】以下、本発明の実施の形態につい
て説明する。図4に示す様な、周波数が13.56MH
zのグロー放電を用いた化学気相堆積装置を使用してS
iH4、NH4、H2ガスを導入することでゲート絶縁
膜、非晶質シリコン半導体層を製膜し図3のTFTを作
製した。そのTFTの移動度を、NF3ガスでのクリー
ニング後の累積膜厚に対して図1に示す。図に示す様
に、堆積室内のクリーニング直後から堆積室内の累積膜
厚が増加するにつれて移動度が増加するが、クリーニン
グ直後に基板なしでH2ガスを2000sccm、Ar
ガスを400sccmで流し、圧力を1.3×1.33
322×10-3Pa(又は1.3Torr)で、400
Wのグロー放電を行うと、従来と比較して移動度は改善
し、初期の値で0.12×10-42/Vsec(又は
0.12cm2/Vsec)向上した。そして0.9×1
-42/Vsec(又は0.9cm2/Vsec)以上の
移動度を得るには装置内の累積膜厚が従来は1.4μm
必要であるのに対し0.4μmに低減できた。
Embodiments of the present invention will be described below. The frequency is 13.56 MH as shown in FIG.
z using a chemical vapor deposition apparatus using a glow discharge of z
By introducing iH 4 , NH 4 , and H 2 gas, a gate insulating film and an amorphous silicon semiconductor layer were formed, and the TFT of FIG. 3 was manufactured. FIG. 1 shows the mobility of the TFT with respect to the accumulated film thickness after cleaning with NF 3 gas. As shown in the figure, but the mobility as accumulated film thickness of the deposition chamber immediately after the cleaning of the deposition chamber is increased to increase, without the substrate immediately after cleaning the H 2 gas to 2000 sccm, Ar
The gas was flowed at 400 sccm and the pressure was 1.3 × 1.33.
At 322 × 10 −3 Pa (or 1.3 Torr), 400
By performing the glow discharge of W, the mobility was improved as compared with the conventional case, and the initial value was improved by 0.12 × 10 −4 m 2 / Vsec (or 0.12 cm 2 / Vsec). And 0.9 × 1
In order to obtain a mobility of 0 −4 m 2 / Vsec (or 0.9 cm 2 / Vsec) or more, the accumulated film thickness in the apparatus is conventionally 1.4 μm.
Although it was necessary, it could be reduced to 0.4 μm.

【0020】また、クリーニング後に基板を装置内に設
置して作製したTFTの移動度を、H2ガス,Arガスの
流量を変化させて比較したところ図2に示すような結果
が得られ、移動度はH2ガス導入で向上し,Arガスの流
量添加に対して増加した。
Further, when the mobility of the TFT fabricated by placing the substrate in the apparatus after cleaning was compared with the flow rates of H 2 gas and Ar gas varied, the results shown in FIG. 2 were obtained. The degree improved with the introduction of H 2 gas, and increased with the addition of the flow rate of Ar gas.

【0021】以上の様に、クリーニング後にH2ガス,A
rガスでの放電を行うことにより、移動度を向上でき
る。
As described above, after cleaning, H 2 gas, A
The mobility can be improved by performing the discharge with the r gas.

【0022】なお、本実施の形態において、クリーニン
グガスはNF3を用いたが、CF4やSF6等のフッ素系
ガスとしても良い。また、H2ガスと他の不活性ガスと
の混合ガス、例えばH2とHeとを混合させたガス等で
も同様の効果が得られる。
Although NF 3 is used as the cleaning gas in the present embodiment, a fluorine-based gas such as CF 4 or SF 6 may be used. A similar effect can be obtained with a mixed gas of H 2 gas and another inert gas, for example, a mixed gas of H 2 and He.

【0023】なお、本発明ではTFTに用いるゲート絶
縁膜、非晶質シリコン半導体薄膜の例を中心に述べてき
たが、非晶質シリコンを用いるその他の半導体装置はい
うまでもなく、プラズマ化学気相堆積法を用いて非晶質
シリコン以外の薄膜を堆積する工程を有する半導体装置
の製造方法や、半導体製造装置にも本発明は有効であ
る。
In the present invention, the example of the gate insulating film and the amorphous silicon semiconductor thin film used for the TFT has been mainly described. The present invention is also effective for a method of manufacturing a semiconductor device having a step of depositing a thin film other than amorphous silicon using a phase deposition method, and a semiconductor manufacturing apparatus.

【0024】なお、上記の説明で非SI単位で表現した
箇所の、特にsccmと単位表現した点の、sccmと
は、スタンダードシーシーパーミニッツの略記で、単位
時間当たりのガス流量を体積量を示し、体積の単位はc
cで、時間の単位は分(min)である。上記の200
0sccmを、SI単位で換算すると、体積の単位が立
法メートル(m3)で、10-6を掛けて換算でき、20
00sccmが2000×10-6となり、単位時間当た
りのガス流量の体積量が、立法メートルで示される。S
I単位の表現は[m3/min]である。
In the above description, sccm, which is a unit expressed as a non-SI unit, particularly, a unit expressed as sccm, is an abbreviation of Standard CCE and is a gas flow rate per unit time and a volume amount. , The unit of volume is c
In c, the unit of time is minutes (min). 200 above
When 0 sccm is converted in SI units, the unit of volume is cubic meter (m 3 ), and can be converted by multiplying by 10 −6 ,
00 sccm becomes 2000 × 10 −6 , and the volume of gas flow per unit time is expressed in cubic meters. S
The expression of the I unit is [m 3 / min].

【0025】[0025]

【発明の効果】以上のように本発明は、半導体薄膜を作
製する化学気相堆積装置のクリーニング後に堆積装置内
で引き続き基板を設置しないでH2、Arの混合ガスに
よる放電を行うことで安定した薄膜がえられ、十分な特
性を示すTFTが作製でき、産業的価値が大である。
As described above, the present invention is stable by performing discharge with a mixed gas of H 2 and Ar without cleaning the substrate in the deposition apparatus after cleaning the chemical vapor deposition apparatus for producing a semiconductor thin film. A thin film obtained is obtained, and a TFT exhibiting sufficient characteristics can be manufactured, which is of great industrial value.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態におけるTFTの移動度を
作製装置の堆積室内の累積堆積膜厚に対して示す図
FIG. 1 is a diagram showing mobility of a TFT with respect to a cumulative film thickness in a deposition chamber of a manufacturing apparatus in an embodiment of the present invention.

【図2】本発明の実施の形態におけるクリーニング後に
基板を装置内に設置して作製したTFTの移動度を
2、Arガスの流量に対して示す図
FIG. 2 is a diagram showing the mobility of a TFT manufactured by installing a substrate in an apparatus after cleaning in the embodiment of the present invention with respect to the flow rates of H 2 and Ar gas.

【図3】TFTの要部構成断面図FIG. 3 is a cross-sectional view of a main configuration of a TFT.

【図4】化学気相堆積装置の概略図FIG. 4 is a schematic diagram of a chemical vapor deposition apparatus.

【符号の説明】[Explanation of symbols]

1 ガラス基板 2 ゲート電極 3 ゲート絶縁膜 4 非晶質シリコン半導体膜 5a、5b n+非晶質シリコン半導体膜 6a、6b ソース・ドレイン電極 7 チャンネルストッパ絶縁膜 11 堆積室 12 対向放電電極 13 基板 14 放電電極 15 ガス 16 放電電源 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Gate electrode 3 Gate insulating film 4 Amorphous silicon semiconductor film 5a, 5b n + amorphous silicon semiconductor film 6a, 6b Source / drain electrode 7 Channel stopper insulating film 11 Deposition chamber 12 Counter discharge electrode 13 Substrate 14 Discharge electrode 15 Gas 16 Discharge power supply

───────────────────────────────────────────────────── フロントページの続き (72)発明者 二村 信二 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 竹澤 浩義 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 4K030 AA06 AA17 BA30 CA06 CA12 DA03 LA18 5F004 AA15 BD04 DA01 DA17 DA18 DA22 DA23 DA24 FA08 5F045 AA08 AB04 AB33 AC01 AC02 AC12 AC16 AC17 BB16 CA15 DP03 EB06  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shinji Nimura 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Hiroyoshi Takezawa 1006 Kadoma Kadoma Kadoma City, Osaka Matsushita Electric Industrial F Term (reference) 4K030 AA06 AA17 BA30 CA06 CA12 DA03 LA18 5F004 AA15 BD04 DA01 DA17 DA18 DA22 DA23 DA24 FA08 5F045 AA08 AB04 AB33 AC01 AC02 AC12 AC16 AC17 BB16 CA15 DP03 EB06

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 プラズマ化学気相堆積装置を用いて基板
上に薄膜を堆積する工程を有する半導体装置の製造方法
において、前記堆積装置内にて高周波で放電した後に、
前記半導体装置用の基板に薄膜を堆積することを特徴と
する半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, comprising the step of depositing a thin film on a substrate using a plasma enhanced chemical vapor deposition apparatus, comprising the steps of:
A method for manufacturing a semiconductor device, comprising depositing a thin film on the substrate for the semiconductor device.
【請求項2】 半導体装置を製造する前に行われる放電
は、前記半導体装置用の基板が設置される場所に水素ガ
ス及びその混合ガスを導入することを特徴とする請求項
1記載の半導体装置の製造方法。
2. The semiconductor device according to claim 1, wherein the discharge performed before manufacturing the semiconductor device introduces a hydrogen gas and a mixed gas thereof into a place where the substrate for the semiconductor device is installed. Manufacturing method.
【請求項3】 混合ガスに不活性ガスが含まれることを
特徴とする請求項2記載の半導体装置の製造方法。
3. The method according to claim 2, wherein the mixed gas contains an inert gas.
【請求項4】 不活性ガスがはArまたはHeのいづれ
かであることを特徴とする請求項3記載の半導体装置の
製造方法。
4. The method according to claim 3, wherein the inert gas is one of Ar and He.
【請求項5】 半導体装置が薄膜トランジスタであるこ
とを特徴とする請求項2記載の半導体装置の製造方法。
5. The method according to claim 2, wherein the semiconductor device is a thin film transistor.
【請求項6】 薄膜がシリコンを主成分とする半導体薄
膜であることを特徴とする請求項1記載の半導体装置の
製造方法。
6. The method according to claim 1, wherein the thin film is a semiconductor thin film containing silicon as a main component.
【請求項7】 請求項1から請求項6のいづれか一つに
記載の製造方法を有する半導体製造装置。
7. A semiconductor manufacturing apparatus having the manufacturing method according to any one of claims 1 to 6.
【請求項8】 請求項7に記載の半導体製造装置で製造
された半導体を有することを特徴とする液晶表示装置。
8. A liquid crystal display device comprising a semiconductor manufactured by the semiconductor manufacturing apparatus according to claim 7.
JP2000170116A 2000-06-07 2000-06-07 Method and apparatus of semiconductor device Pending JP2001351867A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000170116A JP2001351867A (en) 2000-06-07 2000-06-07 Method and apparatus of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000170116A JP2001351867A (en) 2000-06-07 2000-06-07 Method and apparatus of semiconductor device

Publications (1)

Publication Number Publication Date
JP2001351867A true JP2001351867A (en) 2001-12-21

Family

ID=18672880

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000170116A Pending JP2001351867A (en) 2000-06-07 2000-06-07 Method and apparatus of semiconductor device

Country Status (1)

Country Link
JP (1) JP2001351867A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009065170A (en) * 2007-09-07 2009-03-26 Interuniv Micro Electronica Centrum Vzw Improved cleaning of plasma chamber walls by adding of noble gas cleaning step

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009065170A (en) * 2007-09-07 2009-03-26 Interuniv Micro Electronica Centrum Vzw Improved cleaning of plasma chamber walls by adding of noble gas cleaning step

Similar Documents

Publication Publication Date Title
KR101663965B1 (en) Thin film transistor
JP2009054996A (en) Method of manufacturing display device
US20010012650A1 (en) Method of manufacturing thin film transistor
JP3112880B2 (en) Cleaning method for CVD equipment
JP2001274404A (en) Thin-film transistor and method of manufacturing the same
JP2002317267A (en) Thin film manufacturing method
JP2001351867A (en) Method and apparatus of semiconductor device
JP3204735B2 (en) Manufacturing method of hydrogenated amorphous silicon thin film transistor
JP3593363B2 (en) Method for manufacturing active matrix type liquid crystal display device having semiconductor thin film
JPS63215037A (en) Manufacture of silicon thin film
JPH08288223A (en) Manufacture of thin film
JP2002363754A (en) Thin film manufacturing apparatus, and manufacturing method thereof
JP4469465B2 (en) Manufacturing method of semiconductor device
JP3055782B2 (en) How to manufacture thin film transistors
JP2002158218A (en) Film forming method
JP2002359250A (en) Method for forming thin-film transistor
JPH0818063A (en) Manufacture of film transistor, and film transistor and liquid crystal display
JPS62221163A (en) Formation of thin film transistor
JP4713759B2 (en) Manufacturing method of semiconductor device
JPH11111699A (en) Gas cleaner and method of gas cleaning
JPH10317150A (en) Formation of coating and coating forming device
JPH07297403A (en) Manufacture of thin film transistor
JP2003257991A (en) Method for manufacturing semiconductor
JP2002329869A (en) Manufacturing method of semiconductor device
JPH10147877A (en) Gas cleaning method

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20061109