JP2003257991A - Method for manufacturing semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the stress increase of an insulating film at a metallic film edge, and to reduce the deterioration of insulation breakdown resistivity at the time of manufacturing a semiconductor by forming an insulating film so that a metallic film formed on a substrate can be covered. <P>SOLUTION: A gate insulating film thickness is formed so that the stress increase of the edge of the gate electrode 2 can be suppressed, and that the deterioration of insulation breakdown resistivity can be suppressed, when the film thickness of a gate insulating film 3 grown on a gate electrode 2 and a gate insulating film 3 grown on a glass substrate 1 other than the gate electrode are made equivalent or more. When the gate insulating film 3 is a silicon nitride film, the film thickness is set so as to be not less than 380 nm. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an insulating thin film used for a semiconductor element such as an active element that constitutes a display panel of a liquid crystal display device.

[0002]

2. Description of the Related Art In a film forming process in a semiconductor manufacturing process, a plasma chemical vapor deposition (hereinafter referred to as P-CVD) apparatus which utilizes plasma has been conventionally used for forming a semiconductor film on a surface of a glass substrate or the like. It is used.
Above all, a so-called parallel plate type P-CVD apparatus in which electrodes are arranged opposite to each other in the upper and lower sides of the processing chamber is widely used because it is suitable for processing a relatively large substrate.

A silicon nitride film formed by using such a P-CVD apparatus is used as a gate insulating film, and amorphous Si (hereinafter, referred to as an amorphous silicon) is formed in an active layer of a transistor.
A thin film field effect transistor (hereinafter referred to as a-SiTFT) using a-Si) has excellent on-resistance and off-resistance, and thus has been put to practical use as a switching element of a liquid crystal display device.

[0004]

However, in the initial process of depositing the gate insulating film, the growth rate of the insulating film and the desired region are increased on the metal film which is the gate electrode and on the glass substrate other than the gate electrode. In some cases, there is a difference in the time until the film grows (hereinafter referred to as the dead time).

The difference in film forming speed and dead time due to the difference in the base of the film forming region in the thin film region of the gate insulating film is
This means that non-uniformity of the coverage of the gate insulating film at the edge of the gate electrode occurs.

Therefore, at the end of the gate electrode,
A constriction occurs in the region where the gate insulating film growing from the substrate and the gate insulating film growing from the side wall of the gate electrode are combined (the substrate side edge part of the gate electrode end), and this non-uniformity of coverage causes stress at the gate electrode end part. There has been a problem that the dielectric breakdown resistance is deteriorated while increasing the number.

The present invention solves the above-mentioned problems of the prior art, and provides a method of manufacturing a semiconductor device which suppresses an increase in stress at the end of a gate electrode and suppresses deterioration of dielectric breakdown resistance. The purpose is to

[0008]

In order to achieve the above object, according to the present invention, a gate insulating film grown on a gate electrode and a gate insulating film grown on a glass substrate other than the gate electrode have the same film thickness. By forming the gate insulating film having the thickness as described above, it is possible to suppress an increase in stress at the end of the gate electrode and suppress deterioration of dielectric breakdown resistance.

The thickness of the gate insulating film grown on the gate electrode and the thickness of the gate insulating film grown on the glass substrate other than the gate electrode are the same, which will be described in detail in the embodiments of the invention. When using the silicon nitride film in
The film thickness was 0 nm.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. Figure 1 shows a-Si TFT
This shows the cross-sectional structure of the main part of C.
A conductor such as r or MoSi ₂ is selectively formed as the gate electrode 2. 3 as a gate insulating film 3 by a parallel plate type plasma CVD method using glow discharge of 13.56 MHz
A silicon nitride film having a thickness of 80 nm, an a-Si film 4 having a thickness of about 200 nm and an n + type a-Si film 5 containing phosphorus as an impurity having a thickness of about 20 nm are continuously formed as a semiconductor film by the same plasma CVD method as the silicon nitride film. A-Si film is selectively removed by etching or the like to form a pattern of island-shaped a-Si film 4. A source electrode 6 and a drain electrode 7 made of a conductor such as Al or MoSi ₂ are formed on the pattern of the a-Si film 4, and a part of the n + type a-Si film 5 is removed to form an a-Si TFT. To be done.

Next, referring to FIG. 2, in a-SiTFT, a film formation film of a silicon nitride film formed on glass and a silicon nitride film formed on a metal film such as a gate electrode formed on glass. The problems due to the difference in thickness will be described.

First, FIG. 2A shows a case where the silicon nitride film 10 formed on the glass substrate 8 and the silicon nitride film 10 on the metal film wiring 9 such as a gate electrode have different film thicknesses. The silicon nitride film of the gate insulating film used for the a-SiTFT is formed on the metal film wiring such as the gate wiring and the other glass substrate in the manufacturing process of the a-SiTFT by using the P-CVD apparatus at the same time. The film is formed. As a result, on the metal film wiring 9 and the glass substrate 8
When the deposition rate of the silicon nitride film 10 is different from that of the above, the film thickness of the silicon nitride film formed on the side wall of the metal film wiring 9 is the same as the film thickness on the metal film wiring. The silicon nitride film is constricted at the boundary between the glass and the glass. In such a case, if the upper metal film wiring 11 is formed so as to cover the silicon nitride film 10, electrostatic breakdown is likely to occur in the constricted portion, and the gate-source between the gate and the source due to static electricity generated during the a-SiTFT manufacturing process. This will cause a short circuit and reduce the yield. Furthermore, when a-Si is formed instead of the upper metal film wiring 11 and used as a semiconductor layer of an a-Si TFT, the defect level increases due to the stress of the gate insulating film in the constricted portion, and the reliability of the TFT characteristics is improved. Leads to a decline.

On the other hand, FIG. 2B shows the case where the silicon nitride film 10 on the glass substrate 8 and the metal film wiring 9 have the same film thickness. The constriction formed at the boundary between the metal film wiring 9 and the glass substrate 8 formed at the initial stage of film formation is filled with the silicon nitride film 10, so that the occurrence rate of dielectric breakdown defects is reduced. Furthermore, since stress does not occur in the gate insulating film in the constricted portion, reliability of TFT characteristics is also improved.

Next, when a metal film wiring is formed on the glass substrate and a silicon nitride film is formed thereon using a P-CVD apparatus, the metal film wiring is grown on the metal film and the glass substrate with respect to the film formation time. FIG. 3 shows the relationship of the film thickness of the silicon nitride film, and shows the optimum point of the silicon nitride film thickness. FIG. 3 shows that a gas ratio SiH ₄ : NH ₃ : N ₂ = 1: 3: 30, on a sample obtained by patterning a metal film formed on a glass substrate.
The film thickness of the silicon nitride film on the glass substrate and the silicon nitride film on the metal film when the film formation time is changed under the film formation conditions of the silicon nitride film such that the film formation rate is 120 nm to 160 nm / min. Is measured. Figure 3
Therefore, when the film thickness becomes 380 nm, the film thicknesses of the silicon nitride film on the glass substrate and the metal film are the same. This is because the difference in film formation rate due to the difference in the substrate surface condition is 3
It shows that it is relaxed at 80 nm. Therefore, it was found that the silicon nitride film under the above film forming conditions has an inflection point at 380 nm, and if it is 380 nm or more, the film thicknesses of the silicon nitride film on the glass substrate and the metal film are the same,
It is considered that the above problems are unlikely to occur.

Next, the dependency of the occurrence rate of dielectric breakdown defects on the silicon nitride film thickness will be described with reference to FIG. Figure 4
FIG. 4 is a graph showing the rate of occurrence of dielectric breakdown between the gate and the source, which occurs when the source electrode and the drain electrode of the a-Si TFT are grounded and a certain voltage is applied to the gate electrode. It was found that as the film thickness increased, the dielectric breakdown defect decreased, and when the film thickness was 380 nm or more, almost no occurrence occurred. It is considered that the contents described in FIG. 3 were confirmed.

[0016]

As described above, according to the present invention,
When an insulating film is formed so as to cover a metal film existing on one main surface of a substrate and a semiconductor device having this as a part of a structure is manufactured, the insulating film is formed to have a film thickness of 380 nm or more. In such a semiconductor device, the occurrence of dielectric breakdown defects can be suppressed to a low level.

[Brief description of drawings]

FIG. 1 is an a-Si TFT according to an embodiment of the present invention.
Main part structure diagram

FIG. 2 is a diagram showing problems when the film thickness is different on the glass substrate and the metal film.

FIG. 3 is a diagram showing a relationship between a film formation time and a silicon nitride film thickness when a silicon nitride film is formed on a glass substrate and a metal film by using a P-CVD apparatus.

FIG. 4 is a diagram showing a rate of occurrence of dielectric breakdown defects with respect to a silicon nitride film thickness.

[Explanation of symbols]

1 glass substrate 2 Gate electrode 3 Gate insulation film 4 a-Si film 5 n + type a-Si film 6 Source electrode 7 Drain electrode 8 glass substrates 9 Metal film wiring 10 Silicon nitride film 11 Upper metal film wiring

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yoshihiro Konishi             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Motoaki Aoki             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Tetsuya Kojima             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F term (reference) 2H092 HA28 JB56 KA05 KA12 KB24                       MA08 NA14 NA21                 5F110 AA12 BB01 CC07 DD02 EE04                       EE05 FF03 FF12 FF30 GG02                       GG15 GG24 GG45 HK03 HK05                       HK09 HK16 HK21 HK35

Claims (5)

[Claims] 1. An insulating film is formed so as to cover a metal film existing on one main surface of a substrate, and when a semiconductor device having this as a part of a structure is manufactured, the film thickness of the insulating film is 380 nm. A method for manufacturing a semiconductor device, which is formed as described above. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film is formed by a plasma chemical vapor deposition method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film is a gate insulating film of a field effect transistor. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film is a silicon nitride film. 5. The film formation rate of the silicon nitride film is 160 to 1
The method of manufacturing a semiconductor device according to claim 4, wherein the film is formed at 20 nm / min.