JP2002329869A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of an a-Si TFT having an excellent reliability, by improving the film quality of its semiconductor layer wherein fluorine has been so entrapped conventionally in its manufacturing process as to cause its on/off resistances to deteriorate, although an SiNx film and an a-Si film are formed continuously in it by a plasma CVD method as its gate insulation film and as its semiconductor layer and it has otherwise originally excellent on/off resistances. SOLUTION: A TFT is so created that the fluorine content of its semiconductor layer created by a plasma CVD method has a small value not larger than 1.0×10<19> (atoms/cm<3> ). By such improvement of the film quality of its semiconductor layer as to make good the film quality present near the interface between its gate insulation film and its semiconductor layer, there can be provided the a-Si TFT of an excellent characteristic having a small shifting quantity of its Vt which is caused by its low trapping level.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art A silicon nitride film (hereinafter referred to as SiNx) is formed by a plasma chemical vapor deposition method (hereinafter referred to as a plasma CVD method).
Film) and an amorphous silicon film (hereinafter a-Si film) are continuously formed as a gate insulating film and a semiconductor film, respectively.
TFTs) have excellent on-resistance and off-resistance, and have been put to practical use as switching elements in liquid crystal image display devices.

[0003]

However, when cleaning the inside of the process chamber of the plasma CVD apparatus using a gas such as NF ₃ , CF ₄ , SF ₆ during the manufacturing process thereof, fluorine is contained in the process chamber. There is a problem in that the residual and the fluorine mixed into the semiconductor layer formed immediately thereafter deteriorate the on-resistance and off-resistance of the a-Si TFT.

Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device such as an a-Si TFT having improved reliability by improving the film quality of a semiconductor layer.

[0005]

In order to achieve the above object, the present invention provides a method of cleaning a process chamber of a plasma CVD apparatus, which removes residual fluorine in the process chamber by, for example, generating hydrogen plasma. The semiconductor layer is manufactured such that the fluorine content of the semiconductor layer manufactured by the CVD method has a small value of 1.0 × 10 ¹⁹ (atoms / cm ³ ) or less.

According to the present invention, there is provided a semiconductor device comprising:
An a-Si TFT having excellent characteristics can be provided because the film quality near the interface is improved and the trap level is small. Therefore, a semiconductor device of another application using the semiconductor layer of the present invention also has excellent characteristics.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a cross-sectional view of a main structure of an a-Si TFT according to an embodiment of the present invention. In FIG. 1, C is placed on a glass substrate 1.
A gate electrode 2 made of a conductor such as r, Al, or Mo is selectively formed.

After cleaning the inside of the process chamber of the plasma CVD apparatus, hydrogen in the process chamber is removed by generating hydrogen plasma.

Next, a SiNx film 3 having a thickness of about 3000 × 10 ⁻¹⁰ m (or 3000 ^° ) as a gate insulating film and a semiconductor film as a semiconductor film by a parallel plate type plasma CVD method using a 13.56 MHz glow discharge. 2000 × 10 ⁻¹⁰ m (or 20 × 10 ⁻¹⁰ m) by the same plasma CVD method as the SiNx film.
An a-Si film 4 of about 00 °) and an n + type a-Si film 5 containing phosphorus as an impurity are continuously deposited to a thickness of about 200 × 10 ⁻¹⁰ m (or 200 ^° ), and a-
The Si film is selectively removed to form an island-like a-Si film pattern.

Further, an a-Si film 4 and an n + type a-Si
A film made of a conductor such as Cr, Al, or Mo is formed on the pattern of the film 5, and n + type a-Si between the source electrode 6 and the drain electrode 7 selectively formed by etching or the like.
By removing the film, an a-Si TFT is manufactured.

According to the research of the present inventors, the characteristics of the a-Si TFT, in particular, it has been found that the ON characteristics and the reliability are greatly influenced by the film quality of the semiconductor layer. In particular, it was confirmed that, among the film qualities of these semiconductor layers, the amount of mixed fluorine was a large parameter indicating the optimum film quality.

The amount of fluorine mixed in the semiconductor layer in this embodiment is determined under the same conditions as those for manufacturing an a-Si TFT.
Depositing a SiNx film and a semiconductor layer on a double-side polished single-crystal silicon substrate, secondary ion mass spectrometry (SIMS)
Thus, the fluorine content per unit volume of the semiconductor layer was quantified and determined.

A-Si T due to deterioration of the film quality of the semiconductor layer
Deterioration of the FT characteristic appears especially in the threshold voltage Vt of the gate, and a positive or negative sign of the applied gate voltage causes a shift of Vt having the same sign.

The threshold voltage Vt of the gate in this embodiment is the same as that of the a-Si TFT shown in FIG. 1 in which the W / L ratio of the channel width W and the channel length L is 6, and the substrate temperature is 25. The gate voltage was set at a drain current of 1 × 10 ⁻⁸ A when a source ground and a drain voltage of 0.1 V were constantly applied in a dark environment at 0 ± 3.0 ° C. The Vt shift amount is calculated from the threshold voltage Vt at the time when the a-Si TFT is operated for a long time and terminated, and
The gate threshold voltage Vt immediately after the fabrication of T is reduced.

FIG. 3 shows that the semiconductor layer has a fluorine content of 8.8.
This shows a Vt shift pattern of an a-Si TFT of 4 × 10 ¹⁹ (atoms / cm ³ ). The characteristic immediately after the fabrication of the a-Si TFT was an A curve, and Vt = Vt1 ≒ 0.5 V. The characteristics after operating the a-Si TFT in a dry nitrogen gas atmosphere in a dark place at 25.0 ± 3.0 ° C. for 10 minutes at a source ground, a drain ground, and a constant gate voltage of 30 V (DC operation conditions) are B. Vt = Vt2 ≒ 4.
5 V and Vt indicate a positive shift, and the gate voltage is 20 V
In the case of (1), the drain current was initially ID1 = 8.1 μA, but after the operation, ID2 = 7.2 μA, which is a decrease of 11%.

FIG. 2 shows a semiconductor layer formed after changing the amount of fluorine in the process chamber by changing various conditions of plasma CVD such as a flow rate of hydrogen gas, a discharge power, and a degree of vacuum in generating hydrogen plasma. The vertical axis represents the amount of Vt shift when the device was operated for 10 minutes in a dry nitrogen gas atmosphere at a temperature of 25.0 ± 3.0 ° C. and a constant source and drain, and a constant gate voltage of 30 V (DC operating conditions). FIG. 3 is a diagram in which the fluorine content of a semiconductor layer is plotted on the horizontal axis.

In FIG. 2, the fluorine content is a parameter
, The Vt shift amount of the a-Si TFT becomes
Align on two straight lines. And the fluorine content is about 1.2 ×
10 ¹⁹(Atoms / cm^Three), The Vt shift amount
Clearly increases with increasing fluorine content
became.

From the above, it can be seen that a-Si
To obtain a TFT, the fluorine content of the semiconductor layer must be 1.0
It turns out that it is necessary to be smaller than × 10 ¹⁹ (atoms / cm ³ ).

[0019]

As described above, according to the present invention,
A semiconductor layer manufactured by a plasma CVD method having a fluorine content of 1.0 × 10 ¹⁹ (atoms / cm ³ ) or less has a low level density near an interface as described above, and is excellent as a semiconductor layer of a semiconductor device. It is thought that it is. Further, the a-Si TFT using the semiconductor layer of the present invention has a stable Vt shift, and an a-Si TFT having excellent reliability can be manufactured.

[Brief description of the drawings]

FIG. 1 shows a-Si TF according to an embodiment of the present invention.
Sectional view of main structure of T

FIG. 2 is a characteristic diagram showing the relationship between the fluorine content of a semiconductor layer and the Vt shift amount of an a-Si TFT when DC operation is performed for 10 minutes.

FIG. 3 is a characteristic diagram in which a drain current is plotted on a vertical axis and a gate voltage is plotted on a horizontal axis, showing a state of Vt shift.

[Explanation of symbols]

 Reference Signs List 1 glass substrate 2 gate electrode 3 SiNx film 4 a-Si film 5 n + type a-Si film 6 source electrode 7 drain electrode

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Hirosa Baba 1006 Kadoma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. (72) Inventor Tetsuya Kojima 1006 Kazuma Kadoma, Kazuma City, Osaka Prefecture F-term in Matsushita Electric Industrial Co., Ltd. (reference) GG02 GG15 GG24 GG28 GG29 GG33 GG34 GG45 HK03 HK04 HK09 HK16 HK21 HK25 HK35 QQ09

Claims (4)

[Claims] 1. A method of manufacturing a semiconductor device in which an insulating film made of a silicon nitride film and a semiconductor layer are laminated on one main surface of a substrate so as to be in contact with each other to form a part of a structure, Has a fluorine content of 1.0 × 10 ¹⁹ (at
oms / cm ³ ). A method for manufacturing a semiconductor device, characterized in that: 2. The method according to claim 1, wherein the insulating film and the semiconductor layer are continuously formed by a plasma enhanced chemical vapor deposition method. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film and the semiconductor layer are a gate insulating film and a semiconductor layer of a field effect transistor. 4. The method according to claim 1, wherein the semiconductor layer is an amorphous silicon film.