JP2001274404A - Thin-film transistor and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin-film transistor having a small leakage current and good element characteristics even if a non-crystalline semiconductor thin film having large unevenness is used for an active layer. SOLUTION: The thin-film transistor comprises an active layer 102 which is formed of a semiconductor thin film and has an unevenness of 10 nm or larger on the surface, gate insulation film 103 formed of a silicon nitride film containing fluorine on the surface of the active layer 102, a gate electrode 104 formed on the gate insulation film 103, and source and drain electrodes 105 electrically connected to the active layer 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor and a method for manufacturing the same.

[0002]

2. Description of the Related Art Electroluminescence, plasma,
Since a display device such as a liquid crystal can have a large display portion, demand has been increasing as a display device for office equipment or a computer or a special display device. Among these,
2. Description of the Related Art A liquid crystal display device using an active matrix array of thin film transistors as switching elements has been actively developed because of high display quality and low power consumption.

In a liquid crystal display device using an active matrix array, as described above, the voltage applied to the liquid crystal of each pixel is controlled by the thin film transistor connected to the pixel. As the active layer of this thin film transistor, monocrystalline, polycrystalline, amorphous Si, SiGe, SiC, C
dSe, Te, CdS, etc. have been used. In recent years, among these, polycrystalline semiconductors and amorphous semiconductors can be applied to a thin film forming technique using a low-temperature process, so that by forming these thin films on an inexpensive glass substrate, a large screen, high definition, Attention has been paid to materials that can realize high-quality panel displays at low cost.

FIG. 7 is a sectional view of a conventional thin film transistor using a polycrystalline semiconductor thin film for an active layer.

As shown in FIG. 7, in a conventional thin film transistor, an active layer 702 made of a polycrystalline silicon thin film is formed in a predetermined pattern on a transparent insulating substrate 701 such as a glass substrate. A gate insulating film 703 made of, for example, a silicon oxide film is provided in a predetermined region on the active layer 702, and a gate electrode 704 is formed by patterning an electrode material such as aluminum. Source / drain electrodes 705 made of aluminum or the like are electrically connected to contact regions 706 made of an n ⁺ polycrystalline silicon film. Note that an interlayer insulating film 707 is provided between the gate electrode 704 and the source / drain electrodes 705 and is insulated.

In such a configuration, it has recently been necessary to reduce the thickness of the gate insulating film 703. This is because the current flowing in the active layer 702 can be apparently increased by reducing the thickness of the gate insulating film 703 and increasing the capacitance of the gate portion.

[0007] However, unlike a single-crystal semiconductor thin film, the non-single-crystal semiconductor thin film has large surface irregularities. Therefore, when a non-single-crystal semiconductor thin film is used as the active layer 702, since the surface of the non-single-crystal semiconductor thin film has irregularities, the gate insulating film 70
It is difficult to make 3 thinner. That is, when the gate insulating film 703 is formed over the uneven active layer 702, the thickness of the gate insulating film 703 on the convex portion of the active layer 702 becomes thinner, and a leak current flows between the active layer 702 and the gate electrode 704 in that portion. It is because it flows. Even if leakage does not occur in a region where the thickness of the gate insulating film 703 is average, leakage occurs locally in a portion where the gate insulating film 703 is thin. Therefore, there is a problem that the transistor characteristics deteriorate.

As a method of increasing the capacitance of the gate portion, a method of using a material having a higher dielectric constant than a silicon oxide film, for example, a silicon nitride film or a tantalum oxide film as a material of the gate insulating film has been considered. That is, by using such a film and increasing the film thickness while maintaining the capacitance of the gate portion, the leak current is reduced. In particular, when a silicon nitride film is used, a parallel plate type plasma C currently used for a silicon oxide film is used as a manufacturing apparatus.
Since a VD device can be used, manufacturing is easy.

However, the silicon nitride film thus formed has a very large leak current. When the leak currents are compared at the same film thickness, the leak current of the silicon nitride film is about five times the leak current of the silicon oxide film. Considering that a film having the same gate capacitance as the silicon oxide film can be obtained even if the film thickness is increased due to the large dielectric constant of the silicon nitride film, the silicon oxide film having the same dielectric constant can be used. In comparison, it has been found that the magnitude of the leak current of the silicon nitride film is about twice as large, and cannot be used as a gate insulating film of a thin film transistor.

[0010]

As described above, when a non-single-crystal semiconductor thin film is used as an active layer, the non-single-crystal semiconductor thin film has large irregularities on its surface. When the gate insulating film is formed on the active layer, and the gate insulating film is thinned to increase the gate capacitance, the gate insulating film on the protruding portion of the active layer becomes thin, and the portion between the active layer and the gate electrode in that portion becomes thin. There is a problem that a leak current flows.

Although a method using a silicon nitride film having a high dielectric constant instead of the silicon oxide film can be considered, the leakage current of the silicon nitride film is extremely large. Considering that the higher dielectric constant of the silicon nitride film allows the film thickness to be greater than when using a silicon oxide film, the leakage current of the silicon nitride film is lower than that of a silicon oxide film having the same dielectric constant. It is large and cannot be used as a gate insulating film of a thin film transistor.

[0012]

SUMMARY OF THE INVENTION Therefore, the first aspect of the present invention is as follows.
An active layer made of a semiconductor thin film and having an unevenness of 10 nm or more on the surface; a gate insulating film made of a silicon nitride film containing fluorine formed on the surface of the active layer; a gate electrode formed on the gate insulating film; There is provided a thin film transistor including a source / drain electrode electrically connected to the layer. Note that the unevenness refers to a difference in height from above the convex portion to below the concave portion when a convex portion and a concave portion are locally present on the surface of a certain film.

In the first aspect of the present invention, the semiconductor thin film may be non-single crystal.

A second aspect of the present invention is a step of forming a non-single-crystal semiconductor thin film having irregularities of 10 nm or more on a substrate, and using a mixed gas containing ammonia gas and fluorosilane gas on the non-single-crystal semiconductor thin film. Forming a gate insulating film by performing a plasma CVD method at a temperature of 600 ° C. or less;
Forming a gate electrode on the non-single-crystal semiconductor thin film via a gate insulating film; and forming a source / drain electrode electrically connected to the non-single-crystal semiconductor thin film. Provided is a method for manufacturing a thin film transistor.

In the second embodiment of the present invention, when performing the plasma CVD method, silane tetrafluoride gas may be used as fluorosilane.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings, but the present invention is not limited to these embodiments.

(First Embodiment) A first embodiment of the present invention will be described. FIG. 1 is a sectional view showing a thin film transistor according to the first embodiment of the present invention. As shown in FIG. 1, the thin film transistor of the present embodiment includes a substrate 101
An active layer 102 is formed thereon in a predetermined pattern.
A gate insulating film 103 made of a fluorine-added silicon nitride film is provided in a predetermined region on the active layer 102, and a gate electrode 104 is formed thereon. The source / drain electrode 105 is electrically connected to the contact region 106, and the gate electrode 104 and the source / drain electrode 1
Between layers 05, an interlayer insulating film 107 is provided and insulated.

Next, a method of forming the thin film transistor of the present embodiment will be described with reference to the cross-sectional view of FIG.

First, as shown in FIG. 1, a low pressure CVD method of disilane gas is applied on a substrate 101 made of quartz.
An amorphous silicon film having a thickness of about 100 nm is formed at a substrate temperature of about 520 ° C. After that, the amorphous silicon film is annealed in a nitrogen atmosphere at about 620 ° C. for about 20 hours to be changed into a polysilicon film and processed into a predetermined shape to form the active layer 102.

Next, the substrate 101 on which the active layer 102 is formed
The gas mixture of ammonia gas and silane tetrafluoride gas
Fluorine-added silicon by plasma CVD using
Gate insulating film 10 having a thickness of about 30 nm and
Form 3 At that time, a parallel plate type CVD device
The size of the electrode is about 80cm x about 80c
m, reaction chamber volume is about 0.2m³And Also, the substrate temperature
About 330 ° C, gas pressure about 100Pa, RF power
Approximately 800 W, the distance between the electrodes is approximately 30 mm, and the gas flow rate
Is about 400 cm per minute³, Four foot
Silane gas flow rate about 100cm / min³, As a diluent gas
N₂Gas flow rate about 1000cm / min ³And

On the gate insulating film 103, a molybdenum film is formed by a sputtering method so as to have a thickness of about 500 nm, and a resist is patterned on the molybdenum film to form a chemical by a mixed gas of fluorocarbon and oxygen gas. By performing the dry etching method, the gate electrode 10
4 is formed.

Next, the gate electrode 104 and the active layer 102
Contact region 1 with the source / drain electrode 105 inside
At 06, ion implantation is performed. In the present embodiment, N-type
In order to make the thin film transistor of e, phosphorous atoms are
Density about 1.0 × 10^Fifteencm ^-2Dose amount
Type in. After that, the gate electrode 104 and the contact
Vacuum at a temperature of about 550 ° C. to activate region 106
Medium annealing is performed for about 3 hours.

Next, a silicon oxide film is formed to a thickness of about 500 nm by a low pressure CVD method to form an interlayer insulating film 1.
07, the gate insulating film 1 in the contact region 106
03 and the interlayer insulating film 107 are etched with buffered hydrofluoric acid to form contact holes. Thereafter, sputtering is performed to a thickness of about 500 nm using aluminum to form a predetermined shape to form source / drain electrodes 105, thereby completing the thin film transistor of this embodiment.

FIG. 2 shows the leakage current when the applied voltage of the thin film transistor of this embodiment is changed. For comparison,
Leakage currents of a thin film transistor using a silicon oxide film as a gate insulating film and a thin film transistor using a silicon nitride film without addition of fluorine formed by a plasma CVD method using a mixed gas of ammonia gas and silane gas as a gate insulating film are also shown. The thin film transistors for these comparisons are formed in the same manner as in the present embodiment except for the gate insulating film. In order to make the thickness of these thin film transistors equal to the gate capacitance of the gate insulating film of this embodiment, the thickness of the silicon oxide film was about 20 nm, and the thickness of the silicon nitride film to which fluorine was not added was about 30 nm. As a method of measuring the leak current, as shown in FIG.
The measurement was performed by applying a voltage to the liquid crystal 04 and measuring the current between the source and drain electrodes 105.

As shown in FIG. 2, the silicon nitride film to which fluorine is not added has a higher leak current than the silicon oxide film. When the applied voltage is set to about 5 V, the leak current is about twice as large. It can be seen that the silicon nitride film to which fluorine is added according to the present embodiment has about 1/5 of the leak current of the silicon oxide film when the applied voltage is about 5V. This is because when a mixed gas of ammonia gas and silane gas is used to form a gate insulating film made of a silicon nitride film to which fluorine is not added, hydrogen atoms are mixed in the gate insulating film, and the hydrogen atoms are contained in the film. Is generated by moving the gate insulating film. This is because, in the gate insulating film of this embodiment, the leakage current is reduced by replacing it with fluorine.

Further, since the silicon nitride film has a high dielectric constant, a gate capacitance equivalent to that of the silicon oxide film can be obtained even if the film thickness is larger than that in the case of using the silicon oxide film. Therefore, by forming an active layer using a non-single-crystal silicon thin film as in the present embodiment, even if the surface of the active layer has large irregularities, the active layer has a thickness sufficient to prevent leakage current even on the convex portion of the active layer. Even if a gate insulating film having such a thickness is formed, a high gate capacitance can be obtained, a thin film transistor having small leakage current and excellent characteristics can be formed.

Next, FIG. 4 shows the results of measuring 100 leak currents of the thin film transistor of this embodiment and 100 thin film transistors each using a silicon oxide film as a gate insulating film (hereinafter referred to as Comparative Example 1). In Comparative Example 1, FIG.
As in the case of the above, the thickness of the silicon oxide film is set to about 20 nm,
In order to make the applied electric field uniform, the gate voltage is set to about 30 V for the thin film transistor of the present embodiment and about 20 V for the comparative example 1.
V is applied. Except for the gate insulating film, Comparative Example 1 is formed by the same forming method as that of the present embodiment. The measurement of the leak current is performed in the same manner as in the method of FIG.

FIG. 4 shows that the leak current of the thin film transistor of this embodiment is smaller than the leak current of Comparative Example 1 and that the variation is small. In Comparative Example 1,
In the sample having a large leak, it was found that the unevenness of the active layer below the gate insulating film was large, and the size of the unevenness was about 10 nm or more. Also in the thin film transistor of this embodiment, there is a thin film transistor having an unevenness of about 10 nm or more in the active layer, but the leakage current is small. This is because the gate insulating film of the thin film transistor of the present embodiment has a high dielectric constant, so that the film thickness can be made larger than that of Comparative Example 1 in order to obtain a gate capacitance equivalent to that of Comparative Example 1. That is,
Even when the active layer under the gate insulating film has an unevenness of about 10 nm or more, a high gate capacitance can be obtained even on a convex portion of the active layer even if a gate insulating film having a thickness sufficient to prevent leakage current is formed. Thus, it can be said that good device characteristics can be obtained with a small leak current.

Therefore, in the thin film transistor of this embodiment, the same gate capacitance as that of Comparative Example 1 can be obtained, and the film thickness can be further increased.
It can be said that better device characteristics can be obtained than the conventional device.

(Second Embodiment) Next, a second embodiment will be described. The present embodiment will be described focusing on portions different from the first embodiment, and will be described with reference to FIG. 1 as in the first embodiment.

In the present embodiment, the method of forming the active layer 102 and the gate insulating film 103 is different from the first embodiment.

First, an amorphous silicon film is formed on a substrate 101 made of quartz by using a parallel plate type plasma CVD apparatus. Disilane gas is used as a source gas, and the same conditions and methods as in the first embodiment are used. Thereafter, the amorphous silicon film is annealed by a laser annealing method using an excimer laser under the same conditions as in the first embodiment to change the amorphous silicon film into a polysilicon film, and process the amorphous silicon film into a predetermined shape. 102.

Next, a fluorine-added silicon nitride film is formed as a gate insulating film 103 using a remote plasma CVD apparatus. In a remote plasma CVD apparatus, only ammonia gas is plasma-decomposed, and silane tetrafluoride gas is introduced into the reaction chamber separately from the decomposed ammonia gas.
Other conditions are the same as in the first embodiment.

Thereafter, the gate electrode 104, the contact region 106, the interlayer insulating film 107, the source / drain electrode 1
05 etc. are formed by the same material and method as in the first embodiment,
The thin film transistor of the present embodiment is completed.

FIG. 5 shows that the leakage current of the thin film transistor of the present embodiment and that of the thin film transistor using a silicon oxide film as a gate insulating film (hereinafter referred to as Comparative Example 2) were 10%.
The result of measuring 0 pieces at a time is shown. In Comparative Example 2, the thickness of the silicon oxide film was set to about 20 nm in order to make it equal to the gate capacitance of the gate insulating film in the present embodiment, and the gate voltage was set to about 30 nm in order to make the applied electric field uniform. 15 V and about 10 V are applied to Comparative Example 2. Except for the gate insulating film, Comparative Example 2 is formed by the same forming method as that of the present embodiment. The measurement of the leak current is performed in the same manner as in FIG.

FIG. 5 shows that the leak current of the thin film transistor of the present embodiment is smaller than the leak current of Comparative Example 2 and that the variation is small. It is known that the active layer made of a polysilicon film obtained by a laser annealing method using an excimer laser as in the present embodiment has larger surface irregularities than the active layer formed by the method of the first embodiment. ing. The fluorine-added silicon nitride film of the present embodiment has good characteristics because it has a large gate capacitance and can keep a small leak current even as a gate insulating film provided on an active layer having a large surface unevenness. It can be said that it can be obtained.

In the same manner as in the first embodiment, in the case of a conventional fluorine-free silicon nitride film, hydrogen atoms are mixed in the gate insulating film to generate a leak current. In the added silicon nitride film, the leakage current is suppressed by replacing the hydrogen atoms with fluorine, and as a result, a leakage current smaller than that in the case of using the silicon oxide film is obtained.

Further, in the present embodiment, as in the first embodiment, since the dielectric constant of the silicon nitride film is high, even if the film thickness is made larger than that in the case where the silicon oxide film is used, it is the same as the silicon oxide film. Gate capacitance can be obtained. Therefore, even when an active layer having large surface irregularities is used as in the present embodiment, a thick gate insulating film can be formed while maintaining a high gate capacitance. In order to obtain a sufficient thickness that does not cause
A thin film transistor having small leakage current and excellent element characteristics can be formed.

Further, when forming the thin film transistor of this embodiment, the same manufacturing apparatus as when forming the silicon oxide film as the gate insulating film can be used, and it can be said that the manufacturing is easy.

(Third Embodiment) Next, a third embodiment will be described. In this embodiment, several types of thin film transistors having active layers having different sizes of unevenness on the surface are formed, and how the leak current changes depending on the size of the unevenness is measured. That is, after forming an active layer with few irregularities, irregularities of different sizes are given, and the effect of the irregularities of the active layer on the leakage current is examined.

This embodiment will be described with reference to FIG. 1, as in the first embodiment.

First, a hydrogenated amorphous silicon film is formed on a substrate 101 made of Corning's 1737 glass using a parallel plate type plasma CVD apparatus.
A silane gas is used as the source gas, and the substrate temperature is set to about 300 ° C. to form an amorphous silicon film having a thickness of about 100 nm. By annealing the amorphous silicon film at about 500 ° C. for about 1 hour, the amount of hydrogen in the film is reduced.

Next, a silicon oxide film of about 50 nm is deposited on the amorphous silicon film by a parallel plate type plasma CVD apparatus, and the amorphous silicon film is polycrystallized by an excimer laser annealing apparatus. By depositing the silicon oxide film on the upper part, the amorphous silicon film becomes a polycrystalline silicon film without unevenness. After the laser annealing, the entire surface of the silicon oxide film on the polycrystalline silicon film is etched with an ammonium fluoride solution.

Next, irregularities are formed on the surface of the polycrystalline silicon film having no irregularities. This is about 30 wt% KOH
Etching is performed using a solution, and the size of the unevenness is changed by changing the processing time.

After the completion of this treatment, the unevenness of the surface was measured using a step meter, and the size of the unevenness of the surface was about 5 nm, about 10 nm, about 20 nm, about 30 nm, respectively.
An active layer 102 of about 40 nm was obtained.

Active layer 102 having irregularities on these surfaces
On each of the above, a gate insulating film 103 is formed using the same material and method as in the first embodiment.
The thin film transistor of this embodiment is formed and completed by using the same material and method as those of the embodiment. In this embodiment, the polycrystallization of amorphous silicon is performed after the deposition of the silicon oxide film.
Irregularities are formed on the surface by treatment with OH, but these are performed experimentally to change the irregularities on the surface, and are not necessary in an actual mass production process or the like.

FIG. 6 shows the relationship between the size of the unevenness on the surface of the active layer of the thin film transistor of the present embodiment and the size of the leak current. For comparison, a thin film transistor using a silicon oxide film as a gate insulating film on an active layer in which the size of the surface irregularities was similarly changed (hereinafter referred to as Comparative Example 3)
Also, the leakage current is measured. In Comparative Example 3, except for the gate insulating film, the gate insulating film is formed by the same forming method as that of the present embodiment, and the thickness of the gate insulating film in Comparative Example 3 is set to about 20 nm in order to make the gate capacitance uniform. In order to make the applied electric field uniform, a gate voltage of about 30 V is applied to the thin film transistor of the present embodiment and about 20 V is applied to Comparative Example 3. The measurement of the leak current is performed in the same manner as in the method of FIG.

As shown in FIG. 6, when the size of the irregularities on the surface of the active layer is about 5 nm, there is no significant difference in the leak current between the thin film transistor of this embodiment and Comparative Example 3, but the surface of the active layer In the case where the size of the unevenness is about 10 nm or more, the thin film transistor of the present embodiment does not increase so much in comparison with the comparative example 3 in which the leak current is significantly increased.

This is, as described in the first embodiment,
In the present embodiment, the leakage current is suppressed by replacing the hydrogen atoms of the fluorine-free silicon nitride film with fluorine, and as a result, not only the leakage current is smaller than when a silicon oxide film is used, but also the silicon nitride film Has a high dielectric constant, it is possible to form a thick gate insulating film when obtaining a gate capacitance equivalent to that of a silicon oxide film. Even above, since the gate insulating film having a sufficient thickness to prevent the occurrence of a leak current is formed, a thin film transistor having a small leak current and excellent element characteristics can be formed.

According to the present invention described in detail above, it is possible to obtain a thin film transistor having a small leakage current and good element characteristics. However, the present invention is not limited to the above embodiments.

For example, when forming the gate insulating film in the thin film transistor of the present invention, fluorine atoms may be contained in the film, and the source gas may be only the silane tetrafluoride described in each embodiment. Instead, silane difluoride, silane trifluoride, or the like may be used.

As a device for forming the gate insulating film, not only a parallel plate type plasma CVD device and a remote plasma CVD device but also a device using a capacitively coupled plasma (ICP), an electron cyclotron resonance A similar effect can be obtained even in a CVD apparatus using (ECR).

[0053]

As described above, according to the present invention, the unevenness is large.
Even when a non-single-crystal semiconductor thin film is used as the active layer, a thin film transistor with small leakage current and excellent element characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view of a thin film transistor according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a leakage current with respect to an applied voltage of the thin film transistor according to the first embodiment of the present invention and a comparative example.

FIG. 3 is a diagram illustrating a method of measuring a leak current.

FIG. 4 is a diagram illustrating the leakage current of each of the thin film transistor according to the first embodiment of the present invention and the comparative example 1 and 100 each.

FIG. 5 is a diagram showing the leakage currents of 100 thin film transistors according to the second embodiment of the present invention and 100 leakage currents of each of Comparative Example 2.

FIG. 6 is a diagram showing the leakage current when the size of the unevenness on the surface of the active layer is changed for each of the thin film transistor according to the third embodiment of the present invention and Comparative Example 3.

FIG. 7 is a cross-sectional view of a thin film transistor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 ... Substrate 102,702 ... Active layer 103,703 ... Gate insulating film 104,704 ... Gate electrode 105,705 ... Source / drain electrode 106,706 ... Contact region 107,707 ... Interlayer insulating film 701 ... Translucent insulating substrate

Continued on the front page F term (reference) PP38 QQ11

Claims (4)

[Claims] An active layer made of a semiconductor thin film and having an unevenness of 10 nm or more on its surface; a gate insulating film made of a silicon nitride film containing fluorine formed on the surface of the active layer; A gate electrode to be formed;
A thin film transistor comprising: a source / drain electrode electrically connected to the active layer. 2. The thin film transistor according to claim 1, wherein said semiconductor thin film is non-single-crystal. 3. A step of forming a non-single-crystal semiconductor thin film having irregularities of 10 nm or more on a substrate, and using a mixed gas containing ammonia gas and fluorosilane gas on the non-single-crystal semiconductor thin film at 600 ° C. or lower. Plasma CV at temperature
Forming a gate insulating film by performing method D, forming a gate electrode on the non-single-crystal semiconductor thin film via the gate insulating film, and forming a source electrically connected to the non-single-crystal semiconductor thin film A method of manufacturing a thin film transistor, comprising: forming a drain electrode. 4. The method according to claim 3, wherein a silane tetrafluoride gas is used as the fluorosilane gas when performing the plasma CVD method.