JP2002363754A - Thin film manufacturing apparatus, and manufacturing method thereof - Google Patents
Thin film manufacturing apparatus, and manufacturing method thereofInfo
- Publication number
- JP2002363754A JP2002363754A JP2001171966A JP2001171966A JP2002363754A JP 2002363754 A JP2002363754 A JP 2002363754A JP 2001171966 A JP2001171966 A JP 2001171966A JP 2001171966 A JP2001171966 A JP 2001171966A JP 2002363754 A JP2002363754 A JP 2002363754A
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- JP
- Japan
- Prior art keywords
- thin film
- vacuum chamber
- cvd
- manufacturing
- chemical vapor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の属する技術分野】本発明は、プラズマ化学気相
堆積方法（Ｐ−ＣＶＤ方法）による、液晶表示装置の表
示パネルを構成するアクティブ素子等の半導体素子に用
いる半導体薄膜および絶縁薄膜などの薄膜製造装置およ
び製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film such as a semiconductor thin film and an insulating thin film used for a semiconductor element such as an active element constituting a display panel of a liquid crystal display by a plasma chemical vapor deposition method (P-CVD method). The present invention relates to a manufacturing apparatus and a manufacturing method.
【従来の技術】半導体製造プロセスにおける成膜工程に
おいて、基板表面に半導体膜を成膜する際、従来プラズ
マを利用するプラズマ化学気相堆積方法（Ｐ−ＣＶＤ方
法）が使用されている。その中でも、とりわけ真空槽内
の上下に電極を対向配置したいわゆる平行平板型のＰ-
ＣＶＤ装置は、比較的大口径の処理に適していることか
ら多用されている。上記Ｐ-ＣＶＤ装置では、半導体膜
などの薄膜を基板表面上に成膜する際、基板以外の真空
槽内に成膜される薄膜を取り除くため、フッ素原子を含
んだガスを真空槽内に封入しながらプラズマ放電を起こ
すことによって、前記真空槽内に成膜された薄膜を、フ
ッ素とＳｉの反応によって気化し排気する処理を行って
いる。従って、大気圧に解放することなく真空槽内の清
掃ができるので、単位時間あたりの処理量が増加し、ま
た、真空槽の基板以外に成膜された薄膜を剥離して真空
槽内のパーティクル数を低減することが可能な構造とな
っている。2. Description of the Related Art In a film forming step in a semiconductor manufacturing process, when a semiconductor film is formed on a substrate surface, a plasma chemical vapor deposition method (P-CVD method) using plasma has conventionally been used. Among them, a so-called parallel plate type P-type electrode in which electrodes are arranged oppositely above and below the vacuum chamber.
A CVD apparatus is widely used because it is suitable for processing a relatively large diameter. In the above P-CVD system, when a thin film such as a semiconductor film is formed on a substrate surface, a gas containing fluorine atoms is sealed in the vacuum chamber to remove the thin film formed in the vacuum chamber other than the substrate. In this process, a plasma discharge is generated while the thin film formed in the vacuum chamber is vaporized and exhausted by a reaction between fluorine and Si. Therefore, since the inside of the vacuum chamber can be cleaned without releasing to the atmospheric pressure, the processing amount per unit time increases, and the thin film formed on the substrate other than the substrate in the vacuum chamber is peeled off to remove particles in the vacuum chamber. The structure is such that the number can be reduced.
【発明が解決しようとする課題】しかしながら、従来法
では、ＲＦ放電等によって真空槽内に配置された部材表
面の表面粗さが大きくなるため、フッ素の吸着面積を増
加させることとなり、その結果、真空槽内における弗素
残留量が多くなる問題があった。従って、フッ素原子を
含んだガスを用いて真空槽内のクリーニングを行うこと
により、真空槽内の内壁に堆積した薄膜と反応しなかっ
たフッ素原子や、クリーニング後のガス排気ステップで
排気できずに真空槽内に滞留したフッ素原子が、基板上
に成膜した半導体膜などの薄膜内に取り込まれることと
なり、このような半導体膜を用いた薄膜トランジスタ
（ＴＦＴ）を、液晶表示装置などに用いた場合、ＴＦＴ
のＯＦＦ電流が、フッ素原子を取り込んでいない半導体
膜を用いたＴＦＴに比べ、上昇する。そして、このＯＦ
Ｆ電流の上昇により、液晶表示装置の画像の焼き付き現
象など、画像品質の異常を起こすことが問題となってい
る。さらに、前記の様なフッ素原子を取り込んだ半導体
膜を用いたＴＦＴでは、直流電圧の印加によって、Ｖｔ
の経時的な変化量が大きくなり、そのため部分的な変化
量の違いにより、液晶パネルの表示ムラなどの表示異常
を起こすことも問題となっている。そこで、本発明は、
前記従来の問題を解決するため、プラズマ化学気相堆積
（ＣＶＤ）方法を用いた薄膜製造において、フッ素原子
の半導体膜中への取り込みを低減することが可能な、半
導体薄膜および絶縁薄膜を形成する薄膜製造装置および
それを用いた薄膜製造方法を提供することを目的とす
る。However, in the conventional method, since the surface roughness of the surface of the member arranged in the vacuum chamber is increased by RF discharge or the like, the fluorine adsorption area is increased, and as a result, There is a problem that the amount of fluorine remaining in the vacuum chamber increases. Therefore, by cleaning the inside of the vacuum chamber using a gas containing fluorine atoms, fluorine atoms that did not react with the thin film deposited on the inner wall in the vacuum chamber and the gas exhaust step after cleaning could not be exhausted. Fluorine atoms staying in a vacuum chamber are taken into a thin film such as a semiconductor film formed on a substrate, and a thin film transistor (TFT) using such a semiconductor film is used in a liquid crystal display device or the like. , TFT
OFF current increases as compared with a TFT using a semiconductor film that does not incorporate fluorine atoms. And this OF
There is a problem that an increase in the F current causes an abnormal image quality such as a burn-in phenomenon of an image of the liquid crystal display device. Further, in a TFT using a semiconductor film containing fluorine atoms as described above, Vt is applied by applying a DC voltage.
Of the liquid crystal panel, which causes a display abnormality such as display unevenness of the liquid crystal panel. Therefore, the present invention
In order to solve the above-mentioned conventional problems, a semiconductor thin film and an insulating thin film capable of reducing the incorporation of fluorine atoms into a semiconductor film in the thin film manufacturing using a plasma enhanced chemical vapor deposition (CVD) method. An object of the present invention is to provide a thin film manufacturing apparatus and a thin film manufacturing method using the same.
【課題を解決するための手段】前記目的を達成するた
め、本発明のプラズマ化学気相堆積（ＣＶＤ）装置は、
真空槽内の部材の表面粗さ（Ｒa）が５．０μｍ以下で
あることを特徴とする。本発明の装置においては、前記
部材が、真空槽内壁およびプロセスガス拡散板であるこ
とが好ましい。次に、本発明の薄膜製造方法は、プラズ
マ化学気相堆積（ＣＶＤ）装置の真空槽内に堆積した珪
素を主成分とする膜を除去するためのフッ素原子含有ガ
スによるガスクリーニング工程と、プラズマ化学気相堆
積（ＣＶＤ）方法により基板上に珪素を主成分とする半
導体薄膜及び絶縁薄膜を形成する工程とを含む薄膜製造
方法であって、前記真空槽内の部材の表面粗さ（Ｒa）
が５．０μｍ以下であることを特徴とする。本発明の製
造方法においては、前記部材が、真空槽内壁およびプロ
セスガス拡散板であることが好ましい。上記構成によ
り、真空槽内におけるフッ素残留量を低減し、ＴＦＴ特
性の劣化を防ぐことができる。In order to achieve the above object, a plasma enhanced chemical vapor deposition (CVD) apparatus according to the present invention is provided.
The surface roughness (Ra) of the member in the vacuum chamber is not more than 5.0 μm. In the apparatus of the present invention, it is preferable that the members are an inner wall of a vacuum chamber and a process gas diffusion plate. Next, a thin film manufacturing method of the present invention includes a gas cleaning step using a fluorine atom-containing gas for removing a silicon-based film deposited in a vacuum chamber of a plasma chemical vapor deposition (CVD) apparatus; Forming a semiconductor thin film containing silicon as a main component and an insulating thin film on a substrate by a chemical vapor deposition (CVD) method, wherein the surface roughness (Ra) of the member in the vacuum chamber is increased.
Is 5.0 μm or less. In the manufacturing method of the present invention, it is preferable that the member is an inner wall of a vacuum chamber and a process gas diffusion plate. With the above configuration, the amount of residual fluorine in the vacuum chamber can be reduced, and deterioration of TFT characteristics can be prevented.
【発明の実施の形態】本発明のＰ−ＣＶＤ装置において
は、薄膜処理を行う真空槽の内壁、ガス拡散板（シャワ
ープレート）、上部電極および下部電極の表面粗さ（Ｒ
ａ）が５．０μｍ以下である。少なくとも、真空槽の内
壁とガス拡散板（シャワープレート）の表面粗さ（Ｒ
ａ）が５．０μｍ以下であることが好ましい。以下、本
発明の実施の一形態を図を用いて説明する。図３は、本
発明のＰ−ＣＶＤ装置の一例である、一般的なＰ−ＣＶ
Ｄ装置の真空槽の断面構造を示す図である。通常、基板
加熱用のヒーター６を用いて、下部電極４上に載せた基
板３を加熱しながら、プロセスガス拡散板５により拡散
されたガスを真空槽２に充填し、ガス排気口図８に取り
付けられたバルブにより、前記真空槽内を一定の圧力に
調整し、上部電極５と前記下部電極の間で、ＲＦ電源１
より供給された高周波電力により発生したプラズマに
て、前記充填ガスを分解しながら前記基板上に薄膜の成
膜を行う。次に、図１を用いて、本発明の薄膜製造方法
における成膜のプロセスフローの一例を説明する。工程
１１は、真空槽の内壁に付着した膜を除去するガスクリ
ーニング工程である。この工程では、ＮＦ3等のフッ素
原子を含んだガスを真空槽に充填し、１３．５６ＭＨｚ
の高周波を印加することにより、前記ガスを活性化さ
せ、活性化したガスと真空槽の内壁に付着したシリコン
膜とを化学反応させて気化し、これを排気・除去するこ
とを目的としている。工程１２は、真空槽内を窒素ガス
に置換するための排気工程である。この工程では、前記
プラズマガスクリーニング工程で残留したフッ素を含ん
だガス、及び反応槽内壁に付着した膜と反応して出来た
フッ化物ガスを排気することにより、次工程への影響を
軽減することを目的とする。工程１３は、真空槽内に基
板を搬入する直前に、ガスを封入しながら所定の真空度
に保ち、プラズマ放電を行うことによって、真空槽内に
成膜を行う処理室保護膜成膜工程である。前記ガスは、
特に限定はないが、例えばＳｉＨ4、ＮＨ3、Ｎ2、Ｈ2ガ
ス等が挙げられる。工程１４は、薄膜を形成するガラス
基板等を搬入する基板搬入工程である。工程１４は、前
記工程１３と同様の処理を行うが、工程１３の処理を少
なくとも２回以上繰り返す返すことを示している。工程
１５は、所望の膜を基板上に成膜する工程である。本工
程では、前記工程１３、１４のおいて成膜したアモルフ
ァスシリコン膜に比べて、ＳｉＨ4濃度が低いアモルフ
ァスシリコン膜を形成する。工程１６は、基板を下部電
極から持ち上げ、真空槽内から外部へ搬出する工程であ
る。なお、本発明のＰ−ＣＶＤ装置および製造方法にお
いては、原料ガス、クリーニングガスの種類や供給条
件、プラズマ放電条件等は、特に制限されず、従来公知
のものや方法を適宜使用することができる。DESCRIPTION OF THE PREFERRED EMBODIMENTS In a P-CVD apparatus of the present invention, the surface roughness (R) of the inner wall of a vacuum chamber for performing thin film processing, a gas diffusion plate (shower plate), an upper electrode and a lower electrode.
a) is 5.0 μm or less. At least the surface roughness (R) of the inner wall of the vacuum chamber and the gas diffusion plate (shower plate)
a) is preferably 5.0 μm or less. Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 3 shows a general P-CV which is an example of the P-CVD apparatus of the present invention.
It is a figure which shows the cross-section of the vacuum tank of D apparatus. Normally, the gas diffused by the process gas diffusion plate 5 is charged into the vacuum chamber 2 while heating the substrate 3 placed on the lower electrode 4 by using the heater 6 for heating the substrate, and the gas exhaust port shown in FIG. The inside of the vacuum chamber is adjusted to a constant pressure by an attached valve, and an RF power source 1 is connected between the upper electrode 5 and the lower electrode.
A thin film is formed on the substrate while decomposing the filling gas with plasma generated by the supplied high frequency power. Next, an example of a film forming process flow in the thin film manufacturing method of the present invention will be described with reference to FIG. Step 11 is a gas cleaning step of removing a film adhered to the inner wall of the vacuum chamber. In this step, a gas containing a fluorine atom such as NF 3 is filled in a vacuum chamber, and the gas is filled at 13.56 MHz.
By applying the high frequency, the gas is activated, and the activated gas and the silicon film adhering to the inner wall of the vacuum chamber are chemically reacted and vaporized, and the gas is exhausted and removed. Step 12 is an evacuation step for replacing the inside of the vacuum chamber with nitrogen gas. In this step, the influence on the next step is reduced by exhausting the gas containing fluorine remaining in the plasma gas cleaning step and the fluoride gas formed by reacting with the film attached to the inner wall of the reaction tank. With the goal. Step 13 is a processing chamber protective film forming step of forming a film in the vacuum chamber by performing plasma discharge while maintaining a predetermined degree of vacuum while sealing a gas immediately before loading the substrate into the vacuum chamber. is there. The gas is
Although there is no particular limitation, for example, SiH 4 , NH 3 , N 2 , H 2 gas and the like can be mentioned. Step 14 is a substrate loading step of loading a glass substrate or the like on which a thin film is to be formed. Step 14 indicates that the same processing as in step 13 is performed, but the processing of step 13 is repeated at least twice. Step 15 is a step of forming a desired film on the substrate. In this step, an amorphous silicon film having a lower SiH 4 concentration than the amorphous silicon film formed in steps 13 and 14 is formed. Step 16 is a step of lifting the substrate from the lower electrode and carrying it out of the vacuum chamber. In the P-CVD apparatus and the manufacturing method of the present invention, the types and supply conditions of the source gas and the cleaning gas, the plasma discharge conditions, and the like are not particularly limited, and conventionally known devices and methods can be appropriately used. .
【実施例】次に、実施例により本発明を具体的に説明す
る。 （実施例）真空槽の内壁及びガス拡散板（シャワープレ
ート）の表面粗さ（Ｒa）を、１．８μｍから９．０μ
ｍまで変化させたＰ−ＣＶＤ装置を用いて、上記実施の
形態に示すプロセスフローに従って半導体薄膜および絶
縁薄膜を形成し、形成された薄膜のフッ素残留量を測定
した。その結果を図２に示す。図２の結果から明らかな
ように、表面粗さが増加するに伴い、フッ素残留量が増
加するが、表面粗さが５μｍを越えるところに、変曲点
が存在することがわかる。従って、フッ素残留量を低減
するためには、表面粗さを５μｍ以下にする必要があ
る。従来の真空槽内では、表面粗さが８〜９μｍ程度と
大きいために、吸着表面積の増加に伴い、ガスクリーニ
ング後のガス排気工程において、排気できずに真空槽内
に滞留したフッ素原子が、基板上に成膜した半導体膜な
どの薄膜内に取り込まれる割合が増加してしまうが、表
面粗さを５．０μｍ以下に制限することにより、フッ素
残留量を一定量以下に抑え、ＴＦＴ特性に影響の無いレ
ベルまで下げることができる。Next, the present invention will be described specifically with reference to examples. (Example) The surface roughness (Ra) of the inner wall of the vacuum chamber and the gas diffusion plate (shower plate) was changed from 1.8 μm to 9.0 μm.
The semiconductor thin film and the insulating thin film were formed in accordance with the process flow described in the above embodiment using a P-CVD apparatus changed to m, and the amount of fluorine remaining in the formed thin film was measured. The result is shown in FIG. As is clear from the results of FIG. 2, the residual amount of fluorine increases as the surface roughness increases, but it is found that an inflection point exists where the surface roughness exceeds 5 μm. Therefore, in order to reduce the residual amount of fluorine, the surface roughness needs to be 5 μm or less. In a conventional vacuum chamber, since the surface roughness is as large as about 8 to 9 μm, with the increase in the adsorption surface area, in the gas exhaust step after gas cleaning, fluorine atoms that could not be exhausted and stayed in the vacuum chamber, The rate of incorporation into a thin film such as a semiconductor film formed on a substrate increases, but by limiting the surface roughness to 5.0 μm or less, the amount of residual fluorine is suppressed to a certain amount or less, and TFT characteristics are improved. It can be reduced to a level that has no effect.
【発明の効果】以上説明した通り、本発明によれば、半
導体薄膜及び絶縁薄膜の製造装置の真空槽内部の部材表
面粗さ（Ｒa）を５．０μｍ以下にすることにより、Ｐ
−ＣＶＤ装置の真空槽内に残留するフッ素ガスの影響を
取り除くことができ、液晶表示装置の画像の焼き付き現
象などの画像品質異常が発生しない画像性能に優れた液
晶表示装置を提供できる。よって、その工業的価値は大
である。As described above, according to the present invention, the member surface roughness (Ra) in the vacuum chamber of the apparatus for producing semiconductor thin films and insulating thin films is reduced to 5.0 μm or less, whereby P
-It is possible to eliminate the influence of the fluorine gas remaining in the vacuum chamber of the CVD apparatus, and to provide a liquid crystal display device excellent in image performance without image quality abnormality such as image sticking phenomenon of the liquid crystal display device. Therefore, its industrial value is great.
【図１】本発明の実施の一形態である半導体薄膜及び絶
縁薄膜の製造プロセスを示すフロー図である。FIG. 1 is a flowchart showing a manufacturing process of a semiconductor thin film and an insulating thin film according to an embodiment of the present invention.
【図２】表面粗さとフッ素残留量の関係を示す図であ
る。FIG. 2 is a diagram showing a relationship between surface roughness and residual amount of fluorine.
【図３】半導体薄膜及び絶縁薄膜を成膜するプラズマＣ
ＶＤ装置の概略図である。FIG. 3 shows a plasma C for forming a semiconductor thin film and an insulating thin film.
It is a schematic diagram of a VD device.
１ ＲＦ電源 ２ 真空槽 ３ 基板 ４ 下部電極 ５ 上部電極及びプロセスガス拡散板 ６ 基板加熱ヒーター ７ 接地 ８ ガス排気口 DESCRIPTION OF SYMBOLS 1 RF power supply 2 Vacuum tank 3 Substrate 4 Lower electrode 5 Upper electrode and process gas diffusion plate 6 Substrate heater 7 Grounding 8 Gas exhaust port
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 4K030 AA06 AA13 AA17 AA18 BA29 BA30 CA04 CA12 DA06 FA03 KA09 KA12 LA18 5F045 AA08 AB04 AC01 AC12 AC15 CA15 DP02 EB06 EC05 EF14 EH14 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4K030 AA06 AA13 AA17 AA18 BA29 BA30 CA04 CA12 DA06 FA03 KA09 KA12 LA18 5F045 AA08 AB04 AC01 AC12 AC15 CA15 DP02 EB06 EC05 EF14 EH14
Claims (4)
５．０μｍ以下であることを特徴とするプラズマ化学気
相堆積（ＣＶＤ）装置。1. A plasma enhanced chemical vapor deposition (CVD) apparatus wherein the surface roughness (Ra) of a member in a vacuum chamber is not more than 5.0 μm.
ガス拡散板である請求項１に記載のプラズマ化学気相堆
積（ＣＶＤ）装置。2. The plasma chemical vapor deposition (CVD) apparatus according to claim 1, wherein said members are an inner wall of a vacuum chamber and a process gas diffusion plate.
真空槽内に堆積した珪素を主成分とする膜を除去するた
めのフッ素原子含有ガスによるガスクリーニング工程
と、プラズマ化学気相堆積（ＣＶＤ）方法により基板上
に珪素を主成分とする半導体薄膜及び絶縁薄膜を形成す
る工程とを含む薄膜製造方法であって、前記真空槽内の
部材の表面粗さ（Ｒa）が５．０μｍ以下であることを
特徴とする薄膜製造方法。3. A gas cleaning step using a fluorine atom-containing gas for removing a silicon-based film deposited in a vacuum chamber of a plasma enhanced chemical vapor deposition (CVD) apparatus, and a plasma enhanced chemical vapor deposition (CVD). Forming a semiconductor thin film containing silicon as a main component and an insulating thin film on a substrate by a method, wherein the member in the vacuum chamber has a surface roughness (Ra) of 5.0 μm or less. A method for producing a thin film, comprising:
ガス拡散板である請求項３に記載の薄膜製造方法。4. The thin film manufacturing method according to claim 3, wherein the members are an inner wall of a vacuum chamber and a process gas diffusion plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001171966A JP2002363754A (en) | 2001-06-07 | 2001-06-07 | Thin film manufacturing apparatus, and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001171966A JP2002363754A (en) | 2001-06-07 | 2001-06-07 | Thin film manufacturing apparatus, and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| JP2002363754A true JP2002363754A (en) | 2002-12-18 |
Family
ID=19013656
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005197275A (en) * | 2003-12-26 | 2005-07-21 | Trecenti Technologies Inc | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device |
| JP2017053400A (en) * | 2015-09-08 | 2017-03-16 | 日新製鋼株式会社 | Manufacturing method and manufacturing device of vacuum heat insulation panel, and vacuum heat insulation panel |
| JP2018035923A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for automobile |
| WO2018043712A1 (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum insulation panel |
| JP2018035922A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for structure |
| JP2018035924A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for electrical equipment |
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2001
- 2001-06-07 JP JP2001171966A patent/JP2002363754A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005197275A (en) * | 2003-12-26 | 2005-07-21 | Trecenti Technologies Inc | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device |
| JP2017053400A (en) * | 2015-09-08 | 2017-03-16 | 日新製鋼株式会社 | Manufacturing method and manufacturing device of vacuum heat insulation panel, and vacuum heat insulation panel |
| JP2018035923A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for automobile |
| WO2018043712A1 (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum insulation panel |
| JP2018035922A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for structure |
| JP2018035924A (en) * | 2016-09-02 | 2018-03-08 | 日新製鋼株式会社 | Vacuum heat insulation panel for electrical equipment |
| CN109844392A (en) * | 2016-09-02 | 2019-06-04 | 日新制钢株式会社 | Vacuum heat-insulating plate |
| CN109844392B (en) * | 2016-09-02 | 2021-05-28 | 日新制钢株式会社 | Vacuum heat insulation plate |
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