JPS63215037A - Manufacture of silicon thin film - Google Patents
Manufacture of silicon thin filmInfo
- Publication number
- JPS63215037A JPS63215037A JP4782787A JP4782787A JPS63215037A JP S63215037 A JPS63215037 A JP S63215037A JP 4782787 A JP4782787 A JP 4782787A JP 4782787 A JP4782787 A JP 4782787A JP S63215037 A JPS63215037 A JP S63215037A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- silicon
- reaction chamber
- film
- based thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 31
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 31
- 239000010703 silicon Substances 0.000 title claims abstract description 31
- 239000010409 thin film Substances 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 238000006243 chemical reaction Methods 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 27
- 238000009832 plasma treatment Methods 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 14
- 239000001257 hydrogen Substances 0.000 claims abstract description 14
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 8
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims abstract description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 239000010408 film Substances 0.000 abstract description 30
- 239000007789 gas Substances 0.000 abstract description 22
- 238000005530 etching Methods 0.000 abstract description 5
- 230000000694 effects Effects 0.000 abstract description 2
- 229910052731 fluorine Inorganic materials 0.000 description 11
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 9
- 239000011737 fluorine Substances 0.000 description 9
- 238000004140 cleaning Methods 0.000 description 8
- 238000011109 contamination Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000000047 product Substances 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052717 sulfur Inorganic materials 0.000 description 2
- 239000011593 sulfur Substances 0.000 description 2
- YZCKVEUIGOORGS-OUBTZVSYSA-N Deuterium Chemical compound [2H] YZCKVEUIGOORGS-OUBTZVSYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- GVGCUCJTUSOZKP-UHFFFAOYSA-N nitrogen trifluoride Chemical compound FN(F)F GVGCUCJTUSOZKP-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
この発明は、例えば薄膜トランジスタ（以下、ＴＰＴと
称す）として用いられるケイ素系薄膜の製造方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a silicon-based thin film used, for example, as a thin film transistor (hereinafter referred to as TPT).
（従来の技術）
最近、グロー放電分解法（Ｇｌｏｗ Ｄｉｓｃｈａｒｇ
ｅ Ｄｅｃｏｍｐｏｓｉｔｔｏｎ、以下、ＧＤ法と称す
）により形成されたケイ素系薄膜が注目を集めているが
、これは低温で形成でき且つ良質な特性のものが得られ
、しかも従来のシリコンプロセスに適応できるからでお
る。このような性質を有することにより、ＣＤ法による
ケイ素系薄膜は、例えば特公昭６１−４９６７４号公報
に記載されているようにＴＰＴ等に応用されている。(Prior Art) Recently, glow discharge decomposition method (Glow Discharg
Silicon-based thin films formed by e-Decompositon (hereinafter referred to as GD method) are attracting attention because they can be formed at low temperatures, have good properties, and can be adapted to conventional silicon processes. I'll go. Due to these properties, silicon-based thin films produced by the CD method are applied to TPT, etc., as described in, for example, Japanese Patent Publication No. 49674/1983.
第４図はＧＤ法により薄膜を形成する装置の一例を示す
図である６同図において、反応室（１〉内の上部電極（
２）に基板固定治具（３〉を用いて、基板（４）を固定
した侵、バルブ（５）を開は反応室（１）内の圧力が５
． Ｏｘ １０−’ Ｔｏｒｒ以下になるまで真空排気
する。上部電極（２）にはヒーター線（６）が埋め込ん
でなり、基板（４）が適当な温度に設定できるようにな
っている。次にバルブ（５）を閉じ、バルブ（７）を開
けた状態で設定し、所望のガスバルブ（１１）〜（１５
）、 （１ｓ）〜（２０）及びバルブ（２６）を開け
、マスフローコントローラー（２１）〜（２５）で流量
を調節して所望のガスを反応室（１）内に導入する。こ
こで反応室（１）内の圧力は、原料ガスを導入した状態
で自動圧力調整器（８）によって所望の圧力に設定する
。そしてこの状態で、上部電極（２）と下部電極（９）
の間にマツチングボックス（１０）を通して、ＤＣ或い
はＡＣＩｉ源により電圧を印加して、原料ガスをグロー
放電分解し基板（４）上に膜を堆積させる。このように
して膜を堆積した場合、基板（４）上のみならず上部電
極（２）、下部電極（９）及び反応室（１）内壁の至る
ところに膜堆積が起こる。基板（４）上以外の部分に堆
積した膜は、膜厚が数脚以主になると膜はがれを起こし
、基板（４）上に堆積される膜中に取り込まれたり、基
板（４）表面に付着しこの基板（４）を構成要素とする
デバイスの欠陥となりデバイス特性を悪化する。また、
はがれ落ちた膜はバルブ笠に付着し、装置の真空度（異
常を引き起こす原因となる。そこで不必要な部分に堆積
された膜の除去を行わなければならない。Figure 4 is a diagram showing an example of an apparatus for forming a thin film by the GD method. 6 In the figure, the upper electrode (
In step 2), use the substrate fixing jig (3) to fix the substrate (4), and open the valve (5) until the pressure inside the reaction chamber (1) reaches 5.
．． Evacuate until the pressure becomes less than Ox 10-' Torr. A heater wire (6) is embedded in the upper electrode (2) so that the substrate (4) can be set at an appropriate temperature. Next, close the valve (5) and open the valve (7) to set the desired gas valves (11) to (15).
), (1s) to (20) and the valve (26) are opened, and the desired gas is introduced into the reaction chamber (1) by adjusting the flow rate with the mass flow controllers (21) to (25). Here, the pressure in the reaction chamber (1) is set to a desired pressure by an automatic pressure regulator (8) while the raw material gas is introduced. In this state, the upper electrode (2) and the lower electrode (9)
During this time, voltage is applied by a DC or ACIi source through the matching box (10) to decompose the raw material gas by glow discharge and deposit a film on the substrate (4). When a film is deposited in this manner, the film is deposited not only on the substrate (4) but also all over the upper electrode (2), the lower electrode (9), and the inner wall of the reaction chamber (1). The film deposited on areas other than the substrate (4) may peel off when the film thickness becomes more than a few feet thick, and may be incorporated into the film deposited on the substrate (4) or may be deposited on the surface of the substrate (4). This adhesion causes defects in devices including this substrate (4) as a component, deteriorating device characteristics. Also,
The peeled-off film adheres to the valve cap, causing abnormalities in the vacuum level of the equipment. Therefore, the film deposited on unnecessary areas must be removed.
（発明が解決しようとする問題点）
ところで、現在試みられている膜除去法には、次のよう
な２つの方法がある。その１つは、サンドペーパー等に
よりごみ発生源となる不必要な部分の膜を機械的研磨に
よりとりざる方法で市る。(Problems to be Solved by the Invention) By the way, there are the following two methods of film removal currently being attempted. One method is to mechanically polish unnecessary portions of the film that are a source of dust using sandpaper or the like.
この方法によれば、不必要な部分の膜をすべて取り除く
ことができず、狭い部分はクリーニングできないままに
なってしまう。またクリーニングに非常に時間がかかり
、装置の稼動率が低下してしまうという欠点を有してい
る。更に膜特性面からみた場合、最近インライン方式の
ＧＯ装置が注目されているにもかかわらず、クリーニン
グのために反応室を大気にさらさなければならず、イン
ライン方式の効果が薄れる。According to this method, it is not possible to remove all the film from unnecessary portions, and narrow portions remain uncleaned. Another disadvantage is that cleaning takes a very long time and reduces the operating rate of the device. Furthermore, from the viewpoint of film properties, although in-line type GO devices have recently been attracting attention, the reaction chamber must be exposed to the atmosphere for cleaning, which reduces the effectiveness of the in-line type.
もう１つの方法は、フッ素系ガスによるプラズマクリー
ニングである。この方法の例としては、ＣＦ、ガス等の
炭化フッ素系ガスやＳＦｅガス、また最近ではＮＦｓガ
スを使用する場合等が検討されている。これらのいずれ
のガスを使用した場合にも、反応室内がクリーニングさ
れることは既に確認されている。Another method is plasma cleaning using fluorine gas. Examples of this method include the use of fluorine carbide gas such as CF and gas, SFe gas, and recently, the use of NFs gas. It has already been confirmed that the inside of the reaction chamber is cleaned when any of these gases are used.
しかしながら、この方法は次のような問題点を有してい
る。即ち、炭化フッ素系ガスを使用した場合には、炭素
やフッ素による汚染があり、ＳＦ６ガスを使用した場合
には、硫黄やフッ素による汚染がある。このような炭素
や硫黄による汚染がなく、反応室内をクリーニングする
ガスとして前述のＮＦａガスが注目を集め、盛んに検討
されているが、これにしてもフッ素よる汚染は免がれ得
ない。However, this method has the following problems. That is, when a fluorine carbide gas is used, there is contamination with carbon and fluorine, and when SF6 gas is used, there is contamination with sulfur and fluorine. The aforementioned NFa gas is attracting attention and being actively studied as a gas for cleaning the inside of the reaction chamber without such carbon and sulfur contamination, but even with this, fluorine contamination cannot be avoided.
この発明は、ケイ素系薄膜を形成する際に発生する不具
合を解決するためになされたもので、ケイ素系薄膜の特
性を確保した上で、この薄膜を効率よく形成する製造方
法を提供することを目的としている。This invention was made in order to solve the problems that occur when forming silicon-based thin films, and aims to provide a manufacturing method for efficiently forming silicon-based thin films while ensuring the characteristics of the silicon-based thin films. The purpose is
［発明の構成コ
（問題点を解決するための手段）
この発明は、ＮＦａガスを用いたプラズマクリーニング
により反応室内クリーニングを行い、続いて水素ガスの
プラズマ処理を施した後、ケイ素系ガスを使用し例えば
ＧＤ法でケイ素系薄膜例えば水素化非晶質シリコン（以
下、ａ−３ｉ：Ｈと称す）を形成する。[Structure of the Invention (Means for Solving Problems)] This invention cleans the reaction chamber by plasma cleaning using NFa gas, then performs hydrogen gas plasma treatment, and then uses silicon-based gas. For example, a silicon-based thin film such as hydrogenated amorphous silicon (hereinafter referred to as a-3i:H) is formed by the GD method.
（作 用）
この発明は基本的には、■ＮＦ３ガスによるプラズマク
リーニング、■Ｈ２プラズマ処理、■ケイ素系薄膜成膜
という手順をたどる。まず■の処理により、活性なＦラ
ジカルが生成され、このＦラジカルが反応室内部に付着
している不要なケイ素系薄膜をエツチングする。モして
■の処理の後、反応室内部にエツチング過程での生成物
であるＨＦ、Ｆ等が付着するが、■の処理で生成される
水素ラジカルにより、このエツチング生成物を取り除く
ことができる。この結果、■の過程で成膜効率が向上す
るとともに、特性良好なケイ素系薄膜を形成することが
できる。(Function) This invention basically follows the steps of: (1) plasma cleaning with NF3 gas, (2) H2 plasma treatment, and (2) silicon-based thin film formation. First, by the process (2), active F radicals are generated, and these F radicals etch the unnecessary silicon-based thin film adhering to the inside of the reaction chamber. After the process (2), HF, F, etc., which are products of the etching process, adhere to the inside of the reaction chamber, but these etching products can be removed by the hydrogen radicals generated in the process (2). . As a result, the film-forming efficiency is improved in the process (2), and a silicon-based thin film with good characteristics can be formed.
（実施例）
以下、この発明の詳細をケイ素系薄膜がａ−３にＨであ
る場合を例に挙げ、図面を参照して説明する。(Example) The details of the present invention will be described below with reference to the drawings, taking as an example the case where the silicon-based thin film has H at a-3.
第１図はこの発明の一実施例の流れを示すフローチャー
ト、第２図はこの実施例に用いる製造装置の概略図であ
る。以後、主に第１図と第２図を用い、この実施例を製
造工程に従って説明する。FIG. 1 is a flowchart showing the flow of an embodiment of the present invention, and FIG. 2 is a schematic diagram of a manufacturing apparatus used in this embodiment. Hereinafter, this embodiment will be explained according to the manufacturing process, mainly using FIGS. 1 and 2.
まず、第２図における反応室（３１）内の上部電極（３
２）に、基板固定治具（３３）を用いて基板（３４）を
固定した後、バルブ（３５）を開は反応ｉ！（３１）内
の圧力が５．ＯＸ ＩＧ＝ ｒｏｒｒ以下になるまで真
空排気する。次にバルブ（３５）を閉じ、バルブ（３γ
）を開けた状態でバルブ（６１） 、 （８２＞ 、
（６３）を開け、マスフローコントローラ（６４）
で流ｆｉ １０１００５ｅに調整して、三フッ化窒素（
ＮＦａ＞ガスを反応室（３１）内に導入する。ここで反
応室（３１）内の圧力は、自動圧力調整器（３８）によ
り０．ＩＴＯｒｒに調圧した。この状態で上部電極（３
２）と下部電極（３９）との間に、マツチングボックス
（４０）を介して１３．５６ ）ｆＨ２の高周波電源を
接続し、高周波パワーｉ ｏｏｗを印加してグロー放電
を起こさせる。このグロー放電によりＮＦ、ガスが分解
され、活性なＦラジカルが生成される。このＦラジカル
は反応室（３１）内壁、上部電極（３２）及び下部電極
（３９）等に付着しているａ−３ｉ：ｌ−（膜をエツチ
ングする。このことにより、反応室（３１）内部はクリ
ーニングされ清浄になる。しかしこの状態では、反応室
（３１）の内壁、上部電極（３２）及び下部電極（３９
）等にエツチング過程での生成物例えばＨＦ、Ｆ等の付
着があり、良好な特性を有するａ−３ｉ：ＨＷＡは得ら
れない。First, the upper electrode (3) in the reaction chamber (31) in FIG.
In step 2), after fixing the substrate (34) using the substrate fixing jig (33), open the valve (35) to open the reaction i! The pressure inside (31) is 5. Evacuate until OX IG=rorr or less. Next, close the valve (35) and close the valve (3γ
) with valves (61), (82>,
(63) and mass flow controller (64).
Adjust the flow to fi 101005e and add nitrogen trifluoride (
NFa> gas is introduced into the reaction chamber (31). Here, the pressure in the reaction chamber (31) is adjusted to 0.0 by an automatic pressure regulator (38). The pressure was adjusted to ITOrr. In this state, the upper electrode (3
2) and the lower electrode (39), a high frequency power source of 13.56 ) fH2 is connected via a matching box (40), and high frequency power i oow is applied to cause glow discharge. This glow discharge decomposes NF and gas to generate active F radicals. These F radicals etch the a-3i:l- (film) attached to the inner wall of the reaction chamber (31), the upper electrode (32), the lower electrode (39), etc. As a result, the inside of the reaction chamber (31) However, in this state, the inner wall of the reaction chamber (31), the upper electrode (32) and the lower electrode (39)
) etc., products such as HF and F adhere to the etching process, making it impossible to obtain a-3i:HWA having good properties.
第３図は形成したａ−８ｉ：Ｈ膜の積算膜厚と電導率と
の関係を示す図でおり、これを用いａ −３ｉ ：Ｈの
フッ素系物質の汚染について説明する。FIG. 3 is a diagram showing the relationship between the cumulative thickness and electrical conductivity of the formed a-8i:H film, and will be used to explain the contamination of the a-3i:H with fluorine-based substances.
同図において参照データは、反応室（３１）内が全く汚
染のない状態でのａ−３ｉ：Ｈの暗電導率（σｄ）と光
電導率
（σｐｈ）を示しており、これに近い値を有するａ−ｓ
ｒ二＋はと特性が良好である。また同図中の（Ａ）点と
（Ａ′）点は、フッ素系ガスによるクリーニングを行っ
た後の暗電導率（σｄ）と光電導率（σｐｈ）を示して
おり、これよりａ−３ｉ：Ｈ膜はフッ素系物質等に汚染
されていることがわかる。In the same figure, the reference data shows the dark conductivity (σd) and photoconductivity (σph) of a-3i:H in a state where there is no contamination in the reaction chamber (31), and values close to these are shown. have a-s
r2+ has good characteristics. In addition, points (A) and (A') in the same figure indicate the dark conductivity (σd) and photoconductivity (σph) after cleaning with fluorine gas, and from this, a-3i : It can be seen that the H film is contaminated with fluorine-based substances.
そこで、これらの生成物の影響を取りのぞくため、水素
プラズマ処理を行なった。この実施例での条件は、Ｈ８
流量１００ＳＣＣＩｌ、反応室（３１）内圧力０．５Ｔ
ｏｒｒ、高周波パワーｉｏｏｗで６０分間の放電を行な
った。水素プラズマ処理においては、エツチング生成物
を取りのぞくことはできたが、活性な水素ラジカルにさ
らされている反応室（３１）の内壁より反応室（３１）
の成分が遊離し、反応室（３１）の内壁に付着している
現象がみられた。Therefore, in order to eliminate the influence of these products, hydrogen plasma treatment was performed. The conditions in this example are H8
Flow rate 100SCCIl, reaction chamber (31) internal pressure 0.5T
orr and high frequency power ioow for 60 minutes. In the hydrogen plasma treatment, etching products could be removed, but the inner wall of the reaction chamber (31), which is exposed to active hydrogen radicals,
A phenomenon was observed in which the components were liberated and adhered to the inner wall of the reaction chamber (31).
次にａ−３ｉ：ＨｌｌＡのコーティングを行う。その条
件は、バルブ（４１） 、 （４２） 、 （４Ｂ
＞ 、 （４７）及びバルブ（５６）を開け、マスフ
ローコントローラー（５１） 、 （５２）で流口調
節をしシラン（ＳｉＨ４） ３０ＳＣＣＩ１１．水素２
７０５ＣＣｍとし、更に自動圧力調整器（３８）により
反応室（３１）内の圧力を０．５ＴＯｒｒとした。ここ
では６０分間グロー放電を行い、膜厚を約３０００人と
した。そしてこの試料の電導度を測定したところ、第３
図の（Ｂ１）点と（８”１）点に示すように、（Ａ＞点
や（Ａ′）点に比べ特性が良好になった。しかしながら
、水素プラズマ処理後、直ちに形成したａ−３ｉ：）−
１はまだ充分に良好な特性を有していない結果、反応室
（３１）の成分が遊離して反応室（３１）内に付着して
おり、これがａ−３ｉ：Ｈ膜成膜時に膜中に取り込まれ
ていることがわかった。このため、第１図に示したフロ
ーチャートにあるように、ａ−３ｉ：日成膜（オーバー
コート）という工程を入れた。Next, a-3i: HllA coating is performed. The conditions are valves (41), (42), (4B
> Open (47) and valve (56), adjust the flow port with mass flow controllers (51) and (52), and add silane (SiH4) 30SCCI11. hydrogen 2
The pressure in the reaction chamber (31) was further adjusted to 0.5 TOrr using an automatic pressure regulator (38). Here, glow discharge was performed for 60 minutes, and the film thickness was approximately 3000. When we measured the electrical conductivity of this sample, we found that the third
As shown at points (B1) and (8"1) in the figure, the characteristics were better than points (A> and (A'). However, the a-3i formed immediately after the hydrogen plasma treatment :)−
1 does not yet have sufficiently good properties, and as a result, components in the reaction chamber (31) are liberated and adhere to the inside of the reaction chamber (31). It was found that it was incorporated into. For this reason, as shown in the flowchart shown in FIG. 1, a step called a-3i: daily deposition film (overcoat) was included.
次に、基板（３４）を新しい清浄なガラスに交換し、バ
ルブ（３５）を開は反応室（３１〉内の圧力が５、Ｏｘ
ｉｏ−’ｒｏｒｒ以下になるまで真空排気を行い、続い
てバルブ（３５）を閉、バルブ（３７）を囲にして排気
系を圧力調整器（３８）の系に切りかえる。Next, the substrate (34) is replaced with a new clean glass, and the valve (35) is opened until the pressure inside the reaction chamber (31) is 5 and Ox
Evacuation is performed until the pressure becomes less than io-'rorr, then the valve (35) is closed, and the exhaust system is switched to the pressure regulator (38) system around the valve (37).
そしてバルブ（４１） 、 （４２） 、 （１Ｂ
＞ 、 （４７）及び（５６）を開にしてマスフロー
コントローラ（５１）、 （５２）を調整し、シラン
３０ＳＣＣＩｌｌ、水素２７０３ＣＣｍを流す。また圧
力調整器（３８）の調整により、反応室（３１）の圧力
０．５Ｔｏｒｒに設定する。そして高周波電源を入れ、
グロー放電分解を６０分間行い、基板（３４）上にａ−
３ｉ：ＨＦ１ｌを堆積した。このａ−３ｉ：Ｈ膜の暗躍
導率（σｄ）と光電導率（σ１）ｈ）を第３図の（Ｂ２
）点と（Ｂ−２＞点に示した。同図から明らかなように
、（Ｂ１）点や（Ｂ＝１）点より暗躍導率と光電導率が
ともに小さくなり、良好なａ−３＋：Ｈ膜が得られてい
ることがわかる。同様の方法で更にａ−３ｉ：Ｈ膜を形
成し、暗躍導率と光電導率の測定結果を示したのが第３
図の（Ｂ３）点と（Ｂ”３）点である。And valves (41), (42), (1B
> Open (47) and (56) and adjust the mass flow controllers (51) and (52) to flow 30 SCCIll of silane and 2703 CCm of hydrogen. Further, the pressure in the reaction chamber (31) is set to 0.5 Torr by adjusting the pressure regulator (38). Then turn on the high frequency power,
Glow discharge decomposition was performed for 60 minutes, and a-
3i: 1 l of HF was deposited. The dark conductivity (σd) and photoconductivity (σ1)h) of this a-3i:H film are shown in (B2) in Figure 3.
) and (B-2> points. As is clear from the figure, both the dark conductivity and the photoconductivity are smaller than the (B1) and (B=1) points, indicating a good a-3+ It can be seen that an a-3i:H film was obtained.The third a-3i:H film was further formed using the same method, and the results of dark conductivity and photoconductivity measurements were shown.
These are point (B3) and point (B''3) in the figure.
これらの値はほぼ（Ｂ２）点や（Ｂｉ）点と同一であり
、同様に良好なａ−３ｉ：）−１膜が得られていること
がわかる。なお、これは同図に示した参照データとほぼ
一致している。 即ち、ＮＦｓＦ２ガスるプラズマクリ
ーニング、水素プラズマ処理及びａ−３ｉ：）（膜オー
バーコート後のａ・−３ｉ：ＨｒｆｔＡは特性の良好な
ものが得られ、適用したデバイスの性能を向上させ、更
にこの実施例を用いａ−３ｉ：Ｈ膜を成膜することで、
成膜の効率向上が計れた。These values are almost the same as those at point (B2) and point (Bi), indicating that a similarly good a-3i:)-1 film was obtained. Note that this almost coincides with the reference data shown in the same figure. Namely, NFsF2 gas plasma cleaning, hydrogen plasma treatment and a-3i:) (a-3i:HrftA after film overcoating) had good characteristics, improved the performance of the device to which it was applied, and By forming an a-3i:H film using the example,
We were able to improve the efficiency of film formation.
なお、今まではａ−３ｉ：Ｈ膜の製造方法としてＧＤ法
を用いたが、スパヅタリング法を用いた場合にも同様で
おることは言うまでもない。またケイ素系薄膜としては
、ａ−３ｉ：）−１以外に非晶ｉ１化シリコン、非晶質
窒化シリコン及び非晶質シリコンゲルマニウム等であっ
てもよい。そして、水素プラズマ処理により反応室（３
１）の内壁に付着した反応生成物を取り除くためには、
第１図における水素プラズマ処理とａ−８ｉ：Ｈのオー
バーコートの間に不活性ガス或いは窒素によるプラズマ
処理を施すという工程を入れると更に有効である。Although the GD method has been used so far as the method for manufacturing the a-3i:H film, it goes without saying that the same applies when the sputtering method is used. In addition to a-3i:)-1, the silicon-based thin film may be amorphous silicon il, amorphous silicon nitride, amorphous silicon germanium, or the like. Then, the reaction chamber (3
In order to remove the reaction products attached to the inner wall of 1),
It is more effective to add a step of plasma treatment using an inert gas or nitrogen between the hydrogen plasma treatment and the a-8i:H overcoat in FIG.
［発明の効果］
この発明は、ＮＦａプラズマ処理と水素プラズマ処理と
を順次施した後、ケイ素系薄膜を形成してなるので、特
性良好なケイ素系薄膜を製造でき、デバイス例えばＴＰ
Ｔをスイッチング素子として用いたアクティブマトリッ
クス型液晶表示装置に適用した場合には、デバイス欠陥
の少ない特性良好なデバイスが効率よく得られる。[Effects of the Invention] This invention forms a silicon-based thin film after sequentially performing NFa plasma treatment and hydrogen plasma treatment, so it is possible to manufacture a silicon-based thin film with good characteristics, and it is possible to manufacture devices such as TP.
When applied to an active matrix liquid crystal display device using T as a switching element, a device with good characteristics and fewer device defects can be efficiently obtained.
第１図はこの発明の一実施例の工程の流れを示す図、第
２図はこの発明に用いる成膜装置の一例を示す図、第３
図は形成したケイ素系薄膜の電導率を示す図、第４図は
従来の成膜装置の一例を示す図である。
（３１）・・・・・・反応室、
（３４）・・・・・・基板。FIG. 1 is a diagram showing the process flow of an embodiment of this invention, FIG. 2 is a diagram showing an example of a film forming apparatus used in this invention, and FIG.
The figure shows the electrical conductivity of the formed silicon-based thin film, and FIG. 4 shows an example of a conventional film forming apparatus. (31)...Reaction chamber, (34)...Substrate.
Claims (5)
ズマ処理を順次施した後、基板上にケイ素系薄膜を形成
することを特徴とするケイ素系薄膜の製造方法。(1) A method for producing a silicon-based thin film, which comprises forming a silicon-based thin film on a substrate after sequentially performing nitrogen trifluoride plasma treatment and hydrogen plasma treatment in a reaction chamber.
形成する前に前記反応室内を前記ケイ素系薄膜でオーバ
ーコートすることを特徴とする特許請求の範囲第１項記
載のケイ素系薄膜の製造方法。(2) Manufacturing the silicon-based thin film according to claim 1, wherein after the hydrogen plasma treatment, the inside of the reaction chamber is overcoated with the silicon-based thin film before forming the silicon-based thin film. Method.
オーバーコートする前に不活性ガス或いは窒素によるプ
ラズマ処理を施すことを特徴とする特許請求の範囲第２
項記載のケイ素系薄膜の製造方法。(3) After the hydrogen plasma treatment, a plasma treatment using an inert gas or nitrogen is performed before overcoating the silicon-based thin film.
A method for producing a silicon-based thin film as described in Section 1.
はスパッタリング法により行うことを特徴とする特許請
求の範囲第１項記載のケイ素系薄膜の製造方法。(4) The method for producing a silicon-based thin film according to claim 1, wherein the silicon-based thin film is formed by a glow discharge decomposition method or a sputtering method.
ことを特徴とする特許請求の範囲第１項記載のケイ素系
薄膜の製造方法。(5) The method for manufacturing a silicon-based thin film according to claim 1, wherein the silicon-based thin film is hydrogenated amorphous silicon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62047827A JP2726414B2 (en) | 1987-03-04 | 1987-03-04 | Method for producing silicon-based thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62047827A JP2726414B2 (en) | 1987-03-04 | 1987-03-04 | Method for producing silicon-based thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63215037A true JPS63215037A (en) | 1988-09-07 |
| JP2726414B2 JP2726414B2 (en) | 1998-03-11 |
Family
ID=12786181
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62047827A Expired - Fee Related JP2726414B2 (en) | 1987-03-04 | 1987-03-04 | Method for producing silicon-based thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2726414B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291044A (en) * | 1993-01-28 | 1994-10-18 | Applied Materials Inc | Piling of amorphous silicon thin film at high piling speed on glass substrate of large area by cvd |
| JPH0831750A (en) * | 1994-07-15 | 1996-02-02 | Toshiba Corp | Coating of reaction chamber of cvd system |
| JP2009071285A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method for manufacturing display device |
| JP2009071291A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device |
| JP2009071286A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method of manufacturing display device |
| JP2009071290A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device |
| US9169553B2 (en) | 2002-11-11 | 2015-10-27 | Hitachi Kokusai Electric Inc. | Semiconductor device producing method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892218A (en) * | 1981-11-28 | 1983-06-01 | Semiconductor Energy Lab Co Ltd | Manufacture of semiconductor device |
| JPS6054428A (en) * | 1983-09-05 | 1985-03-28 | Fujitsu Ltd | Manufacture of thin film |
-
1987
- 1987-03-04 JP JP62047827A patent/JP2726414B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892218A (en) * | 1981-11-28 | 1983-06-01 | Semiconductor Energy Lab Co Ltd | Manufacture of semiconductor device |
| JPS6054428A (en) * | 1983-09-05 | 1985-03-28 | Fujitsu Ltd | Manufacture of thin film |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291044A (en) * | 1993-01-28 | 1994-10-18 | Applied Materials Inc | Piling of amorphous silicon thin film at high piling speed on glass substrate of large area by cvd |
| US6444277B1 (en) | 1993-01-28 | 2002-09-03 | Applied Materials, Inc. | Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates |
| JPH0831750A (en) * | 1994-07-15 | 1996-02-02 | Toshiba Corp | Coating of reaction chamber of cvd system |
| US9169553B2 (en) | 2002-11-11 | 2015-10-27 | Hitachi Kokusai Electric Inc. | Semiconductor device producing method |
| JP2009071285A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method for manufacturing display device |
| JP2009071291A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device |
| JP2009071286A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method of manufacturing display device |
| JP2009071290A (en) * | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device |
| US9054206B2 (en) | 2007-08-17 | 2015-06-09 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| JP2016076715A (en) * | 2007-08-17 | 2016-05-12 | 株式会社半導体エネルギー研究所 | Method of manufacturing display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2726414B2 (en) | 1998-03-11 |
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