JP2001236792A - 固定値メモリのリフレッシュ方法，そのリフレッシュ装置及びデジタル制御装置 - Google Patents

固定値メモリのリフレッシュ方法，そのリフレッシュ装置及びデジタル制御装置

Info

Publication number
JP2001236792A
JP2001236792A JP2000394974A JP2000394974A JP2001236792A JP 2001236792 A JP2001236792 A JP 2001236792A JP 2000394974 A JP2000394974 A JP 2000394974A JP 2000394974 A JP2000394974 A JP 2000394974A JP 2001236792 A JP2001236792 A JP 2001236792A
Authority
JP
Japan
Prior art keywords
memory
memory cell
potential
fixed value
refreshing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000394974A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001236792A5 (enExample
Inventor
Axel Aue
アウエ アクセル
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of JP2001236792A publication Critical patent/JP2001236792A/ja
Publication of JP2001236792A5 publication Critical patent/JP2001236792A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)
JP2000394974A 1999-12-30 2000-12-26 固定値メモリのリフレッシュ方法，そのリフレッシュ装置及びデジタル制御装置 Pending JP2001236792A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19964012.2 1999-12-30
DE19964012A DE19964012A1 (de) 1999-12-30 1999-12-30 Verfahren und Einrichtung zum Refresh des Speicherinhalts einer Speicherzelle eines Festwertspeichers

Publications (2)

Publication Number Publication Date
JP2001236792A true JP2001236792A (ja) 2001-08-31
JP2001236792A5 JP2001236792A5 (enExample) 2008-02-14

Family

ID=7935145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000394974A Pending JP2001236792A (ja) 1999-12-30 2000-12-26 固定値メモリのリフレッシュ方法，そのリフレッシュ装置及びデジタル制御装置

Country Status (4)

Country Link
US (1) US6438056B2 (enExample)
JP (1) JP2001236792A (enExample)
DE (1) DE19964012A1 (enExample)
FR (1) FR2805654B1 (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009032347A (ja) * 2007-07-30 2009-02-12 Mega Chips Corp 不揮発性半導体記憶装置
JP2010027021A (ja) * 2007-09-28 2010-02-04 Denso Corp 電子機器及びプログラム
JP2010055746A (ja) * 2009-12-07 2010-03-11 Toshiba Corp 記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム
JP2011070735A (ja) * 2009-09-28 2011-04-07 Hitachi Ltd 半導体装置、及び、記憶セルの記憶状態の補正方法
JP2012190538A (ja) * 2012-05-25 2012-10-04 Toshiba Corp 記憶装置、記憶媒体再生方法および記憶媒体再生プログラム
JP2022524535A (ja) * 2019-03-12 2022-05-06 ロベルト・ボッシュ・ゲゼルシャフト・ミト・ベシュレンクテル・ハフツング 不揮発性メモリ機構の動作のための方法および装置

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2383455B (en) * 2001-12-21 2004-02-25 Motorola Inc Non-volatile memory and method for operating a non-volatile memory
DE10305008A1 (de) * 2003-02-07 2004-08-19 Robert Bosch Gmbh Verfahren und Vorrichtung zur Überwachung einer elektronischen Steuerung
KR100782807B1 (ko) * 2003-02-11 2007-12-06 삼성전자주식회사 첵섬 기입 방법 및 그에 따른 첵섬 확인 장치
US7327612B2 (en) * 2005-01-31 2008-02-05 Hewlett-Packard Development Company, L.P. Method and apparatus for providing the proper voltage to a memory
US7516395B2 (en) * 2005-10-12 2009-04-07 Nokia Corporation Memory checking apparatus and method
US8645793B2 (en) * 2008-06-03 2014-02-04 Marvell International Ltd. Statistical tracking for flash memory
US7808834B1 (en) * 2007-04-13 2010-10-05 Marvell International Ltd. Incremental memory refresh
US8031526B1 (en) 2007-08-23 2011-10-04 Marvell International Ltd. Write pre-compensation for nonvolatile memory
US8189381B1 (en) 2007-08-28 2012-05-29 Marvell International Ltd. System and method for reading flash memory cells
US8085605B2 (en) 2007-08-29 2011-12-27 Marvell World Trade Ltd. Sequence detection for flash memory with inter-cell interference
US7894254B2 (en) * 2009-07-15 2011-02-22 Macronix International Co., Ltd. Refresh circuitry for phase change memory

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08153397A (ja) * 1994-11-29 1996-06-11 Nippondenso Co Ltd Ｅｅｐｒｏｍのデータ再書込制御装置
JPH09320300A (ja) * 1996-05-28 1997-12-12 Mitsubishi Electric Corp 半導体記憶装置
JPH10112192A (ja) * 1996-10-03 1998-04-28 Kunihiro Asada 半導体記憶装置
JPH10162594A (ja) * 1996-11-29 1998-06-19 Sanyo Electric Co Ltd 不揮発性半導体メモリ装置
JPH10255487A (ja) * 1997-03-10 1998-09-25 Fujitsu Ltd 半導体メモリ装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4218764A (en) * 1978-10-03 1980-08-19 Matsushita Electric Industrial Co., Ltd. Non-volatile memory refresh control circuit
US5239505A (en) * 1990-12-28 1993-08-24 Intel Corporation Floating gate non-volatile memory with blocks and memory refresh
US5479170A (en) * 1992-10-16 1995-12-26 California Institute Of Technology Method and apparatus for long-term multi-valued storage in dynamic analog memory
US5392251A (en) * 1993-07-13 1995-02-21 Micron Semiconductor, Inc. Controlling dynamic memory refresh cycle time
US5835413A (en) * 1996-12-20 1998-11-10 Intel Corporation Method for improved data retention in a nonvolatile writeable memory by sensing and reprogramming cell voltage levels
US5852582A (en) * 1997-02-18 1998-12-22 Advanced Micro Devices, Inc. Non-volatile storage device refresh time detector
US6005824A (en) * 1998-06-30 1999-12-21 Lsi Logic Corporation Inherently compensated clocking circuit for dynamic random access memory
US6269039B1 (en) * 2000-04-04 2001-07-31 International Business Machines Corp. System and method for refreshing memory devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08153397A (ja) * 1994-11-29 1996-06-11 Nippondenso Co Ltd Ｅｅｐｒｏｍのデータ再書込制御装置
JPH09320300A (ja) * 1996-05-28 1997-12-12 Mitsubishi Electric Corp 半導体記憶装置
JPH10112192A (ja) * 1996-10-03 1998-04-28 Kunihiro Asada 半導体記憶装置
JPH10162594A (ja) * 1996-11-29 1998-06-19 Sanyo Electric Co Ltd 不揮発性半導体メモリ装置
JPH10255487A (ja) * 1997-03-10 1998-09-25 Fujitsu Ltd 半導体メモリ装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009032347A (ja) * 2007-07-30 2009-02-12 Mega Chips Corp 不揮発性半導体記憶装置
JP2010027021A (ja) * 2007-09-28 2010-02-04 Denso Corp 電子機器及びプログラム
JP2011070735A (ja) * 2009-09-28 2011-04-07 Hitachi Ltd 半導体装置、及び、記憶セルの記憶状態の補正方法
JP2010055746A (ja) * 2009-12-07 2010-03-11 Toshiba Corp 記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム
JP2012190538A (ja) * 2012-05-25 2012-10-04 Toshiba Corp 記憶装置、記憶媒体再生方法および記憶媒体再生プログラム
JP2022524535A (ja) * 2019-03-12 2022-05-06 ロベルト・ボッシュ・ゲゼルシャフト・ミト・ベシュレンクテル・ハフツング 不揮発性メモリ機構の動作のための方法および装置

Also Published As

Publication number Publication date
US6438056B2 (en) 2002-08-20
US20010019510A1 (en) 2001-09-06
DE19964012A1 (de) 2001-07-12
FR2805654A1 (fr) 2001-08-31
FR2805654B1 (fr) 2008-01-11

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