JP2001135931A - Build-up multilayer board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a build-up multilayer board whose surface is flat with enhanced bonding strength between an insulating layer and a wiring layer. SOLUTION: An epoxy resin 7 is applied by spin coater, roll coater, and the like on a surface of a board (6) formed by semi-additive method or subtractive method (7). A quantity of application is then adjusted to a depth of an indentation on an insulating layer 5 of the board. After drying the resin 7, exposure and development are performed to remove the resin other than the indentation (8). Thus, it is possible to form a board with a flat surface by semi- additive method or subtractive method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a build-up multilayer substrate and a method of manufacturing the same, and more particularly, to a build-up multilayer substrate capable of flattening a substrate and a method of manufacturing the same.

[0002]

2. Description of the Related Art With the recent increase in performance and miniaturization of IC chips, increasing the wiring density of a substrate on which the IC chip is mounted has become an important technical problem. At present, there is a build-up multilayer board as an example of a high-density mounting board that has been put into practical use. This build-up multilayer substrate is manufactured by any of a subtractive method, a semi-additive method, and a full-additive method.

In the subtractive method, as shown in FIG. 3, (1) roughening the surface of the photosensitive insulating layer 11 to apply a plating catalyst to the surface of the insulating layer 11, and (2) electroless copper plating Then, a copper plating film 12 is formed by electrolytic copper plating. Thereafter, (3) a liquid photosensitive resin is applied on the copper plating film 12 and dried, or a photosensitive film such as a dry film is laminated, and this is exposed and developed to form a pattern of the etching resist 13. I do.

Thereafter, (4) the wiring layer 14 is formed by etching a portion of the copper plating film 12 which is exposed from the pattern of the etching resist 13, and (5) the etching resist 13 is peeled and removed. The layer 14 is surface-treated. After that, (6) a liquid photosensitive resin is applied on the wiring layer 14 and the insulating layer 11 and thermally cured to form the next insulating layer 15, which is exposed and developed to form the via hole 16. Form. Thereafter, the above-described steps are repeated until the required number of layers is reached, thereby forming a build-up multilayer substrate.

In the semi-additive method, as shown in FIG. 4, after (1) the surface of the photosensitive insulating layer 21 is roughened and a plating catalyst is applied to the surface of the insulating layer 21, (2) electroless A copper plating film 22 is formed by copper plating. Thereafter, (3) a liquid photosensitive resin is applied on the copper plating film 22 and dried, or a photosensitive film such as a dry film is laminated, and this is exposed and developed to form a pattern of the plating resist 23. .

Thereafter, (4) electrolytic copper plating is applied to a portion of the copper plating film 22 exposed from the pattern of the plating resist 23 to form a wiring layer 24. After this,
(5) The plating resist 23 is peeled off, and the copper plating film 22 is removed.
Of the wiring layer 24 is removed by etching. Thereafter, (6) the wiring layer 24 is surface-treated,
A liquid photosensitive resin is applied on the wiring layer 24 and the insulating layer 21 and thermally cured to form the next insulating layer 27, which is exposed and developed to form a via hole 26. Thereafter, the above-described steps are repeated until the required number of layers is reached, thereby forming a build-up multilayer substrate.

[0007]

As described above, generally, a build-up multilayer substrate is manufactured by any of a subtractive method, a semi-additive method, and a full-additive method.

The full additive method is excellent in flattening the substrate surface (flatness of the substrate surface).
Since the side surface roughening treatment of the wiring layer cannot be performed, there is a problem that adhesion is weak at the interface between the wiring layer and the insulating layer. That is, in the full additive method, when the wiring layer is subjected to the surface treatment, the side surface of the wiring layer is covered with the plating resist, and thus the side surface of the wiring layer is not subjected to the surface treatment. Therefore, the adhesive strength between the wiring layer and the insulating layer is weaker than the subtractive method and the semi-additive method,
There is a disadvantage that separation easily occurs between the wiring layer and the insulating layer.

On the other hand, when the semi-additive method or the subtractive method is employed, since the side surface of the wiring layer can be roughened, the adhesiveness between the insulating layer and the wiring layer can be improved. However, since it is necessary to apply (or laminate) a resin for forming an insulating layer on the wiring layer, there is a problem that the thickness of the wiring layer deteriorates flatness.

[0010] In addition, the concave portion on the surface of the insulating layer can be filled by printing, but for a substrate having fine wiring,
There is a problem that a print mask cannot be created. Further, if the recess is filled by printing, there is a problem that it is difficult to cope with a complicated wiring pattern.

SUMMARY OF THE INVENTION An object of the present invention is to provide a build-up multilayer substrate having high adhesion at the interface between an insulating layer and a wiring layer and excellent flatness, and a method for manufacturing the same.

[0012]

According to one aspect of the present invention, there is provided a method of manufacturing a build-up multilayer substrate, comprising: performing a surface treatment on an upper portion and a side surface of a wiring layer; Forming an insulating layer to be formed, and applying a resin on the insulating layer, and performing exposure and development to fill a concave portion on the surface of the insulating layer.

According to another aspect of the present invention, a build-up multilayer substrate includes a wiring layer having its upper surface and side surfaces subjected to surface treatment, a first insulating layer which is in close contact with the wiring layer, and a light exposure and exposure method. A second insulating layer formed in the concave portion on the surface of the first insulating layer by performing development.

According to these inventions, the surface treatment is performed on the upper and side surfaces of the wiring layer, so that the adhesiveness at the interface between the wiring layer and the insulating layer can be enhanced. In addition, by performing exposure and development, the concave portions on the surface of the insulating layer are filled, so that a build-up multilayer substrate having excellent flatness can be manufactured.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a build-up multilayer substrate and a method of manufacturing the same according to the present embodiment will be described. In the present embodiment, a semi-additive method or a subtractive method is employed as a method for manufacturing a build-up multilayer substrate. Then, the upper surface and the side surface of the wiring layer are subjected to surface treatment, and the concave portion of the insulating layer located on the wiring layer is filled and flattened by applying a resin and performing exposure and development.

The adhesive strength between the wiring layer and the insulating layer is increased by the insulating layer formed on the wiring layer being in close contact with both the surface-treated surface and the side surface of the wiring layer. This prevents separation between the wiring layer and the insulating layer.

In the insulating layer formed on the wiring layer, a recess is formed due to the thickness of the wiring layer. However, it is necessary to fill the recess by applying, exposing and developing a resin to flatten the substrate. Can be. Thereby, the problem of the flatness of the substrate, which is a problem in the semi-additive method and the subtractive method, can be solved.

FIGS. 1 and 2 are cross-sectional views illustrating a method of manufacturing a build-up multilayer substrate according to the present embodiment. In these figures, a semi-additive method is used as a method for manufacturing a build-up multilayer substrate.

As the core substrate, for example, a glass epoxy substrate, a metal substrate, or the like can be used. Through holes are formed at predetermined positions of the core substrate by processing. The through holes of this substrate are embedded by printing and polished to use after flattening the surface. Next, the surface of the core substrate is subjected to a surface roughening treatment.

Next, referring to FIGS. 1 and 2, a build-up multilayer substrate is manufactured by the following steps.

(1) A liquid epoxy-based resin is applied on a core substrate by a spin coater, a roll coater, or the like, and dried to form a photosensitive resin layer, and then exposed and developed to form a via hole. . After that, the surface of the photosensitive resin layer is treated and roughened to form the insulating layer 1.

(2) Subsequently, chemical copper plating 2 is applied to the roughened surface of the insulating layer 1. (3) Further, a wiring pattern is formed with a dry film 3 or the like.

(4) Further, using the chemical copper plating 2 as an electrode, an electrolytic copper plating 4 is applied to form a wiring.

(5) Next, the dry film 3 is peeled off,
Further, only the chemical copper plating is removed by etching, and the surface and side surfaces of the formed wiring layer 4 are roughened.

(6) After that, a liquid epoxy resin is applied by a spin coater, a roll coater or the like in the same manner as in (1), and dried to form an insulating layer 5, and exposed and developed to form a via hole 6. I do.

(7) Further, an epoxy resin 7 is applied by a spin coater, a roll coater or the like. The application amount at this time is adjusted according to the depth of the depression (recess) of the insulating layer 5. After the application, the resin is dried to form a new insulating layer.

(8) Next, exposure and development are performed, and the resin other than the concave portions is removed. After that, the surface is roughened. Thereby, the concave portions on the surface of the insulating layer 5 are filled with the insulating material 8.

Thereafter, the above steps (2) to (8) are repeated until the required number of build-up multilayer substrates is stacked.

As described above, in the present embodiment, when the build-up multilayer substrate is formed, the concave portion of the insulating layer is filled with another insulating layer. Thereby, the flatness of the surface of the insulating layer, which could not be prevented by the conventional semi-additive method, could be secured. Further, the adhesion between the insulating layer and the wiring layer due to the surface roughening of the wiring, which could be performed only by the subtractive method or the semi-additive method, could be improved.

In the above embodiment, the semi-additive method has been described as an example. However, for example, after the step shown in FIG. 3 (6), the steps (7) and (8) in FIG.
By carrying out the steps indicated by, it is possible to implement the present invention also in a subtractive method.

The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[Brief description of the drawings]

FIG. 1 is a diagram showing a manufacturing process of a build-up multilayer substrate according to one of the embodiments of the present invention.

FIG. 2 is a view following FIG. 1;

FIG. 3 is a diagram for explaining a subtractive method.

FIG. 4 is a diagram for explaining a semi-additive method.

[Description of Signs] 1 Insulating layer, 2 Chemical copper plating, 3 Dry film,
4 Copper electroplating, 5, 7, 8 Resin (insulating layer), 6
Via hole.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E314 AA27 AA32 BB13 CC02 CC03 DD02 DD06 DD07 DD08 FF04 FF05 FF17 GG11 GG26 5E346 AA12 AA43 CC08 CC32 DD03 DD23 DD44 EE38 EE39 FF07 FF13 FF23 GG18 GG22 HH07H31H31

Claims (2)

[Claims] 1. A method for manufacturing a build-up multilayer substrate, comprising: performing a surface treatment on an upper portion and a side surface of a wiring layer to form an insulating layer which is in close contact with the wiring layer; And filling the recesses on the surface of the insulating layer by performing exposure and development,
A method for manufacturing a build-up multilayer substrate. 2. A wiring layer having its upper surface and side surfaces subjected to surface treatment, a first insulating layer which is in close contact with the wiring layer, and a first insulating layer formed by performing exposure and development. A build-up multilayer substrate, comprising: a second insulating layer formed in a concave portion on a surface.