JP2001102668A - Manufacturing method of semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form an epitaxial layer of a compound semiconductor with few crystal defects and uniformly on a silicon substrate having a bore diameter not less than 4 inches and at a low cost. SOLUTION: An AlyGa1-yAs (0.9<=y<=1.0) layer and a III-V compound semiconductor layer are epitaxially grown on a germanium substrate, a gallium arsenide substrate or an indium phosphide substrate, for mesa etching, and an InxGa1-xAs (0.05<=x<=0.6) layer is epitaxially grown on a silicon substrate, and the III-V compound semiconductor layer and the InxGa1-xAs (0.05<=x<=0.6) layer are stuck together, and then the AlyGa1-yAs (0.9<=y<=1.0) layer is etched, and the germanium substrate, the gallium arsenide substrate or the indium phosphide substrate are removed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate by transferring an epitaxial layer including a III-V compound semiconductor layer onto a silicon substrate.

[0002]

2. Description of the Related Art By forming a compound semiconductor on a silicon substrate, a multifunctional device having both excellent light receiving / emitting characteristics and high frequency characteristics of the compound semiconductor can be constructed on the silicon substrate. A silicon substrate has higher mechanical strength than a GaAs substrate or an InP substrate, and can significantly reduce the yield reduction due to substrate cracking and chipping in a device trial manufacturing process. In addition, a device using an inexpensive large-diameter silicon substrate can significantly reduce the device manufacturing cost as compared with a device using a GaAs substrate or an InP substrate. For this reason, a technique for directly growing a compound semiconductor on a silicon substrate and a technique for bonding a compound semiconductor substrate to a silicon substrate have been proposed.

For example, when GaAs is directly grown on a silicon substrate, MBE (Molecular Beam Epitaxy) or MOCVD (Metal Organic Chemical Vapor Deposit) is used.
(ion) method. That is, 85
After removing the natural oxide film on the surface of the silicon substrate at 0 ° C. to 1000 ° C. and cooling it to about 400 ° C., the amorphous GaAs
The film is formed at a thickness of 00 to 1000 °. Thereafter, the temperature is raised to 500 to 700 ° C. to epitaxially grow the GaAs layer.

Further, as disclosed in Japanese Patent Application Laid-Open Nos. 6-90061 and 9-63951, a technique has been proposed in which the surfaces of a silicon substrate and a compound semiconductor substrate are joined together to join different kinds of substrates. ing.

Here, a technique for transferring a compound semiconductor epitaxial layer to a silicon substrate will be described with reference to FIG.

First, as shown in FIG. 4A, a buffer layer 2 made of gallium arsenide is placed on a gallium arsenide substrate 1 in a thickness of 0.1 mm.
It grows about 1-2 μm.

Next, an aluminum arsenide layer 3 is grown as a selective etching layer by 100 to 1000.degree., And an epitaxial layer 4 including an active layer of the device is grown.

Next, as shown in FIG. 4B, the silicon substrates 5 are brought into contact with each other and annealed in a hydrogen gas for bonding.

Thereafter, as shown in FIG. 4C, the aluminum arsenide layer 3 is etched with a hydrofluoric acid-based etchant. Thereby, the epitaxial layer 4 including the active layer of the device can be transferred to the silicon substrate 5.

[0010]

However, in the case where the compound semiconductor 4 is directly epitaxially grown on the silicon substrate 5, the compound semiconductor 4 may not be formed on the compound semiconductor epitaxial layer due to a difference in lattice constant or thermal expansion coefficient between the substrate 5 and the epitaxial layer 4. Crystal defects of 1 × 10 ⁶ cm ⁻² or more occur. Therefore, even if a laser diode, a light emitting diode, a field effect transistor, or the like is formed, there is a problem that the characteristics and reliability are significantly reduced, and the device cannot be put to practical use.

A compound semiconductor layer 4 is formed on a silicon substrate 5.
After transferring the compound semiconductor epitaxial layer 4 from the compound semiconductor substrate 1 by the lift-off method,
It is necessary to remove the selective etching layer 3 with an etching solution, and the number c
The lamination at the size of m square is the limit.
The method disclosed in Japanese Patent Application Laid-Open No. 0061 and Japanese Patent Application Laid-Open No. 9-63951 has a problem that transfer to a large-diameter substrate of 4 inches or 6 inches is impossible.

After bonding, the silicon substrate 5
There is a problem that dislocation due to a difference in thermal expansion coefficient or lattice constant between the compound semiconductor layer 4 and the compound semiconductor layer 4 occurs in the compound semiconductor epitaxial layer 4 including the active layer of the device.

[0013]

In order to solve the above-mentioned problems, in the method of manufacturing a semiconductor substrate according to the first aspect, a method of manufacturing a semiconductor substrate comprising a germanium substrate, a gallium arsenide substrate, or an indium phosphide substrate, comprising Al _y Ga _1-y As ( 0.9 ≦ y ≦ 1.0) layer with mesa etch the buffer layer and the group III-V compound semiconductor layer epitaxially grown _{including, in x Ga 1-x as} (0.05 ≦ x ≦ 0 in the silicon substrate .6) a layer is epitaxially grown, and the III-V compound semiconductor layer and the I
n _x Ga _1-x As after bonding the (0.05 ≦ x ≦ 0.6) layer, the _{Al y Ga 1-y As (} 0.9 ≦ y ≦ 1.
0) Etch the layer to remove the germanium substrate, gallium arsenide substrate, or indium phosphide substrate.

In the method of manufacturing a semiconductor substrate, the In _x Ga _{1 -x} As (0.05 ≦ x ≦
0.6) the dislocation density of the layer is 1 × 10 ⁸ cm ⁻² or less;
In addition, it is desirable that the radius of curvature due to the warpage of the silicon substrate is 70 m or more.

In the method of manufacturing a semiconductor substrate, it is preferable that a groove is formed in the germanium substrate, the gallium arsenide substrate, or the indium phosphide substrate to epitaxially grow the III-V compound semiconductor layer.

Further, in the method of manufacturing a semiconductor substrate,
Forming a groove in the silicon substrate to form the In _x Ga _1-x As;
It is desirable to form a layer (0.05 ≦ x ≦ 0.6).

[0017]

When manufactured as described above, the compound semiconductor epitaxial layer including the active layer of the device becomes In _x Ga _{1 -x} A
s (0.05 ≦ x ≦ 0.6) layer was transferred to a silicon substrate epitaxially grown, and In _x Ga _1-x As (0.0
(5 ≦ x ≦ 0.6) The layer functions as a buffer layer, so that no dislocation is introduced into the compound semiconductor layer including the active layer of the device.

[0018]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a view showing one embodiment of a method of manufacturing a semiconductor substrate according to claim 1, wherein 6 is a germanium substrate, a gallium arsenide substrate or an indium phosphorus substrate, and 7 is a gallium arsenide or indium phosphorus substrate. Buffer layer, 8
Are GaAs, AlGaAs, InAlGaP, InGa
As, InAlAs, InP, GaAsP, InAlG
an epitaxial layer including an active layer of a device made of a group III-V compound semiconductor such as aAs or InAlGaAsP; and 9, an In _x Ga _1-x As epitaxially grown on a silicon substrate 5 (0.05 ≦ x ≦ 0.6) Layer.

On a Si substrate, a GaAs or other III-
Compared to growing a group V compound semiconductor,
Plate, GaAs substrate, and InP substrate have low dislocation densities (1
× 10 ^FourPieces cm^-2Below) III-V compound semi-crystalline with good crystallinity
Conductors can be formed. Also, a selective etching layer of AlAs
The substrate that can form the buffer layer by inserting
Plate, GaAs substrate, and InP substrate.

First, a buffer layer 7 made of gallium arsenide, indium phosphide, or the like is grown on a germanium substrate, a gallium arsenide substrate, or an indium phosphide substrate 6 by a known vapor phase epitaxial method such as the MBE method or the MOCVD method.

Thereafter, Al _y G serving as a selective etching layer is formed.
a _1-y As (0.9 ≦ y ≦ 1.0) layer 3 is 100 to 10
Grows $ 00. If this film thickness is not set thicker as the width W of the mesa region shown in FIG. 1B is wider, it becomes difficult to perform selective etching described later. For example, when the width W of the mesa region is 10
In the case of 0 μm, selective etching becomes possible at 200 ° or more.

Al _y Ga _{1 -y} As serving as a selective etching layer
(0.9 ≦ y ≦ 1.0) After the growth of the layer 3, an epitaxial layer 8 including an active layer of a device made of a group III-V compound semiconductor is grown and taken out of the epitaxial apparatus.

Thereafter, as shown in FIG. 1B, a mesa region having a width W is formed by ordinary photolithography and etching. At this time, etching is performed in the gas phase etching with plasma of wet etching or chlorine gas with a mixture of sulfuric acid / hydrogen peroxide / water, Al _y Ga
_The etching is performed until the side wall of the _1-y As (0.9 ≦ y ≦ 1.0) layer 3 is completely exposed.

Next, as shown in FIG. 1C, In _x G
a _1-x As (0.05 ≦ x ≦ 0.6) layer 9 is bonded to the epitaxially grown silicon substrate 5, and the bonding surface is pressurized at a pressure of 10 to 50 Pa to form a hydrogen atmosphere 20 μm.
The bonding is completed by performing annealing at 0 to 500 ° C. for 30 minutes to several hours.

Note that In _x Ga _{1 -x} As (0.05 ≦ x ≦
0.6) The epitaxial growth of the layer 9 on the silicon substrate 5 is performed by a two-stage growth method by MBE or MOCVD. That is, a natural oxide film or the like on the surface of the silicon substrate 5 is removed at 850 to 1000 ° C., and after cooling to about 400 ° C., an amorphous gallium arsenide layer is formed at 100 to 1000 °.

Thereafter, the temperature was raised to 500 to 600 ° C. to raise In _x
A Ga _1-x As (0.05 ≦ x ≦ 0.6) layer 9 is grown.

When the indium composition is larger than 0.6, a single crystal thin film cannot be grown, and good bonding strength cannot be obtained. That is, In _x Ga _{1 -x} As (0.05
≦ x ≦ 0.6) layer 9 dislocation density 1 la 10 ⁸ cm ^{- 2} by the following, it is possible to obtain good bonding strength.
If the composition of indium is smaller than 0.05, the radius of curvature of the silicon substrate by the sled becomes smaller than 70 m, the sled of the silicon substrate becomes large, and uniform bonding cannot be performed.

In _x Ga _{1 -x} As (0.05 ≦ x ≦ 0.
6) The radius of curvature of the silicon substrate 5 on which the layer 9 has been grown due to the warpage must be 70 m or more. If the radius of curvature is smaller than 70 m, a decrease in bonding strength, cracks, etc. occur, and a desired semiconductor substrate cannot be obtained. .

Next, as shown in FIG. 1D, Al _y Ga _{1 -y} As (0.9 ≦ y ≦ 1.
0) Remove layer 3 and replace epitaxial layer 8 including the active layer of the device with In _x Ga _{1 -x} As (0.05 ≦ x ≦ 0.6)
It is transferred to the silicon substrate 5 via the layer 9.

FIG. 2 is a diagram showing a method of manufacturing a semiconductor substrate according to claim 3. As shown in FIG. 2 (a), when the germanium substrate, a gallium arsenide substrate or formed in advance several tens to several hundreds μm grooves 10 of the indium phosphide substrate 6,, Al _y Ga ₁ in FIG. 2 (d) _-y As (0.9 ≦
(y ≦ 1.0) The layer 3 can be selectively removed in a short time and more uniformly. That is, the epitaxial layer 8
Alternatively, the aluminum arsenic layer 3 can be selectively removed by etching by supplying a hydrofluoric acid-based etchant through the groove 10 of the substrate 6, so that the epitaxial layer can be transferred on the large-diameter substrate 6 of 4 inches or more.

FIG. 3 is a view showing a method of manufacturing a semiconductor substrate according to claim 4. As shown in FIG. 3C, a groove '10 of several tens to several hundreds μm is formed in advance on a germanium substrate, a gallium arsenide substrate, or an indium phosphide substrate 6 and a silicon substrate on which the groove 10 is formed in advance. 5 is bonded to a substrate on which an In _x Ga _1-x As (0.05 ≦ x ≦ 0.6) layer 9 is epitaxially grown, thereby forming an Al _y Ga _1-y As (0.9 in FIG. 3D). ≤y
.Ltoreq.1.0) The layer 3 can be selectively removed in a short time and more uniformly. That is, since the aluminum arsenic layer 3 can be selectively etched and removed by supplying a hydrofluoric acid-based etchant through the epitaxial layer 8 or the groove 10 of the substrate 6, the epitaxial layer can be transferred to a substrate having a large diameter of 4 inches or more. Becomes

[0033]

As described above, according to the method of manufacturing a semiconductor substrate according to the first aspect, a III-V compound semiconductor epitaxial layer having few dislocation defects can be formed on a silicon substrate. As a result, compound semiconductor lasers that utilize the characteristics of silicon substrates with high mechanical strength and good thermal conductivity,
It is possible to manufacture a device in which a high-speed electronic element such as an array of photodiodes or a compound semiconductor field-effect transistor is integrated.

Further, selective etching can be performed through the mesa portion and the substrate groove, and the III-V compound semiconductor epitaxial layer can be uniformly transferred to the silicon substrate even on a large-diameter substrate of 4 inches or more.

Further, since a germanium substrate, a gallium arsenide substrate, or an indium phosphorus substrate can be used repeatedly, the device can be manufactured at low cost.

[Brief description of the drawings]

FIG. 1 is a view showing one embodiment of a semiconductor substrate according to claim 1;

FIG. 2 is a view showing one embodiment of a method of manufacturing a semiconductor substrate according to claim 3;

FIG. 3 is a view showing one embodiment of a method for manufacturing a semiconductor substrate according to claim 4;

FIG. 4 is a diagram showing a conventional method for manufacturing a semiconductor substrate.

[Sharp sign]

1: gallium arsenide substrate, 2: buffer layer, 3: Al _y G
a _1-y As (0.9 ≦ y ≦ 1.0) selective etching layer,
4: Epitaxial layer including active layer of device, 5: Silicon substrate, 6: Germanium substrate, gallium arsenide substrate, or indium phosphide substrate, 7: Buffer layer, 8: Epitaxial layer including active layer of device, 9: In _x G
a _1-x As (0.05 ≦ x ≦ 0.6) layer

Claims (4)

[Claims] A germanium substrate, a gallium arsenide substrate,
Alternatively, Al _y Ga _{1 -y} As (0.9
≦ y ≦ 1.0) layer and with the Group III-V compound semiconductor layer is epitaxially grown to mesa _{etching, In x Ga 1-x As} (0.05 ≦ x ≦ 0.6) layer epitaxially grown on a silicon substrate After bonding the III-V group compound semiconductor layer and the In _x Ga _1-x As (0.05 ≦ x ≦ 0.6) layer, the Al _y Ga _1-y As (0.9 ≦ y ≦
1.0) etching the layer, the germanium substrate,
A method for manufacturing a semiconductor substrate for removing a gallium arsenide substrate or an indium phosphorus substrate. 2. In _x Ga _{1 -x} As on said silicon substrate
(0.05 ≦ x ≦ 0.6) The dislocation density of the layer is 1 × 10 ⁸ c
m ^-2 or less, and a semiconductor substrate manufacturing method according to claim 1, wherein the warp by the radius of curvature of the silicon substrate is not less than 70m. Forming a groove in the germanium substrate, the gallium arsenide substrate, or the indium phosphorus substrate to form the III-V substrate;
3. The method according to claim 1, wherein the group III compound semiconductor layer is epitaxially grown. 4. A method for forming a groove in the silicon substrate,
_{n x Ga 1-x As (} 0.05 ≦ x ≦ 0.6) The method of manufacturing a semiconductor substrate according to claims 1 to 3, characterized in that to form the layer.