JP2001079246A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely execute all processing programs constituting a game control program by including a code setting processing for setting a flag for judging the establishment of a transfer condition by judgment processing in an interruption processing. SOLUTION: A CPU 56 executes a service interruption restoration processing when the restoration from a service interruption is judged in main processing in the input of the power source of a game machine, and executes an initialization processing in other cases. Thereafter, it is transferred to a loop processing for confirming the monitoring of voltage abnormality and the monitoring a timer interruption flag. In the initialization processing, a clearing processing for resistor and RAM and an initial value setting processing are performed, and the initial set of the timer resistor of the CPU 56 is then performed so as to periodically perform a timer interruption. When the timer interruption is generated, the CPU 56 sets the timer interruption flag, and when the set of the timer interruption flag is detected, it resets the timer interruption flag and executes a game control processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine such as a pachinko game machine or a coin game machine in which a game is played in response to a player's operation. It relates to a gaming machine in which a game is performed.

[0002]

2. Description of the Related Art As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of prize balls are obtained. Are paid out to players.
Furthermore, a variable display unit capable of changing the display state is provided,
There is a configuration in which a predetermined game value is provided to a player when a display result of the variable display unit has a predetermined specific display mode.

[0003] When the display result of the variable display section for displaying a special symbol is a combination of a predetermined specific display mode, it is usually called a "big hit". In addition, the game value is a right to make the state of the variable prize ball device provided in the game area of the gaming machine advantageous for a player who is easy to win a hit ball, or a right for the player to be in an advantageous state. Or to generate.

[0004] When a big hit occurs, for example, a big winning opening is opened a predetermined number of times, and the state shifts to a big hit game state in which a hit ball is easy to win. Then, in each open period, when a predetermined number (for example, 10) of winning prizes is won, the winning prize opening is closed. The number of opening of the special winning opening is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and if the opening time elapses even if the number of winnings does not reach a predetermined number, the winning opening is closed. If the predetermined condition (for example, winning in the V zone provided in the special winning opening) is not satisfied at the time when the special winning opening is closed, the big hit gaming state ends.

[0005] In addition, among the combinations of display modes other than the "big hit" combination, at a stage where some of the display results of the plurality of variable display portions have not been derived and displayed yet, the display results have already been derived and displayed. The state in which the display mode of the variable display unit that satisfies the display condition that is a combination of the specific display modes is called “reach”. If the display result of the identification information variably displayed on the variable display unit does not satisfy the condition of “reach”, the result is “out” and the variable display state ends. A player plays a game while enjoying how to generate a big hit.

When a game ball wins a winning opening provided on the game board, a predetermined number of award balls are paid out. Since the progress of the game is controlled by the game control means mounted on the main board, the number of winning balls based on the winning is determined by the game control means,
Sent to the prize ball control board. Hereinafter, the game control means and other control means may be referred to as game device control means, respectively.

[0007]

The game control means for controlling the progress of the game is generally realized by a microcomputer. Then, in order to prevent a program runaway or the like caused by noise, the game control program is executed for a predetermined period (for example, 2 seconds).
It is configured to be restarted repeatedly every ms). The game control program is configured to include various processing programs. In addition, an interrupt process may be used to effectively perform the game control. For example, if each predetermined period of 2 ms is called one program execution time,
There is a possibility that one program execution time may elapse before all of the processing programs constituting the game control program have not been completely executed due to the occurrence of an interrupt process or the like. If such a situation occurs, a process that is not executed in one program execution time will occur, which will hinder game control.

Therefore, an object of the present invention is to provide a gaming machine in which all processing programs constituting a game control program are executed reliably.

[0009]

A gaming machine according to the present invention comprises:
A game machine capable of giving a game result value to a player as a result of performing a predetermined game, comprising a game control board on which game control means for controlling the progress of the game is mounted, wherein the game control means A game control microcomputer for executing a game control program for performing the game control program, the game control program is periodically started at least by a main routine, a subroutine called during execution of the main routine, and a timer interrupt Interrupt processing,
The main routine includes at least an initialization process, a game control process for controlling a gaming state of the gaming machine, and a determination process for determining whether a transition condition for transition to the game control process is satisfied, and an interrupt process. Is characterized by including a code setting process for setting a flag for determining whether the transition condition is satisfied in the determination process. Note that the game result value is a concept indicating payout of a game ball or an increase in a score in the case of an image-type gaming machine.

The game control microcomputer is configured to execute a determination process while repeatedly executing other processes when determining in a main routine that a shift condition for shifting to the game control process is satisfied. You may.

The gaming machine includes a power supply monitoring means for monitoring a voltage drop of a power supply supplied to the game control board, and a signal output from the power supply monitoring means at the time of the voltage drop is connected to the game control microcomputer so that information can be transmitted. The game control unit may be configured to execute, as another process, a process of determining a power supply voltage drop based on a signal from the power supply monitoring unit.

The main routine is configured to determine a drop in power supply voltage before a game control process is completed after a flag for determining whether a transition condition is satisfied is set in the determination process and the game control process is started. May be.

The main routine may be configured to perform a process of determining a power supply voltage drop before starting the game control process.

The gaming machine is provided with a backup power supply for backing up the power of the RAM in the game control board, and the game control means performs processing for preventing data destruction when the power is turned off when it is determined that the power supply voltage has dropped. May be configured to execute power-off processing including the following.

The final part of the initialization process in the main routine may be configured to include a process for activating a timer interrupt and a process for setting a timer interrupt interval.

The processing for preventing data destruction when the power is turned off may include a RAM access prevention processing.

The power-off process may include a process of storing RAM check data obtained as a result of an operation related to the contents stored in the RAM in the RAM.

The gaming machine control microcomputer comprises:
In the process at the time of turning on the power, the RAM storage content may be checked based on the RAM check data, and if the check result is normal, the game state return process may be performed based on the RAM storage content.

The gaming machine control microcomputer comprises:
At the time of power-on, a configuration may be adopted in which the contents stored in the RAM are checked based on the RAM check data, and if the check result is not normal, an initialization process is executed.

[0020]

An embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. 1 is a front view of the pachinko gaming machine 1 as viewed from the front, FIG. 2 is an overall rear view showing the internal structure of the pachinko gaming machine 1, and FIG. 3 is a rear view of the pachinko gaming machine 1 as viewed from the back. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine. Further, the present invention can be applied to an image-type gaming machine or a slot machine.

As shown in FIG. 1, the pachinko gaming machine 1
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing prize balls overflowing from the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing a hitting ball are provided. Behind the glass door frame 2,
The game board 6 is detachably attached. A game area 7 is provided on the front of the game board 6.

In the vicinity of the center of the game area 7, a variable display section 9 for variably displaying a plurality of types of symbols and a 7-segment L
A variable display device 8 including a variable display 10 using an ED is provided. In this embodiment, the variable display section 9 has three symbol display areas of “left”, “middle”, and “right”. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In a passage between the passage gate 11 and the ball outlet 13, there is a gate switch 12 for detecting a hit ball that has passed through the passage gate 11. In addition, the winning ball that entered the starting winning port 14 is
It is guided to the back of the game board 6 and is detected by the starting port switch 17. In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14. The variable winning ball device 15 is opened by the solenoid 16.

An opening / closing plate 20 which is opened by a solenoid 21 in a specific game state (big hit state) is provided below the variable winning ball apparatus 15. In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. The winning ball that enters one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V count switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. Variable display device 8
A start winning prize storage display 18 having four display sections for displaying the number of winning balls entering the starting winning prize port 14 is provided below. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The gaming board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the winning ports 19 and 24 is detected by the winning port switches 19a and 24a. At the left and right sides of the game area 7, there are provided decorative lamps 25 which are displayed blinking during the game, and at the lower part there is an out port 26 for absorbing hit balls which have not won. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides outside the game area 7. A gaming effect LED 2 is provided on the outer periphery of the gaming area 7.
8a and gaming effect lamps 28b and 28c are provided.

In this example, one of the speakers 27
Is provided with a prize ball lamp 51 which is lit when a prize ball is paid out, and a ball out lamp 52 which is lit when a supply ball is out is provided near the other speaker 27. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming table 1 and enables lending of balls by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card can be used. If there is a fraction (less than 100 yen) in the balance information recorded in the card, the fraction is displayed. Fraction display switch 1 for displaying on a frequency display LED provided near hit ball supply tray 3
52, a connecting stand direction indicator 15 indicating which side of the pachinko gaming machine 1 the card unit 50 corresponds to
3. Card insertion indicator 154 indicating that a card has been inserted into card unit 50, card insertion slot 155 into which a card as a recording medium is inserted, and a card reader provided on the back of card insertion slot 155 A card unit lock 156 is provided to release the card unit 50 when checking the mechanism of the writer.

The hit ball fired from the hitting ball launching device enters the game area 7 through the hitting rail, and thereafter, the game area 7
Come down. When a hit ball is detected by the gate switch 12 through the passage gate 11, the display number of the variable display 10 is changed continuously. Further, when a hit ball enters the starting winning opening 14 and is detected by the starting opening switch 17, the symbol in the variable display section 9 starts rotating if the symbol can be changed. If it is not possible to start changing the symbol, the start winning memory is increased by one.

The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. Then, when a hit ball wins in the specific winning area while the opening and closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. Generation of the continuation right is permitted a predetermined number of times (for example, 15 rounds).

If the combination of images in the variable display section 9 at the time of stoppage is a combination of big hit symbols with probability fluctuation, the probability of the next big hit becomes high. That is, a high probability state, which is more advantageous for the player, is obtained. Also, when the stop symbol on the variable display 10 is a predetermined symbol (hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the variable display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. On the back of the variable display device 8, as shown in FIG. 2, a prize ball tank 38 is provided above the mechanism plate 36, and when the pachinko gaming machine 1 is installed on the gaming machine installation island, a prize ball is provided from above. Premium ball tank 3
8 is supplied. The prize ball in the prize ball tank 38 reaches the ball payout device through the guide gutter 39.

On the mechanism plate 36, a variable display control unit 29 for controlling the variable display section 9 via the relay board 30, and a game control board (main board) covered with a board case 32 and mounted with a game control microcomputer and the like. ) 31, a relay board 33 for relaying a signal between the variable display control unit 29 and the game control board 31, and a prize ball control board on which a prize ball control microcomputer for controlling the payout of prize balls is mounted. 37 are installed. Further, a ball is hit on the lower part of the mechanism plate 36 by using the rotating force of the motor in the game area 7.
Ball launching device 34 that launches on a game effect lamp / LE
D28a, 28b, 28c, a prize ball lamp 51 and a lamp control board 35 for sending signals to the ball out lamp 52 are provided.

FIG. 3 is a rear view of the gaming board of the pachinko gaming machine 1 as viewed from the rear. The ball that passed through the induction gutter 39
As shown in FIG. 3, the ball cut detectors 187a, 187
b, and reaches the ball dispensing device 97 via the ball supply gutters 186a and 186b. The prize ball paid out from the ball payout device 97 is supplied to the hit ball supply tray 3 provided on the front surface of the pachinko gaming machine 1 through the communication port 45. On the side of the communication port 45, an excess ball passage 46 communicating with the excess ball tray 4 provided on the front of the pachinko gaming machine 1 is formed. A large number of prize balls based on the prize are paid out, and the ball supply tray 3 becomes full. Finally, after the prize balls reach the communication port 45, further prize balls are paid out. It is led to the ball tray 4. When the prize ball is further paid out, the sensing lever 47 is set to the full switch 4.
By pressing 8, the full tank switch 48 is turned on. In this state, the rotation of the stepping motor in the ball discharging device 97 stops, the operation of the ball discharging device 97 stops, and the driving of the hitting ball firing device 34 also stops as necessary. In addition,
In this embodiment, a ball payout device 97 in which game balls are paid out by rotation of a stepping motor is illustrated as a ball payout device that pays out game balls by driving an electric drive source. A ball payout device having a structure of sending out a ball may be used, or a ball payout device having a structure in which a stopper is removed by driving an electric drive source and payout is performed by the weight of the game ball may be used.

Signals from the winning opening switches 19a and 24a, the starting opening switch 17 and the V count switch 22 are sent to the main board 31 in order to perform the prize ball payout control.
When the starting port switch 17 is turned on, the CPU 56 of the main board 31 knows that a winning corresponding to the payout of six winning balls has occurred. Further, when the count switch 23 is turned on, it is known that a winning corresponding to the payout of 15 prize balls has occurred. Then, when the winning opening switch is turned on, it is known that a winning corresponding to the payout of 10 prize balls has occurred. In this embodiment, for example, a game ball that has won the winning opening 24 is detected by the winning opening switch 24 a provided in the winning ball flow path from the winning opening 24, and the game ball that has won the winning opening 19 is detected. Is
It is detected by a winning opening switch 19a provided in a winning ball flow path from the winning opening 19.

FIG. 4 is a block diagram showing an example of a circuit configuration of the main board 31. FIG. 4 also shows the prize ball control board 37, the lamp control board 35, the sound control board 70, the emission control board 91, and the display control board 80.
The pachinko machine 1 is provided on the main board 31 according to the program.
, A switch circuit 58 for giving signals from the gate switch 12, the starting port switch 17, the V count switch 22, the count switch 23, and the winning port switches 19a, 24a to the basic circuit 53, and a variable winning ball device. A solenoid circuit 59 for driving a solenoid 16 for opening and closing the opening 15 and a solenoid 21 for opening and closing the opening and closing plate 20 in accordance with a command from the basic circuit 53; 10 and a lamp / LED circuit 60 for driving the decorative lamp 25.

According to the data supplied from the basic circuit 53, jackpot information indicating occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display of the variable display section 9, and probability fluctuation have occurred. And an information output circuit 64 that outputs probability change information or the like indicating the fact to a host computer such as a hall management computer.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 used as a work memory, a CPU 56 for performing a control operation in accordance with the control program, and an I / O port unit 57. In this embodiment, the ROM 54 and the RAM 55 are
6 is built in. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to have at least the RAM 55 therein, and the ROM 54 and the I / O port unit 57 may be external or internal. The I / O port unit 57 is a terminal capable of inputting and outputting information in the microcomputer.

Further, the main board 31 has an initial reset circuit 65 for resetting the basic circuit 53 when the power is turned on.
And an address decode circuit 67 that decodes an address signal provided from the basic circuit 53 and outputs a signal for selecting one of the I / O ports in the I / O port unit 57. Although there is switch information input from the ball dispensing device 97 to the main board 31, FIG.
Then they are omitted.

A hit ball launching device that hits and fires a game ball is driven by a drive motor 94 controlled by a circuit on a launch control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

FIG. 5 is a block diagram showing an example of a configuration around the CPU 56 for power supply monitoring and power supply backup. As shown in FIG. 5, the power supply monitoring IC 902
The occurrence of power interruption is detected by introducing a 30V voltage and monitoring the + 30V voltage. Specifically, when the voltage of +30 V falls below a predetermined value (for example, 80% of +30 V), a power-off signal is output assuming that power-off occurs. The power-off signal is input to an input port 570 connected to the CPU 56. Therefore, the CPU 56 determines that the input port 5
The status of the power interruption can be confirmed via 70.

It should be noted that the input port 570 is provided with a game ball detecting means (a starting port switch 17, a count switch 2 in this example) for detecting a game ball provided in the game machine.
3, prize port switches 19a, 24a, etc.) are input to empty bits of an input port for inputting the output signals. That is, the power-off signal is input to the input port 570 as detection input means for inputting detection information of the game ball detection means.

A power monitoring I as power monitoring means
The power-off signal from C902 only needs to be connected to the CPU 56 so that information can be transmitted.
May be a built-in port of the CPU 56 or an external port.

The predetermined value for the power supply monitoring IC 902 to detect the power cut-off is lower than the normal voltage.
Is a voltage that can operate for a while. Further, since the power supply monitoring IC 902 is configured to monitor a voltage higher than the voltage required by the CPU 56 (+5 V in this example) and immediately after conversion from AC to DC, the CPU 56 is required. It is possible to extend the monitoring range with respect to the voltage. Therefore, more precise monitoring can be performed. Further, when +30 V is used as the monitoring voltage, the voltage supplied to various switches of the gaming machine is +1.
Since it is 2 V, prevention of erroneous switch-on detection at the moment of a power interruption can be expected. That is, by monitoring the voltage of the +30 V power supply, it is possible to detect a decrease in the voltage of +12 V generated after the generation of +30 V before the voltage starts to drop. Therefore, when the voltage of the + 12V power supply decreases, the switch output comes to the on state. However, if the + 30V power supply voltage that drops faster than + 12V is monitored and the power cutoff is recognized, the power supply is turned on before the switch output turns on. It is possible to enter a state of waiting for restoration and to enter a state where the switch output is not detected.

While power is not being supplied from the + 5V power supply, at least a portion of the RAM is backed up by a backup power supply supplied from a power supply board, and the contents are preserved even when the power to the gaming machine is cut off. And +
When the 5V power is restored, a reset signal is issued from the initial reset circuit 65, and the CPU 56 returns to the normal operation state. At that time, since the necessary data is backed up, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

FIG. 6 is a block diagram showing an example of the configuration of the power supply board 910. The power supply board 910 includes a main board 31, a display control board 80, a sound control board 70, and a lamp control board 35.
And it is installed independently of the gaming machine control board such as the prize ball control board 37, and generates a voltage used by each gaming machine control board and mechanical components in the gaming machine. In this example, AC
Generates 24V, DC + 30V, DC + 21V, DC + 12V and DC + 5V. Further, the capacitor 916 serving as a backup power supply is charged from DC + 5V, that is, a power supply line for driving an IC or the like on each substrate.

The transformer 911 converts an AC voltage from an AC power supply to 24V. AC 24V voltage is applied to connector 9
15 is output. Further, the rectifier circuit 912 includes an AC24
A DC voltage of +30 V is generated from V and output to the DC-DC converter 913 and the connector 915. DC-D
The C converter 913 has + 21V, + 12V and + 5V.
V is generated and output to the connector 915. Connector 91
Reference numeral 5 is connected to, for example, a relay board, from which electric power of a voltage required for each game machine control board and mechanical components is supplied.

+5 V from DC-DC converter 913
The line branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 serves as a backup power supply for a backup RAM (RAM backed up by a power supply) of the gaming machine control board when power supply to the gaming machine is cut off. + 5V line and backup +5
A diode 917 for preventing backflow is inserted between the V line.

Note that a battery that can be charged from a +5 V power supply may be used as a backup power supply. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

Next, the operation of the gaming machine will be described. FIG.
9 is a flowchart showing a main process executed by the CPU 56 on the main board 31. When the power to the gaming machine is turned on, in the main processing, the CPU 56 first checks whether or not the power has been restored from the power failure (step S1). Whether or not recovery from a power failure has occurred is confirmed by, for example, a power-off flag set in the backup RAM area when the power is turned off. That is, at the time of recovery from a power failure, predetermined data is stored in the backup RAM area.
Can be determined based on whether the power-off flag has been set or not, based on the fact that the contents of the item are undefined.

If it is time to recover from a power failure, the CP
U56 executes a power failure recovery process described later (step S3). If not, an initialization process is performed.
Thereafter, in the main processing, the monitoring of the voltage abnormality (step S
The process shifts to a loop process in which 4) and monitoring of the timer interrupt flag (step S7) are confirmed. In the loop, a display random number update process (step S6) is also executed.

In the initialization process, as shown in FIG. 8, in the initialization process, the register and RAM are cleared (step S2a) and the necessary initial value setting process (step S2).
After b) is performed, the initial setting of the timer register provided in the CPU 56 (setting that the timeout is 2 ms and the operation of the repetitive timer) is performed so that the timer interrupt is periodically performed every 2 ms. (Step S2
c). That is, in step S2c, a process of activating a timer interrupt and a process of setting a timer interrupt interval are executed. Here, the initialization of the timer register is performed in the last part of the initialization processing, but the initialization of the timer register may be performed near the last part in the initialization processing.

The monitoring of the voltage abnormality in step S4 is executed by monitoring a power-off signal from the power-supply monitoring IC 902 via the input port 570. When detecting a voltage abnormality, that is, a drop in the power supply voltage, the CPU 56 executes a power failure generation process (power cutoff process: step S5) described later.

In this embodiment, the internal timer of the CPU 56 is set to repeatedly generate a timer interrupt. Such setting is performed, for example, in an initialization process (step S2). In this embodiment, the repetition period is set to 2 ms. Then, as shown in FIG. 9, when a timer interrupt occurs, the CPU 56 sets a timer interrupt flag (step S11).

When detecting that the timer interrupt flag is set in step S7, the CPU 56 resets the timer interrupt flag (step S7).
8), a game control process is executed (step S9). According to the above control, in this embodiment, the game control process is started every 2 ms.

FIG. 10 is a flowchart showing a game control process. In the game control process, the CPU 56 first performs a process of setting a display control command sent to the display control board 80 in a predetermined area of the RAM 55 (display control data setting process: step S21), and then executes the display control command. Output processing is performed (display control data output processing: step S22).

Next, processing for outputting the contents of the storage area for various output data to each output port is performed (data output processing: step S23). Further, an output data setting process for setting output data such as big hit information, start information, and probability variation information output to the hall management computer in the storage area is performed (step S24). Further, various abnormality diagnosis processes are performed by the self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S25).

Next, a process of updating each counter indicating a random number for determination, such as a random number for big hit determination used in game control, is performed (step S26).

Further, the CPU 56 performs a special symbol process (step S27). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Further, a normal symbol process is performed (step S28). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

Further, the CPU 56 includes a switch circuit 58
, The state of the gate sensor 12, the starting port sensor 17, the count sensor 23, and the winning port switches 19a and 24a are input, and it is determined whether or not each of the winning ports and the winning device has a winning (switch processing: step S29). .
The CPU 56 further performs a process of updating a display random number such as a random number that determines the type of stop symbol (step S3).
0).

The CPU 56 performs signal processing between the CPU 56 and the award ball control board 37 (step S31). That is,
When a predetermined condition is satisfied, a prize ball control command is output to the prize ball control board 37. The prize ball control CPU mounted on the prize ball control board 37 drives the ball payout device 97 according to the prize ball control command.

As described above, the main processing includes the processing for determining whether or not to shift to the game control processing.
Since a flag is set to determine whether or not to shift to the game control process in the timer interrupt process based on the timer interrupt that is periodically generated by the 56 internal timers, all the game control processes are reliably executed. Is done. In other words, until all of the game control processes have been executed, it is not determined whether or not to shift to the next game control process, so it is guaranteed that all processes in the game control process will be completed. ing.

In the conventional general game control process, the game machine is forcibly returned to the initial state by an external interrupt that occurs periodically. Explaining with reference to the example shown in FIG. 10, for example, even during the process of step S31, the process is forcibly returned to the process of step S21. In other words, there is a possibility that the next game control process will be started before all the processes in the game control process are completed.

In this embodiment, the determination of the power supply voltage drop (step S4) is repeatedly executed while waiting for the setting of the timer interrupt flag. That is, it is repeatedly executed before the start of the game control process (step S9). However, the power supply voltage drop determination process may be performed at an appropriate place during the game control process, and the power failure generation process (step S5) may be executed when the voltage drop is detected. In this way, when the timer interrupt flag is set and the game control process is started and before the game control process is completed, the determination of the power supply voltage drop is made. When a power-off signal is output from the power IC 902, the fact can be confirmed early, and the power failure occurrence processing can be started immediately. Also, immediately before the start of the game control process (step S9), the power supply voltage drop determination process is performed, and if a voltage drop is detected, a power failure generation process (step S9)
Step 5) may be executed. In this case, even when the power-off signal is output immediately after the timer interrupt occurs, the power failure generation process can be started immediately.

Here, the CPU 56 of the main board 31
Is executed in response to a flag set in a timer interrupt process based on a timer interrupt that is periodically generated by an internal timer of the CPU 56, but the signal is periodically (for example, every 2 ms). A hardware circuit which generates the signal may be provided, a signal from the circuit may be introduced to an external interrupt terminal of the CPU 56, and a flag for determining whether or not to shift to the game control process based on the interrupt signal may be set. Good. Even in such a configuration, the flag is not determined until all of the game control processing is executed, so that execution of all the processing during the game control processing is guaranteed to be completed.

FIG. 11 shows a power failure generation process (step S5).
6 is a flowchart illustrating an example of the above. In the power failure occurrence processing, the CPU 56 first sets interrupt prohibition (step S41). In the power failure occurrence process, a checksum generation process is performed to ensure that the contents of the RAM are preserved. If another interrupt process is performed during that process, the voltage may drop to a level at which the CPU cannot operate before the checksum generation process is completed. The setting is made so that no interrupt occurs.

Next, the CPU 56 turns off all the output ports (step S42). Then, if necessary, the contents of each register are stored in the backup RAM area (step S43). Further, an appropriate initial value is set in the backup check data area of the backup RAM area (step S44), and exclusive OR is sequentially performed on the initial value and the data of the backup RAM area (step S45) to obtain a final operation value. Is set in the backup parity data area (step S46). Thereafter, a loop is set with the RAM access prohibited (step S47). When the power supply voltage decreases, the levels of various signal lines may become unstable and the contents of the RAM may be corrupted. However, if the RAM access is prohibited in this manner, the data in the backup RAM may be corrupted. There is no.

The power-off flag may be set before the RAM access is prohibited. In that case,
As described above, the power-off flag can be used to determine whether or not recovery from a power failure has occurred at power-on.

FIG. 12 shows a power failure recovery process (step S3).
6 is a flowchart illustrating an example of the above. In the power failure recovery processing, the CPU 56 first performs data check (parity check in this example) of the backup RAM area (step S51). If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal.
If the check result is not normal, since the internal state cannot be returned to the state at the time of power failure, the same initialization processing as the initialization processing (step S2) executed at the time of power-on without power recovery is executed. (Steps S52 and S5
4).

If the check result is normal, the CPU 56
Performs a game state restoring process for returning the internal state to the state when the power is turned off (step S53).

Here, in step S1, it is confirmed whether or not the power is restored from the power failure. If the power is restored from the power failure, the parity check is performed. First, the parity check is executed, and the check result is normal. Otherwise, it is determined that it is not the recovery from the power failure, and the initialization processing of step S2 is executed, and if the check result is normal, the game state return processing may be performed. That is, it may be determined based on the result of the parity check whether recovery from a power failure has occurred.

FIG. 13 is an explanatory diagram for explaining a backup parity data creating method. However, FIG.
In the example shown in FIG.
The size of the data in the M area is 3 bytes. In the power failure generation process based on the power supply voltage drop, as shown in FIG. 13A, initial data (00H in this example) is set in the backup check data area. Next, "00
The exclusive OR of “H” and “F0H” is calculated, and the result is exclusive ORed with “16H”. Further, an exclusive OR of the result and “DFH” is obtained. Then, the result (“39H” in this example) is set in the backup parity data area.

When the power is turned on again, the parity diagnosis is performed in the power failure recovery processing. FIG. 13B is an explanatory diagram showing an example of the parity diagnosis. If all the data in the backup area is stored as it is, the data as shown in FIG. 13A is set in the backup area when the power is turned on again.

In the process of step S51, the CPU 5
6 is the data set in the backup parity data area of the backup RAM area (in this example, “39”).
H)) as initial data, a process of sequentially taking an exclusive OR for each data in the backup data area is performed.
If all the data in the backup area is stored as it is, the final calculation result is “00H”, that is, the same as the data set in the backup check data area. If a bit error has occurred in the data in the backup RAM area, the final calculation result is “00”.
H ".

Therefore, the CPU 56 compares the final operation result with the data set in the backup check data area, and if they match, determines that the parity diagnosis is normal. If they do not match, it is determined that the parity diagnosis is abnormal.

Hereinafter, the game state restoring process will be described. First, in this embodiment, the CP of the main substrate 31
A display control command, a sound control command, and a lamp control command that the U56 sends to the display control board 80, the sound control board 70, and the lamp control board 35 will be described.
Each control command is determined to be sent in accordance with the progress of the game in the special symbol process process (step S28) in the game control process shown in FIG. 10, and specific data is displayed in the display control data setting process (step S21). Is set, and is transmitted by being output from the output port in the display control data output process (step S22).

FIG. 14A is an explanatory diagram showing an example of the transmission timing of each control command relating to the symbol variation on the variable display section 9. In this embodiment, the C
When starting the symbol change, the PU 56 sends a change start command to each of the display control board 80, the sound control board 70, and the lamp control board 35. To the display control board 80, a symbol designating command indicating a fixed symbol of the middle left and right symbols is further transmitted.

When the symbol variation is determined, a variation stop command is sent to each of the display control board 80, the sound control board 70, and the lamp control board 35.
Each CPU mounted on the display control board 80, the sound control board 70, and the lamp control board 35 performs display control, sound generation control, and lamp lighting control according to the variation mode specified by the variation start command. The change start command includes information indicating the change time.

FIG. 14B is an explanatory diagram showing an example of the transmission timing of each control command related to the big hit game executed when the display result of the variable display section 9 is a predetermined big hit symbol. In this embodiment, the CPU of the main board 31
56 sends a big hit start command to each of the display control board 80, the sound control board 70, and the lamp control board 35 at the start of the big hit game. After a lapse of a predetermined time, a one-round (1R) designation command is transmitted. When each CPU mounted on the display control board 80, the sound control board 70, and the lamp control board 35 receives the big hit start command, it performs display control, sound generation control, and lamp lighting control at the start of the big hit. When a one-round designation command is received, display control, sound generation control, and lamp lighting control during a big hit are performed. However, the display control board 80
CPU performs the first round of display.

Thereafter, the CPU 56 of the main board 31 sequentially sends commands indicating each round to the display control board 80. The CPU of the display control board 80 performs corresponding display control according to these commands.

At the end of the big hit game, the CPU 56 of the main board 31 sends a big hit end command to each of the display control board 80, the sound control board 70 and the lamp control board 35. Then, after a predetermined time has elapsed, a normal screen display command is transmitted. Each gaming machine control means,
When a normal screen display command is received, the control state is set to a game waiting state.

FIG. 15 is a flowchart showing an example of the game state restoring process performed in the power failure restoring process shown in FIG. In this example, if it is necessary to restore the contents of the register, the CPU 56 restores the value stored in the backup RAM to the register (step S61). Then, the game state at the time of the power failure is confirmed based on the data stored in the backup RAM. For example, the gaming state can be confirmed by the value of the special symbol process flag corresponding to the progress of the special symbol process.

If the game state is a symbol change (step S62), control is performed to send a change start command to the display control board 80, the sound control board 70, and the lamp control board 35 (step S63). If the gaming state is a jackpot game (step S64), the last transmitted control command before the power failure is displayed on the display control board 8.
0, control to send to the sound control board 70 and the lamp control board 35 is performed (step S65). When the game state is other than the above, for example, the normal screen display command is transmitted to the display control board 80 and the sound control board 7.
0 and control to send to the lamp control board 35 is performed (step S66).

FIG. 16 is an explanatory diagram showing an example of a control state when the power is restored after a power failure occurs. In FIG. 16, the state of the variable display is realized by the CPU (display control means) of the display control board 80, and the state of the sound is the sound control board 7
0 is realized by the CPU (sound control means), and the state of the lamp is controlled by the CPU (lamp control means) of the lamp control board 35.
It is realized by.

FIG. 16 (A) shows an example of a case where the power is restored after a power failure occurs during a symbol change. In this case, when the power is restored, a change start command is sent from the main board 31 (step S63 in FIG. 15). Since the change start command is a command sent at the start of the symbol change,
The states of the variable display control, the sound control, and the lamp control return to the states at the start of the change. In this embodiment, the fluctuation start command includes information for specifying the fluctuation time, and the main board 3
After transmitting the fluctuation start command, the first CPU 56 does not transmit anything (except for the symbol designation command) until the finalization command at the end of fluctuation (fluctuation stop command). Therefore, if a power failure occurs during the symbol change, the change cannot be restarted from the state in the middle of the change, but the display control, sound control, and lamp control are synchronized by resending the change start command. Return to

In the main board 31, various parameters used at the start of the change are stored in the backup RAM. Therefore, the display results (fixed symbols) and the like in the fluctuations after the restoration of the power supply are the same as the display results and the like that would have been made in the fluctuations interrupted by the power failure. Therefore, there is no disadvantage to the player.

FIG. 16B shows an example of a case where the power is restored after a power failure occurs during the big hit game. In this case, when the power is restored, the command sent from the main board 31 to the display control board 80, the sound control board 70, and the lamp control board 35 last before the power failure is sent again (step S65 in FIG. 15). Therefore, the sound control and the lamp control return to the control state during the big hit game. In addition, the display control also returns to the state performed at the time of the power failure.

In the main board 31, various parameters during the big hit game (the number of times of opening the special winning opening, the number of winning balls of the special winning opening, etc.) are stored in the backup RAM. Therefore, since the game state for the player also returns to the state before the power failure, there is no disadvantage to the player.

As described above, the CPU 56 of the main board 31
(Gaming control means) inputs the output signal of the power supply monitoring means through the input port, and if the signal indicates a drop in the power supply voltage, creates RAM check data and stores it in the RAM, and then disables RAM access. Set to. Also,
When the power is turned on, the RA
An M check is performed to confirm whether the data has been correctly stored. Then, when it is confirmed that the game has been correctly saved, the game state is restored to the state at the time of power-off. Therefore, the game state at the time of power-off is preserved, and the accuracy at the time of restoration is guaranteed. Therefore, even if the power is cut off during the game, the game is resumed from the state at the time of the power cut off at the time of recovery, so that a disadvantage is prevented from being given to the player.

In the above embodiment, the case where the power supply monitoring process, the data saving process, and the restoration process are performed in the game control means has been described.
A part of the RAM in the lamp control unit and the display control unit is also backed up by a power source, and the display control unit, the sound control unit, and the lamp control unit may perform the above-described processing. However, the display control means, the sound control means, and the lamp control means do not need to perform the command transmission processing at the time of restoration.

Further, in the above-described embodiment, in the power failure occurrence processing, the loop is lastly performed for the power-off wait.
The output signal of the power supply monitoring means may be monitored to return to the original state when it is detected that the power supply has been restored. In the case of such a configuration, the game can be continued in a case where a momentary power interruption occurs and the power is restored in a short time.

[0090]

As described above, according to the present invention, a game machine is provided with a main routine for controlling a game control process for controlling a game state of the game machine and a transition condition for shifting to the game control process. Since the interruption process includes a sign setting process of setting a flag for determining whether the transition condition is satisfied in the determination process,
Until all of the game control processes are executed, it is not determined whether or not to shift to the next game control process, so that it is guaranteed that all processes in the game control process are completed. effective.

The game control microcomputer is configured to execute the determination process while repeatedly executing other processes when it is determined in the main routine that a shift condition for shifting to the game control process is satisfied. In this case, the surplus time of the execution time of the game control process can be effectively utilized.

In the case where the game control means is configured to execute, as another processing, a processing for judging a power supply voltage drop based on a signal from the power supply monitoring means, the execution time of the game control processing is reduced. Since the determination of the voltage drop is repeatedly performed in the extra time, the power failure detection can be effectively performed.

[0093] The main routine is configured so that after a flag for determining whether the transition condition is satisfied is set in the determination process and the game control process is started, a determination of a power supply voltage drop is made before the game control process ends. If the power supply voltage drops during the execution of the game control process, it can be confirmed earlier.

When the main routine is configured to perform the process of determining the power supply voltage drop before the start of the game control process, even when the power supply voltage drop occurs immediately after the timer interrupt occurs, the main routine is immediately executed. You can confirm that.

An emergency power supply for backing up the power of the RAM in the game control board is provided, and the game control means includes a process for preventing data destruction when the power is cut off when it is determined that the power supply voltage has dropped. When configured to execute power-off processing, necessary data is reliably stored even if a power failure occurs, so that it is possible to prevent the player from being disadvantaged. it can.

If the final part of the initialization process in the main routine is configured to include a process for activating the timer interrupt and a process for setting the timer interrupt interval, the game control process is started. Timer interrupts that are conditions can be set reliably.

When the processing for preventing data destruction at the time of power-off includes the RAM access prevention processing, there is an effect that the data in the RAM is not destroyed at the time of power-off.

If the power-off process includes a process of storing RAM check data obtained as a result of an operation related to the contents stored in the RAM in the RAM, the data is destroyed based on the check data when the power is restored. Can be checked, and the reliability of the stored data can be improved.

The gaming machine control microcomputer comprises:
In the processing at the time of power-on, the RAM storage content is checked based on the RAM check data, and if the check result is normal, the game state return processing is performed based on the RAM storage content. Since the game state return processing is always performed based on the normal storage contents, there is an effect that the game state return processing is correctly performed.

The gaming machine control microcomputer is
When the power is turned on, the contents of the RAM stored are checked based on the RAM check data. If the check result is not normal, the initialization processing is executed. This prevents the state from being restored.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is a front view of the gaming board of the pachinko gaming machine as viewed from the front.

FIG. 3 is a rear view of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a block diagram showing a circuit configuration example of a game control board (main board).

FIG. 5: C for power supply monitoring and power supply backup
FIG. 3 is a block diagram illustrating a configuration example around a PU.

FIG. 6 is a block diagram illustrating a configuration example of a power supply board.

FIG. 7 is a flowchart showing the operation of the basic circuit on the main board.

FIG. 8 is a flowchart showing an initialization process.

FIG. 9 is a flowchart showing a 2 ms timer interrupt process.

FIG. 10 is a flowchart showing a game control process.

FIG. 11 is a flowchart showing a power failure occurrence process.

FIG. 12 is a flowchart illustrating a power failure recovery process.

FIG. 13 is an explanatory diagram for describing a backup parity data creation method.

FIG. 14 is an explanatory diagram showing an example of transmission timing of each control command from the main board.

FIG. 15 is a flowchart illustrating an example of a game state restoration process.

FIG. 16 is an explanatory diagram illustrating an example of a control state when the power is restored after a power failure occurs.

[Explanation of symbols]

 1 Pachinko machine 31 Main board 53 Basic circuit 56 CPU 570 Input port 902 Power supply monitoring IC 910 Power supply board 916 Capacitor

Claims (11)

[Claims] 1. A game machine capable of providing a game result value to a player as a result of playing a predetermined game, comprising: a game control board on which game control means for controlling the progress of the game is provided; The control means includes a game control microcomputer that executes a game control program for performing game control, and the game control program includes at least a main routine, a subroutine called during execution of the main routine, and a timer interrupt. The main routine includes at least an initialization process, a game control process for controlling a game state of the gaming machine, and a transition condition for shifting to a game control process. And a determination process for determining whether a transition condition is satisfied in the determination process. Gaming machine characterized in that it comprises a setting process. 2. A game control microcomputer configured to execute a determination process while repeatedly executing other processes when determining a transition condition for shifting to a game control process in a main routine. The gaming machine according to claim 1, wherein 3. A game machine comprising a power supply monitoring means for monitoring a voltage drop of a power supply supplied to a game control board. The gaming machine according to claim 2, wherein the game control means executes a process of determining a power supply voltage drop based on the signal as another process. 4. The main routine performs a determination of a power supply voltage drop after a flag for determining whether the transition condition is satisfied is set in the determination process and the game control process is started, and before the game control process is completed. The gaming machine according to claim 3, wherein the gaming machine is configured. 5. The gaming machine according to claim 3, wherein the main routine is configured to perform a determination process of a power supply voltage drop before starting the gaming control process. 6. A game machine includes a backup power supply for backing up a power supply of a RAM in a game control board. The gaming machine according to claim 1, wherein a power-off process including a process is executed. 7. The gaming machine according to claim 1, wherein a final part of the initialization process in the main routine includes a process of activating a timer interrupt and a process of setting a timer interrupt interval. 8. The process for preventing data destruction when power is turned off includes a RAM access prevention process.
Or the gaming machine according to claim 7. 9. In the power-off processing, RAM check data obtained as a result of an operation related to the contents stored in the RAM is stored in the RAM.
9. The gaming machine according to claim 6, further comprising a process of storing the information in a game machine. 10. The gaming machine control microcomputer checks the contents stored in the RAM based on the RAM check data in a process when the power is turned on. If the check result is normal, the microcomputer returns to the game state based on the contents stored in the RAM. The gaming machine according to claim 6, wherein the gaming machine performs processing. 11. The gaming machine control microcomputer checks the contents stored in the RAM based on the RAM check data in a process when the power is turned on, and executes an initialization process if the check result is not normal. The gaming machine according to claim 10.