JP2001015460A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JP2001015460A JP2001015460A JP11186990A JP18699099A JP2001015460A JP 2001015460 A JP2001015460 A JP 2001015460A JP 11186990 A JP11186990 A JP 11186990A JP 18699099 A JP18699099 A JP 18699099A JP 2001015460 A JP2001015460 A JP 2001015460A
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- film
- buried
- wiring
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11186990A JP2001015460A (ja) | 1999-06-30 | 1999-06-30 | 半導体装置の製造方法 |
| US09/606,149 US6429134B1 (en) | 1999-06-30 | 2000-06-29 | Method of manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11186990A JP2001015460A (ja) | 1999-06-30 | 1999-06-30 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001015460A true JP2001015460A (ja) | 2001-01-19 |
| JP2001015460A5 JP2001015460A5 (enExample) | 2006-06-22 |
Family
ID=16198284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11186990A Pending JP2001015460A (ja) | 1999-06-30 | 1999-06-30 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6429134B1 (enExample) |
| JP (1) | JP2001015460A (enExample) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003001559A (ja) * | 2001-06-21 | 2003-01-08 | Mitsubishi Electric Corp | 化学的機械研磨方法、化学的機械研磨装置およびスラリー供給装置 |
| JP2005001018A (ja) * | 2003-06-09 | 2005-01-06 | Kao Corp | 基板の製造方法 |
| JP2005001019A (ja) * | 2003-06-09 | 2005-01-06 | Kao Corp | 基板の製造方法 |
| KR100467803B1 (ko) * | 2002-07-23 | 2005-01-24 | 동부아남반도체 주식회사 | 반도체 소자 제조 방법 |
| JP2006332437A (ja) * | 2005-05-27 | 2006-12-07 | Fujitsu Ltd | 被研磨膜の研磨方法 |
| EP1278241A3 (en) * | 2001-07-17 | 2007-01-17 | Matsushita Electric Industrial Co., Ltd. | Method for planarizing deposited film |
| JP2008141186A (ja) * | 2006-11-08 | 2008-06-19 | Ebara Corp | 研磨方法及び研磨装置 |
| WO2008072300A1 (ja) * | 2006-12-11 | 2008-06-19 | Renesas Technology Corp. | 半導体装置の製造方法、およびウェハの研磨方法 |
| WO2010079543A1 (ja) * | 2009-01-06 | 2010-07-15 | 信越半導体株式会社 | 半導体素子の製造方法 |
| JP2011176342A (ja) * | 2011-04-11 | 2011-09-08 | Ebara Corp | 研磨方法及び配線形成方法 |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3860528B2 (ja) | 2002-11-12 | 2006-12-20 | 株式会社東芝 | 半導体装置の製造方法 |
| US7300601B2 (en) * | 2002-12-10 | 2007-11-27 | Advanced Technology Materials, Inc. | Passivative chemical mechanical polishing composition for copper film planarization |
| US7736405B2 (en) * | 2003-05-12 | 2010-06-15 | Advanced Technology Materials, Inc. | Chemical mechanical polishing compositions for copper and associated materials and method of using same |
| US7109117B2 (en) * | 2004-01-14 | 2006-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for chemical mechanical polishing of a shallow trench isolation structure |
| KR100614773B1 (ko) * | 2004-12-28 | 2006-08-22 | 삼성전자주식회사 | 화학 기계적 연마 방법 |
| KR100607763B1 (ko) * | 2004-12-29 | 2006-08-01 | 동부일렉트로닉스 주식회사 | 두 단계의 절연막 연마 공정을 포함하는 반도체 제조 방법 |
| US7544618B2 (en) * | 2006-05-18 | 2009-06-09 | Macronix International Co., Ltd. | Two-step chemical mechanical polishing process |
| WO2008095078A1 (en) * | 2007-01-31 | 2008-08-07 | Advanced Technology Materials, Inc. | Stabilization of polymer-silica dispersions for chemical mechanical polishing slurry applications |
| JP4696086B2 (ja) * | 2007-02-20 | 2011-06-08 | 信越半導体株式会社 | シリコン単結晶ウエーハの仕上げ研磨方法及びシリコン単結晶ウエーハ |
| US7833893B2 (en) * | 2007-07-10 | 2010-11-16 | International Business Machines Corporation | Method for forming conductive structures |
| JP4489108B2 (ja) * | 2007-09-13 | 2010-06-23 | 株式会社東芝 | 半導体装置の製造方法 |
| US8569888B2 (en) | 2011-05-24 | 2013-10-29 | International Business Machines Corporation | Wiring structure and method of forming the structure |
| KR101673692B1 (ko) | 2014-11-07 | 2016-11-07 | 현대자동차주식회사 | 건식 실리카 입자를 포함하는 상변이 현탁 유체 조성물 및 이의 제조방법 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5665202A (en) * | 1995-11-24 | 1997-09-09 | Motorola, Inc. | Multi-step planarization process using polishing at two different pad pressures |
| JPH10128655A (ja) | 1996-10-31 | 1998-05-19 | Toshiba Corp | 研磨装置 |
| US5985748A (en) * | 1997-12-01 | 1999-11-16 | Motorola, Inc. | Method of making a semiconductor device using chemical-mechanical polishing having a combination-step process |
| US6106662A (en) * | 1998-06-08 | 2000-08-22 | Speedfam-Ipec Corporation | Method and apparatus for endpoint detection for chemical mechanical polishing |
| US6276987B1 (en) * | 1998-08-04 | 2001-08-21 | International Business Machines Corporation | Chemical mechanical polishing endpoint process control |
| JP3161425B2 (ja) * | 1998-09-09 | 2001-04-25 | 日本電気株式会社 | Stiの形成方法 |
| US6165052A (en) * | 1998-11-16 | 2000-12-26 | Taiwan Semiconductor Manufacturing Company | Method and apparatus for chemical/mechanical planarization (CMP) of a semiconductor substrate having shallow trench isolation |
| US6083840A (en) * | 1998-11-25 | 2000-07-04 | Arch Specialty Chemicals, Inc. | Slurry compositions and method for the chemical-mechanical polishing of copper and copper alloys |
-
1999
- 1999-06-30 JP JP11186990A patent/JP2001015460A/ja active Pending
-
2000
- 2000-06-29 US US09/606,149 patent/US6429134B1/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003001559A (ja) * | 2001-06-21 | 2003-01-08 | Mitsubishi Electric Corp | 化学的機械研磨方法、化学的機械研磨装置およびスラリー供給装置 |
| EP1278241A3 (en) * | 2001-07-17 | 2007-01-17 | Matsushita Electric Industrial Co., Ltd. | Method for planarizing deposited film |
| KR100467803B1 (ko) * | 2002-07-23 | 2005-01-24 | 동부아남반도체 주식회사 | 반도체 소자 제조 방법 |
| JP2005001018A (ja) * | 2003-06-09 | 2005-01-06 | Kao Corp | 基板の製造方法 |
| JP2005001019A (ja) * | 2003-06-09 | 2005-01-06 | Kao Corp | 基板の製造方法 |
| JP2006332437A (ja) * | 2005-05-27 | 2006-12-07 | Fujitsu Ltd | 被研磨膜の研磨方法 |
| JP2008141186A (ja) * | 2006-11-08 | 2008-06-19 | Ebara Corp | 研磨方法及び研磨装置 |
| WO2008072300A1 (ja) * | 2006-12-11 | 2008-06-19 | Renesas Technology Corp. | 半導体装置の製造方法、およびウェハの研磨方法 |
| WO2010079543A1 (ja) * | 2009-01-06 | 2010-07-15 | 信越半導体株式会社 | 半導体素子の製造方法 |
| JP2011176342A (ja) * | 2011-04-11 | 2011-09-08 | Ebara Corp | 研磨方法及び配線形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6429134B1 (en) | 2002-08-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060502 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060502 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080612 |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080701 |
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| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20081028 |