JP2001014212A - メモリ制御装置及び方法とそれを用いた描画装置及び印刷装置 - Google Patents
メモリ制御装置及び方法とそれを用いた描画装置及び印刷装置Info
- Publication number
- JP2001014212A JP2001014212A JP11180839A JP18083999A JP2001014212A JP 2001014212 A JP2001014212 A JP 2001014212A JP 11180839 A JP11180839 A JP 11180839A JP 18083999 A JP18083999 A JP 18083999A JP 2001014212 A JP2001014212 A JP 2001014212A
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- prefetch
- controller
- transaction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Memory System (AREA)
- Image Input (AREA)
- Image Processing (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11180839A JP2001014212A (ja) | 1999-06-25 | 1999-06-25 | メモリ制御装置及び方法とそれを用いた描画装置及び印刷装置 |
| US09/598,198 US6697882B1 (en) | 1999-06-25 | 2000-06-21 | Memory controller and method control method, and rendering device and printing device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11180839A JP2001014212A (ja) | 1999-06-25 | 1999-06-25 | メモリ制御装置及び方法とそれを用いた描画装置及び印刷装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001014212A true JP2001014212A (ja) | 2001-01-19 |
| JP2001014212A5 JP2001014212A5 (enExample) | 2005-07-14 |
Family
ID=16090267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11180839A Withdrawn JP2001014212A (ja) | 1999-06-25 | 1999-06-25 | メモリ制御装置及び方法とそれを用いた描画装置及び印刷装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6697882B1 (enExample) |
| JP (1) | JP2001014212A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020081508A (ja) * | 2018-11-28 | 2020-06-04 | 株式会社藤商事 | 遊技機 |
| JP2022060443A (ja) * | 2019-01-16 | 2022-04-14 | 株式会社藤商事 | 遊技機 |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002366509A (ja) * | 2001-06-06 | 2002-12-20 | Mitsubishi Electric Corp | ダイレクトメモリアクセスコントローラおよびそのアクセス制御方法 |
| JP4085983B2 (ja) * | 2004-01-27 | 2008-05-14 | セイコーエプソン株式会社 | 情報処理装置およびメモリアクセス方法 |
| WO2009037970A1 (ja) * | 2007-09-21 | 2009-03-26 | Murata Manufacturing Co., Ltd. | 落下検知装置、磁気ディスク装置および携帯電子機器 |
| US9444757B2 (en) | 2009-04-27 | 2016-09-13 | Intel Corporation | Dynamic configuration of processing modules in a network communications processor architecture |
| US9218290B2 (en) * | 2009-04-27 | 2015-12-22 | Intel Corporation | Data caching in a network communications processor architecture |
| US9461930B2 (en) | 2009-04-27 | 2016-10-04 | Intel Corporation | Modifying data streams without reordering in a multi-thread, multi-flow network processor |
| US9384136B2 (en) | 2013-04-12 | 2016-07-05 | International Business Machines Corporation | Modification of prefetch depth based on high latency event |
| JP6294732B2 (ja) * | 2014-03-31 | 2018-03-14 | 株式会社メガチップス | データ転送制御装置及びメモリ内蔵装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08263424A (ja) * | 1995-03-20 | 1996-10-11 | Fujitsu Ltd | コンピュータ装置 |
| US5978866A (en) * | 1997-03-10 | 1999-11-02 | Integrated Technology Express, Inc. | Distributed pre-fetch buffer for multiple DMA channel device |
| US6012106A (en) * | 1997-11-03 | 2000-01-04 | Digital Equipment Corporation | Prefetch management for DMA read transactions depending upon past history of actual transfer lengths |
| TW406229B (en) * | 1997-11-06 | 2000-09-21 | Hitachi Ltd | Data process system and microcomputer |
-
1999
- 1999-06-25 JP JP11180839A patent/JP2001014212A/ja not_active Withdrawn
-
2000
- 2000-06-21 US US09/598,198 patent/US6697882B1/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020081508A (ja) * | 2018-11-28 | 2020-06-04 | 株式会社藤商事 | 遊技機 |
| JP2022060443A (ja) * | 2019-01-16 | 2022-04-14 | 株式会社藤商事 | 遊技機 |
| JP7250971B2 (ja) | 2019-01-16 | 2023-04-03 | 株式会社藤商事 | 遊技機 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6697882B1 (en) | 2004-02-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
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| A977 | Report on retrieval |
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| A521 | Written amendment |
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| A761 | Written withdrawal of application |
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