JP2000349419A - Conductive pad and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To raise reliability in conductive connection by forming a base material layer comprising a nickel or an alloy whose main component is nickel on the surface of a pad forming part while a surface coat layer comprising a silver or alloy whose main component is silver is formed on the surface of the base material layer. SOLUTION: A base material layer 122a comprising nickel as the main component including phosphorus is formed on the surface of a chip-side pad forming part 121 of a copper pattern by an electroless plating method, over which a coat layer 122c of silver is formed by an electroless plating method. Since, with this configuration, the coat layer 122c is formed on the base material layer 122a whose main component is nickel, the flatness and hardness of a conductive pad is assured while bonding characteristics as well as adhesion of the surface coat layer 122c is improved. Further, the fact that the main component of the surface coat layer 122c is silver gives joint strength. So, the reliability in conductive connection is raised both by bonding and metal- jointing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductive pad and a method of manufacturing the same, and more particularly, to a conductive pad having a surface coating layer made of silver or an alloy mainly containing silver and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventional BGA (Ball Grid Array)
In a semiconductor integrated circuit package of the type, an integrated circuit chip made of a silicon semiconductor or the like is connected to a wiring pattern formed on a substrate or film made of a synthetic resin or a ceramic (hereinafter, simply referred to as an “interposed substrate”). It is configured by performing appropriate resin sealing (resin molding) as necessary. A plurality of terminal bonding pads arranged in a grid are formed in the wiring pattern of the interposer board, and solder balls are bonded to these terminal bonding pads to form protruding electrodes. Such a ball grid array type integrated circuit package can easily cope with a multi-input / output structure or a high-density electrode structure by its grid-like electrode arrangement, and has a protruding electrode to reduce the mounting process. Since the yield can be remarkably improved, it is attracting attention as an effective method for reducing the total mounting cost of an integrated circuit package having a high degree of integration. This type of integrated circuit package includes a printed circuit board-shaped interposer board that is relatively larger than the chip size of the integrated circuit chip, and a small area or film-shaped chip having a size substantially equal to the chip size called a CSP. There have been proposed ones including an interposer board.

[0003]

However, among the protruding electrodes provided on the BGA type integrated circuit package, a conductor such as a solder ball is formed by arranging on a terminal bonding pad and bonding. The protruding electrode, for example, before and after mounting on a printed circuit board, especially when subjected to stress from the side of the protruding shape due to insufficient bonding strength at the bonding interface between the terminal bonding pad and the protruding electrode It may break. Therefore, a test has been performed in which a predetermined stress is applied from the side to measure the ball shear strength in a state where a conductor is bonded to the terminal bonding pad of the interposer board and a protruding electrode is formed.

In general, when a conductive connection is made on a conductive pad by wire bonding or the like, a method has been devised to cover the surface of the conductive pad with gold plating or the like to improve the electrical bonding characteristics with a gold wire or the like. Therefore, even when the protruding electrodes are formed, the surface of the terminal bonding pad may be covered with gold plating or the like in order to improve the electrical characteristics between the protruding electrodes and the integrated circuit chip. However, in some cases, gold plating can increase the ball shear strength, but the adhesion between the gold plating and the wiring pattern or the underlying layer is unstable, and the ball shear strength varies greatly. Therefore, there is a problem that it is difficult to supply a stable quality product. In addition, the problems described above are not limited to solder balls, but use plastic balls whose surfaces are coated with a conductor by plating or the like, or use bumps on terminal bonding pads instead of balls by plating. This also occurs when forming.

Further, as described above, conductive pads are formed on conductive connecting portions of various electronic components and the like, and the above-mentioned solder balls and bonding wires are conductively connected to the conductive pads. Because it is difficult to set a common structure and material that can be used for various applications as a conductive pad, and it is necessary to form a conductive pad with a different structure and material depending on the application,
There is a problem that the manufacturing cost increases. For example, when the terminal bonding pad for bonding the solder balls and the like as described above has the same material and structure as the chip connection pad for connecting the semiconductor chip and the like, the surface coating layer made of a gold plating layer or the like is used. If formed, the variation in ball shear strength at the terminal bonding pad will increase, and
When a surface coating layer made of a silver plating layer or the like is formed, there is a problem that the bonding property and adhesion of the chip connection pad are reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to realize a structure and a material of a conductive pad suitable for various uses to constitute a highly reliable conductive connection portion. is there. Another object of the present invention is to provide a structure and a material having excellent bonding and adhesion properties even for a conductive pad having silver or a surface coating layer mainly composed of silver.

[0007]

In order to solve the above-mentioned problems, a conductive pad according to the present invention is a conductive pad having a surface coating layer on a pad forming portion of a conductor formed on the surface of a substrate. A base layer made of nickel or a nickel-based alloy is formed on the surface of the pad forming portion, and the surface coating layer made of silver or a silver-based alloy is formed on the surface of the base layer. It is characterized by becoming.

According to the present invention, the surface flatness and hardness of the surface of the conductive pad can be ensured by forming the surface coating layer on the underlayer made of nickel or an alloy mainly containing nickel. Therefore, the bonding property and the adhesion of the surface coating layer can be improved, and at the same time, since the surface coating layer is made of silver or an alloy mainly composed of silver, solder balls, pump electrodes, and the like are joined. In this case, the bonding strength can be increased, so that the reliability of the conductive connection is increased both in the case where the conductive connection is formed by bonding to the conductive pad and in the case where the conductive connection is formed by metal bonding. be able to.

In this case, for example, a chip connecting portion having a predetermined wiring pattern, a plurality of chip connecting pads conductively connected to the wiring pattern, and a plurality of terminal bonding pads conductively connected to the wiring pattern are provided. A terminal connection portion, wherein the chip connection portion is configured to be directly or indirectly conductively connected to a plurality of input / output portions of the integrated circuit chip, and the terminal connection pad of the terminal connection portion has a protruding electrode. It is preferable to use a conductive pad according to the present invention for both the terminal bonding pad and the chip connection pad, which is a package insertion substrate configured to be bonded to a conductor to be formed. In this case, since both surfaces of the chip connection pad and the terminal bonding pad are constituted by a surface coating layer made of silver or an alloy mainly composed of silver, both surface coating layers (and a base layer) are formed simultaneously. By reducing the number of manufacturing processes,
By using silver, the material cost can be lower than that of gold, so that the manufacturing cost can be reduced. In addition, since the chip connection pad has a structure in which a silver coating layer is formed on an underlayer made of nickel or an alloy mainly composed of nickel, flatness and hardness of the pad surface can be ensured, so that wire bonding is also possible. There is no problem and the reliability of the conductive connection to the chip can be maintained. At this time, a surface coating layer may be directly formed on the surface of the terminal-side pad formation portion without interposing an underlayer for the terminal bonding pad.

In the present invention, the conductor is preferably copper or an alloy mainly containing copper. According to the present invention, a surface coating layer is formed on a conductor made of copper or an alloy mainly composed of copper (for example, a wiring pattern made of copper foil (such as a copper-clad printed circuit board) or copper plating) via an underlayer. Since it is formed, the adhesion between the pad forming portion of the conductive pad and the underlying layer is also improved, and the strength of the entire conductive pad can be improved.

In the present invention, the silver coating layer has a thickness of about 0.0
Preferably, the thickness is 5 to 0.15 μm. According to the present invention, the surface of the underlayer can be uniformly coated by forming the surface coating layer made of silver or an alloy mainly composed of silver to a thickness within the above range, and the surface coating layer can be formed uniformly. Since peeling of the conductive pad can be prevented, the strength of the conductive pad can be increased.

Next, a method for manufacturing a conductive pad according to the present invention comprises:
An underlayer made of nickel or an alloy mainly containing nickel is formed on the surface of the pad forming portion of the conductor formed on the surface of the base material, and silver or an alloy mainly containing silver is formed on the surface of the underlayer. Forming a surface coating layer to be formed.

In the present invention, the underlayer is preferably formed by an electroless plating method. According to the present invention, a wiring pattern for plating required for electrolytic plating is not required by forming a base layer made of nickel or an alloy containing nickel as a main component by an electroless plating method. Processing can be performed easily even in the case of an electrode arrangement. In particular, it is desirable that the surface coating layer is also formed by an electroless plating method as described later.

In the present invention, the surface coating layer is preferably formed by an electroless plating method. According to the present invention, a wiring pattern for plating required for electrolytic plating is not required by forming a surface coating layer made of silver or an alloy mainly composed of silver by an electroless plating method. In addition, even in the case of the electrode arrangement, the processing can be easily performed. In particular, by forming with a substitution type electroless plating solution, the adhesiveness between the substrate and the underlying layer can be increased, so that the strength of the terminal bonding pad can be increased.

In the present invention, it is preferable that after forming the underlayer, the surface of the underlayer is subjected to an etching treatment. By etching the surface of the underlayer, the adhesion of the surface coating layer can be further improved, and a strength comparable to that of the gold / nickel laminated structure can be obtained.

In the present invention, it is preferable that the etching treatment is a treatment for treating the surface of the underlayer with an acid. As the etching treatment, an acid treatment is most preferable from the viewpoint of improving adhesion, and it is particularly preferable to use sulfuric acid. When sulfuric acid is used, a concentration of about 5 to 15 vol% is effective. In this case, it is preferable to use an aqueous solution.

The above-described expression of the invention as the package insertion board and the method of manufacturing the same can be applied to any of the above claims. In particular, when a chip connection portion is provided on one surface of a package insertion substrate and a terminal connection portion is provided on the other surface, it is preferable to form a surface coating layer on both sides simultaneously.
At this time, it is preferable that the surface coating layer is formed by an electroless plating method, and it is particularly preferable that the surface coating layer is a substitution type electroless plating. In addition, it is preferable that the underlayer is also formed by an electroless plating method.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a conductive pad and a method for manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings. This embodiment also shows a mode that can be applied to the embodiment of the package insertion substrate to which the present invention can be applied and the method of manufacturing the same. FIG. 1 is a schematic cross-sectional view showing a schematic structure of a BGA (ball grid array) package using a package insertion substrate provided with a conductive pad according to the present embodiment. The interposer board 10 of this embodiment has the same material as the printed circuit board made of a synthetic resin such as an epoxy resin mixed with glass fibers. As the interposer board 10, in addition to such a board, a tape-shaped or film-shaped board made of polyimide resin or the like, or a metal board can also be used.

A wiring pattern 11 including a plurality of wirings 11a is formed inside and on the surface of the interposer board 10. The wiring pattern 11 may be formed only on the surface of the interposer board 10, and may have a structure in which portions formed on the upper and lower surfaces are conductively connected via through holes, or It may have one or more wiring layers inside the interposer board 10. In the latter case,
The interposer 10 can be formed by bonding, build-up, or the like.

The chip connecting portion 12 is provided on the upper surface of the insertion board 10.
In the chip connection portion 12, a large number of arranged chip connection pads 12a connected to the wirings 11a in the wiring pattern 11 are formed. An integrated circuit chip 21 is fixed inside the chip connection portion 12. A conductive wire 22 made of a gold wire or the like is welded to the input / output pad 21a formed on the integrated circuit chip 21 and the chip connection pad 12a by wire bonding.
a and the chip connection pad 12a are conductively connected.
A resin mold 23 is provided on the upper surface of the interposer 10,
The chip connection pads 12a, the semiconductor chip 21, and the conductive wires 22 are sealed.

A terminal joint 13 is provided on the lower surface of the interposer 10, and the terminal joint 13 has a wiring pattern 11.
Bonding pads 1 respectively connected to wirings 11a
3a are arranged in a lattice. Each terminal bonding pad 13
The solder balls 24 are respectively welded and joined to a. The solder balls 24 are connected to the terminal bonding pads 13a.
The protruding electrode protrudes from the lower surface of the interposer board 10 by being joined thereon.

The insertion board 10 of the present embodiment is, for example, as shown in FIG.
Is manufactured in the state of a so-called BGA wiring board 100, which is a mother board shown in FIG. 1, and is finally divided into individual interposed boards 10 by a cutting step or the like. Processing such as mounting of the integrated circuit chip 21, molding, and bonding of the semiconductor balls 24 may also be performed in the state of the BGA wiring board 100. In the BGA wiring board 100, a plurality of the interposer boards 10 are integrally arranged vertically and horizontally. The BGA wiring board 100 includes a plurality of insertion boards 10
The chip connecting portion 12 and the terminal joining portion 13 corresponding to the above are configured.

In the present embodiment, the wiring pattern 11 made of a copper pattern is formed on the upper and lower surfaces of the chip connecting portion 12. When a copper-clad substrate is used as the BGA substrate 100, the wiring pattern is formed by a patterning process using a photolithography method. Alternatively, after a copper plating film is formed on a base material, a patterning process may be performed. Further, when a wiring layer is provided inside the substrate, the wiring pattern 11 is formed by a build-up method or bonding. In addition, a pad formation portion described later provided on the chip connection pad 12a and the terminal bonding pad 13a is also formed simultaneously with the wiring pattern 11.

FIG. 2 is a schematic sectional view showing a sectional structure of the BGA wiring board 100. As shown in FIG. In the BGA wiring board 100, a part of the wiring pattern 11 is formed on the upper surface of a base material 101 made of fiber-reinforced synthetic resin or the like, and a chip-side pad forming portion 121 is formed at an end of each wiring 11a. Substrate 1
An insulating film 102 covering the wiring 11a connected to the chip-side pad formation portion 121 is formed on the upper surface of the chip 01 so as to avoid the chip-side pad formation portion 121. Further, a part of the wiring pattern 11 is also formed on the lower surface of the base material 101, and the terminal-side pad forming portion 1 is formed at the end of each wiring 11a.
31 are formed. Each of the wirings 11 a having the terminal-side pad formation portion 131 at the end is conductively connected to the chip-side pad formation portion 121. On the lower surface of the base material 101, an insulating film 103 covering a wiring portion connected to the terminal-side pad formation portion 131 is provided.
1 is formed.

A surface layer 122 is laminated on the surface of the chip-side pad formation section 121, and the chip-side pad formation section 1 is formed.
The chip connection pad 12 is constituted by the layer 21 and the surface layer 122. On the other hand, the surface layer 132 is also laminated on the surface of the terminal-side pad forming portion 131, and the terminal bonding pad 13 is constituted by the terminal-side pad forming portion 131 and the surface layer 132. The planar shape of the terminal-side pad forming portion 131 is as shown in FIG.
Numeral 31 is provided at the leading end of each wiring 11a of the wiring pattern 11 with a slightly wider width. Terminal-side pad formation section 131
Are arranged in parallel in a lattice as shown in FIG. 7B.

FIG. 3 is an enlarged sectional view showing the structure of the chip connection pad 12a in the chip connection portion 12. As shown in FIG. The chip connection pad 12a is formed by forming an underlayer 122a mainly containing nickel and containing phosphorus by an electroless plating method on the surface of the chip-side pad formation portion 121 made of the above-described copper pattern, and further covering the surface with silver. The layer 122c is formed by an electroless plating method. in this case,
The underlayer 122a and the covering layer 122c are
Constituting No. 2.

An outline of a method for manufacturing the surface layer 122 will be described below. The wiring pattern 11 on the upper surface of the BGA wiring board 100 is covered with the insulating film 102 made of a resist or the like except for a part where the chip-side pad formation part 121 is formed. First, in this state, the BGA wiring board 100
Degreasing (for example, “ACID CLEANE”)
R 1022 "or" ACID CLEANER 81 "
1 "(both manufactured by Shipley Far East). ) And soft etching with acid (for example, “PRE
POSIT ETCH 748 "(manufactured by Shipley Far East). ), And then PDC-
10W (manufactured by Ishihara Pharmaceutical Co., Ltd., trademark or product number)
To activate the copper surface of the chip-side pad formation section 121. This PDC-10C has a palladium chloride of 0.1%.
It is an aqueous solution mainly containing 42% and 20% of sodium acetate.

Next, the surface of the chip-side pad formation portion 121 is electrolessly plated by electroless plating to form an underlayer 1 made of a nickel film.
22a is formed. The plating solution used in this plating is NIPOSIT for 75 ml of ion exchanged water.
65M (manufactured by Shipley Far East Co., Ltd., trademark, product number) is 18.75 ml and NIPO
6.25 ml of SITR (manufactured by Shipley Far East Co., Ltd., trade name, product number) was added to each, followed by stirring to adjust the liquid temperature to 85 to 93 ° C, preferably 88 ° C. Here, the pH of the plating solution is 4.6 to 4.
8, preferably 4.7.

The substrate was immersed in the above-mentioned plating solution for about 30 minutes to form an underlayer 122a having a thickness of about 5 μm. The above plating solution contains a compound of phosphorus (hypophosphite or the like) together with nickel, and the average composition of the formed underlayer 122a is 93% by weight of nickel and about 7% by weight of phosphorus.
It is prepared so that

Next, after cleaning, the substrate on which the underlayer 122a is formed is immersed in sulfuric acid (an aqueous solution having a sulfuric acid concentration of 5 to 15 vol%), and the surface of the underlayer 122a is subjected to an acid treatment. The processing time varies depending on the sulfuric acid concentration and the configuration of the processing apparatus, but is usually adjusted in the range of about 30 seconds to 5 minutes. Thereafter, the substrate surface is sufficiently washed.

Finally, substitutional silver plating is performed on the surface of the acid-treated underlayer 122a to form the coating layer 122.
Form c. First, “AGPOSIT 7100” (manufactured by Shipley Far East Co., Ltd.) is sprayed on the upper surface of the BGA wiring substrate 100 by a spray method, and a degreasing process is performed to remove organic substances from the surface of the chip-side pad forming section 121. Thereafter, a water washing process is performed by a spray method. Next, moisture is removed from the surface of the substrate by air blow, immersed in “AGPOSIT 7200” (manufactured by Shipley Far East Co., Ltd.), and the surface of the chip-side pad forming section 121 is subjected to etching. Thereafter, a water washing treatment is performed again by a spray method.

Next, it is immersed in "AGPOSIT 7300" (manufactured by Shipley Far East Co., Ltd.) to prevent the introduction of impurities into the silver plating bath. Next, "AGPOS
The substrate is immersed in a plating bath formed by "IT7400" (manufactured by Shipley Far East Co., Ltd.), and silver electroless plating is performed. Thereafter, a water washing treatment is performed again by a spray method. In the electroless plating, a substitution-type reaction is performed on the surface of the chip-side pad forming section 121, and silver is deposited while melting nickel on the surface. The amount of nickel eluted and the amount of silver deposited were approximately 1: 1 under the conditions of the present embodiment. Next, "A
GPOSIT 7500 "to stabilize the deposited silver film.

The thickness of the coating layer 122c formed of silver plating formed by electroless plating using this plating bath is about 0.1
μm. The thickness of the coating layer 122c is 0.05
It is particularly desirable that the thickness be in the range of 0.15 μm to improve the bonding characteristics described later. If the thickness is less than 0.05 μm, the underlying layer 122a on the surface of the chip-side pad forming portion 121 may not be completely covered, and the bonding characteristics and adhesion strength of a conductor such as a solder ball may be reduced. Conversely, if the thickness exceeds 0.15 μm, the coating layer 122c may be easily peeled off, or the contact characteristics may be affected by oxidation or the like. The coating layer 122c deposited on the surface of the chip-side pad forming portion 121 has a silver nitrate composition in the case of the present embodiment.

As another example of the configuration of the chip-side pad formation section 121, as described above, the chip-side pad formation section 12
Instead of performing the activation process on the surface of No. 1, as shown in FIG. 4, electroless plating of palladium is performed on the surface of the chip-side pad forming portion 121 to form a palladium layer 122 d, and a base layer 122 a is formed thereon May be. The palladium layer 122d makes the adhesion characteristics of the underlayer 122a uniform, and improves the quality of the underlayer 122a.

Next, referring to FIG.
The structure of 3a and its manufacturing method will be described. The terminal bonding pad 13a is formed by forming a surface layer 132 made of a thin silver plating layer on the surface of a terminal-side pad forming portion 131 made of a copper pattern. The formation of the surface layer 132 is performed as follows. First, “AGPOSIT 7100” (manufactured by Shipley Far East Co., Ltd.) is sprayed on the lower surface of the BGA wiring board 100 by a spray method, and a degreasing process is performed to remove organic substances from the surface of the terminal-side pad forming section 131. Thereafter, a water washing process is performed by a spray method. Next, moisture is removed from the surface of the substrate by air blow, immersed in “AGPOSIT 7200” (manufactured by Shipley Far East Co., Ltd.), and the surface of the terminal-side pad forming section 131 is subjected to etching. Thereafter, a water washing treatment is performed again by a spray method.

Next, it is immersed in “AGPOSIT 7300” (manufactured by Shipley Far East Co., Ltd.) to prevent impurities from being brought into the silver plating bath. Next, "AGPOS
The substrate is immersed in a plating bath formed by "IT7400" (manufactured by Shipley Far East Co., Ltd.), and silver electroless plating is performed. Thereafter, a water washing treatment is performed again by a spray method. In the electroless plating, a substitution-type reaction is performed on the surface of the terminal-side pad forming portion 131, and silver is deposited while melting the copper on the surface. The amount of copper eluted and the amount of silver deposited were approximately 1: 1 under the conditions of the present embodiment. Next, "AGPOSIT
7500 "to stabilize the deposited silver coating.

The thickness of the surface layer 132 of silver plating formed by electroless plating in this plating bath is about 0.1 μm.
m. The thickness of the surface layer 132 is 0.05 to
It is particularly desirable that the thickness be within the range of 0.15 μm in order to enhance the bonding characteristics described later. If the thickness is less than 0.05 μm, the surface of the terminal-side pad forming portion 131 may not be completely covered, and the bonding characteristics and adhesion strength of a conductor such as a solder ball may be reduced. Conversely, if it exceeds 0.15 μm, the surface layer 132 may be easily peeled off, or the contact characteristics may be affected by oxidation or the like. The surface layer 132 deposited on the surface of the terminal-side pad forming portion 131 has a silver nitrate composition in this embodiment.

Next, an example of a processing procedure of the BGA wiring board 100 will be described. First, the BGA wiring board 100
Is completely covered with a plating resist (a resist which has resistance to a plating solution and can be removed without affecting an underlying insulating film, a conductor pattern, and the like). Then, electroless nickel plating is performed on the chip-side pad forming portion 121 formed on the upper surface of the BGA wiring board 100 by the above-described method, and the underlying layer 122 is formed.
a is formed. Next, after the cleaning, the plating resist is removed, and the cleaning is performed again. By applying electroless silver plating on the front and back simultaneously, the covering layer 122c is formed on the underlayer 122a formed on the upper surface of the BGA wiring substrate 100 by the above method, and the chip connection pads 12a are formed. The surface layer 132 is formed on the surface of the terminal-side pad forming portion 131 to form the terminal bonding pad 13a. Finally, the entire BGA wiring board 100 is cleaned.

The BGA wiring board 10 configured as described above
In the case of No. 0, sufficiently good bonding properties with respect to the gold wire were obtained in the chip connection pad 12a, and the contact characteristics and reliability of the conductive connection portion were good. Further, in the terminal bonding pad 13a, the variation was smaller than that of the conventional solder ball, and the ball shear strength was stable and a sufficient value was obtained.

In the above embodiment, the terminal bonding pad 13
a, the surface layer 13 is formed on the terminal-side pad formation portion 131;
2 is formed directly, but similarly to the chip connection pad 12a, an underlayer made of nickel or an alloy mainly composed of nickel is formed on the terminal-side pad formation portion 131 (underlayer 1).
22a), and the surface layer 132 may be formed on the surface of the underlayer. In this case, the front and back of the BGA wiring board 100 can be processed at the same time, and it is not necessary to cover one of them with the plating resist.

It should be noted that the package insertion board of the present invention is not limited to the illustrated example described above, and it is a matter of course that various changes can be made without departing from the scope of the present invention.

[0042]

As described above, according to the present invention,
Since the surface coating layer is formed on the base layer made of nickel or an alloy mainly composed of nickel, the flatness and hardness of the surface of the conductive pad can be ensured. At the same time that the adhesiveness can be improved, the surface coating layer is made of silver or an alloy mainly composed of silver, so that the bonding strength when solder balls, pump electrodes, etc. are bonded can be increased. Therefore, the reliability of the conductive connection can be increased in both cases where the conductive connection is formed by bonding to the conductive pad and where the conductive connection is formed by metal bonding.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a schematic structure of a BGA package using an embodiment of a package insertion board according to the present invention.

FIG. 2 is a partially enlarged cross-sectional view showing a part of the package insertion board of the embodiment in an enlarged manner.

FIG. 3 is an enlarged cross-sectional view showing a structural example of a chip connection pad formed on the surface of the package insertion board of the embodiment.

FIG. 4 is an enlarged cross-sectional view showing another example of the structure of the chip connection pad formed on the surface of the package insertion substrate of the embodiment.

FIG. 5 is an enlarged cross-sectional view showing a structural example of a terminal bonding pad formed on the surface of the package insertion board of the embodiment.

FIG. 6 is a partially sectional perspective view showing a planar shape of the terminal bonding pad of the embodiment.

FIG. 7A is a schematic perspective view showing the upper surface of the BGA wiring substrate of the embodiment, and FIG. 7B is a schematic perspective view showing the lower surface of the BGA wiring substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Package insertion board 11 Wiring pattern 11a Wiring 12 Chip connecting part 12a Chip connecting pad 13 Terminal bonding part 13a Terminal bonding pad 100 BGA wiring board 101 Base material 102, 103 Insulating film 121 Chip side pad forming part 122 Surface layer 122a Base layer 122c Coating layer 131 Terminal side pad formation part 132 Surface layer (Coating layer)

Continuation of the front page (72) Inventor Toru Suzuki F-term (reference) 5E343 AA15 AA17 AA18 AA22 AA33 BB17 BB24 BB25 BB44 BB55 CC33 CC73 DD33 DD76 within 1-83-1 Takashimadaira, Itabashi-ku, Tokyo EE37 GG01 GG13

Claims (8)

[Claims] 1. A conductive pad provided with a surface coating layer on a pad forming portion of a conductor formed on a surface of a base material, wherein nickel or an alloy mainly composed of nickel is formed on the surface of the pad forming portion. A conductive pad, comprising: a base layer made of silver; and the surface coating layer made of silver or an alloy mainly containing silver is formed on the surface of the base layer. 2. The conductive pad according to claim 1, wherein the conductor is copper or an alloy mainly containing copper. 3. The package insertion substrate according to claim 1, wherein the surface coating layer is formed to a thickness of about 0.05 to 0.15 μm. 4. An underlayer made of nickel or an alloy mainly composed of nickel is formed on a surface of a pad formation portion of a conductor formed on a surface of a base material, and silver or silver is formed on the surface of the underlayer. A method for producing a conductive pad, comprising forming a surface coating layer formed of a main alloy. 5. The method according to claim 4, wherein the underlayer is formed by an electroless plating method. 6. The method for manufacturing a conductive pad according to claim 4, wherein the surface coating layer is formed by an electroless plating method. 7. Any one of claims 4 to 6
4. The method for manufacturing a conductive pad according to claim 1, wherein the surface of the underlayer is etched after the underlayer is formed. 8. The method for manufacturing a conductive pad according to claim 7, wherein the etching treatment is to treat the surface of the underlayer with an acid.