JP2000277543A - Adhesive sheet for semiconductor device, part using the same, and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve resistance to reflow, thermal cycling performance and machinability, by using a thermoplastic resin, a thermosetting resin, and a thermosetting adhesive containing zinc oxide for the adhesive layer of a laminate. SOLUTION: The inner lead 5 of a substrate for connecting a semiconductor integrated circuit is thermocompression-bonded on the gold bump 2 of an IC 1 to mount the IC 1 on the substrate. An adhesive layer 6 using a thermoplastic resin such as acrylonitrile-butadiene copolymer and polybutadiene, a thermosetting resin such as epoxy resin, phenol resin, and melamine resin, and a thermosetting adhesive containing zinc oxide is laminated on the IC 1 and a flexible insulating film 3 formed on an adhesive layer 4 constituting a wiring substrate layer. This can improve resistance to reflow, thermal cycling performance and machinability.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device adhesive sheet used for mounting and packaging a semiconductor integrated circuit (IC), a component using the same, and a semiconductor device. More specifically, ball grid array (BGA), land grid array (LGA)
A wiring board layer composed of an insulating layer and a conductor pattern constituting a substrate for connecting a semiconductor integrated circuit used for a surface mount package of a type, and a metal reinforcing plate (stiffener,
The present invention relates to an adhesive sheet for a semiconductor device which is used for bonding between heat spreaders and has excellent reliability such as reflow resistance and thermal cycling properties and processability, a component using the same, and a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor integrated circuit (IC) package, a dual in-line package (DIP),
Package forms such as a small outline package (SOP) and a quad flat package (QFP) have been used. However, with the increase in the number of pins of the IC and the miniaturization of the package, the limit of the QFP having the largest number of pins is approaching its limit. This is due to the difficulty in handling due to the narrow pitch between external terminals (leads) and the difficulty in obtaining solder printing accuracy on the printed board, particularly when mounting on a printed board. Therefore, in recent years, a BGA method, an LGA method, a PGA method and the like have been put to practical use as means for increasing the number of pins and reducing the size. Above all, the BGA method has attracted a great deal of attention not only because it can be reduced in cost, weight and thickness by using a plastic material, but also because it can be surface-mounted.

FIG. 1 shows an example of the BGA system. The BGA method is characterized in that solder balls 9 corresponding to the number of pins of an IC are provided in a grid shape (area array) as external connection terminals of a semiconductor integrated circuit connection board to which the IC is connected. The connection to the printed board is performed by batch reflow in which the solder ball surface is placed so as to match the conductor pattern of the printed board on which the solder is already printed, and the solder is melted by reflow. The feature of the package is that the connection terminals are arranged on the back surface of the package as compared with the conventional IC package in which the connection terminals are arranged around the QFP or the like, and more connection terminals can be arranged in a small space at a wide interval. It is in. For this reason, on the mounting surface, it is possible to reduce the mounting area and increase the mounting efficiency.

[0004] A chip scale package (CSP) is one that has further advanced this function, and is called a micro BGA because of its similarity. The present invention relates to these BGs.
The present invention can be applied to a CSP having an A structure.

On the other hand, the BGA package has (a) flatness of the solder ball surface, (b) reflow resistance, (c) heat dissipation,
There are problems such as (d) thermal cyclability and (e) easy workability.

As a method of improving these, a method of laminating a material such as a metal plate for reinforcement (maintaining flatness), heat radiation, and electromagnetic shielding on a substrate for connecting a semiconductor integrated circuit is generally used. . In particular, it becomes important when a TAB tape or a flexible substrate is used for a wiring board layer composed of an insulating layer and a conductor pattern for connecting an IC.

Therefore, the substrate for connecting a semiconductor integrated circuit is
As illustrated in FIG. 2, a wiring board layer including an insulator layer 11 and a conductor pattern 13 for connecting an IC, a reinforcing plate (stiffener), a heat sink (heat spreader),
Layer 1 on which no conductor pattern such as a shield plate is formed
5, and at least one adhesive layer 14 for laminating them. These semiconductor integrated circuit connection substrates are prepared in advance as intermediate products by laminating an adhesive composition in a semi-cured state on either a wiring substrate layer or a layer on which no conductor is formed. And cured by heating.

Finally, the adhesive layer 14 remains inside the package. From the above points, the properties required for the adhesive layer 14 include (a) reflow resistance, and (b) stress absorption occurring between different materials such as a wiring board layer and a reinforcing plate during a temperature cycle or reflow. Low stress), (c) easy workability,
(D) Insulation when laminated on wirings, and the like.

Among them, important requirements are reflow resistance,
Easy processing and thermal cycle resistance.

[0010] The reflow resistance is determined by a method in which the adhesive layer is used in a mounting step in which the entire package is heated to a high temperature of 210 to 270 ° C, such as immersion in a solder bath, heating with a saturated vapor of an inert gas (a vapor phase method), or infrared reflow. It peels off and reduces the reliability of the package. It is said that the peeling in the reflow process is caused by the explosion of water that has been absorbed between the curing of the adhesive layer and the mounting process explosively turning into steam during heating. A method has been used in which a package that has been completely dried and stored in a sealed container is shipped.

Easy workability is a characteristic required in manufacturing and processing steps. For the adhesive sheet for semiconductor devices, a punching step for temporarily bonding to a slit and a metal plate at the B stage (preliminary curing step of the adhesive) is indispensable from the manufacturing and processing steps. In addition, good slitting and punching of the adhesive are required.

The thermal cycle resistance is a characteristic required for a package having a large number of pins, such as a BGA, because the temperature of the package exceeds 100 ° C. during operation. In order to alleviate this, a low elastic modulus is required.

[0013] For these reasons, various improvements in adhesives have been studied. For example, as an adhesive layer having excellent thermal cycle resistance, a thermoplastic resin or a silicone elastomer having a low elastic modulus has been proposed.

[0014]

However, the method of enclosing a dry package in a container has the drawback that the manufacturing process and the handling of the product are complicated, and the price of the product is extremely high. In addition, although various proposed adhesives have an effect of improving thermal cycle resistance, they do not satisfy reflow resistance and workability.

It is an object of the present invention to provide an adhesive sheet for a semiconductor device which solves the problems caused in the reflow process and has excellent reflow resistance, thermal cycleability and workability, and a component and a semiconductor device using the same. Is to do.

[0016]

Means for Solving the Problems That is, at least one
In an adhesive sheet for a semiconductor device having a laminate comprising at least a protective film layer and an adhesive layer, the adhesive layer comprises a thermoplastic resin (A), a thermosetting resin (B), and zinc oxide (C). An adhesive sheet for a semiconductor device, which is a thermosetting adhesive contained therein, a component using the same, and a semiconductor device.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of the present invention will be described below in detail.
The adhesive sheet for a semiconductor in the present invention is a stiffener, a heat spreader, an interlayer adhesive for a semiconductor element or a wiring board (interposer), and the shape and material of the adherend are not particularly limited.

It is important that the adhesive layer in the present invention is composed of a thermosetting adhesive composition containing a thermoplastic resin (A), a thermosetting resin (B) and zinc oxide (C). is there.

The thermoplastic resin (A) contained in the adhesive layer of the present invention is not particularly limited as long as it gives flexibility to the adhesive layer. Specific examples thereof include acrylonitrile-butadiene copolymer. Coal (NBR), acrylonitrile-butadiene rubber-styrene resin (ABS), polybutadiene, styrene-butadiene-ethylene resin (SE
BS), acrylic, polyvinyl butyral, polyamide, polyethylene, polyester, polyimide, polyamideimide, polyurethane and the like. Further, these thermoplastic resins preferably have a functional group capable of reacting with a thermosetting resin described later in order to improve heat resistance. Specific examples include an amino group, a carboxyl group, an epoxy group, a hydroxyl group, a methylol group, an isocyanate group, a vinyl group, and a silanol group.

Among them, a copolymer containing butadiene as an essential copolymer component is preferably used in terms of adhesiveness, flexibility and thermal stress relaxation. Particularly, acrylonitrile-butadiene copolymer (N
BR), styrene-butadiene-ethylene resin (SEB)
S), styrene-butadiene resin (SBS) and the like are preferred. Further, a copolymer having butadiene as an essential copolymer component and having a carboxyl group is preferably used, and specific examples thereof include NBR having a carboxyl group (NBR-C).
And SEBS having a carboxyl group (SEBS-
C).

The thermosetting resin (B) contained in the adhesive layer of the present invention includes known resins such as epoxy resin, phenol resin, melamine resin, xylene resin, furan resin, cyanate ester resin, and maleimide resin. Can be Particularly, epoxy resin and phenol resin are preferable because of their excellent insulating properties.

The epoxy resin is not particularly limited as long as it has two or more epoxy groups in one molecule. Specific examples thereof include, for example, cresol novolak type epoxy resin, phenol novolak type epoxy resin, bisphenol A type Epoxy resins, bisphenol F type epoxy resins, biphenyl type epoxy resins, naphthalene type epoxy resins, dicyclopentadiene type epoxy resins, brominated bisphenol A type epoxy resins, brominated bisphenol F type epoxy resins, and the like.

As the phenol resin, any known phenol resin such as a novolak phenol resin and a resol phenol resin can be used. For example, alkyl-substituted phenols such as phenol, cresol, pt-butylphenol, nonylphenol, and p-phenylphenol; cyclic alkyl-modified phenols such as terpene and dicyclopentadiene; and heterocycles such as nitro, halogen, cyano, and amino groups. Those having a functional group containing atoms, naphthalene, those having a skeleton such as anthracene,
Examples of resins include polyfunctional phenols such as bisphenol F, bisphenol A, bisphenol S, resorcinol, and pyrogallol.

The amount of the thermosetting resin (B) is 5 to 90% by weight, preferably 10 to 70% by weight in the adhesive composition.
More preferably, it is 20 to 60% by weight.

The zinc oxide (C) contained in the adhesive layer of the present invention is not particularly limited in terms of particle size and shape, but usually has an average particle size of 2 μm or less in terms of dispersibility and coatability. , Preferably 0.5 μm or less. Here, the average particle diameter is measured by, for example, an air permeation method. The amount of zinc oxide (C) is 0.5 to 50% by weight, preferably 1 to 40% by weight in the adhesive composition.
More preferably, it is 1 to 30% by weight, and more preferably 4 to 20% by weight. By adding 0.5% by weight or more, good reflow resistance and workability can be maintained. If it is less than 0.5% by weight, the effect of improving workability is insufficient.

In the present invention, reflow resistance and workability are further improved by adding an inorganic filler (D) in addition to zinc oxide (C) contained in the adhesive layer of the present invention. be able to. Inorganic filler (D)
As specific examples of, for example, crystalline silica powder, fused silica powder, alumina, silicon nitride, aluminum hydroxide, magnesium hydroxide, calcium aluminate hydrate,
Examples include zirconium oxide, antimony trioxide, antimony pentoxide, magnesium oxide, titanium oxide, iron oxide, cobalt oxide, chromium oxide, talc, aluminum, gold, silver, nickel, and iron. Among them, aluminum hydroxide, alumina, and fused silica are preferable from the viewpoint of dispersibility, and those having an average particle diameter of 0.1 to 20 μm are preferably used. The blending amount of the inorganic filler (D) is 1 to 90% by weight, preferably 3 to 70% by weight, and more preferably 5 to 50% by weight.

In the present invention, reflow resistance can be further improved by adding a curing agent for a thermosetting resin and a curing accelerator (E) to the adhesive layer. For example, triethylamine, benzyldimethylamine, α-
Tertiary amine compounds such as methylbenzyldimethylamine, 2- (dimethylaminomethyl) phenol, 2,4,6-tris (dimethylaminomethyl) phenol and 1,8-diazabicyclo (5,4,0) undecene-7; 3,3'5,5'-tetramethyl-4,4'-diaminodiphenylmethane, 3,3'5,5'-tetraethyl-4,4'-diaminodiphenylmethane, 3,3'-
Dimethyl-5,5'-diethyl-4,4'-diaminodiphenylmethane, 3,3'-dichloro-4,4'-diaminodiphenylmethane, 2,2'3,3'-tetrachloro-4,4'-diamino Diphenylmethane, 4,4'-
Diaminodiphenyl sulfide, 3,3'-diaminobenzophenone, 3,3'-diaminodiphenylsulfone, 4,4'-diaminodiphenylsulfone, 3,4 '
Aromatic amines such as diaminodiphenylsulfone, 4,4′-diaminobenzophenone and 3,4,4′-triaminodiphenylsulfone; amine complexes of boron trifluoride such as triethylamine boron trifluoride; 2-alkyl- 4-methylimidazole, 2-phenyl-4-
Imidazole derivatives such as alkylimidazole, organic acids such as phthalic anhydride and trimellitic anhydride, dicyandiamide, triphenylphosphine, trimethylphosphine, triethylphosphine, tributylphosphine, tri (p-methylphenyl) phosphine and tri (nonylphenyl) phosphine A known compound such as an organic phosphine compound can be used. These may be used alone or in combination of two or more. The amount added is 100 for the adhesive composition.
It is preferably 0.1 to 50 parts by weight based on parts by weight.

Although the thickness of the adhesive layer of the present invention can be appropriately selected depending on the specification of the package, it is preferably 5 to 500 μm, more preferably 20 to 200 μm.

The component for a semiconductor device (hereinafter referred to as a component) of the present invention is a material in an intermediate processing stage used for producing a substrate for connecting a semiconductor integrated circuit and a semiconductor device. The component has at least one of a wiring board layer composed of an insulator layer and a conductor pattern and / or a layer on which no conductor pattern is formed and an adhesive layer having a protective layer.
It has a configuration having more than one layer. For example, a flexible printed circuit board or a TAB tape is used as a wiring board layer composed of an insulator layer and a conductor pattern, and a wiring board with an adhesive in which a B-stage adhesive layer having a silicone-treated polyester protective film on one or both sides thereof is laminated. As a layer on which no conductor pattern is formed, for example, a metal plate of copper, stainless steel, 42 alloy or the like is used, and an adhesive layer of a B stage having a protective film on one side or both sides thereof is provided with an adhesive as described above. A metal plate (such as a stiffener with an adhesive) corresponds to the component of the present invention. A so-called adhesive in which a B-stage adhesive layer having a protective film is laminated on the outermost layer, even when there is at least one wiring board layer composed of an insulator layer and a conductor pattern and at least one layer on which no conductor pattern is formed. A substrate for connecting a semiconductor integrated circuit is also included in the component of the present invention.

The protective layer referred to here is usually composed of a protective film, and is not particularly limited as long as it can be peeled off without impairing its form and function before bonding the adhesive layer. Specific examples thereof include polyester, polyolefin, and the like. Plastic films such as polyphenylene sulfide, polyvinyl chloride, polytetrafluoroethylene, polyvinyl fluoride, polyvinyl butyral, polyvinyl acetate, polyvinyl alcohol, polycarbonate, polyamide, polyimide, polymethyl methacrylate, etc. Examples include films coated with a mold agent, paper laminated with these films, and paper impregnated or coated with a releasable resin. The thickness of the protective film is 20 μm or more, preferably 25 μm from the viewpoint of heat resistance.
The thickness is more preferably 35 μm or more.

The peel strength of the protective layer from the adhesive layer is preferably from 1 to 200 N / m, more preferably from 3 to 100 N / m.
N / m. If it is lower than 1 N / m, the protective film tends to fall off, and if it exceeds 200 N / m, peeling becomes difficult, which is not preferable.

The semiconductor device according to the present invention means a device using the substrate for connecting a semiconductor integrated circuit according to the present invention.
The shape and structure are not particularly limited as long as the package is a BGA type or LGA type package. The connection method between the semiconductor integrated circuit connection substrate and the IC can be any of TAB gang bonding and single point bonding, wire bonding used for a lead frame, resin sealing by flip chip mounting, anisotropic conductive film connection, etc. Good. Further, a package called a CSP is also included in the semiconductor device of the present invention.

The wiring board layer is a layer having a conductor pattern for connecting the electrode pads of the semiconductor element to the outside of the package (such as a printed board), and has a conductor pattern formed on one or both sides of the insulator layer. Things.

The insulator layer referred to here is made of a plastic such as polyimide, polyester, polyphenylene sulfide, polyether sulfone, polyether ether ketone, aramid, polycarbonate, polyarylate or a composite material such as epoxy resin impregnated glass cloth. A flexible insulating film having a thickness of 10 to 125 μm, a ceramic substrate made of alumina, zirconia, soda glass, quartz glass, or the like is suitable, and a plurality of layers selected from these may be used in a stacked state. If necessary, hydrolysis, corona discharge, low-temperature plasma,
Surface treatment such as physical roughening and easy adhesion coating treatment can be performed.

The formation of the conductor pattern is generally performed by either the subtractive method or the additive method, but any of them may be used in the present invention.

In the subtractive method, a metal plate such as a copper foil is bonded to the insulator layer with an insulating adhesive, or a precursor of the insulator layer is laminated on the metal plate, and the insulator layer is formed by heat treatment or the like. A pattern is formed by etching the material created by the forming method by chemical treatment. Specific examples of the material include a rigid or flexible printed circuit board copper bonding material and a TAB tape. Among them, a copper paste material for flexible printed circuit boards or a TAB tape using at least one or more polyimide films as an insulator layer and a copper foil as a conductor pattern is preferably used.

In the additive method, a conductor pattern is directly formed on an insulator layer by electroless plating, electrolytic plating, sputtering, or the like. In any case, the formed conductor may be plated with a metal having high corrosion resistance to prevent corrosion. Also, via holes may be formed in the wiring board layer as necessary, and conductive patterns formed on both sides may be connected by plating.

The metal plate is used for reinforcing and dimensionally stabilizing the wiring board (referred to as a reinforcing plate or a stiffener).
C electromagnetic shielding, heat dissipation of IC (referred to as heat spreader, heat sink), imparting flame retardancy to the semiconductor integrated circuit connection substrate, imparting discriminability by the shape of the semiconductor integrated circuit connection substrate, etc. It carries the function.
Accordingly, the shape may be not only a layer shape but also a fin structure for heat dissipation, for example. As long as it has the above function, it may be an insulator or a conductor, and the material is not particularly limited. As metal, copper,
Inorganic materials such as iron, aluminum, gold, silver, nickel, and titanium are alumina, zirconia, soda glass,
Examples of organic materials such as quartz glass and carbon include polyimide, polyamide, polyester, vinyl, phenol and epoxy polymer materials. Further, a composite material obtained by combining these can also be used.
For example, those having a shape in which thin metal plating is applied on a polyimide film, those having conductivity by kneading carbon into a polymer, those having a metal plate coated with an organic insulating polymer, and the like are mentioned. Also, if necessary,
The insulator layer can be subjected to surface treatment such as hydrolysis, corona discharge, low-temperature plasma, physical roughening, and easy adhesion coating.

Next, an example of an adhesive sheet for a semiconductor device of the present invention, components constituting the same, and a method of manufacturing a semiconductor device will be described.

(1) Preparation of a Wiring Board Consisting of an Insulator Layer and a Conductive Pattern: A three-layer TAB tape in which an adhesive layer 18 and a protective layer are laminated on a polyimide film 17 is prepared as follows (a) to (d). Process by the process of (A)
Perforation of sprocket 19 and device hole 20, (b)
Thermal lamination with copper foil, (c) pattern formation (resist coating, etching, resist removal), (d) tin or gold plating. FIG. 3 illustrates the shape of the obtained TAB tape (pattern tape). (2) Preparation of a layer on which no conductor pattern is formed: A metal plate such as a copper plate or a stainless plate having a thickness of 0.05 to 0.5 mm is degreased with acetone.

(3) Preparation of adhesive layer: A coating solution in which the adhesive composition is dissolved in a solvent is applied on a polyester film 24 having releasability and dried. The thickness of the adhesive layer is 10
It is preferable to apply so as to have a thickness of 100 μm. Drying conditions are 100 to 200 ° C. for 1 to 5 minutes. The solvent is not particularly limited, but aromatic solvents such as toluene, xylene and chlorobenzene, ketones such as methyl ethyl ketone and methyl ethyl isobutyl ketone, dimethylformamide,
Aprotic polar solvents such as dimethylacetamide and N-methylpyrrolidone alone or in a mixture are preferred. An adhesive sheet is obtained by further laminating a polyester or polyolefin-based protective film 24 having a weak release force and releasability on the coated and dried adhesive layer 23.
When the thickness of the adhesive is further increased, the adhesive sheet may be laminated plural times. In some cases, after the lamination, the degree of curing may be adjusted by aging, for example, at 40 to 100 ° C. for about 1 to 200 hours. FIG. 5 shows an example (cross-sectional view) of the configuration of the adhesive sheet for a semiconductor device of the present invention.

(4) Preparation of a component (wiring board with adhesive) of a substrate for connecting a semiconductor integrated circuit: A protective film on one side of the adhesive sheet prepared in (3) is peeled off from the wiring board in (1). And then laminate. The laminate surface may be either a surface with or without a conductor pattern. Laminating temperature 20 ~ 200 ℃, pressure 0.1 ~ 3M
Pa is preferred. Finally, depending on the shape of the semiconductor device,
Punching and cutting are performed as appropriate. FIG. 2 shows an example (cross-sectional view) of the component of the present invention.

(5) Preparation of a component (stiffener with adhesive) of a substrate for connecting a semiconductor integrated circuit: after peeling off the protective film on one side of the adhesive sheet prepared in (3) above on the metal plate (2). Laminate. A lamination temperature of 20 to 200 ° C. and a pressure of 0.1 to 3 MPa are preferred.
Alternatively, the coating of (3) may be directly applied to (2) and dried, and a protective film may be laminated. Finally, punching and cutting are performed as appropriate depending on the shape of the semiconductor device. FIG. 4 shows an example (cross-sectional view) of the component of the present invention.

(6) Preparation of a semiconductor device: The inner lead portion of the substrate for connecting a semiconductor integrated circuit of (4) is thermocompression-bonded (inner lead bonding) to the gold bump 2 of the IC 1.
The IC is mounted. Next, a semiconductor device is manufactured through a resin sealing process using the sealing resin 10. The obtained semiconductor device is connected via a solder ball 9 to a printed circuit board or the like on which other components are mounted, and mounted on an electronic device. Also,
It is also possible to use a so-called TCP type semiconductor device in which an IC is connected in advance to the wiring board of the above (1) and sealed with resin. FIG. 1 is a cross-sectional view of one embodiment of a semiconductor device of the present invention.

[0045]

EXAMPLES The present invention will be described in more detail with reference to the following examples, but the present invention is not limited to these examples.

Examples 1 to 7, Comparative Examples 1 to 3 The following thermoplastic resin, thermosetting resin and other additives were blended so as to have the composition ratios shown in Table 1, respectively.
An adhesive solution was prepared by stirring and dissolving in a mixed solvent of DMF (dimethylformamide) / monochlorobenzene / MIBK (methyl isobutyl ketone) at 40 ° C. so as to have a concentration of 28% by weight.

A. B. Thermoplastic resin NBR-C (PNR-1H, manufactured by Nippon Synthetic Rubber Co., Ltd.) Thermosetting resin 1. Epoxy resin Bisphenol A type epoxy resin (Epoxy equivalent: 18
6) 2. Phenol resin Phenol novolak resin (Gunei Chemical Industry Co., Ltd., P
SM4261) C.I. Zinc oxide I. Zinc oxide having an average particle size of 3.0 μm II. Zinc oxide having an average particle size of 1.0 μm III. Zinc oxide having an average particle size of 0.27 μm The average particle size of the zinc oxide is measured by an air permeation method.

D. B. Inorganic filler aluminum hydroxide (average particle size: 1.0 μm) Curing agent, curing accelerator 4,4'-diaminodiphenyl sulfone II. Hexamethylenetetramine III. Triphenylphosphine.

These adhesive solutions were applied to a 25 μm-thick silicated polyethylene terephthalate film I with a bar coater to a dry thickness of about 50 μm, and dried at 100 ° C., 1 minute and 150 ° C. for 5 minutes. Then, an adhesive sheet was prepared. On the other hand, an adhesive solution was similarly applied to a polyethylene terephthalate film II having a lower peeling force than polyethylene terephthalate I so as to have a thickness of about 50 μm, and then dried. A 100 μm adhesive sheet was prepared. The sheet was measured for adhesive strength, workability was evaluated, the sheet was attached to a semiconductor connection substrate to produce a semiconductor connection substrate component, and insulation reliability, thermal cycleability, and reflow resistance were measured. The measurement was performed as follows. Table 1 shows the results.

(1) Preparation of evaluation pattern tape TAB tape with adhesive (# 7100, Toray Industries, Inc.)
18 μm electrolytic copper foil at 140 ° C., 0.1 MPa
Were laminated under the following conditions. Then 80 in the air oven
C., 3 hours, 100.degree. C., 5 hours, 150.degree. C., and 5 hours were sequentially heated and cured to prepare a TAB tape with a copper foil. A photoresist film was formed on the copper foil surface of the obtained TAB tape with copper foil, etching, and resist peeling were performed by a conventional method to prepare a pattern tape sample for evaluation.

(2) Adhesive strength An adhesive sheet was placed on a polyimide film (75 μm: “UPILEX 75S” manufactured by Ube Industries, Ltd.) at 40 ° C.
Lamination was performed under the conditions of MPa. Then 0.35mm
Thick SUS304 was further laminated on the surface of the adhesive sheet laminated on the polyimide film under the conditions of 130 ° C. and 1 MPa.
C., 1 hour, and 150.degree. C., 1 hour, were sequentially heated to prepare a sample for evaluation. After slitting the polyimide film to a width of 5 mm, the polyimide film having a width of 5 mm is peeled off at a speed of 50 mm / min in a 90 ° direction,
The adhesive force at that time was measured.

(3) Insulation Reliability A 100 μm thick adhesive composition was formed on the conductor pattern surface of a comb-shaped evaluation sample having a conductor width of 100 μm and a distance between conductors of 100 μm of the pattern tape for evaluation of (1).
A 0.1 mm thick pure copper plate with an adhesive layer of
After laminating at 0.1 ° C. and 0.1 MPa, a heat curing treatment was performed at 170 ° C. for 2 hours in an air oven. Using the obtained sample, in a state where a voltage of 100 V was continuously applied in a thermo-hygrostat at 85 ° C. and 85% RH, the resistance value was measured immediately after the measurement and after 200 hours.

(4) Thermal Cycling Property A 50 μm-sized semiconductor connection substrate having a conductor width of 100 μm and a distance between conductors of 100 μm was formed on a 30 mm square semiconductor connecting substrate.
After laminating an adhesive sheet having a thickness of 40 m at 40 ° C. and 1 MPa, a 30 mm square 0.25 m
SUS304 having a thickness of m was pressure-bonded at 150 ° C. and 75 MPa. Thereafter, the composition was cured at 150 ° C. for 2 hours to prepare a sample for evaluating thermal cyclability.

Ten 30 mm square samples were placed in a heat cycle tester (Model PL-3, manufactured by Tabai Espec Co., Ltd.) at -20 ° C. to 100 ° C. at a minimum and maximum temperature of 30 samples each.
600 cycles were performed under the condition of minute holding, and the occurrence of peeling was evaluated using an ultrasonic flaw detector.

(5) Reflow Resistance Twenty 30 mm square samples prepared in the same manner as the sample for evaluating thermal cycleability were allowed to absorb moisture at 85 ° C./85% RH for 24 hours. 230 ° C, 10
The sample was subjected to IR reflow for 2 seconds, and the peeled state was observed with an ultrasonic flaw detector.

(6) Workability The adhesive sheet in the B-stage state was punched out using a punch punching machine to prepare a workability evaluation sample. The punched state of the sample was visually observed and observed with a stereoscopic microscope of 50 times. ×: The adhesive was not cut easily at the time of punching, the adhesive was carried, the adhesive was protruded, and the film was cracked. Were evaluated as difficult to punch out, Δ = somewhat good, ○ = good.

[0057]

[Table 1]

The components of the substrate for connecting a semiconductor integrated circuit obtained by the present invention from the examples and comparative examples shown in Table 1 are excellent in workability, adhesive strength, insulation reliability, reflow resistance and thermal cycle properties. I understand.

[0059]

According to the present invention, a thermosetting adhesive sheet for a semiconductor device having excellent workability, adhesive strength, insulation reliability, reflow resistance and thermal cycling properties, a component using the same, and a semiconductor device. Could be obtained. Further, the reliability of the semiconductor device for surface mounting could be improved.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of one embodiment of a BGA type semiconductor device using a semiconductor device adhesive composition and a semiconductor adhesive sheet used in the present invention.

FIG. 2 is a schematic cross-sectional view of one embodiment of a component (wiring board with an adhesive) of a substrate for connecting a semiconductor integrated circuit according to the present invention.

FIG. 3 is a schematic perspective view of one embodiment of a pattern tape (TAB tape) constituting a substrate for connecting a semiconductor integrated circuit.

FIG. 4 is a schematic cross-sectional view of one embodiment of a component (a heat spreader with an adhesive) of a substrate for connecting a semiconductor integrated circuit according to the present invention.

FIG. 5 is a cross-sectional view of one embodiment of the adhesive sheet for a semiconductor device of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semiconductor integrated circuit 2 Gold bump 3, 11, 17 Insulating film having flexibility 4, 12, 18 Adhesive layer constituting wiring board layer 5, 13, 21 Conductor for connecting semiconductor integrated circuit 6, 14, 23 Adhesive layer composed of the adhesive composition of the present invention 7, 15 Layer on which no conductor pattern is formed (stiffener, heat spreader) 8, 16 Solder resist 9 Solder ball 10 Sealing resin 19 Sprocket hole 20 Device hole 22 Conductor for solder ball connection 24 Protective film layer constituting adhesive sheet of the present invention

Continued on the front page F-term (reference) 4J004 AA05 AA07 AA08 AA10 AA11 AA12 AA13 AA14 AA15 AA16 AA18 AB05 CA06 CC02 FA05 4J040 CA051 CA052 CA071 CA072 DA021 DA022 DD071 DD072 DF041 DF042 DG001 DG01 EB001 DL142 ED001 ED002 EF001 EF002 EG001 EG002 EH021 EH022 EH031 EH032 EL031 EL032 GA07 HA136 JA09 JB02 KA03 LA07 MA02 MA10 NA20 5F047 BA33 BA37 BA51 BB03

Claims (7)

[Claims] 1. An adhesive sheet for a semiconductor device having a laminate comprising at least one protective film layer and an adhesive layer, wherein the adhesive layer is a thermoplastic resin (A) or a thermosetting resin (B). And a thermosetting adhesive containing zinc oxide (C). 2. The adhesive sheet for a semiconductor device according to claim 1, wherein the average particle size of the zinc oxide (C) is 2 μm or less. 3. The adhesive sheet for a semiconductor device according to claim 1, wherein the average particle size of the zinc oxide (C) is 0.5 μm or less. 4. The content of zinc oxide (C) is 1 to 30% by weight.
The adhesive sheet for a semiconductor device according to claim 1, wherein 5. A semiconductor device component in which a protective film layer, an adhesive layer, and a metal plate are laminated in this order, wherein the adhesive layer is the semiconductor device adhesive sheet according to claim 1. A semiconductor device component characterized by the above-mentioned. 6. The semiconductor device component according to claim 1, wherein in a semiconductor device component laminated in the order of a wiring board comprising a protective film, an adhesive layer, an insulator layer, and a conductor pattern, the adhesive layer is provided. For a semiconductor device, which is an adhesive sheet for a semiconductor device. 7. A semiconductor device having at least one adhesive layer, wherein the adhesive layer is the adhesive sheet for a semiconductor device according to any one of claims 1 to 4.