JP2000260803A - 半導体装置とその製造方法 - Google Patents

半導体装置とその製造方法

Info

Publication number
JP2000260803A
JP2000260803A JP2000005026A JP2000005026A JP2000260803A JP 2000260803 A JP2000260803 A JP 2000260803A JP 2000005026 A JP2000005026 A JP 2000005026A JP 2000005026 A JP2000005026 A JP 2000005026A JP 2000260803 A JP2000260803 A JP 2000260803A
Authority
JP
Japan
Prior art keywords
film
electrode
electrode film
photosensitive resin
plating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000005026A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000260803A5 (da
Inventor
Noboru Taguchi
昇 田口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP2000005026A priority Critical patent/JP2000260803A/ja
Publication of JP2000260803A publication Critical patent/JP2000260803A/ja
Publication of JP2000260803A5 publication Critical patent/JP2000260803A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2000005026A 1999-01-05 2000-01-04 半導体装置とその製造方法 Pending JP2000260803A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000005026A JP2000260803A (ja) 1999-01-05 2000-01-04 半導体装置とその製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP11-309 1999-01-05
JP30999 1999-01-05
JP2000005026A JP2000260803A (ja) 1999-01-05 2000-01-04 半導体装置とその製造方法

Publications (2)

Publication Number Publication Date
JP2000260803A true JP2000260803A (ja) 2000-09-22
JP2000260803A5 JP2000260803A5 (da) 2007-02-15

Family

ID=26333266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000005026A Pending JP2000260803A (ja) 1999-01-05 2000-01-04 半導体装置とその製造方法

Country Status (1)

Country Link
JP (1) JP2000260803A (da)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7863739B2 (en) 2001-03-05 2011-01-04 Megica Corporation Low fabrication cost, fine pitch and high reliability solder bump
KR101009192B1 (ko) * 2008-12-10 2011-01-19 주식회사 네패스 반도체 장치의 범프 구조물 및 그 제조방법
US7902679B2 (en) 2001-03-05 2011-03-08 Megica Corporation Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
US7960270B2 (en) 2002-01-07 2011-06-14 Megica Corporation Method for fabricating circuit component
US8021976B2 (en) 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US8021921B2 (en) 2002-10-25 2011-09-20 Megica Corporation Method of joining chips utilizing copper pillar
US8067837B2 (en) 2004-09-20 2011-11-29 Megica Corporation Metallization structure over passivation layer for IC chip
US8178967B2 (en) 2001-09-17 2012-05-15 Megica Corporation Low fabrication cost, high performance, high reliability chip scale package
US8294279B2 (en) 2005-01-25 2012-10-23 Megica Corporation Chip package with dam bar restricting flow of underfill
US8481418B2 (en) 2002-05-01 2013-07-09 Megica Corporation Low fabrication cost, high performance, high reliability chip scale package
US8901733B2 (en) 2001-02-15 2014-12-02 Qualcomm Incorporated Reliable metal bumps on top of I/O pads after removal of test probe marks
JP2019161108A (ja) * 2018-03-15 2019-09-19 日亜化学工業株式会社 発光装置、発光素子、及び、発光素子の製造方法
CN113324202A (zh) * 2021-06-07 2021-08-31 厦门天马微电子有限公司 灯条、包括灯条的背光模组及显示装置

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8138079B2 (en) 1998-12-21 2012-03-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US8901733B2 (en) 2001-02-15 2014-12-02 Qualcomm Incorporated Reliable metal bumps on top of I/O pads after removal of test probe marks
US8072070B2 (en) 2001-03-05 2011-12-06 Megica Corporation Low fabrication cost, fine pitch and high reliability solder bump
US7902679B2 (en) 2001-03-05 2011-03-08 Megica Corporation Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
US7863739B2 (en) 2001-03-05 2011-01-04 Megica Corporation Low fabrication cost, fine pitch and high reliability solder bump
US8368213B2 (en) 2001-03-05 2013-02-05 Megica Corporation Low fabrication cost, fine pitch and high reliability solder bump
US8158508B2 (en) 2001-03-05 2012-04-17 Megica Corporation Structure and manufacturing method of a chip scale package
US9369175B2 (en) 2001-09-17 2016-06-14 Qualcomm Incorporated Low fabrication cost, high performance, high reliability chip scale package
US8178967B2 (en) 2001-09-17 2012-05-15 Megica Corporation Low fabrication cost, high performance, high reliability chip scale package
US8890336B2 (en) 2002-01-07 2014-11-18 Qualcomm Incorporated Cylindrical bonding structure and method of manufacture
US7960270B2 (en) 2002-01-07 2011-06-14 Megica Corporation Method for fabricating circuit component
US8461679B2 (en) 2002-01-07 2013-06-11 Megica Corporation Method for fabricating circuit component
US8481418B2 (en) 2002-05-01 2013-07-09 Megica Corporation Low fabrication cost, high performance, high reliability chip scale package
US9142527B2 (en) 2002-10-15 2015-09-22 Qualcomm Incorporated Method of wire bonding over active area of a semiconductor circuit
US8026588B2 (en) 2002-10-15 2011-09-27 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US9153555B2 (en) 2002-10-15 2015-10-06 Qualcomm Incorporated Method of wire bonding over active area of a semiconductor circuit
US8021976B2 (en) 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US8742580B2 (en) 2002-10-15 2014-06-03 Megit Acquisition Corp. Method of wire bonding over active area of a semiconductor circuit
US8421222B2 (en) 2002-10-25 2013-04-16 Megica Corporation Chip package having a chip combined with a substrate via a copper pillar
US8021921B2 (en) 2002-10-25 2011-09-20 Megica Corporation Method of joining chips utilizing copper pillar
US8742582B2 (en) 2004-09-20 2014-06-03 Megit Acquisition Corp. Solder interconnect on IC chip
US8067837B2 (en) 2004-09-20 2011-11-29 Megica Corporation Metallization structure over passivation layer for IC chip
US8294279B2 (en) 2005-01-25 2012-10-23 Megica Corporation Chip package with dam bar restricting flow of underfill
KR101009192B1 (ko) * 2008-12-10 2011-01-19 주식회사 네패스 반도체 장치의 범프 구조물 및 그 제조방법
JP2019161108A (ja) * 2018-03-15 2019-09-19 日亜化学工業株式会社 発光装置、発光素子、及び、発光素子の製造方法
US10727385B2 (en) 2018-03-15 2020-07-28 Nichia Corporation Light emitting device, light emitting element and method for manufacturing the light emitting element
CN113324202A (zh) * 2021-06-07 2021-08-31 厦门天马微电子有限公司 灯条、包括灯条的背光模组及显示装置
CN113324202B (zh) * 2021-06-07 2022-05-17 厦门天马微电子有限公司 灯条、包括灯条的背光模组及显示装置

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