JP2000252461A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JP2000252461A JP2000252461A JP11052396A JP5239699A JP2000252461A JP 2000252461 A JP2000252461 A JP 2000252461A JP 11052396 A JP11052396 A JP 11052396A JP 5239699 A JP5239699 A JP 5239699A JP 2000252461 A JP2000252461 A JP 2000252461A
- Authority
- JP
- Japan
- Prior art keywords
- silicon carbide
- interface
- insulating film
- hydrogen
- annealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 38
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 37
- 239000001257 hydrogen Substances 0.000 claims abstract description 37
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 37
- 238000000137 annealing Methods 0.000 claims abstract description 31
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 150000004767 nitrides Chemical class 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 28
- 239000011261 inert gas Substances 0.000 claims description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 239000007789 gas Substances 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 2
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 10
- 239000003990 capacitor Substances 0.000 abstract description 10
- 229910052710 silicon Inorganic materials 0.000 abstract description 10
- 239000010703 silicon Substances 0.000 abstract description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052799 carbon Inorganic materials 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- 230000000694 effects Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- JAWMENYCRQKKJY-UHFFFAOYSA-N [3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-ylmethyl)-1-oxa-2,8-diazaspiro[4.5]dec-2-en-8-yl]-[2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidin-5-yl]methanone Chemical compound N1N=NC=2CN(CCC=21)CC1=NOC2(C1)CCN(CC2)C(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F JAWMENYCRQKKJY-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 230000002277 temperature effect Effects 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、半導体として炭化珪
素を用いた、金属−酸化膜−半導体（ＭＯＳ)構造、或
はＭＯＳ電界効果型トランジスタを搭載した半導体装
置、半導体集積回路等において、界面準位密度の低い良
好なゲート絶縁膜と炭化珪素界面を形成するようにした
半導体装置の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a metal-oxide-semiconductor (MOS) structure using silicon carbide as a semiconductor or a MOS field-effect transistor, a semiconductor integrated circuit, and the like. The present invention relates to a method for manufacturing a semiconductor device in which a favorable gate insulating film having a low level density and a silicon carbide interface are formed.
【０００２】[0002]
【従来の技術】ワイドギャップ半導体である、炭化珪素
基板(SiC基板)上に形成されたゲート絶縁膜／炭化珪素
界面に発生する界面準位密度は、シリコン基板を熱的に
酸化して形成された、ゲート酸化膜／シリコン界面に発
生する界面準位密度より１桁以上高く、低チャネル移動
度の原因の一つとなっている。2. Description of the Related Art An interface state density generated at a gate insulating film / silicon carbide interface formed on a silicon carbide substrate (SiC substrate), which is a wide gap semiconductor, is formed by thermally oxidizing a silicon substrate. In addition, the interface state density generated at the gate oxide film / silicon interface is at least one order of magnitude higher, which is one of the causes of low channel mobility.
【０００３】また、通常シリコン基板を用いて作製され
たＭＯＳキャパシタでは、400℃で水素アニールをし
て、ダングリングボンドを終端することによりゲート酸
化膜／シリコン界面に発生する界面準位密度を低減して
良好な界面を形成するようにしているが、炭化珪素基板
を用いて作製されたＭＯＳキャパシタでは、400℃でア
ニールをしてもゲート絶縁膜／炭化珪素界面に発生する
界面準位密度を低減するような際立った効果がない。[0003] In a MOS capacitor usually manufactured using a silicon substrate, hydrogen annealing is performed at 400 ° C to terminate dangling bonds, thereby reducing the interface state density generated at the gate oxide film / silicon interface. However, in the case of a MOS capacitor manufactured using a silicon carbide substrate, the interface state density generated at the gate insulating film / silicon carbide interface can be reduced even after annealing at 400 ° C. There is no noticeable effect of reducing.
【０００４】[0004]
【発明が解決しようとする課題】そこで、この発明にお
いては炭化珪素基板を用いて作製されたＭＯＳキャパシ
タ界面においける、シリコン或は炭素の未結合手を終端
して、界面準位密度の低い良好な界面を形成することを
目的とする。Therefore, in the present invention, the dangling bonds of silicon or carbon at the interface of a MOS capacitor manufactured using a silicon carbide substrate are terminated to reduce the interface state density. The purpose is to form a good interface.
【０００５】以上の課題を解決するため、本願発明者ら
は鋭意研究の結果、炭化珪素基板を用いて作製されたＭ
ＯＳキャパシタを、高温下の水素を含んだ雰囲気でアニ
ールすることにより、界面準位密度のＭＯＳキャパシタ
が得られることを見出したのである。In order to solve the above problems, the present inventors have conducted intensive studies and as a result, have found that M
It has been found that by annealing the OS capacitor in an atmosphere containing hydrogen at a high temperature, a MOS capacitor having an interface state density can be obtained.
【０００６】[0006]
【課題を解決するための手段】この発明は、上記知見に
基づいて少なくとも最上層に炭化珪素を有する半導体基
板上に、ゲート絶縁膜として酸化膜及び／或は窒化膜の
1層又は２層以上を形成した後、600〜1600℃の範囲で水
素を含んだ雰囲気でアニールする半導体装置の製造方法
を提案するものである。According to the present invention, based on the above findings, an oxide film and / or a nitride film as a gate insulating film is formed on a semiconductor substrate having silicon carbide in at least the uppermost layer.
The present invention proposes a method of manufacturing a semiconductor device in which one or two or more layers are formed and then annealed in an atmosphere containing hydrogen at a temperature in the range of 600 to 1600 ° C.
【０００７】なお、炭化珪素（SiC）には、３C-SiC、４
H-SiC、６H-SiC、15R-SiCなど非常に多くのポリタイプ
があるが、この発明において半導体基板として使用する
炭化珪素はSiCであれば、何れのタイプのものでもよ
い。[0007] Silicon carbide (SiC) includes 3C-SiC,
There are numerous polytypes such as H-SiC, 6H-SiC and 15R-SiC, but any type of silicon carbide used as a semiconductor substrate in the present invention may be used as long as it is SiC.
【０００８】また、半導体基板の構造は最上層がSiCで
あれば、Si上に３C-SiCがある構造、６H-SiCや４H-SiC
の上に３C-SiCがある構造でもよい。The structure of the semiconductor substrate is such that, when the uppermost layer is SiC, 3C-SiC on Si, 6H-SiC or 4H-SiC
A structure having 3C-SiC on the top may be used.
【０００９】酸化膜乃至窒化膜としては、シリコン酸化
膜乃至シリコン窒化膜が一般的であるが、これに限定さ
れることなく、アルミニウム酸化膜、タンタル酸化膜、
別の条件で作製した窒化アルミニウム膜、ガリウム窒化
膜など何れの酸化膜乃至窒化膜でもよい。As the oxide film or the nitride film, a silicon oxide film or a silicon nitride film is generally used. However, the present invention is not limited thereto, and an aluminum oxide film, a tantalum oxide film,
Any oxide film or nitride film such as an aluminum nitride film and a gallium nitride film manufactured under different conditions may be used.
【００１０】炭化珪素基板上に酸化膜を積層する方法と
しては、炭化珪素基板上に成膜法により酸化膜を形成し
てもよいが、炭化珪素基板を熱的に酸化して酸化膜を形
成してもよい。As a method of laminating an oxide film on a silicon carbide substrate, an oxide film may be formed on the silicon carbide substrate by a film forming method. However, the oxide film is formed by thermally oxidizing the silicon carbide substrate. May be.
【００１１】成膜法により炭化珪素基板上にシリコン酸
化膜を形成する場合にも、例えばシリコンをMBE法（Mol
ecular beam epitaxy法）やCVD法（化学気相法）で炭化
珪素基板上に形成した後に、熱酸化して形成してもよ
く、またシリコン酸化膜をCVD法や、ＳＯＧ法（spin on
glass法）で形成してもよい。In the case where a silicon oxide film is formed on a silicon carbide substrate by a film forming method, for example, silicon is formed by an MBE method (Mol
After being formed on a silicon carbide substrate by an ecular beam epitaxy method or a CVD method (chemical vapor deposition method), it may be formed by thermal oxidation, or a silicon oxide film may be formed by a CVD method or an SOG method (spin on method).
(glass method).
【００１２】一方、炭化珪素基板上に窒化膜を積層する
方法としては、LPCVD法（低圧化学気相法）やプラズマ
窒化法を採用することができる。On the other hand, as a method of laminating a nitride film on a silicon carbide substrate, an LPCVD method (low-pressure chemical vapor deposition) or a plasma nitriding method can be adopted.
【００１３】[0013]
【作用】即ち、炭化珪素（ＳｉＣ）基板上に酸化膜或は
窒化膜からなるゲート絶縁膜を形成した後、600℃〜160
0℃の水素を含んだ雰囲気でアニールすることにより、
絶縁膜／炭化珪素界面に存在するシリコン或は炭素のダ
ングリングボンドが終端され、界面準位密度を低減して
良好な界面を形成することができる。After a gate insulating film made of an oxide film or a nitride film is formed on a silicon carbide (SiC) substrate,
By annealing in an atmosphere containing hydrogen at 0 ° C,
Dangling bonds of silicon or carbon existing at the interface between the insulating film and the silicon carbide are terminated, and the interface state density can be reduced to form a good interface.
【００１４】600℃以下でアニールする場合には、ゲー
ト絶縁膜／炭化珪素界面に存在するシリコン或は炭素の
ダングリングボンドの終端が十分になされず、また例え
ばゲート絶縁膜として使用されるシリコン酸化膜の融点
が1600℃であるため、アニール温度を600℃〜1600℃の
範囲とした。When annealing is performed at a temperature of 600 ° C. or less, dangling bonds of silicon or carbon existing at the interface between the gate insulating film and silicon carbide are not sufficiently terminated. Since the melting point of the film is 1600 ° C., the annealing temperature was set in the range of 600 ° C. to 1600 ° C.
【００１５】また、水素アニールの際の水素圧力は0.1P
a以下では、水素圧力が低すぎてダングリングボンドが
終端する効果がなく、また水素圧力が常圧（1.01×105P
a）以上であると、水素圧力が高すぎて例えばゲート絶
縁膜として使用されるシリコン酸化膜から酸素を還元し
て、酸化膜の膜質を低下させて、絶縁破壊電圧の低下を
招くので、水素圧力を0.1Pa〜1.01×105Paの範囲とし
た。The hydrogen pressure during the hydrogen annealing is 0.1 P
Below a, the hydrogen pressure is too low to have the effect of terminating dangling bonds and the hydrogen pressure is normal pressure (1.01 × 10 5 P
a) If the pressure is higher than the above, hydrogen pressure is too high, for example, oxygen is reduced from a silicon oxide film used as a gate insulating film, and the film quality of the oxide film is reduced, thereby lowering the breakdown voltage. The pressure was in the range of 0.1 Pa to 1.01 × 10 5 Pa.
【００１６】また、この発明による水素アニールは、水
素ガス中の他、水素と不活性ガス、特に窒素、アルゴ
ン、ヘリウム等の不活性ガスとの混合ガス雰囲気中で行
うことができる。The hydrogen annealing according to the present invention can be carried out in a mixed gas atmosphere of hydrogen and an inert gas, particularly an inert gas such as nitrogen, argon, helium, etc., in addition to the hydrogen gas.
【００１７】この場合ガス雰囲気の圧力を常圧（1.01×
105Pa)に固定して、混合ガスにおける水素濃度（水素流
量／（水素流量＋不活性ガス流量））が0.5 ％以下で
あると、水素濃度が低すぎて、ダングリングボンドが終
端する効果がなく、水素濃度を0.5％〜100％の範囲とし
た。In this case, the pressure of the gas atmosphere is set to a normal pressure (1.01 ×
10 5 Pa), and the hydrogen concentration (hydrogen flow rate / (hydrogen flow rate + inert gas flow rate)) in the mixed gas is 0.5 %, The hydrogen concentration is too low and there is no effect of terminating dangling bonds, and the hydrogen concentration is set in the range of 0.5% to 100%.
【００１８】更に、水素アニール時間が10秒以下である
と、アニール時間が短すぎてダングリングボンドが十分
に終端できず、またアニール時間が3時間以上である
と、アニール時間が長すぎてゲート絶縁膜として使用さ
れるシリコン酸化膜の酸素が還元され、酸化膜の膜質が
低下し、絶縁破壊電圧の低下を招くので、アニール時間
を10秒〜3時間の範囲とした。Further, if the hydrogen annealing time is less than 10 seconds, the annealing time is too short to terminate the dangling bond sufficiently, and if the annealing time is more than 3 hours, the annealing time is too long and the gate is too long. Since the oxygen of the silicon oxide film used as the insulating film is reduced, the quality of the oxide film is reduced, and the dielectric breakdown voltage is reduced, the annealing time is set in the range of 10 seconds to 3 hours.
【００１９】[0019]
【実施例】以下、この発明の実施例を示す。 実施例1 ８゜オフ４H-SiCエピ基板（（0001）Si面、n型、Nd−Na
＝1×1016/cm3）を通常のRCA洗浄後、犠牲酸化膜を形成
し、HFで除去した。次いで、1100℃でドライ酸化により
36nm〜50nmの酸化膜を形成した後、1100℃から室温まで
急冷した。その後、水素アニールを、温度を400℃〜100
0℃まで変えて30分間行った。水素圧力は1000℃で5.6×
103Paだった。最終的にAlをゲート電極とオーミックコ
ンタクトに用いてＭＯＳキャパシタが作製された。Embodiments of the present invention will be described below. Example 1 8 ゜ off 4H-SiC epi-substrate ((0001) Si plane, n-type, Nd-Na
= 1 × 10 16 / cm 3 ), after normal RCA cleaning, a sacrificial oxide film was formed and removed by HF. Then, by dry oxidation at 1100 ° C
After forming an oxide film of 36 to 50 nm, it was rapidly cooled from 1100 ° C. to room temperature. After that, hydrogen annealing is performed at a temperature of
The operation was performed for 30 minutes while changing to 0 ° C. Hydrogen pressure is 5.6x at 1000 ℃
It was 10 3 Pa. Finally, a MOS capacitor was manufactured using Al for the gate electrode and the ohmic contact.
【００２０】図1は、実施例1で得られたＭＯＳキャパシ
タを模式的に示す断面図であり、図2はこのＭＯＳキャ
パシタを用いて測定した高周波（ｆ＝100ｋＨｚ）ＣＶ
特性における水素アニール温度効果を示すものである。FIG. 1 is a sectional view schematically showing the MOS capacitor obtained in Example 1, and FIG. 2 is a high-frequency (f = 100 kHz) CV measured using this MOS capacitor.
9 shows the effect of a hydrogen annealing temperature on characteristics.
【００２１】ＣＶ、ＩＶ特性は、シールドされた金属の
箱の中で、暗闇の条件で測定され、図2中左側の破線
は、25Vでの酸化膜容量とNd-Na=1×1016/cm3から計算さ
れた理想曲線であり、右側の破線は水素アニールをしな
い場合のＣＶ特性曲線であり、右側の破線と左側の破線
で挟まれた実線は右側より400℃、500℃、600℃、700
℃、1000℃で夫々水素アニールした場合のＣＶ特性曲線
である。The CV and IV characteristics were measured in a shielded metal box under dark conditions. The left broken line in FIG. 2 indicates the oxide film capacity at 25 V and Nd-Na = 1 × 10 16 / cm 3 The dashed line on the right is a CV characteristic curve when hydrogen annealing is not performed, and the solid line between the dashed line on the right and the dashed line on the left is 400 ° C., 500 ° C., 600 ° C., and 700 ° C. from the right.
It is a CV characteristic curve at the time of hydrogen annealing at 1000 degreeC and 1000 degreeC, respectively.
【００２２】図中、ゲート電圧が−５Vより低い場合
に、計算された値より、実際に測定された値が低いの
は、４H-SiCのワイドギャップのために、室温で発生す
る少数キャリアが非常に少なく、平衡状態にならないた
めである。In the figure, when the gate voltage is lower than -5 V, the actually measured value is lower than the calculated value because minority carriers generated at room temperature are generated due to the wide gap of 4H-SiC. This is because it is very small and does not reach an equilibrium state.
【００２３】また、水素アニールをしない場合のＣＶ特
性曲線（右側の破線）において、フラットバンド電圧シ
フトは、15.7Vと非常に大きく、ゲート電圧の行きと帰
りで約１Vのヒステリシスを示しており、これは、界面
準位密度が非常に多いことを意味している。In the CV characteristic curve without hydrogen annealing (broken line on the right), the flat band voltage shift is as large as 15.7 V, showing a hysteresis of about 1 V between the going and returning of the gate voltage. This means that the interface state density is very high.
【００２４】右側の破線と左側の破線で挟まれた実線の
ＣＶ特性曲線においては、400℃〜500℃で水素アニール
した場合にはフラットバンド電圧シフトが減少するが、
依然としてその値は大きく、且つヒステリシスも大きい
ので、実際には使用できない。In the solid CV characteristic curve sandwiched between the right broken line and the left broken line, the flat band voltage shift decreases when hydrogen annealing is performed at 400 ° C. to 500 ° C.
Since the value is still large and the hysteresis is large, it cannot be actually used.
【００２５】一方、600℃で水素アニールした場合に
は、ほぼヒステリシスが消失し、実際に使用できる状態
にあり、1000℃で水素アニールした場合にはヒステリシ
スは消失して理想曲線に近づく。On the other hand, when hydrogen annealing is performed at 600 ° C., the hysteresis almost disappears, and it is in a practically usable state. When hydrogen annealing is performed at 1000 ° C., the hysteresis disappears and approaches an ideal curve.
【００２６】なお、1000℃以上で水素アニールした場合
にはヒステリシスが完全に消失して理想曲線に更に近づ
くことが予想されるが、一般にゲート絶縁膜として使用
されているシリコン酸化膜の融点は1600℃であるので、
アニール温度の範囲を600℃〜1600℃とした。When hydrogen annealing is performed at 1000 ° C. or more, it is expected that the hysteresis completely disappears and the curve approaches an ideal curve. However, the melting point of a silicon oxide film generally used as a gate insulating film is 1600 ° C. ℃
The range of the annealing temperature was 600 ° C to 1600 ° C.
【００２７】[0027]
【発明の効果】以上要するに、この発明によればゲート
絶縁膜／炭化珪素界面に存在するシリコン或は炭素のタ
ングリングボンドを水素で終端することにより、界面準
位密度を十分に減らして、実際の使用に十分に耐える良
好な絶縁膜／炭化珪素界面を得ることができる。In summary, according to the present invention, by terminating the silicon or carbon tangling bonds existing at the gate insulating film / silicon carbide interface with hydrogen, the interface state density can be sufficiently reduced, And a good insulating film / silicon carbide interface that can sufficiently withstand the use of GaN.
【図１】容量−電圧特性の評価に使用したＭＯＳ構造の
断面模式図FIG. 1 is a schematic cross-sectional view of a MOS structure used for evaluating capacitance-voltage characteristics.
【図2】高周波CV特性に対する水素アニールの温度効果
を示す図FIG. 2 is a diagram showing the temperature effect of hydrogen annealing on high-frequency CV characteristics
【手続補正書】[Procedure amendment]
【提出日】平成１１年１２月２０日（１９９９．１２．
２０）[Submission date] December 20, 1999 (1999.12.
20)
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】特許請求の範囲[Correction target item name] Claims
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【特許請求の範囲】[Claims]
【手続補正２】[Procedure amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】００１４[Correction target item name] 0014
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【００１４】なお、ゲート絶縁膜としてシリコン酸化膜
を使用する場合には、シリコン酸化膜の融点が1600℃で
あるため、アニールは600℃〜1600℃の範囲で可能であ
るが、後述する本願発明者らの実験結果に依れば、最適
アニール温度は600℃〜1000℃である。 ─────────────────────────────────────────────────────
Note that a silicon oxide film is used as a gate insulating film.
When using, the melting point of the silicon oxide film is 1600 ℃
Therefore, annealing can be performed in the range of 600 to 1600 ° C.
However, according to the experimental results of the present inventors described below, the optimum
The annealing temperature is between 600C and 1000C. ────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成１２年５月２９日（２０００．５．２
９）[Submission date] May 29, 2000 (2005.2
9)
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】特許請求の範囲[Correction target item name] Claims
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【特許請求の範囲】[Claims]
【手続補正２】[Procedure amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】０００６[Correction target item name] 0006
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【０００６】[0006]
【課題を解決するための手段】この発明は、上記知見に
基づいて少なくとも最上層に炭化珪素を有する半導体基
板上に、ゲート絶縁膜として酸化珪素を形成した後、６
００〜１０００℃の範囲で水素を含み、且つ水素圧力を
0.1Pa〜1.01×10５ Paにした雰囲気で10秒〜３時間ア
ニールしてゲート絶縁膜と炭化珪素との界面準位密度を
低減するようにした半導体装置の製造方法を提案するも
のである。According to the present invention, based on the above findings, after forming silicon oxide as a gate insulating film on a semiconductor substrate having silicon carbide at least in the uppermost layer,
Containing hydrogen in the range of 00 to 1000 ° C. and increasing the hydrogen pressure
A method of manufacturing a semiconductor device in which an interface state density between a gate insulating film and silicon carbide is reduced by annealing for 10 seconds to 3 hours in an atmosphere of 0.1 Pa to 1.01 × 10 5 Pa is proposed. Is what you do.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉田 貞史 茨城県つくば市梅園１丁目１番４ 工業技 術院電子技術総合研究所内 (72)発明者 永井 清子 茨城県つくば市梅園１丁目１番４ 工業技 術院電子技術総合研究所内 (72)発明者 関川 敏弘 茨城県つくば市梅園１丁目１番４ 工業技 術院電子技術総合研究所内 (72)発明者 福田 憲司 茨城県つくば市梅園１丁目１番４ 工業技 術院電子技術総合研究所内 Ｆターム(参考） 5F040 DA00 DC02 EC10 FC00 5F058 BA11 BA20 BB10 BD01 BD04 BD10 BH01 BH20 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Sadafumi Yoshida 1-1-4 Umezono, Tsukuba, Ibaraki Pref. Inside the Research Institute of Electronics and Technology (72) Inventor Kiyoko Nagai 1-1-1, Umezono, Tsukuba, Ibaraki 4 Within the Institute of Technology, Electronic Technology Research Institute (72) Inventor Toshihiro Sekikawa 1-4-1, Umezono, Tsukuba, Ibaraki Pref. No. 4 F-term in the Electronic Technology Research Laboratory, National Institute of Industrial Science (reference) 5F040 DA00 DC02 EC10 FC00 5F058 BA11 BA20 BB10 BD01 BD04 BD10 BH01 BH20
Claims (5)
体基板上に、ゲート絶縁膜として酸化膜及び／或は窒化
膜の1層又は２層以上を形成した後、600〜1600℃の範囲
で水素を含んだ雰囲気でアニールすることを特徴とする
半導体装置の製造方法。At least one layer of an oxide film and / or a nitride film as a gate insulating film is formed on a semiconductor substrate having silicon carbide at least as an uppermost layer. A method of manufacturing a semiconductor device, wherein annealing is performed in an atmosphere containing.
求項1記載の方法。2. The method according to claim 1, wherein the hydrogen pressure is 0.1 Pa to 1.01 × 10 5 Pa.
固定して、水素濃度（水素流量／（水素流量＋不活性ガ
ス流量））が0.5％〜100％にした請求項1記載の方法。3. The pressure of a gas atmosphere is fixed to a normal pressure (1.01 × 10 5 Pa), and a hydrogen concentration (hydrogen flow rate / (hydrogen flow rate + inert gas flow rate)) is set to 0.5% to 100%. Method according to 1.
ウムを使用する請求項3記載の方法。4. The method according to claim 3, wherein nitrogen, argon or helium is used as the inert gas.
或は請求項2或は請求項3或は請求項4記載の方法。5. The method according to claim 1, wherein the annealing time is 10 seconds to 3 hours.
A method according to claim 2 or claim 3 or claim 4.
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| JP3443589B2 (en) | 2003-09-02 |
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