JP2000242224A - Method for driving ac type plasma display panel - Google Patents

Method for driving ac type plasma display panel

Info

Publication number
JP2000242224A
JP2000242224A JP4254999A JP4254999A JP2000242224A JP 2000242224 A JP2000242224 A JP 2000242224A JP 4254999 A JP4254999 A JP 4254999A JP 4254999 A JP4254999 A JP 4254999A JP 2000242224 A JP2000242224 A JP 2000242224A
Authority
JP
Japan
Prior art keywords
period
sustain
discharge
electrode
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4254999A
Other languages
Japanese (ja)
Other versions
JP2000242224A5 (en
JP3733773B2 (en
Inventor
Takatsugu Kurata
隆次 倉田
Shinji Masuda
真司 増田
Makoto Kawachi
誠 河内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4254999A priority Critical patent/JP3733773B2/en
Priority to TW089100703A priority patent/TW516014B/en
Priority to US09/487,837 priority patent/US6294875B1/en
Priority to EP09008593A priority patent/EP2105910A3/en
Priority to EP09008594A priority patent/EP2105911A3/en
Priority to EP07018573A priority patent/EP1881475A3/en
Priority to EP00101099A priority patent/EP1022715A3/en
Priority to EP09008592A priority patent/EP2105909A3/en
Priority to KR10-2000-0002875A priority patent/KR100531527B1/en
Priority to CNB001016598A priority patent/CN1169104C/en
Priority to CNB2003101026458A priority patent/CN100354916C/en
Priority to CNB2003101026462A priority patent/CN1326104C/en
Publication of JP2000242224A publication Critical patent/JP2000242224A/en
Priority to KR10-2002-0073902A priority patent/KR100428260B1/en
Priority to KR10-2003-0065077A priority patent/KR100453523B1/en
Priority to KR10-2003-0065076A priority patent/KR100447579B1/en
Priority to KR10-2003-0065075A priority patent/KR100428268B1/en
Publication of JP2000242224A5 publication Critical patent/JP2000242224A5/ja
Priority to KR10-2005-0074278A priority patent/KR100528525B1/en
Application granted granted Critical
Publication of JP3733773B2 publication Critical patent/JP3733773B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/292Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
    • G09G3/2927Details of initialising
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0238Improving the black level

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an AC type plasma display panel driving method capable of drastically improving the visibility of black and contrast. SOLUTION: One field period is composed of a 1st to 8th sub-fields containing an initializing period, a writing period, and a maintaining period. By making a low level value (Vt(V)) of a maintaining pulse voltage applied to maintaining electrodes SUS1-SUSn for a maintaining period to a higher potential than a low level value (0(V)) of a scanning pulse voltage to be applied to scanning electrodes SCN1-SCNn for a write period, a part of an initializing operation during an initializing period of each sub-field is made to operate at the same time as a maintaining operation during a maintaining period of the immediately preceding sub-field in the 2nd to 8th sub-fields.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はテレビジョン受像機
およびコンピュータ端末等の画像表示に用いるAC型プ
ラズマディスプレイパネルの駆動方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving an AC type plasma display panel used for displaying an image on a television receiver or a computer terminal.

【0002】[0002]

【従来の技術】従来のAC型プラズマディスプレイパネ
ル(以下、パネルという)の一部斜視図を図3に示す。
図3に示すように、第一のガラス基板1上には誘電体層
2および保護膜3で覆われた走査電極4と維持電極5と
が対を成して互いに平行に付設されている。第二のガラ
ス基板6上には絶縁体層7で覆われた複数のデータ電極
8が付設され、これらデータ電極8の各間の絶縁体層7
上にはデータ電極8と平行して隔壁9が設けられてい
る。また、絶縁体層7の表面および隔壁9の両側面に蛍
光体10が形成されている。第一のガラス基板1と第二
のガラス基板6とは、走査電極4および維持電極5とデ
ータ電極8とが直交するように、放電空間11を挟んで
対向して配置されている。放電空間11には、放電ガス
としてヘリウム、ネオンおよびアルゴンのうち少なくと
も1種とキセノンとが封入されている。データ電極8と
対をなす走査電極4および維持電極5との交差部の放電
空間には放電セル12が構成されている。
2. Description of the Related Art FIG. 3 is a partial perspective view of a conventional AC plasma display panel (hereinafter referred to as a panel).
As shown in FIG. 3, a scan electrode 4 and a sustain electrode 5 covered with a dielectric layer 2 and a protective film 3 are provided in parallel on a first glass substrate 1 in pairs. A plurality of data electrodes 8 covered with an insulator layer 7 are provided on the second glass substrate 6, and the insulator layer 7 between each of the data electrodes 8 is provided.
On the upper side, a partition 9 is provided in parallel with the data electrode 8. Further, phosphors 10 are formed on the surface of the insulator layer 7 and on both side surfaces of the partition 9. The first glass substrate 1 and the second glass substrate 6 are arranged to face each other with the discharge space 11 interposed therebetween so that the scanning electrodes 4 and the sustaining electrodes 5 are orthogonal to the data electrodes 8. The discharge space 11 is filled with xenon and at least one of helium, neon, and argon as a discharge gas. A discharge cell 12 is formed in a discharge space at an intersection of the scan electrode 4 and the sustain electrode 5 which form a pair with the data electrode 8.

【0003】次に、このパネルの電極配列図を図4に示
す。図4に示すように、このパネルの電極配列はm×n
のマトリクス構成であり、列方向にはm列のデータ電極
1〜Dmが配列されており、行方向にはn行の走査電極
SCN1〜SCNnおよび維持電極SUS1〜SUSnが配
列されている。また、図3に示した放電セル12は図4
に示すような領域に設けられている。
Next, FIG. 4 shows an electrode arrangement diagram of this panel. As shown in FIG. 4, the electrode arrangement of this panel is m × n
And m columns of data electrodes D 1 to D m are arranged in the column direction, and n rows of scan electrodes SCN 1 to SCN n and sustain electrodes SUS 1 to SUS n are arranged in the row direction. Have been. Also, the discharge cell 12 shown in FIG.
Are provided in a region as shown in FIG.

【0004】このパネルを駆動するための従来の駆動方
法の動作駆動タイミング図を図5に示す。この駆動方法
は256階調の階調表示を行うためのものであり、1フ
ィールド期間を8個のサブフィールドで構成している。
以下、従来のパネルの駆動方法について図3ないし図5
を用いて説明する。
FIG. 5 shows an operation drive timing chart of a conventional drive method for driving this panel. This driving method is for performing 256 gradation display, and one field period is composed of eight subfields.
Hereinafter, a conventional panel driving method will be described with reference to FIGS.
This will be described with reference to FIG.

【0005】図5に示すように、第1ないし第8のサブ
フィールドは初期化期間、書き込み期間、維持期間およ
び消去期間からそれぞれ構成されている。まず、第1の
サブフィールドにおける動作について説明する。
[0005] As shown in FIG. 5, the first to eighth subfields are each composed of an initialization period, a writing period, a sustaining period and an erasing period. First, the operation in the first subfield will be described.

【0006】図5に示すように、初期化期間の前半の初
期化動作において、全てのデータ電極D1〜Dmおよび全
ての維持電極SUS1〜SUSnを0(V)に保持し、全
ての走査電極SCN1〜SCNnには、全ての維持電極S
US1〜SUSnに対して放電開始電圧以下の電圧Vp
(V)から、その放電開始電圧を越える電圧Vr(V)
に向かって緩やかに上昇するランプ電圧を印加する。こ
のランプ電圧が上昇する間に、全ての放電セル12にお
いて、全ての走査電極SCN1〜SCNnから全てのデー
タ電極D1〜Dmおよび全ての維持電極SUS1〜SUSn
にそれぞれ一回目の微弱な初期化放電が起こり、走査電
極SCN1〜SCNn上の保護膜3の表面に負の壁電圧が
蓄積されるとともに、全てのデータ電極D1〜Dm上の絶
縁体層7の表面および全ての維持電極SUS1〜SUSn
上の保護膜3の表面には正の壁電圧が蓄積される。
As shown in FIG. 5, in the initializing operation in the first half of the initializing period, all data electrodes D 1 to D m and all sustain electrodes SUS 1 to SUS n are held at 0 (V), Scan electrodes SCN 1 to SCN n have all sustain electrodes S
US 1 ~SUS voltage below the discharge start voltage with respect to n Vp
(V), the voltage Vr (V) exceeding the discharge starting voltage
A ramp voltage that gradually rises toward is applied. While the ramp voltage rises, in all the discharge cells 12, all the data electrodes D 1 from all the scanning electrodes SCN 1 ~SCN n ~D m and all the sustain electrodes SUS 1 ~SUS n
To occur weak setup discharges one time each, negative wall voltage is accumulated on the surface of the protective film 3 on the scanning electrodes SCN 1 ~SCN n, insulation on all the data electrodes D 1 to D m Surface of body layer 7 and all sustain electrodes SUS 1 to SUS n
A positive wall voltage is accumulated on the surface of the upper protective film 3.

【0007】さらに、初期化期間の後半の初期化動作に
おいて、全ての維持電極SUS1〜SUSnを正電圧Vh
(V)に保ち、全ての走査電極SCN1〜SCNnには、
全ての維持電極SUS1〜SUSnに対して放電開始電圧
以下となる電圧Vq(V)から放電開始電圧を越える0
(V)に向かって緩やかに下降するランプ電圧を印加す
る。このランプ電圧が下降する間に、再び全ての放電セ
ル12において、全ての維持電極SUS1〜SUSnから
全ての走査電極SCN1〜SCNnにそれぞれ二回目の微
弱な初期化放電が起こり、全ての走査電極SCN1〜S
CNn上の保護膜3表面の負の壁電圧および全ての維持
電極SUS1〜SUSn上の保護膜3表面の正の壁電圧が
弱められる。また、全てのデータ電極D1〜Dmと全ての
走査電極SCN1〜SCNnとの間にも微弱な放電が起こ
り、全てのデータ電極D1〜Dm上の絶縁体層7の表面の
正の壁電圧は書き込み動作に適した値に調整される。
Furthermore, in the initialization operation of the second half of the initializing period, all the sustain electrodes SUS 1 ~SUS n positive voltage Vh
(V), and all the scan electrodes SCN 1 to SCN n
For all of the sustain electrodes SUS 1 to SUS n , the voltage Vq (V) which is lower than the discharge start voltage is set to 0 exceeding the discharge start voltage.
A ramp voltage gradually falling toward (V) is applied. While this ramp voltage is lowered, in all the discharge cells 12 again, it occurs all the scanning electrodes SCN 1 ~SCN n each second time weak setup discharges from all the sustain electrodes SUS 1 ~SUS n, all Scan electrodes SCN 1 to S
The negative wall voltage on the surface of the protective film 3 on CN n and the positive wall voltage on the surface of the protective film 3 on all sustain electrodes SUS 1 to SUS n are weakened. Also, between all the data electrodes D 1 to D m and all the scanning electrodes SCN 1 ~SCN n occurs weak discharge, all the data electrodes D 1 to D m on the surface of the insulator layer 7 The positive wall voltage is adjusted to a value suitable for a write operation.

【0008】以上により初期化期間の初期化動作が終了
する。
Thus, the initialization operation in the initialization period is completed.

【0009】次の書き込み期間の書き込み動作におい
て、全ての走査電極SCN1〜SCNnをVs(V)に保
持し、データ電極D1〜Dmのうち、一行目に表示すべき
放電セル12に対応する所定のデータ電極Dj(jは1
〜mの整数を表す)に正の書き込みパルス電圧+Vw
(V)を、一行目の走査電極SCN1に走査パルス電圧
0(V)をそれぞれ印加する。このとき、所定のデータ
電極Djと走査電極SCN1との交差部における絶縁体層
7の表面と走査電極SCN1上の保護膜3の表面との間
の電圧は、書き込みパルス電圧+Vw(V)にデータ電
極D1〜Dm上の絶縁体層7の表面の正の壁電圧が加算さ
れたものとなるため、この交差部において、所定のデー
タ電極Djと走査電極SCN1との間および維持電極SU
1と走査電極SCN1との間に書き込み放電が起こり、
この交差部の走査電極SCN1上の保護膜3表面に正電
圧が蓄積され、維持電極SUS1上の保護膜3表面に負
電圧が蓄積され、書き込み放電が起こったデータ電極D
j上の絶縁体層7の表面に負電圧が蓄積される。
In the writing operation in the next writing period, all the scan electrodes SCN 1 to SCN n are held at Vs (V), and the discharge electrodes 12 to be displayed on the first row among the data electrodes D 1 to D m The corresponding predetermined data electrode D j (j is 1
Mm), a positive write pulse voltage + Vw
(V), a scanning pulse voltage 0 (V) is applied to the scanning electrode SCN1 in the first row. At this time, the voltage between the predetermined data electrode D j and the scanning electrode SCN 1 surface of the insulator layer 7 at the intersection between the scanning electrodes SCN 1 on the protective film 3 on the surface, the write pulse voltage + Vw (V ), the positive wall voltage on the surface of the insulator layer 7 on the data electrodes D 1 to D m is what is added to, during in the intersection, the predetermined data electrode D j and the scanning electrode SCN 1 And sustain electrode SU
Write discharge occurs between S 1 and scan electrode SCN 1 ,
A positive voltage is accumulated on the surface of the protective film 3 on the scan electrode SCN 1 at the intersection, and a negative voltage is accumulated on the surface of the protective film 3 on the sustain electrode SUS 1.
A negative voltage is accumulated on the surface of the insulator layer 7 on j .

【0010】次に、データ電極D1〜Dmのうち、二行目
に表示すべき放電セル12に対応する所定のデータ電極
jに正の書き込みパルス電圧+Vw(V)を、二行目
の走査電極SCN2に走査パルス電圧0(V)をそれぞ
れ印加する。このとき、所定のデータ電極Djと走査電
極SCN2との交差部における絶縁体層7の表面と走査
電極SCN2上の保護膜3の表面との間の電圧は、書き
込みパルス電圧+Vw(V)に所定のデータ電極Dj
の絶縁体層7の表面に蓄積された正の壁電圧が加算され
たものとなるため、この交差部において、所定のデータ
電極Djと走査電極SCN2との間および維持電極SUS
2と走査電極SCN2との間に書き込み放電が起こり、こ
の交差部の走査電極SCN2上の保護膜3表面に正電圧
が蓄積され、維持電極SUS2上の保護膜3表面に負電
圧が蓄積される。
[0010] Next, among the data electrodes D 1 to D m, a positive write pulse voltage to a predetermined data electrode D j that corresponds to the discharge cell 12 to be displayed on the second line + Vw and (V), the second line applying the scanning electrode SCN 2 in the scan pulse voltage 0 (V), respectively. At this time, the voltage between the predetermined data electrode D j and the scanning electrode SCN 2 surface of the insulator layer 7 at the intersection between the scanning electrode SCN 2 on the protective film 3 on the surface, the write pulse voltage + Vw (V because) to be accumulated on the surface of the insulator layer 7 on the predetermined data electrode D j the positive wall voltage is what is added, in the intersection, the predetermined data electrode D j and the scanning electrode SCN 2 And sustain electrode SUS
A write discharge occurs between the scan electrode 2 and the scan electrode SCN 2 , a positive voltage is accumulated on the surface of the protective film 3 on the scan electrode SCN 2 at the intersection, and a negative voltage is accumulated on the surface of the protective film 3 on the sustain electrode SUS 2. Stored.

【0011】同様な動作が引き続いて行われ、最後に、
データ電極D1〜Dmのうち、n行目に表示すべき放電セ
ル12に対応する所定のデータ電極Djに正の書き込み
パルス電圧+Vw(V)を、n行目の走査電極SCNn
に走査パルス電圧0(V)をそれぞれ印加する。このと
き、所定のデータ電極Djと走査電極SCNnとの交差部
において、所定のデータ電極Djと走査電極SCNnとの
間および維持電極SUSnと走査電極SCNnとの間に書
き込み放電が起こり、この交差部の走査電極SCNn
の保護膜3表面に正の壁電圧が蓄積され、維持電極SU
n上の保護膜3表面に負の壁電圧が蓄積され、書き込
み放電が起こったデータ電極Dj上の絶縁体層7の表面
に負の壁電圧が蓄積される。
A similar operation is subsequently performed.
Among the data electrodes D 1 to D m, the predetermined data electrode D j to the positive write pulse voltage corresponding to the discharge cells 12 to be displayed on the n th row + Vw and (V), n-th scanning electrode SCN n
Is applied with a scanning pulse voltage of 0 (V). At this time, at the intersection of the predetermined data electrode D j and the scanning electrode SCN n, a write discharge between and between sustain electrode SUS n and the scanning electrode SCN n of the predetermined data electrode D j and the scanning electrode SCN n occurs, a positive wall voltage is accumulated on the protective film 3 surface on the scanning electrode SCN n of the intersection, the sustain electrodes SU
S negative wall voltage on the protective film 3 surface on the n is accumulated, negative wall voltage is accumulated on the surface of the insulator layer 7 on the data electrode D j that write discharges have been induced.

【0012】以上により書き込み期間における書き込み
動作が終了する。
Thus, the writing operation in the writing period is completed.

【0013】続く維持期間において、先ず、全ての走査
電極SCN1〜SCNnおよび維持電極SUS1〜SUSn
を0(V)に一旦戻した後、全ての走査電極SCN1
SCNnに正の維持パルス電圧+Vm(V)を印加する
と、書き込み放電を起こした放電セル12における走査
電極SCNi(iは1〜nの整数とする)上の保護膜3
の表面と維持電極SUS1〜SUSn上の保護膜3の表面
との間の電圧は、維持パルス電圧+Vm(V)に、書き
込み期間において蓄積された走査電極SCNi上の保護
膜3表面に蓄積された正の壁電圧および維持電極SUS
i上の保護膜3表面に蓄積された負の壁電圧が加算され
たものとなり、放電開始電圧を超える。このため、書き
込み放電を起こした放電セルにおいて、走査電極SCN
iと維持電極SUSiとの間に維持放電が起こり、この維
持放電を起こした放電セルにおける走査電極SCNi
の保護膜3表面には負の壁電圧が蓄積され、維持電極S
USi上の保護膜3表面には正の壁電圧が蓄積される。
その後、維持パルス電圧は0(V)に戻る。
In the subsequent sustain period, first, all the scan electrodes SCN 1 to SCN n and the sustain electrodes SUS 1 to SUS n
Is once returned to 0 (V), and then all the scan electrodes SCN 1 to
When applying a positive sustain pulse voltage + Vm (V) to SCN n, a protective film 3 on the scanning in the discharge cell 12 having generated the address discharge electrode SCN i (i is an integer of 1 to n)
Voltage between the surface and the sustain electrodes SUS 1 ~SUS n on the protective film 3 on the surface of, the sustain pulse voltage + Vm (V), the accumulated protective film 3 surface on the scanning electrode SCN i at the write period Stored positive wall voltage and sustain electrode SUS
The sum of the negative wall voltages accumulated on the surface of the protective film 3 on i is higher than the discharge starting voltage. Therefore, in the discharge cell in which the write discharge has occurred, the scan electrode SCN
sustain discharge between the i and the sustain electrode SUS i occurs, negative wall voltage is accumulated on the protective film 3 surface on the scanning electrode SCN i in a discharge cell having undergone the sustain discharge, sustain electrodes S
Positive wall voltage is accumulated in the protective film 3 surface on the US i.
Thereafter, the sustain pulse voltage returns to 0 (V).

【0014】続いて、全ての維持電極SUS1〜SUSn
に正の維持パルス電圧+Vm(V)を印加すると、維持
放電を起こした放電セルにおける維持電極SUSi上の
保護膜3表面と走査電極SCNi上の保護膜3表面との
間の電圧は、維持パルス電圧+Vm(V)に、直前の維
持放電によって蓄積された走査電極SCNi上の保護膜
3表面の負の壁電圧および維持電極SUSi上の保護膜
3表面の正の壁電圧が加算されたものとなる。このた
め、この維持放電を起こした放電セルにおいて、維持電
極SUSiと走査電極SCNiとの間に維持放電が起こる
ことにより、その放電セルにおける維持電極SUSi
の保護膜3表面に負の壁電圧が蓄積され、走査電極SC
i上の保護膜3表面に正の壁電圧が蓄積される。その
後、維持パルス電圧は0(V)に戻る。
Subsequently, all the sustain electrodes SUS 1 to SUS n
By applying positive sustain pulse voltage + Vm to (V), the voltage between the protective film 3 surface and the scanning electrode SCN i on the protective film 3 surface on the sustain electrode SUS i in a discharge cell having undergone the sustain discharge, the the sustain pulse voltage + Vm (V), the positive wall voltage at the negative wall voltage and the sustain electrode SUS i on the protective film 3 surface of the protective film 3 surface on the scanning electrode SCN i accumulated by the immediately preceding sustain discharge addition It was done. Therefore, in the discharge cell having undergone the sustain discharge, by the sustain discharge occurs between the sustain electrode SUS i and the scanning electrode SCN i, negatively protective film 3 surface on the sustain electrode SUS i at the discharge cell The wall voltage is accumulated and the scan electrode SC
Positive wall voltage is accumulated in the protective film 3 surface on the N i. Thereafter, the sustain pulse voltage returns to 0 (V).

【0015】以降同様に、全ての走査電極SCN1〜S
CNnと全ての維持電極SUS1〜SUSnとに正の維持
パルス電圧+Vm(V)を交互に印加することにより、
維持放電が継続して行われる。維持期間の最終におい
て、全ての走査電極SCN1〜SCNnに正の維持パルス
電圧+Vm(V)を印加すると、維持放電を起こした放
電セルにおける走査電極SCNi上の保護膜3表面と維
持電極SUSi上の保護膜3表面との間の電圧は、維持
パルス電圧+Vm(V)に、直前の維持放電によって蓄
積された走査電極SCNi上の保護膜3表面の正の壁電
圧と維持電極SUSi上の保護膜3表面の負の壁電圧が
加算されたものとなる。このため、この維持放電を起こ
した放電セルにおいて、走査電極SCNiと維持電極S
USiとの間に維持放電が起こることにより、その放電
セルにおける走査電極SCNi上の保護膜3表面に負の
壁電圧が蓄積され、維持電極SUSi上の保護膜3表面
に正の壁電圧が蓄積される。その後、維持パルス電圧は
0(V)に戻る。以上により維持期間の維持動作が終了
する。この維持放電により発生する紫外線で励起された
蛍光体10からの可視発光を表示に用いている。
Similarly, all the scan electrodes SCN 1 to SCN
By alternately applying a positive sustain pulse voltage + Vm (V) to CN n and all sustain electrodes SUS 1 to SUS n ,
Sustain discharge is continuously performed. In the last sustain period is applied to all the scanning electrodes SCN 1 ~SCN n a positive sustain pulse voltage + Vm (V), maintaining the protective film 3 surface on the scanning electrode SCN i in a discharge cell having undergone the sustain discharge electrodes voltage between the protective film 3 surface on the SUS i is the sustain pulse voltage + Vm (V), the protective film 3 surface on the stored scanning electrodes SCN i to the sustain discharge just before the positive wall voltage and the sustain electrode The negative wall voltage on the surface of the protective film 3 on the SUS i is added. Therefore, in the discharge cell having undergone the sustain discharge, the scan electrodes SCN i and the sustain electrodes S
By a sustain discharge occurs between the US i, negative wall voltage is accumulated in the protective film 3 surface on the scanning electrode SCN i at the discharge cell, the sustain electrode SUS i on the protective film 3 surface positive wall Voltage accumulates. Thereafter, the sustain pulse voltage returns to 0 (V). Thus, the maintenance operation of the maintenance period ends. Visible light emission from the phosphor 10 excited by ultraviolet rays generated by the sustain discharge is used for display.

【0016】続く消去期間において、全ての維持電極S
US1〜SUSnに0(V)から+Ve(V)に向かって
緩やかに上昇するランプ電圧を印加すると、維持放電を
起こした放電セルにおいて、走査電極SCNi上の保護
膜3表面と維持電極SUSi上の保護膜3表面との間の
電圧は、維持期間の最終時点における、走査電極SCN
i上の保護膜3表面の負の壁電圧および維持電極SUSi
上の保護膜3表面の正の壁電圧がこのランプ電圧に加算
されたものとなる。このため、維持放電を起こした放電
セルにおいて、維持電極SUSiと走査電極SCNiとの
間に微弱な消去放電が起こり、走査電極SCNi上の保
護膜3表面の負の壁電圧と維持電極SUSi上の保護膜
3表面の正の壁電圧が弱められて維持放電は停止する。
In the subsequent erasing period, all the sustain electrodes S
US1~ SUSnFrom 0 (V) to + Ve (V)
When a gradually increasing lamp voltage is applied, sustain discharge
In the raised discharge cell, the scan electrode SCNiProtection on
Membrane 3 surface and sustain electrode SUSiBetween the upper protective film 3 surface
The voltage is the scan electrode SCN at the end of the sustain period.
iNegative wall voltage on the surface of the protective film 3 and the sustain electrode SUSi
The positive wall voltage on the surface of the upper protective film 3 is added to this lamp voltage
It was done. Therefore, a discharge that caused a sustain discharge
In the cell, the sustain electrode SUSiAnd scanning electrode SCNiWith
A weak erase discharge occurs between the scan electrodes SCNiUpper guard
Negative wall voltage on the surface of protective film 3 and sustain electrode SUSiUpper protective film
The positive wall voltage on the three surfaces is weakened, and the sustain discharge stops.

【0017】以上により消去期間における消去動作が終
了する。
Thus, the erasing operation in the erasing period is completed.

【0018】ただし、以上の動作において、表示が行わ
れない放電セルに関しては、初期化期間に初期化放電は
起こるが、書き込み放電、維持放電および消去放電は行
われず、表示が行われない放電セルの走査電極SCNi
と維持電極SUSiの保護膜3の表面に蓄積された壁電
圧、およびデータ電極Dj上の絶縁体層7の表面に蓄積
された壁電圧は、初期化期間の終了時の状態まま保たれ
る。
However, in the above operation, with respect to the discharge cells in which no display is performed, an initialization discharge occurs during the initialization period, but no write discharge, sustain discharge and erase discharge are performed, and discharge cells in which no display is performed are performed. Scan electrode SCN i
And sustain electrode SUS i accumulated wall voltage on the surface of the protective film 3, and the data electrode D j on the accumulated wall voltage on the surface of the insulator layer 7 is maintained while the state at the end of the initializing period It is.

【0019】以上の全ての動作により第1のサブフィー
ルドにおける一画面が表示される。以下、同様な動作
が、第2のサブフィールドから第8のサブフィールドに
わたって行われる。これらのサブフィールドにおいて表
示される放電セルの輝度は、維持パルス電圧+Vm
(V)の印加回数により定まる。したがって、例えば、
各サブフィールドにおける維持パルス電圧の印加回数を
適宜設定して、1フィールド期間に維持放電による輝度
が20、21、22、・・・27である8個のサブフィール
ドで構成することにより、28=256階調の階調表示
が可能になる。
With the above operations, one screen in the first subfield is displayed. Hereinafter, the same operation is performed from the second subfield to the eighth subfield. The luminance of the discharge cell displayed in these subfields is equal to the sustain pulse voltage + Vm
It is determined by the number of applications of (V). So, for example,
The number of application times of sustain pulse voltage in each subfield is set appropriately, the brightness due to the sustain discharge in one field period 2 0, 2 1, 2 2, be composed of eight subfields is ... 2 7 Accordingly, gray scale display of 2 8 = 256 gray scales becomes possible.

【0020】以上説明した従来の駆動方法においては、
パネルに表示する放電セルが全くない、いわゆる黒画面
の表示においては、書き込み期間の書き込み放電、維持
期間の維持放電および消去期間の消去放電が起こらず、
初期化期間の初期化放電のみが起こり、この初期化放電
が微弱であり、その放電発光もまた微弱であるために、
パネルのコントラストが高いという特長がある。例え
ば、480行、852×3列のマトリックス構成を成す
42インチAC型プラズマディスプレイパネルにおい
て、1フィールド期間を8個のサブフィールドで構成し
て256階調表示を行った場合、各サブフィールドの初
期化期間における二回の初期化放電による発光輝度は
0.15cd/m2であった。したがって、8個のサブ
フィールドでの合計は0.15×8=1.2cd/m2
となり、最大輝度は420cd/m2であるので、この
パネルのコントラストは420/1.2:1=350:
1となり、かなり高い値のコントラストが得られる。
In the conventional driving method described above,
In a so-called black screen display where there are no discharge cells to be displayed on the panel, no write discharge in the write period, no sustain discharge in the sustain period and no erase discharge in the erase period occur,
Only the initializing discharge in the initializing period occurs, and the initializing discharge is weak, and the discharge light emission is also weak.
The feature is that the contrast of the panel is high. For example, in a 42-inch AC type plasma display panel having a matrix configuration of 480 rows and 852 × 3 columns, when one field period is composed of eight subfields and 256 gradations are displayed, the initial period of each subfield is set. The emission luminance due to the two setup discharges during the activation period was 0.15 cd / m 2 . Therefore, the sum of the eight subfields is 0.15 × 8 = 1.2 cd / m 2
Since the maximum luminance is 420 cd / m 2 , the contrast of this panel is 420 / 1.2: 1 = 350:
1, which is a very high contrast value.

【0021】[0021]

【発明が解決しようとする課題】しかし、上述の従来の
駆動方法においては、通常の照明下でパネル表示を行っ
た場合にはかなり高いコントラストが得られているが、
サブフィールド毎に必ず二回の初期化放電が起こるた
め、周囲が暗い所でパネル表示する場合には、この微弱
な初期化放電による発光でさえも目立つほど輝度が高
く、あまり明るくない場所でパネル表示する場合の黒表
示の視認性が悪いという大きな課題があった。
However, in the above-described conventional driving method, when a panel display is performed under normal illumination, a considerably high contrast is obtained.
Since the reset discharge always occurs twice for each subfield, when the panel is displayed in a dark place, the brightness is so high that even the light emission due to this weak reset discharge is conspicuous, and the panel is not so bright. There is a big problem that the visibility of black display when displaying is poor.

【0022】[0022]

【課題を解決するための手段】このような課題を解決す
るために、本発明者等は初期化期間における初期化動作
の役割について検討することにより、本発明を完成する
に至ったものである。
Means for Solving the Problems In order to solve such problems, the present inventors have completed the present invention by examining the role of the initialization operation during the initialization period. .

【0023】次に、従来の駆動方法では、各サブフィー
ルドごとに初期化動作が必要となる理由について説明す
る。ここで、図5に示す従来の駆動波形において、Vw
=70V、Vm=200Vとして説明する。
Next, the reason why an initialization operation is required for each subfield in the conventional driving method will be described. Here, in the conventional driving waveform shown in FIG.
= 70V and Vm = 200V.

【0024】書き込み期間において、所定の放電セルで
書き込み放電を起こすためには、放電セルのデータ電極
jと走査電極SCNiとの間の放電空間に放電開始電圧
(例えば250V程度)以上の電圧を印加する必要があ
る。書き込み動作時には、走査電極SCNiは0Vであ
りデータ電極Djには70Vの書き込み電圧が印加され
るので、確実に書き込み動作を行うには、データ電極D
j上の絶縁体層7上には約200Vの壁電圧をあらかじ
め蓄積する必要がある。この書き込みに必要な壁電圧を
write(〜200V)とする。
[0024] In the writing period, in order to cause a write discharge at a predetermined discharge cell, the discharge starting voltage (for example, about 250V) in the discharge space between the data electrodes D j of the discharge cells with the scan electrodes SCN i or voltage Must be applied. In the write operation, the write voltage of 70V is applied to the scanning electrode SCN i is 0V data electrode D j, to reliably perform the write operation, the data electrodes D
It is necessary to previously store a wall voltage of about 200 V on the insulator layer 7 on j . The wall voltage required for this writing is defined as V write ((200 V).

【0025】また、維持期間における維持動作によりデ
ータ電極Dj上の絶縁体層7上には壁電圧が蓄積する
が、維持期間の終了時におけるその壁電圧の値は、走査
電極SCNiに印加される電圧と維持電極SUSiに印加
される電圧との中間の電圧値程度になると考えられる。
この壁電圧をVsustain(〜100V)とする。
Further, although the wall voltage on the insulator layer 7 on the data electrode D j by the sustain operation in the sustain period are accumulated, the value of the wall voltage at the sustain period ends, applied to the scan electrodes SCN i considered to be a voltage value approximately intermediate between the voltage applied to the voltage between the sustain electrode SUS i to be.
This wall voltage is set to V sustain ((100 V).

【0026】したがって、あるサブフィールドでの維持
動作の終了時から次のサブフィールドの書き込み動作へ
移る間に、データ電極Dj上の絶縁体層7上の壁電圧を
sus tainからVwriteに変化させる必要がある。この壁
電圧の差Vwrite−Vsustain(〜100V)を補うこと
が初期化動作の主要な役割の1つであり、初期化動作は
パネルを安定に駆動するために不可欠である。
[0026] Therefore, while moving from the end of the sustain operation in a certain subfield to the write operation of the next subfield, the wall voltage on the insulator layer 7 on the data electrode D j from V sus tain the V write We need to change it. Compensating for the difference V write −V sustain ((100 V) in the wall voltage is one of the main roles of the initialization operation, and the initialization operation is indispensable for driving the panel stably.

【0027】以上の考察から、あるサブフィールドでの
維持期間終了時におけるデータ電極Dj上の絶縁体層7
上の壁電圧Vsustainが、次のサブフィールドでの書き
込み期間において必要な壁電圧Vwriteとほぼ同じにな
るような駆動を行うことにより、初期化動作を簡略化
し、初期化動作に伴う不要な発光をなくすことができる
という知見を得た。この知見に基づき、黒の視認性が大
幅に向上するとともに、コントラストを非常に高めるこ
とができるパネルの駆動方法を得ることができた。
[0027] From the above consideration, the insulating layer 7 on the data electrode D j at the sustain period ends at a certain sub-field
By performing the driving such that the upper wall voltage V sustain is substantially the same as the wall voltage V write required in the writing period in the next subfield, the initialization operation is simplified, and the unnecessary operation accompanying the initialization operation is unnecessary. It has been found that light emission can be eliminated. Based on this finding, it was possible to obtain a panel driving method capable of greatly improving the visibility of black and greatly increasing the contrast.

【0028】本発明のAC型プラズマディスプレイパネ
ルの駆動方法は、初期化期間、書き込み期間および維持
期間を有する複数のサブフィールドにより1フィールド
期間を構成して階調表示を行うAC型プラズマディスプ
レイパネルの駆動方法であって、前記複数のサブフィー
ルドのうち少なくとも1つのサブフィールドにおける維
持期間の維持動作と、前記少なくとも1つのサブフィー
ルドに続くサブフィールドの初期化期間の初期化動作と
を同時に行わせるものである。
A method of driving an AC plasma display panel according to the present invention is a method of driving an AC plasma display panel which performs gradation display by forming one field period by a plurality of subfields having an initialization period, a writing period, and a sustain period. A driving method, wherein a sustaining operation of a sustaining period in at least one subfield of the plurality of subfields and an initializing operation of an initializing period of a subfield following the at least one subfield are simultaneously performed. It is.

【0029】この方法により、第2のサブフィールド以
降のサブフィールドでは、直前のサブフィールドで表示
を行った放電セルにおいてのみ初期化放電を起こし、表
示を行わない放電セルにおいては初期化放電を起こらな
くすることができる。
According to this method, in the subfields subsequent to the second subfield, an initializing discharge occurs only in the discharge cells that have performed the display in the immediately preceding subfield, and an initializing discharge occurs in the discharge cells that do not perform the display. Can be eliminated.

【0030】[0030]

【発明の実施の形態】本発明に用いるAC型プラズマデ
ィスプレイパネル(以下、パネルという)は従来例とし
て図3に示したものと同じである。また、このパネルの
電極配列図は図4に示したものと同じである。したがっ
て、それらの説明は省略する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An AC type plasma display panel (hereinafter referred to as a panel) used in the present invention is the same as the conventional example shown in FIG. The electrode arrangement of this panel is the same as that shown in FIG. Therefore, their description is omitted.

【0031】このパネルを駆動するための、本発明の一
実施の形態であるパネルの駆動方法について説明する。
図1にその駆動方法の動作駆動タイミング図を示す。
A panel driving method according to an embodiment of the present invention for driving the panel will be described.
FIG. 1 shows an operation driving timing chart of the driving method.

【0032】図1に示すように、1フィールド期間は、
初期化期間、書き込み期間および維持期間を有する第1
ないし第8のサブフィールドで構成されており、これに
よって256階調の表示を行うものである。これら8個
のサブフィールドのうち、第1のサブフィールドを除く
7個のサブフィールドおいて、初期化期間の初期化動作
の一部を、前のサブフィールドの維持期間の維持動作と
同時に行うようにしている。第1のサブフィールドにお
いては、初期化期間、書き込み期間および維持期間が独
立して設けられており、独立した消去期間は設けられて
いない。また、第2のサブフィールドにおいては、初期
化期間の一部が第1のサブフィールドの維持期間と重な
って設けられ、続いて書き込み期間および維持期間が設
けられており、消去期間は設けられていない。すなわ
ち、第1のサブフィールドの維持期間における維持動作
と同時に、第2のサブフィールドの初期化期間における
初期化動作が行われている。続く第3ないし第8のサブ
フィールドにおいても同様に初期化期間、書き込み期間
および維持期間が設けられているが、消去期間が設けら
れておらず、各サブフィールドの初期化期間における初
期化動作の一部は、すぐ前のサブフィールドの維持期間
における維持動作と同時に行われている。
As shown in FIG. 1, one field period is
First having an initialization period, a write period, and a sustain period
Through the eighth subfield, thereby displaying 256 gradations. In the seven sub-fields of the eight sub-fields except the first sub-field, part of the initialization operation in the initialization period is performed simultaneously with the operation of maintaining the sustain period of the previous sub-field. I have to. In the first subfield, an initialization period, a writing period, and a sustaining period are provided independently, and no independent erasing period is provided. In the second subfield, a part of the initialization period overlaps with the sustain period of the first subfield, is provided with a write period and a sustain period, and is provided with an erase period. Absent. That is, at the same time as the sustaining operation in the sustaining period of the first subfield, the initialization operation in the initializing period of the second subfield is performed. Similarly, in the subsequent third to eighth subfields, an initialization period, a writing period, and a sustain period are provided. However, an erasing period is not provided, and the initialization operation in the initialization period of each subfield is performed. Some are performed simultaneously with the sustain operation in the sustain period of the immediately preceding subfield.

【0033】図1において、第1のサブフィールドの初
期化期間および書き込み期間の動作は、従来例で説明し
た動作と同じであるので、それらの説明は省略する。第
1のサブフィールドの維持期間における動作と第2のサ
ブフィールドの初期化期間における動作とが同時に行わ
れている点については、本発明の主眼であるので図1お
よび図3を用いて以下に詳しく説明する。
In FIG. 1, the operations in the initialization period and the writing period of the first subfield are the same as the operations described in the conventional example, so that the description thereof will be omitted. The fact that the operation in the sustain period of the first subfield and the operation in the initialization period of the second subfield are performed simultaneously is the main feature of the present invention, and will be described below with reference to FIGS. explain in detail.

【0034】図1に示すように、第1のサブフィールド
の維持期間と、第2のサブフィールドの初期化期間の前
期間とが重なっており、この重なった期間において、全
ての走査電極SCN1〜SCNnおよび全ての維持電極S
US1〜SUSnに、直流電圧Vt(V)を維持パルス電
圧Vm(V)に重畳して印加している。すなわち、書き
込み期間において走査電極SCN1〜SCNnに印加する
走査パルス電圧のローレベルの値(0(V))に対し、
維持期間における維持電極SUS1〜SUSnおよび走査
電極SCN1〜SCNnに印加する維持パルス電圧のロー
レベルの値(Vt(V))を高電位にしている。そし
て、維持期間における最後の維持パルスのパルス幅を他
の維持パルスのパルス幅よりも短くし、その後走査電極
SCN1〜SCNnおよび維持電極SUS1〜SUSnの電
圧を一定の電圧Vu(V)とする。
As shown in FIG. 1, the sustain period of the first subfield overlaps with the period before the initialization period of the second subfield. In this overlap period, all the scan electrodes SCN 1 are overlapped. ~ SCN n and all sustain electrodes S
US 1 to ~SUS n, are applied so as to overlap the sustain pulse voltage Vm to DC voltage Vt (V) (V). That is, for low-level value of the scan pulse voltage applied to scan electrodes SCN 1 ~SCN n in the write period (0 (V)),
Low-level value of the sustain pulse voltage applied to the sustain electrodes SUS 1 ~SUS n and the scanning electrodes SCN 1 ~SCN n in the sustain period (Vt (V)) is at a high potential. Then, the pulse width of the last sustain pulse in the sustain period is made shorter than the pulse width of the other sustain pulses, and then the voltages of scan electrodes SCN 1 to SCN n and sustain electrodes SUS 1 to SUS n are changed to a fixed voltage Vu (V ).

【0035】引き続いて、第2のサブフィールドの初期
化期間の前期間に続く後期間において、全ての維持電極
SUS1〜SUSnに正電圧Vh(V)を印加し、全ての
走査電極SCN1〜SCNnに、電圧Vq'(V)から0
(V)に向かって緩やかに下降するランプ電圧を印加す
る。このとき電圧Vq'(V)は電圧Vq(V)と等し
くする必要はなく、電圧Vq'(V)は電圧Vq(V)
より低い電圧に設定することができる。
[0035] Subsequently, in a period after following the previous period of the setup period of the second subfield, a positive voltage is applied Vh (V) to all the sustain electrodes SUS 1 ~SUS n, all the scanning electrodes SCN 1 To SCN n from voltage Vq ′ (V) to 0
A ramp voltage gradually falling toward (V) is applied. At this time, the voltage Vq '(V) does not need to be equal to the voltage Vq (V), and the voltage Vq' (V) is equal to the voltage Vq (V).
A lower voltage can be set.

【0036】以上の動作において、第1のサブフィール
ドの維持期間の動作に着目すると、全ての走査電極SC
1〜SCNnおよび全ての維持電極SUS1〜SUSn
は直流電圧Vt(V)を維持パルス電圧Vm(V)に重
畳して印加されている。このため、全ての走査電極SC
1〜SCNnと全ての維持電極SUS1〜SUSnとの間
の電圧関係は、従来の駆動方法における動作、すなわち
全ての維持電極SUS 1〜SUSnと全ての走査電極SC
1〜SCNnとに正の維持パルス電圧Vm(V)を交互
に印加している場合と等価になる。このため、従来の場
合と同様に、書き込み放電を起こした放電セルでは維持
放電が継続して行われる。
In the above operation, the first subfield
Focusing on the operation during the sustain period of the scan electrodes, all the scan electrodes SC
N1~ SCNnAnd all sustain electrodes SUS1~ SUSnTo
Overlaps the DC voltage Vt (V) with the sustain pulse voltage Vm (V).
Tatami is applied. Therefore, all the scan electrodes SC
N1~ SCNnAnd all sustain electrodes SUS1~ SUSnBetween
Is related to the operation in the conventional driving method, that is,
All sustain electrodes SUS 1~ SUSnAnd all scan electrodes SC
N1~ SCNnAlternately with the positive sustain pulse voltage Vm (V)
Is equivalent to the case where For this reason,
In the same way as in the case above, it is maintained in the discharge cell
Discharge continues.

【0037】そして、維持期間において最後に印加され
る維持パルス電圧のパルス幅は、放電が壁電荷を形成し
て安定に終了する時間である2μsよりも短く設定され
ており、その維持パルス電圧印加後の走査電極SCN1
〜SCNnおよび維持電極SUS1〜SUSnの電圧は一
定の電圧Vu(V)に設定されている。このため、走査
電極SCN1〜SCNn上の保護膜3表面の壁電圧と維持
電極SUS1〜SUSn上の保護膜3表面の壁電圧とはほ
ぼ等しくなり、消去動作が行われることになる。また、
書き込み放電が発生しなかった放電セルについてはこの
ような維持放電は起こらない。
The pulse width of the last sustain pulse voltage applied during the sustain period is set to be shorter than 2 μs, which is the time when the discharge forms wall charges and stably ends. Subsequent scan electrode SCN 1
To SCN n and sustain electrodes SUS 1 to SUS n are set to a constant voltage Vu (V). Thus, approximately equal to the wall voltage of the protective film 3 surface on the scanning electrode SCN 1 ~SCN n on the protective film 3 surface of the wall voltage and the sustain electrodes SUS 1 ~SUS n, so that the erasing operation is carried out . Also,
Such a sustain discharge does not occur in a discharge cell in which no write discharge has occurred.

【0038】次に、第2サブフィールドの初期化期間に
着目すると、この初期化期間の前期間の初期化動作にお
いて、全ての走査電極SCN1〜SCNnと全てのデータ
電極D1〜Dmとの間の電圧はVt(V)またはVt+V
m(V)となる。書き込み放電を起こした放電セルで
は、データ電極Dj上の絶縁体層7の表面と走査電極S
CNi上の保護膜3表面の間に加わる最大電圧は、Vt
+Vm(V)と走査電極SCNi上の保護膜3表面に蓄
積された正の壁電圧とを加算したものから、データ電極
j上の絶縁体層7の表面に書き込み動作により蓄積さ
れた負の壁電圧を引いたもの(即ち絶対値で足したも
の)となり、放電開始電圧をこえる。このため、書き込
み放電を起こした放電セルでは走査電極SCNiからデ
ータ電極Djに放電が起こる。これがデータ電極Djに対
しての初期化放電となり、データ電極Dj上の絶縁体層
7の表面に正の壁電圧が蓄積される。この初期化放電
は、初期化期間の前期間の間、維持パルス電圧を印加す
るごとに発生している。
Next, focusing on the initializing period of the second subfield, in the initializing operation before the initializing period, all the scan electrodes SCN 1 to SCN n and all the data electrodes D 1 to D m Is Vt (V) or Vt + V
m (V). In the discharge cells having generated the address discharge, the surface and the scanning electrode S of the insulator layer 7 on the data electrode D j
The maximum voltage applied between the surfaces of the protective film 3 on CN i is Vt
From + Vm (V) and the result of the addition of the positive wall voltage stored on the protective film 3 surface on the scanning electrode SCN i, negative accumulated by the writing operation to the surface of the insulator layer 7 on the data electrode D j (I.e., the sum of absolute values), and exceeds the discharge starting voltage. Therefore, the discharge from the scan electrodes SCN i to the data electrode D j occurs in the discharge cells having generated the address discharge. This is the initialization discharge for the data electrode D j, and positive wall voltage is accumulated on the surface of the insulator layer 7 on the data electrode D j. This setup discharge is generated every time a sustain pulse voltage is applied during a period before the setup period.

【0039】一方、書き込みが行われていない放電セル
では、データ電極Dj上の絶縁体層7の表面と走査電極
SCNi上の保護膜3表面との間に加わる最大電圧は、
Vt+Vm(V)と走査電極SCNiの保護膜3表面に
蓄積された正の壁電圧とを加算したものから、データ電
極Dj上の絶縁体層7表面に蓄積された正の壁電圧を引
いたものとなり、放電開始電圧をこえない。このため、
第1のサブフィールドで書き込みがなかった放電セルで
は、初期化期間の前期間ではデータ電極Djに対する初
期化放電は起こらない。
On the other hand, in the discharge cells in which writing is not carried out, the maximum voltage applied between the data electrodes D j on the insulator layer 7 surface and the scanning electrode SCN i on the protective film 3 surface is
A positive wall voltage stored on the protective film 3 surface of vt + Vm (V) and scanning electrode SCN i from those obtained by adding, subtracting the positive wall voltage stored on the insulator layer 7 surface on data electrode D j And does not exceed the discharge starting voltage. For this reason,
In the first subfield discharge cell write it was not, in the previous period of the setup period does not occur initializing discharge for the data electrode D j.

【0040】さらに、初期化期間の後期間の初期化動作
では、全ての維持電極SUS1〜SUSnには正電圧Vh
(V)を印加する。また、全ての走査電極SCN1〜S
CN nには、全ての維持電極SUS1〜SUSnに対して
放電開始電圧以下となる電圧Vq'(V)から、放電開
始電圧を越え書き込み期間の走査電極に印加する走査パ
ルス電圧のローレベルの値に等しい0(V)に向かって
緩やかに下降するランプ電圧を印加している。このラン
プ電圧が下降する間に、初期化期間の前期間において初
期化放電が起こった放電セルでは、維持電極SUSi
ら走査電極SCNiに再び初期化放電が起こる。この初
期化放電は微弱であり、走査電極SCNi上の保護膜3
の表面に正の壁電圧が、維持電極SUSiの表面に負の
壁電圧がそれぞれわずかに蓄積する。また、データ電極
jと走査電極SCNiとの間にも微弱な放電が起こり、
データ電極Dj上の絶縁体層7の表面に蓄積された正の
壁電圧は書き込み動作に適した値に調整される。1回目
の初期化放電が起こらなかった放電セルについては、前
のサブフィールドにおいて壁電圧はすでに書き込み動作
に適した値に調整されているため、前述の2回目の初期
化放電は起こらない。
Further, an initialization operation in a period after the initialization period
Then, all the sustain electrodes SUS1~ SUSnHas a positive voltage Vh
(V) is applied. In addition, all scan electrodes SCN1~ S
CN nHas all the sustain electrodes SUS1~ SUSnAgainst
From the voltage Vq ′ (V) that is lower than the discharge starting voltage,
The scanning pulse applied to the scanning electrode during the writing period exceeding the starting voltage
Towards 0 (V), which is equal to the low level value of the loose voltage
A ramp voltage that gradually decreases is applied. This run
During the period before the reset period, while the
In the discharge cell where the reset discharge has occurred, the sustain electrode SUSiOr
Scan electrode SCNiThe reset discharge occurs again. This first
Reset discharge is weak, and the scan electrode SCNiUpper protective film 3
A positive wall voltage is applied to the surface of theiNegative on the surface of
Each wall voltage accumulates slightly. Also, the data electrode
DjAnd scanning electrode SCNiAnd a weak discharge occurs between
Data electrode DjThe positive charge accumulated on the surface of the upper insulator layer 7
The wall voltage is adjusted to a value suitable for a write operation. First time
For the discharge cells in which the initialization discharge did not occur,
Wall voltage already write operation in subfield
Is adjusted to a value suitable for
No chemical discharge occurs.

【0041】以上の説明で明らかなように、第2ないし
第8のサブフィールドにおいても消去期間が設けられて
いないが、書き込み動作、維持動作および消去動作と次
のサブフィールドの初期化動作が確実に行われる。ま
た、第2のサブフィールド以降の各サブフィールドにお
いて、表示が行われない放電セルに関しては、初期化放
電、書き込み放電、維持放電および消去放電は行われ
ず、その放電セルに対応する走査電極SCN1〜SCNn
および維持電極SUS1〜SUSn上の保護膜3の表面の
壁電圧およびデータ電極D1〜Dm上の絶縁体層7の表面
の壁電圧は、各サブフィールドの直前のサブフィールド
における初期化期間の終了時の状態に保たれる。
As is apparent from the above description, although the erasing period is not provided in the second to eighth subfields, the writing operation, the sustaining operation, the erasing operation, and the initializing operation of the next subfield are ensured. Done in Further, in each of the sub-fields after the second sub-field, the initializing discharge, the writing discharge, the sustaining discharge and the erasing discharge are not performed with respect to the discharge cells where no display is performed, and the scan electrode SCN 1 corresponding to the discharge cell is not performed. ~ SCN n
And the wall voltage of sustain electrodes SUS 1 a wall voltage on the surface of the protective film 3 on ~SUS n and data electrodes D 1 to D m on the surface of the insulator layer 7 is initialized in the immediately preceding subfield of each subfield It is kept at the end of the period.

【0042】以上説明したように、図1に示した本発明
の一実施の形態では、第1のサブフィールドにおける初
期化期間の微弱な初期化放電は、パネルの表示の有無に
関わらず行われるのに対し、第2のサブフィールド以降
の各サブフィールドにおいては、初期化期間の初期化放
電はパネルの表示を行う放電セルに対してのみ次のサブ
フィールドに対する初期化動作として行われる。また、
初期化放電の輝度は維持放電の輝度に上乗せされるだけ
であり、表示しない放電セルに対してはこのような初期
化放電は起こらない。
As described above, in the embodiment of the present invention shown in FIG. 1, the weak initializing discharge in the initializing period in the first subfield is performed regardless of the presence or absence of display on the panel. On the other hand, in each of the subfields subsequent to the second subfield, the initializing discharge in the initializing period is performed only for the discharge cells for displaying the panel as the initializing operation for the next subfield. Also,
The brightness of the setup discharge is only added to the brightness of the sustain discharge, and such a setup discharge does not occur in a discharge cell that is not displayed.

【0043】例えば、480行、852×3列のマトリ
クス構成を成す42インチAC型プラズマディスプレイ
パネルにおいて、1フィールド期間を8個のサブフィー
ルドで構成して256階調の表示を行った場合、最大輝
度が420cd/m2となったのに対し、第1のサブフ
ィールドの初期化期間における2回の初期化放電による
輝度は0.15cd/m2であった。ここで、Vp=1
90V、Vq=190V、Vm=200V、Vt=10
0V、Vu=200V、Vh=300V、Vq'=10
0V、Vs=70Vとした。この結果、パネルに表示す
べき放電セルが全くない、いわゆる黒画面の表示におい
ては、第1のサブフィールドの初期化放電の発光のみが
行われるので、黒表示の輝度が0.15cd/m2と従
来の1/8となり、薄暗いところでパネルを表示した場
合、従来に比べて黒表示の視認性を極めて向上させるこ
とができた。また、本実施の形態によるパネルのコント
ラストは420/0.15:1=2800:1となり、
極めて高い値のコントラストが得られた。
For example, in a 42-inch AC type plasma display panel having a matrix configuration of 480 rows and 852.times.3 columns, when one field period is constituted by eight subfields and 256 gray scales are displayed, the maximum is obtained. The luminance was 420 cd / m 2 , whereas the luminance due to two setup discharges in the setup period of the first subfield was 0.15 cd / m 2 . Here, Vp = 1
90V, Vq = 190V, Vm = 200V, Vt = 10
0 V, Vu = 200 V, Vh = 300 V, Vq ′ = 10
0 V and Vs = 70 V. As a result, in the display of a so-called black screen where there are no discharge cells to be displayed on the panel, only the light emission of the initializing discharge in the first subfield is performed, so that the brightness of the black display is 0.15 cd / m 2. When the panel is displayed in a dim place, the visibility of black display can be significantly improved as compared with the related art. Also, the contrast of the panel according to the present embodiment is 420 / 0.15: 1 = 2800: 1,
Very high contrast values were obtained.

【0044】また、第2ないし第8のサブフィールドの
初期化期間の初期化動作の一部と、すぐ前のサブフィー
ルドの維持期間における維持動作とが同時に行われてい
るため、初期化に要する時間を大幅に短縮することがで
きるとともに、独立した消去期間を設ける必要がなくな
るため、従来の駆動方法に比較して駆動時間を大幅に短
縮することができる。本実施の形態では、1フィールド
期間での初期化期間は1msであり、従来の駆動方法に
おける初期化期間および消去期間の2.8msに比べて
大幅に短縮することができた。したがって、駆動時間が
増加する大型パネルや高精細度パネルに対して有効な駆
動方法となり得る。
Further, since a part of the initializing operation in the initializing period of the second to eighth subfields and the sustaining operation in the sustaining period of the immediately preceding subfield are simultaneously performed, the initialization is required. The time can be greatly reduced, and it is not necessary to provide an independent erasing period. Therefore, the driving time can be significantly reduced as compared with the conventional driving method. In the present embodiment, the initialization period in one field period is 1 ms, which can be significantly reduced as compared with the initialization period and the erasing period of 2.8 ms in the conventional driving method. Therefore, the driving method can be an effective driving method for a large panel or a high-definition panel whose driving time increases.

【0045】次に、第2の実施の形態における駆動波形
タイミング図を図2に示す。
Next, FIG. 2 shows a drive waveform timing chart according to the second embodiment.

【0046】AC型プラズマディスプレイパネルは放電
セルの周囲が誘電体に囲まれており各電極の駆動波形は
容量結合的に放電セルに印加されるため、各駆動波形を
DC的にレベルシフトしてもその動作は変わらないとい
う性質を有している。この性質を利用して、図2に示す
ような駆動波形すなわち図1に示した走査電極駆動波形
および維持電極駆動波形を全体的に直流電圧Vt(V)
だけ下げた駆動波形を印加している。この場合、0Vを
基準に維持パルスVmを作成できるため回路設計の上で
実現が容易となる。
In the AC type plasma display panel, since the periphery of the discharge cell is surrounded by a dielectric and the drive waveform of each electrode is applied to the discharge cell in a capacitively coupled manner, each drive waveform is level-shifted in a DC manner. Also has the property that its operation does not change. Utilizing this property, the driving waveform as shown in FIG. 2, that is, the scanning electrode driving waveform and the sustain electrode driving waveform shown in FIG.
A drive waveform that is lowered only is applied. In this case, since the sustain pulse Vm can be created based on 0 V, the implementation is easy in circuit design.

【0047】上記実施の形態では、維持期間の最後の維
持パルス幅を短くし、最後の維持動作と同時に維持放電
を停止させるための消去動作を行った場合について説明
したが、ランプ波形を用いて消去動作を行ってもよい。
また、1フィールド期間を、初期化期間、書き込み期間
および維持期間を有する8個のサブフィールドで構成し
て階調表示を行うAC型プラズマディスプレイパネルの
駆動方法において、8個のサブフィールドのうちの7個
のサブフィールドについて、あるサブフィールドの維持
期間における維持動作と次のサブフィールドにおける初
期化期間の初期化動作とを同時に行う駆動方法について
説明したが、1フィールド期間を構成しているサブフィ
ールドの数、消去期間を設けないサブフィールドの数お
よび維持期間の最終部の維持動作と次のサブフィールド
の初期化期間の初期化動作とを同時に行うサブフィール
ドの数は任意に設定することができる。また、サブフィ
ールドにおける駆動波形も限定されるものではない。さ
らに、本発明は、他の構成のAC型プラズマディスプレ
イパネルに対しても実施することができるものである。
In the above embodiment, the case where the last sustain pulse width in the sustain period is shortened and the erase operation for stopping the sustain discharge at the same time as the last sustain operation is performed has been described. An erasing operation may be performed.
Further, in the driving method of the AC type plasma display panel for performing the gray scale display by forming one field period by eight subfields having an initialization period, a writing period, and a sustaining period, of the eight subfields, With respect to the seven subfields, the driving method for simultaneously performing the sustaining operation in the sustaining period of a certain subfield and the initializing operation in the initializing period in the next subfield has been described, but the subfields constituting one field period are described. , The number of subfields without an erasing period, and the number of subfields for simultaneously performing the operation of maintaining the last part of the sustaining period and the operation of initializing the next subfield can be arbitrarily set. . Also, the driving waveform in the subfield is not limited. Further, the present invention can be applied to an AC plasma display panel having another configuration.

【0048】[0048]

【発明の効果】以上説明したように、本発明のAC型プ
ラズマディスプレイパネルの駆動方法によれば、1フィ
ールドを構成している複数のサブフィールドのうち少な
くとも1つのサブフィールドにおける維持期間の維持動
作と、そのサブフィールドに続くサブフィールドにおけ
る初期化期間の初期化動作とを同時に行うことにより、
パネルに表示のない、いわゆる黒画面表示における輝度
が極めて低くなるので、黒の視認性が大幅に向上すると
ともに、パネルのコントラストを非常に高めることがで
きる。
As described above, according to the AC plasma display panel driving method of the present invention, the sustaining operation of the sustaining period in at least one of a plurality of subfields constituting one field. And the initialization operation of the initialization period in the subfield following the subfield at the same time,
Since the brightness in the so-called black screen display without display on the panel is extremely low, the visibility of black is greatly improved, and the contrast of the panel can be greatly increased.

【0049】さらに、初期化に要する時間が大幅に短縮
され、消去に要する時間も必要なくなるため、従来の駆
動方法に比較して駆動時間を大幅に短縮することができ
る。したがって、本発明は大型化または高精細度化した
パネルに対して有効な駆動方法となる。
Furthermore, the time required for initialization is greatly reduced, and the time required for erasure is not required, so that the driving time can be significantly reduced as compared with the conventional driving method. Therefore, the present invention is an effective driving method for a large-sized or high-definition panel.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第一の実施形態としてのAC型プラズ
マディスプレイパネルの駆動方法を示す動作駆動タイミ
ング図
FIG. 1 is an operation drive timing chart showing a method for driving an AC plasma display panel according to a first embodiment of the present invention;

【図2】本発明の第2の実施形態としてのAC型プラズ
マディスプレイパネルの駆動方法を示す動作駆動タイミ
ング図
FIG. 2 is an operation drive timing chart showing a method for driving an AC plasma display panel according to a second embodiment of the present invention;

【図3】従来のAC型プラズマディスプレイパネルの一
部斜視図
FIG. 3 is a partial perspective view of a conventional AC plasma display panel.

【図4】従来のAC型プラズマディスプレイパネルの電
極配列図
FIG. 4 is an electrode arrangement diagram of a conventional AC plasma display panel.

【図5】従来のAC型プラズマディスプレイパネルの駆
動方法を示す動作駆動タイミング図
FIG. 5 is an operation drive timing chart showing a method for driving a conventional AC plasma display panel.

【符号の説明】[Explanation of symbols]

1 第一のガラス基板 2 誘電体層 3 保護膜 4 走査電極 5 維持電極 6 第二のガラス基板 7 絶縁体層 8 データ電極 9 隔壁 10 蛍光体 11 放電空間 12 放電セル DESCRIPTION OF SYMBOLS 1 First glass substrate 2 Dielectric layer 3 Protective film 4 Scan electrode 5 Sustain electrode 6 Second glass substrate 7 Insulator layer 8 Data electrode 9 Partition wall 10 Phosphor 11 Discharge space 12 Discharge cell

───────────────────────────────────────────────────── フロントページの続き (72)発明者 河内 誠 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5C080 AA05 BB05 DD03 DD30 EE29 EE30 FF12 GG12 HH02 HH04 JJ04 JJ06  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Makoto Kawachi 1006 Kazuma Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd. F-term (reference) 5C080 AA05 BB05 DD03 DD30 EE29 EE30 FF12 GG12 HH02 HH04 JJ04 JJ06

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 初期化期間、書き込み期間および維持期
間を有する複数のサブフィールドにより1フィールド期
間を構成して階調表示を行うAC型プラズマディスプレ
イパネルの駆動方法であって、前記複数のサブフィール
ドのうち少なくとも1つのサブフィールドにおける維持
期間の維持動作と、前記少なくとも1つのサブフィール
ドに続くサブフィールドの初期化期間の初期化動作とを
同時に行わせるAC型プラズマディスプレイパネルの駆
動方法。
1. A method of driving an AC-type plasma display panel for performing a gray scale display by forming one field period by a plurality of subfields having an initialization period, a writing period, and a sustain period, the method comprising: A method for driving an AC-type plasma display panel, wherein the sustaining operation of the sustaining period in at least one subfield and the initializing operation of the initializing period of the subfield subsequent to the at least one subfield are simultaneously performed.
【請求項2】 走査電極および維持電極が形成された基
板とデータ電極が形成された別の基板とが対向配置され
たAC型プラズマディスプレイパネルを駆動する方法で
あって、1フィールド期間が初期化期間、書き込み期間
および維持期間を有する複数のサブフィールドにより構
成されており、前記複数のサブフィールドのうち少なく
とも1つのサブフィールドでの前記維持期間において、
前記走査電極および前記維持電極に印加する維持パルス
電圧のローレベルの値を、前記書き込み期間において前
記走査電極に印加する走査パルス電圧のローレベルの値
に比べて高く設定することにより、前記少なくとも1つ
のサブフィールドにおける維持期間の維持動作と、前記
少なくとも1つのサブフィールドに続くサブフィールド
の初期化期間の初期化動作とを同時に行わせるAC型プ
ラズマディスプレイパネルの駆動方法。
2. A method of driving an AC plasma display panel in which a substrate on which a scan electrode and a sustain electrode are formed and another substrate on which a data electrode is formed are opposed to each other, wherein one field period is initialized. A plurality of sub-fields having a period, a writing period, and a sustain period. In the sustain period in at least one sub-field of the plurality of sub-fields,
The low-level value of the sustain pulse voltage applied to the scan electrode and the sustain electrode is set higher than the low-level value of the scan pulse voltage applied to the scan electrode in the writing period. A method for driving an AC plasma display panel, wherein a sustaining operation of a sustaining period in one subfield and an initializing operation of an initializing period of a subfield subsequent to the at least one subfield are simultaneously performed.
【請求項3】 前記少なくとも1つのサブフィールドの
前記維持期間において前記走査電極または前記維持電極
に印加する最後の維持パルス幅を他の維持パルス幅より
も短く設定することにより、前記維持期間の最後の維持
動作と同時に維持放電を停止させるための消去動作を行
わせる請求項2記載のAC型プラズマディスプレイパネ
ルの駆動方法。
3. The method according to claim 1, wherein a last sustain pulse width applied to the scan electrode or the sustain electrode in the sustain period of the at least one subfield is set shorter than other sustain pulse widths. 3. The method of driving an AC-type plasma display panel according to claim 2, wherein an erasing operation for stopping the sustaining discharge is performed simultaneously with the sustaining operation.
JP4254999A 1999-01-22 1999-02-22 Driving method of AC type plasma display panel Expired - Fee Related JP3733773B2 (en)

Priority Applications (17)

Application Number Priority Date Filing Date Title
JP4254999A JP3733773B2 (en) 1999-02-22 1999-02-22 Driving method of AC type plasma display panel
TW089100703A TW516014B (en) 1999-01-22 2000-01-18 Driving method for AC plasma display panel
US09/487,837 US6294875B1 (en) 1999-01-22 2000-01-19 Method of driving AC plasma display panel
EP09008593A EP2105910A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP09008594A EP2105911A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP07018573A EP1881475A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP00101099A EP1022715A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP09008592A EP2105909A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
KR10-2000-0002875A KR100531527B1 (en) 1999-01-22 2000-01-21 Method for driving AC plasma display panel
CNB2003101026458A CN100354916C (en) 1999-01-22 2000-01-24 Driving method for AC type plasma display screen
CNB001016598A CN1169104C (en) 1999-01-22 2000-01-24 Driving method for AC type plasma display screen
CNB2003101026462A CN1326104C (en) 1999-01-22 2000-01-24 Driving method for AC-type plasma displaying screen
KR10-2002-0073902A KR100428260B1 (en) 1999-01-22 2002-11-26 Method for driving AC plasma display panel
KR10-2003-0065075A KR100428268B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR10-2003-0065076A KR100447579B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR10-2003-0065077A KR100453523B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR10-2005-0074278A KR100528525B1 (en) 1999-01-22 2005-08-12 AC plasma display apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4254999A JP3733773B2 (en) 1999-02-22 1999-02-22 Driving method of AC type plasma display panel

Related Child Applications (1)

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Publications (3)

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JP2000242224A true JP2000242224A (en) 2000-09-08
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